Wikibooks:Requests for deletion

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== [[Salute, Jonathan!]] and its translations ==

&lt;div style=&quot;column-count: 7;&quot;&gt;
* [[Salute, Jonathan!|Interlingue/Occidental]] ([[w:en:Occidental|w]], original)
* [[Òla, Ionatà!|Audià]]
* [[Holo, Jonathan!|Cristianés]]
* [[Terve, Jonathan!|Ekumenski]]
* [[Hej, Jonathan! (Germanisch)|Germanisch]]
* [[Salom, Jonatan!|Globasa]]
* [[Àlŏ, Jonathan!|Guosa]] ([[w:en:Guosa|w]])
* [[Salut, Jonathan!|Idiom Neutral]] ([[w:en:Idiom Neutral|w]])
* [[Saluto, Jonathan! (Ido)|Ido]] ([[w:en:Ido|w]])
* [[Hallo, Jonathan!|Interlingua]] ([[w:en:Interlingua|w]])
* [[Salut, Jonathan! (Interocidental)|Interocidental]]
* [[Bune Ğonatan!|Lingaust]]
* [[Oila, Jonatan!|Lingue Simple]]
* [[Haloo, Jonatan!|Lingwa de Planeta]] ([[w:en:Lingwa de Planeta|w]])
* [[Sin Chao, Jonathan!|Masa Tang]]
* [[Salut, ionatano!|Meteza]]
* [[Salu, Jon!|Mini]]
* [[Hay, Jonathan!|Mirad]]
* [[Hai, Jon!|Monav]]
* [[Sesan Jon!|Monkel]]
* [[Salam, Jonathan!|Mundeze]]
* [[Dag, Jonathan!|Negerhollands]] ([[w:en:Negerhollands|w]])
* [[Salut Jonathan!|Neo]] ([[w:en:Neo|w]])
* [[Hej, Jonathan!|Nordien]]
* [[Saluto, Jonathan!|Novial]] ([[w:en:Novial|w]])
* [[Salute, Jonathan! (Novlingue)|Novlingue]]
* [[Alo, Jonathan!|Numo]]
* [[Hela, Jonathan!|Proyo]]
* [[Salute, Jonathan! (Romanica)|Romanica]] ([[w:en:Romanica|w]])
* [[Simi, Jonathan!|Solresol]] ([[w:en:Solresol|w]])
* [[Toki a, jan Jonatan!|Toki Pona]] ([[w:en:Toki Pona|w]])
* [[Glidis, o Jonathan!|Volapük]] ([[w:en:Volapük|w]])
&lt;/div&gt;

There are a couple of issues here:

# Beyond their introductions, all of these books are written in languages which are not English, making them out of scope for the English Wikibooks.
# All but one of these books are in fact written in constructed languages, most of them in recently created conlangs. In some cases (e.g. [[Sin Chao, Jonathan!]]), I can't find any reliable sources describing the target language outside of the translation itself.
# Most of the translations (i.e. other than [[Salute, Jonathan!]] itself) were abandoned within the first five or so chapters (out of 100); none of them are complete, and there seems to be little effort to complete any of them.

While I recognize that this is an unusual project, and potentially one which could have some value, it's not at all clear to me that the English Wikibooks is the right place for it. — [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 00:24, 29 September 2024 (UTC)

: I'm really not sure what to do about these ones. While I recognize that this approach is certainly one method of teaching a language, I'm not sure that it constitutes an educational textbook. We do require that the English Wikibooks be written in English—for language-learning books, this typically means that the instructional parts are in English while the exercises are in the language being taught. I do think that if the language doesn't have much supporting evidence outside the book itself, it can safely be deleted. — [[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 01:01, 29 September 2024 (UTC)

: Author of the book here. I originally wanted to put it in the Interlingue Wikibooks https://ie.wikibooks.org/wiki/Principal_p%C3%A1gine but it somehow got locked when I wasn't paying attention and so I ended up putting it here. Getting it unlocked requires going through the process of starting an Incubator and all the rest so I opted for here and then started putting some English-only content once it was done. It's sort of in the same vein as books like Lingua Latina per se Illustrata that have separate versions with teacher notes and whatnot. [[Salute, Jonathan!/Capitul 1 - with notes]] After it was done the auxlang community really took to it which was a nice surprise. I think Ido has the largest number of chapters at the moment at 15.
:If the vast content of this book could be used to justify a quick reopening of the Interlingue Wikibooks to move it there, I'd love to do that. I imagine that an incubator with 100+ book chapters would be enough to open a Wikibooks and that's what this is. — [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 06:02, 29 September 2024 (UTC)

: Ah, I just realized that we do have a proposal to reopen the Interlingue Wikibooks: https://meta.wikimedia.org/wiki/Requests_for_new_languages/Wikibooks_Interlingue along with an Incubator page here. https://incubator.wikimedia.org/wiki/Wb/ie/Principal_p%C3%A1gine
: How easy would it be to migrate the entirety of Salute Jonathan to there? — [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 06:30, 29 September 2024 (UTC)

:: Hi @[[User:Mithridates|Mithridates]]! I'm not sure how incubator projects work, but I fully support migrating these books there. You may want to inquire over there and link to this discussion to support your request to move the content over there. Cheers! — [[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 13:16, 29 September 2024 (UTC)

::: Hi! Actually I have a third idea to propose after thinking about this again today (haven't been here much since I finished the book): I noticed that there is more English content than I remember and that might make it an awkward fit for the Interlingue Wikibooks. I definitely agree that having all the auxlang translations for new auxlang projects goes well beyond the scope of this Wikibooks. Finally, there are some auxlangs that are notable with their own Wikipedias.
::: So the idea is the following:
:::# Leave the original here and I can continue the work on the version with English notes and grammar. That will make it the same as Lingua Latina per se Illustrata, English by the Nature Method, Athenaze and all the rest.
:::# The Interlingua one can move to the Interlingua Wikibooks (maybe Romanica too if they want as it is sort of a dialect of Interlingua).
:::# For Ido and Lingua Franca Nova which have a Wikipedia but not a Wikibooks, I'm a little bit unsure...technically they could have their own version like the original one but would require English explanations. I could let them know and see if they are willing to do so and see what they think (work on adding English to the books vs. move the content elsewhere).
:::# The rest can move to a Github repo, then be deleted, and the front page of this book can have a single link to the repo.
::: Any thoughts on that? Adding the extra English content will be easy as it is my book and I know it inside and out.
::: Edit: [https://en.wikibooks.org/wiki/Salute,_Jonathan!/Grammar_(pronouns) this page] I just added.  — [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 13:50, 29 September 2024 (UTC)

:::: Thanks for taking the time to consider this! Here are my responses/questions:
::::* Is the original [[Salute, Jonathan!]] (Occidental)? Since that one is quite fleshed out, I agree that if you edit it so the primary language of the book (e.g. headers, instructions, etc) are written in English while leaving the actual story in Occidental, it would be okay and fit in more with instructional language textbooks.
::::* For your points 2 and 3, I'm not sure how those other projects work, so I'll leave it up to them. I'm not quite sure why they would need to move, since in theory they could be revised with English as the language of instruction? Although, they have been left incomplete for a long time.
::::* For your point 4, I have no problem with that. Cheers! — [[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 16:51, 29 September 2024 (UTC)

::::: Hello again, it's the weekend so I have a bit more time to work on this. I've decided to merge the extra content from the following five chapters since the difference is fairly small and the original chapters should now have this English content. Could you delete these five pages now that they are no longer needed? [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 14:02, 5 October 2024 (UTC)
::::: [[Salute, Jonathan!/Capitul 1 - with notes]]
::::: [[Salute, Jonathan!/Capitul 2 - with notes]]
::::: [[Salute, Jonathan!/Capitul 3 - with notes]]
::::: [[Salute, Jonathan!/Capitul 4 - with notes]]
::::: [[Salute, Jonathan!/Capitul 5 - with notes]] [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 14:02, 5 October 2024 (UTC)
:::::: [[File:Yes_check.svg|{{#ifeq:|small|8|15}}px|link=|alt=]] {{#ifeq:|small|&lt;small&gt;|}}'''Done'''{{#ifeq:|small|&lt;/small&gt;|}} — [[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 23:34, 5 October 2024 (UTC)

::::::: Hi again! No luck trying to find a home for the random language translations on other auxlang wikis, can't find one that is actively maintained.
::::::: The thought struck me that maybe I could just put those ones on a sub page of my user page, would that be permitted? If not, I think I'll just stick them somewhere in GitHub and call it a day since none of the people who started the translations seem to care enough to do anything about them. I'd rather not see them outright disappear but since they aren't mine I don't care enough about them to do much more work than copy and paste them somewhere.
::::::: (I would leave the ones in languages with an ISO-639 code and Wikipedia here, of course) — [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 14:13, 9 November 2024 (UTC)

:::::::: Thank you for checking! I don't personally see an issue with moving them to your user space right now. Cheers — [[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 17:21, 9 November 2024 (UTC)

::::::::: Thanks a lot! I've started a single page where I will put them all here [[User:Mithridates/SJ]] and will proceed slowly due to lack of time and also to avoid stepping on any toes / asking you to delete too much at a time and possibly deleting the wrong content.
::::::::: For this week I have put the content for the languages Audia, Cristianès, Guosa, Lingaust, Mini, Mirad, and Monav on that page as they all have a single page of content and didn't take much time to move. Please delete those. Once they are gone I will add a note on the main page letting people know where they have gone (in addition to a thank you for their interest in the book! I do love how many people have recognized it as a good source material for teaching a language). — [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 04:09, 10 November 2024 (UTC)

: {{keep}} the translations for languages that have an article on the English Wikipedia, i.e. Guosa, Idiom Neutral, Ido, Interlingua, Lingwa de Planeta, Negerhollands, Neo, Novial, Occidental, Romanica, Solresol, Toki Pona, and Volapük.
: Translations for languages that don't have an article can be kept if they have reliable sources, which I was able to find for the following languages (if you think they are not reliable, please let me know):
:* Globasa: [https://www.languagesandnumbers.com/how-to-count-in-globasa/en/globasa/] [https://greyson.conlang.org/2020/01/29/shouting-out-globasa-and-pandunia/]
:* Mini: [https://jprogr.github.io/mini] [https://www.omniglot.com/language/phrases/mini.htm] [https://www.languagesandnumbers.com/how-to-count-in-mini/en/mini/]
: {{del}} and move to [[User:Mithridates/SJ]] the rest of the translations, i.e. Audià/Audian, Cristianés, Ekumenski, Germanisch, Interocidental, Lingaust, Lingue Simple, Masa Tang, Mirad, Monav, Monkel, Mundeze, Nordien, Novlingue, Numo, Proyo, and Scuian/Meteza. If you can find reliable sources for those languages, please let me know.
: In particular, I could not find resources for Audià/Audian and Monav after searching through 15 and 17 pages on Google, respectively. It doesn't help that [[Òla, Ionatà!|their]] [[Hai, Jon!|translations]] don't explain what those languages are and where to find resources for them. This makes contributing to those translations almost impossible until @[[User:Caro de Segeda|Caro de Segeda]] can provide resources to us. It's possible that the resources may have disappared from the Internet, or that those languages were created by Caro de Segeda him/herself. If you can find resources for Audià/Audian and Monav, please let me know.
: I'm notifying the primary contributors of the translations: @[[User:Caro de Segeda|Caro de Segeda]], @[[User:Frzzl|Frzzl]], @[[User:Greatscotteh|Greatscotteh]], @[[User:IHateNumbers234|IHateNumbers234]], @[[User:Jayeless2|Jayeless2]], @[[User:Morozof|Morozof]], @[[User:Omnihom|Omnihom]], @[[User:Omoutuazn|Omoutuazn]], @[[User:PovriNaivon|PovriNaivon]], @[[User:Sir Beluga|Sir Beluga]] and @[[User:Tyoyafud|Tyoyafud]]. — [[User:EJPPhilippines|EJPPhilippines]] ([[User talk:EJPPhilippines|discuss]] • [[Special:Contributions/EJPPhilippines|contribs]]) 09:52, 30 June 2025 (UTC)

:: Caro de Segeda said on [https://www.reddit.com/r/conlangs/comments/1lcnz9g/comment/n0sc3wx/ Reddit] that Monav was created by him/her and that he/she didn't publish any resources about it other than [[Hai, Jon!]]. With '''zero''' other resources to rely on for contributing to the translation, and the fact that Monav is in [[User:Mithridates/SJ]], [[Hai, Jon!]] should be speedy deleted. — [[User:EJPPhilippines|EJPPhilippines]] ([[User talk:EJPPhilippines|discuss]] • [[Special:Contributions/EJPPhilippines|contribs]]) 01:38, 3 July 2025 (UTC)

::: I've undone the speedy deletion as Caro de Segeda posted a [https://prexins.wordpress.com/2025/07/04/monav/ resource] for Monav. — [[User:EJPPhilippines|EJPPhilippines]] ([[User talk:EJPPhilippines|discuss]] • [[Special:Contributions/EJPPhilippines|contribs]]) 07:18, 4 July 2025 (UTC)

:::: You can delete all the ones that I have created myself, I have already moved them to other places. — [[User:Caro de Segeda|Caro de Segeda]] ([[User talk:Caro de Segeda|discuss]] • [[Special:Contributions/Caro de Segeda|contribs]]) 12:39, 5 July 2025 (UTC)

{{outdent|::::}}I don't know if this is helpful since it wouldn't apply to most of these, but [[s:mul:]] could hold some of these. — [[User:Arlo Barnes|Arlo Barnes]] ([[User talk:Arlo Barnes|discuss]] • [[Special:Contributions/Arlo Barnes|contribs]]) 09:18, 30 November 2025 (UTC)

: I don't think that would be within the scope of that project. I'm not aware of any other situation where Wikisource publishes translations of texts created on Wikimedia projects - that's usually left up to other language editions of the same project. — [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 05:34, 1 December 2025 (UTC)

:: In this situation there isn't a separate [[s:ie:]] distinct from Multilingual Wikisource (see [[meta:Wikisource#List of Wikisources]]). In fact, there are very few multilingual wikis in the Wikimedia sphere; while this project ''could'' move to a Miraheze-hosted or similar wiki farm location, I think it would be a missed opportunity. I suppose an [[Interlingue]] book could be started in [[shelf:Constructed languages]] which would have all 100 chapters as an appendix (and likewise for the other languages), but that also seems non-ideal since it requires an English-language text that doesn't currently exist to be created. [[WB:AT]] seems to describe a similar situation to this one and prescribe Wikisource as the solution, and [[WB:SOURCE]] mentions fiction as out-of-scope for Wikibooks (even as in this case, language-educational fiction). [[s:mul:Wikisource:about Wikisource]] simply speaks of source texts and doesn't mention publication requirements, so maybe that is specific to some of the monolingual editions? — [[User:Arlo Barnes|Arlo Barnes]] ([[User talk:Arlo Barnes|discuss]] • [[Special:Contributions/Arlo Barnes|contribs]]) 22:28, 5 December 2025 (UTC)

:{{keep}} 100% keep. These books are a core part of language textbooks on Wikibooks and have been for years. Not sure why this is even being debated.--[[User:Xania|Xania]] [[Image:Flag_of_Estonia.svg|15px]]  [[Image:Flag_of_Ukraine.svg|15px]] [[User talk:Xania|&lt;sup&gt;talk&lt;/sup&gt;]] 17:55, 16 May 2026 (UTC)

::With all due respect, some of the books included in this nomination (like [[Sin Chao, Jonathan!]]) are written in constructed languages which are not substantially attested anywhere else. I struggle to imagine any educational purpose for such a book. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 00:12, 17 May 2026 (UTC)

== [[International Baccalaureate]] ==

Not actually a book in and of itself; rather, it is just a compilation of links to other books —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 23:24, 18 October 2024 (UTC)
: Could this be salvaged as a shelf? [[User:Pppery|Pppery]] ([[User talk:Pppery|discuss]] • [[Special:Contributions/Pppery|contribs]]) 05:23, 27 January 2025 (UTC)
::Probably, but are the linked books even useful? IB exams change from year to year - sometimes quite dramatically - so an old exam guide is of very limited value. Many of these books were written 10-15 years ago, and some of them (like [[IB French]]) even have comments indicating that they're no longer applicable. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 02:18, 8 December 2025 (UTC)

== [[Character List for Baxter&amp;Sagart]] ==

Seems completely out of scope as an educational book; it's just a list of characters and outlinks —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 23:53, 18 October 2024 (UTC)

:Adding [[Character List for Karlgren's GSR]] and [[Character List for Schuessler's CGSR]] for the same reason —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 23:55, 18 October 2024 (UTC)

:These three books do make a package and I agree they should be considered together. However, I strongly object to deleting them. They are really extremely useful resources. I use them every week and I know that many people who do work on Old Chinese phonology do so. There are lots of books out there that are lists of characters, these are called dictionaries. For example Axel Schuessler's ABC Etymological Dictionary of Old Chinese, or Pulleyblank's Lexicon of Reconstructed Pronunciation in Early Middle Chinese, Late Middle Chinese, and Early Mandarin. I see it as entirely a good thing for reference works of this kind to be available free online rather than only in expensive books in university research libraries. If this is in violation of a Wikibooks policy, I would at least like that policy to be drawn to my attention and to have some constructive comment offered about which Wikiproject such a resource should fall under. I will also say on a personal note that I have put literally hundreds of hours of work into these projects and it would grieve me a lot to see this work simply vanish, in particular when I know that colleagues around the world use these books. --[[User:Tibetologist|Tibetologist]] ([[User talk:Tibetologist|discuss]] • [[Special:Contributions/Tibetologist|contribs]]) 07:27, 1 November 2024 (UTC)
::Hi @[[User:Tibetologist|Tibetologist]], and thank you for the feedback! Official Wikibooks policy does not permit standalone dictionaries (see [[WB:DICT]]), though I understand the argument that it is a useful resource. I am wondering if there might be a home for it at [[Wiktionary:Wiktionary:Welcome, newcomers|Wiktionary]] or [[Wikiversity:Wikiversity:SHARE|Wikiversity]]? Cheers —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 12:14, 1 November 2024 (UTC)
:::The policy says to use Wiktionary, but these books cannot be moved there. In fact they link there, you can understand me as having made an index to wiktionary, if you like, where the ORDER of the characters is extremely important, information that would be lost in Wiktionary. 
:::Wikiversity is not a project I participate in, and in any event my books here are older than it, so this option was not available for me at the relevant moment. If you are offering to move my books to Wikiversity, that is very kind of you and I will very graciously accept. [[User:Tibetologist|Tibetologist]] ([[User talk:Tibetologist|discuss]] • [[Special:Contributions/Tibetologist|contribs]]) 14:10, 1 November 2024 (UTC)
::::I have pinged over at Wikiversity Colloquium to ask about suitability and have looped you into the conversation over there. Cheers —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 18:20, 1 November 2024 (UTC)
::I concur. I'm just an undergrad who tries to learn about Sino-Tibetan historical linguistics in his free time but I've found this wikibook to be incredibly useful, and I keep it open in one tab while I watch Professor Nathan Hill's lectures that he uploads to youtube in another tab, and another tab for taking notes. In fact if I remember correctly Professor Hill actually pointed his students to this wikibook. 
::I'm not familiar with [[wikiversity:Wikiversity:SHARE|Wikiversity]] but if all the content were as accessible there as it is here then I think that could work.  [[User:ChromeBones|ChromeBones]] ([[User talk:ChromeBones|discuss]] • [[Special:Contributions/ChromeBones|contribs]]) 02:43, 9 July 2025 (UTC)
:Per [[:v:Wikiversity:Colloquium#Import_Resource_From_Wikibooks?]], I recommend copying and pasting, including attribution via the edit summary and talk page, add appropriate categories and links, and then it could be deleted locally. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 22:32, 3 November 2024 (UTC)

== [[Suomen kieli käyttöön]] ==

Multiple pages in this book are written entirely in Finnish, which is out of the enWB scope. —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 00:09, 19 October 2024 (UTC)

:I was going to say whether we should ask any fiwikibooks sysop to maybe see if this could be transwikied to fiwb if it's within the scope there. But [[:fi:Toiminnot:Käyttäjät/sysop]] indicates that there are only 3 sysops, and only {{u|Anr}} and {{u|Zache}} have made edits this ''year''. If they deem it to be salvageable, then transwiki + delete, otherwise straight-up delete. --[[User:SHB2000|SHB2000]] ([[User talk:SHB2000|discuss]] • [[Special:Contributions/SHB2000|contribs]]) 11:24, 14 November 2024 (UTC)
::It seems that the idea behind the book was for the pages to be bilingual, as it’s a language learning book. That’s why there are Finnish texts included intentionally even on the pages that are complete. There are similar books in dewikibooks and ruwikibooks as well. For the English version, I think the easiest way to proceed would be to clean up and adjust the page layout to fit enwikibooks better, and then translate the missing parts. By the way, if anyone wants to update the book’s name in English, it can be titled ''&quot;Using the Finnish Language&quot;'' or ''&quot;Put Finnish Language into Use&quot;'' for a direct translation.   [[User:Zache|Zache]] ([[User talk:Zache|discuss]] • [[Special:Contributions/Zache|contribs]]) 11:57, 14 November 2024 (UTC)

== [[AT&amp;T Mobility FAQ]] ==

* [[AT&amp;T Mobility FAQ]]
* [[AT&amp;T Mobility FAQ/MEdia Net Configuration]]
* [[AT&amp;T Mobility FAQ/Data Connect Configuration]]
An ''extremely'' outdated FAQ on AT&amp;T's cell phone services. Most of this document was written 20+ years ago as a Usenet FAQ; very little of it is accurate or useful anymore (particularly the two subpages, which have to do with obsolete configurations for &quot;tethering&quot; a computer to a cell phone). No objection if someone wants to update it, but there's clearly been no appetite to do that. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 22:20, 30 December 2024 (UTC)

:I'm wondering if it might make sense for us to develop some kind of policy on archiving books here. There are many like this one that have a good deal of content but are extremely out of date and just not useful as originally intended. ——[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 22:34, 30 December 2024 (UTC)
::@[[User:Kittycataclysm|Kittycataclysm]]: See the newly developed [[Wikibooks:Outdated books]]. [[User:JJPMaster|JJP]]&lt;sub&gt;[[User talk:JJPMaster|Mas]]&lt;sub&gt;[[Special:Contributions/JJPMaster|ter]]&lt;/sub&gt;&lt;/sub&gt; ([[wikt:she|she]]/[[wikt:they|they]]) 00:16, 31 December 2024 (UTC)
:::Ooh, thanks - something like that seems like it could be an appropriate way to handle this book. A lot of the other outdated books I've tagged have been so incomplete that they wouldn't have been particularly useful even as historical references; this one might at least have some interest.
:::Any chance we can get a separate namespace (maybe &quot;Archive:&quot;) set up for archived book content? That'd make it possible to do things like exclude them from on-site search by default. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 21:07, 31 December 2024 (UTC)
::::I think this might be a more extended discussion, so I'll bump it over to the [[Wikibooks talk:Outdated books|talk page of the draft policy]]! —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 21:54, 31 December 2024 (UTC)

== Algebra/Chapter 10/Symmetric Polynomials ==

I personally believe that [[Algebra/Chapter 10/Symmetric Polynomials|this]], and all of the sections should be deleted for the fact that this goes WAY beyond the scope of what was intended for the Chapter (Algebra II level polynomials). [[User:GoreyCat|GoreyCat]] ([[User talk:GoreyCat|discuss]] • [[Special:Contributions/GoreyCat|contribs]]) 15:07, 6 February 2025 (UTC)

:'''Split''': Deletion here is not the best solution (see [[w:WP:ATD]]). Instead, this page and its subpages should be moved to another book, most likely [[Abstract Algebra]]. [[User:JJPMaster|JJP]]&lt;sub&gt;[[User talk:JJPMaster|Mas]]&lt;sub&gt;[[Special:Contributions/JJPMaster|ter]]&lt;/sub&gt;&lt;/sub&gt; ([[wikt:she|she]]/[[wikt:they|they]]) 17:35, 6 February 2025 (UTC)
:{{keep}} since there is a good amount of content. If [[Abstract Algebra]] is appropriate, it seems like a fine idea to move there. —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 22:59, 7 February 2025 (UTC)
::Eh, yeah, I supposed moving it is better. I just don't think it's suitable for where it appears. [[User:GoreyCat|GoreyCat]] ([[User talk:GoreyCat|discuss]] • [[Special:Contributions/GoreyCat|contribs]]) 01:40, 8 February 2025 (UTC)
== [[Puredyne]] ==

Development of Puredyne Linux was discontinued in 2012, and the software no longer appears to be available for download anywhere. (An archive of the web site is still up - with a bunch of embedded spam links - but the download links are all dead.) Is this a suitable candidate for archival (cf. [[Wikibooks:Outdated books]]), or should it just be deleted? [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 04:35, 5 March 2025 (UTC)

:I'd just archive stuff like this. Looks like a decent bit of work went into it, and you never know when someone might need to use Puredyne for some obscure project. I'd be willing to bet mirrors exist of it somewhere, or someone has it on a drive. If you want to find some stuff worth deleting, comb through [[:Category:Allbooks categories]]. [[User:MediaKyle|MediaKyle]] ([[User talk:MediaKyle|discuss]] • [[Special:Contributions/MediaKyle|contribs]]) 11:30, 5 March 2025 (UTC)

== [[Template:Qr-twwp]] ==
This isn't exactly a request to delete the template, but rather to merge it with {{tlx|Copypaste}}. The {{tlx|Qr-twwp}} template serves the same purpose as {{tlx|Copypaste}}, but without the seven-day period after which the page is deleted. This leads to confusion, as well as a perpetually full [[:Category:Queried pages]]. [[User:JJPMaster|JJP]]&lt;sub&gt;[[User talk:JJPMaster|Mas]]&lt;sub&gt;[[Special:Contributions/JJPMaster|ter]]&lt;/sub&gt;&lt;/sub&gt; ([[wikt:she|she]]/[[wikt:they|they]]) 17:37, 30 March 2025 (UTC)

== [[Ghouls of the Miskatonic]] ==

I don't think that a plot summary of a book is in-scope here. —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 18:43, 20 August 2025 (UTC)

:{{vd}} - at least, not a summary of ''this'' book. A summary and/or study guide to a notable work of literature might be in scope, but this is certainly not one. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 21:23, 25 August 2025 (UTC)
::Hi. I am the creator of the pages of this book. If I understand correctly, it has to be a summary of a notable work of literature? So what exactly is defined as such? I only started this as I thought it would be fun, interesting and encouraging to others who read the Arkham Horror novels, and I thought it was permitted as I've seen other summaries of books on wikibooks. [[User:Dayne90|Dayne90]] ([[User talk:Dayne90|discuss]] • [[Special:Contributions/Dayne90|contribs]]) 13:27, 26 August 2025 (UTC)
:::Your problem is it is just the plot... it needs to include an educational textual analysis to be in scope [[User:MarcGarver|MarcGarver]] ([[User talk:MarcGarver|discuss]] • [[Special:Contributions/MarcGarver|contribs]]) 12:47, 28 August 2025 (UTC)
::::And ideally it'd be a text which has ''already'' been the subject of literary analysis, such that the analysis on Wikibooks isn't original research. A notable work of literature like ''Frankenstein'' or ''Moby-Dick'' would easily meet that requirement; a tie-in novel for a tabletop RPG probably does not. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 22:08, 29 August 2025 (UTC)

== [[Objective Projection: Why the Brain Never Forgets Some Stories]] ==

Undisclosed AI-generated content. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 02:13, 9 May 2026 (UTC)

:&lt;nowiki&gt;'''Keep'''&lt;/nowiki&gt; — Comment from page author/subject expert.
:I am Levent Bulut, the originator of the &lt;nowiki&gt;''&lt;/nowiki&gt;Objective Projection&lt;nowiki&gt;''&lt;/nowiki&gt; methodology described in this book (ORCID: 0009-0007-7500-2261, Wikidata: Q138048287). I want to address the AI-generated content concern directly and transparently.
:&lt;nowiki&gt;'''&lt;/nowiki&gt;On the content itself:&lt;nowiki&gt;'''&lt;/nowiki&gt; The methodology, theoretical framework (the six-variable operator E(r) = projS(M, T, V, Δ, Ω, Ng), the Six Golden Rules, the Six-Layer Framework), and all original arguments are my own intellectual work, developed and published independently. This is documented through:
:* 26 DOI-registered academic publications on Zenodo (search: &quot;Levent Bulut Objective Projection&quot;)
:* A peer-reviewed submission currently under review at &lt;nowiki&gt;''&lt;/nowiki&gt;Digital Humanities Quarterly&lt;nowiki&gt;''&lt;/nowiki&gt;
:* Parallel Turkish-language Wikibook and Wikiversity pages on the same methodology
:* An open-source SFT dataset on Hugging Face (leventbulut/objective-projection)
:&lt;nowiki&gt;'''&lt;/nowiki&gt;On AI assistance:&lt;nowiki&gt;'''&lt;/nowiki&gt; I used AI tools (Claude) for English translation polish and copy-editing from my Turkish source materials — the same way a non-native English-speaking academic would use a human translator or editor. The &lt;nowiki&gt;''&lt;/nowiki&gt;ideas, structure, terminology, citations, and arguments&lt;nowiki&gt;''&lt;/nowiki&gt; are entirely my own and pre-date the Wikibooks version, traceable through Zenodo DOI timestamps starting in 2025.
:&lt;nowiki&gt;'''&lt;/nowiki&gt;Proposed remedy instead of deletion:&lt;nowiki&gt;'''&lt;/nowiki&gt; I am happy to:
:# Add a clear AI-assistance disclosure to the book's preface, per Wikibooks transparency norms
:# Add inline citations to the underlying DOI-registered publications for every major claim
:# Link to the parallel Turkish version and academic record
:This would address the &lt;nowiki&gt;''&lt;/nowiki&gt;undisclosed&lt;nowiki&gt;''&lt;/nowiki&gt; part of the concern (which is the actionable policy issue) while preserving content that is original academic work by an identifiable author with a published track record. Deletion of original scholarship because translation assistance was used would set a concerning precedent for non-native English contributors.
:&lt;nowiki&gt;I request a few days to add the disclosure and citations before any deletion action. ~~~~&lt;/nowiki&gt; [[Special:Contributions/&amp;#126;2026-28847-60|&amp;#126;2026-28847-60]] ([[User talk:&amp;#126;2026-28847-60|talk]]) 18:46, 13 May 2026 (UTC)
::Administrative assistance needed: Automated filters blocking structural improvements and disclosures
::'''Request for Help''' — I am Levent Bulut, the author of this book. I have already provided my AI disclosure and academic credentials (ORCID, DOI list) here in this discussion.
::I am trying to update the book to comply with Wikibooks standards by:
::Adding a formal '''AI assistance disclosure''' at the top of the page.
::Restructuring the content into an '''instructional textbook format''' (adding Learning Objectives).
::Converting plain text formulas into '''LaTeX''' ( format).
::Updating references to include full academic '''DOI''' records.
::However, the automated filter is blocking all my attempts:
::If I try to replace the content with the improved version, it triggers the '''&quot;large amount of content removal&quot;''' filter.
::If I try to add specific academic links, it triggers the '''&quot;automated link/spam&quot;''' filter.
::I am essentially trapped by the filters while trying to improve the book and follow transparency norms. Could an administrator please either whitelist my account or manually apply the improved version of the text? I am ready to provide the full MediaWiki code here if requested. My intent is purely constructive and academic. [[Special:Contributions/&amp;#126;2026-28847-60|&amp;#126;2026-28847-60]] ([[User talk:&amp;#126;2026-28847-60|talk]]) 19:15, 13 May 2026 (UTC)
::: Hi, @[[User:~2026-28847-60|~2026-28847-60]]. Your account was incorrectly locked by a steward. It is now currently unlocked. [[User:Codename Noreste|&lt;span style=&quot;color:#0024FF&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 17:44, 15 May 2026 (UTC)
:::: Pinging @[[User:Projection Architect|Projection Architect]], who was previously LeventBulut. [[User:Codename Noreste|&lt;span style=&quot;color:#0024FF&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 15:51, 4 July 2026 (UTC)
::Please review [[Wikibooks:Artificial intelligence]]. It states unequivocally that {{tq|LLMs may not be used to generate or summarize material and ideas at Wikibooks}}, and that {{tq|translations made by LLMs are not allowed on Wikibooks}}. The fact that you did not disclose your usage of AI is part of the problem, but disclosing it does not make it allowable either.
::More broadly, based on what you've said above, the content of this book is a reflection of your personal theories on writing. This is essentially [[Wikibooks:Original research]] and is not permitted. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 22:36, 13 May 2026 (UTC)

== [[Suicide]] ==

I realize this book has been nominated for deletion before ([[Wikibooks:Requests for deletion/Suicide|1]], [[Wikibooks:Requests for deletion/Suicide (2)|2]], [[Wikibooks:Requests for deletion/Suicide/Suffocation|3]]), but it's been over ten years since the last nomination. The project's position on what material is in its educational scope has shifted, as have some of the facts on the ground.

* The chartered purpose of Wikibooks is to produce &quot;open-content textbooks&quot; (cf. [[Wikibooks:What is Wikibooks?]]) which are suitable for use in an instructional environment. Providing educational information about suicide in the context of psychiatry could certainly be in scope, as psychiatry is an educational topic; however, instructional material on how to commit suicide is not an educational topic, and should not be considered in scope.
* This book is, and has always been, primarily intended as an instructional work guiding users on how to commit suicide. It provides effectively no meaningful analytical content ''about'' suicide as a topic. Most of the original content in the book was imported from an early-2000s wiki associated with the &lt;code&gt;alt.suicide.holiday&lt;/code&gt; Usenet group, the &quot;ASH wiki&quot;, which was specifically and unequivocally dedicated to describing and recommending methods by which readers could commit suicide, and this has carried through to the current version of the book.
* Most of the content in the book was removed in 2020 (by redirecting it to the book's main page, e.g. [[Special:Diff/3660495]]) over concerns that it was created by a WMF-banned user ([[User:Leucosticte]]), and because it was likely in violation of the ASH wiki's (unclear) copyright. These changes removed most of the content of the book; much of what remains is image gallery pages like [[Suicide/Blades]] which have no educational value.

Suicide is a sensitive topic; if it is covered by a textbook, it should be covered tastefully and with an aim to educate. This book is largely the opposite of that. Having it here is doing more harm than good.

If this book is deleted, the following related pages should be deleted as well:
* [[Template:Suicide methods]]
* [[Template:Infobox suicide method]] (currently unused)
* [[User:Leucosticte/About ASH]] - from the ASH wiki, as mentioned above
* [[User:Leucosticte/Frequently Asked Questions]] - also from the ASH wiki
[[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 22:41, 21 July 2026 (UTC)
: {{keep|weak keep}} a)&amp;nbsp;Age is no argument. There are many stale underdeveloped books I would rather delete than keeping around. b)&amp;nbsp;The book’s topic is exceptionally difficult to write about. ''This'' impedes collaborative authoring. c)&amp;nbsp;The book does not really explain ''how'' to commit suicide (like a step‐by‐step guide), neither is it the book’s learning objective. d)&amp;nbsp;Even if ''you construed'' the chapter summarizing various suicide methods ''as instructions'', instructional material on how to commit suicide ''is'' an educational topic. In most ''present‐day societies'' it is not ''ethical'' to teach students how to commit suicide, though. e)&amp;nbsp;Therefore the correct path is to first alter the [[WB:WIW#Wikibooks includes instructional texts|project scope]] to censor books on ethical grounds ''and then'' nominate the book for censorship. ‑‑[[User:Kai Burghardt|Kai Burghardt]] ([[User talk:Kai Burghardt|discuss]] • [[Special:Contributions/Kai Burghardt|contribs]]) 04:50, 28 July 2026 (UTC)
::Re. c: most of the explicit directions were edited out in 2020, as noted in my nomination, but are still visible in page history. For a couple of explicit examples, see e.g. [[Special:Permalink/3318613]] or [[Special:Permalink/3654645]]. Providing specific instructions was the original intent of this book, and it has never escaped that legacy. If someone were interested in writing a book ''about'' the phenomenon of suicide, they would be better off starting afresh. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 05:26, 28 July 2026 (UTC)
*'''Delete all'''. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 16:17, 28 July 2026 (UTC)
* '''Delete all''' per the nomination above. [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 02:17, 30 July 2026 (UTC)
* '''Keep''' with caution. Rename to &quot;suicide prevention&quot;?--[[User:TunnelESON|TunnelESON]] ([[User talk:TunnelESON|discuss]] • [[Special:Contributions/TunnelESON|contribs]]) 04:03, 2 September 2026 (UTC)
*:Re. the rename: absolutely not. There is no content in the book about suicide prevention. If you are interested in writing a book on that topic, please start a new one. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 18:48, 5 September 2026 (UTC)

:{{keep}} - 
:1. &quot;instructional material on how to commit suicide is not an educational topic&quot; - I think it can be construed as one depending on the person (and does not have to imply that the person is at risk)
:2. Not a reason.
:3. Not a reason. It is up to the community to decide whether to accept a banned user's work. [[User:Leaderboard|Leaderboard]] ([[User talk:Leaderboard|discuss]] • [[Special:Contributions/Leaderboard|contribs]]) 13:37, 6 September 2026 (UTC)

== [[Chess Opening Theory/1. g4/1...Na6]] ==
Nonsense position, one of the worst opening moves for White countered by a move hurting development for Black. [https://www.365chess.com/search_position.php Searching] on 365chess.com finds zero games with this position. See also a similar [[Wikibooks:Requests for deletion/Chess Opening Theory/1. e4/1...e5/2. Na3]]. [[User:1234qwer1234qwer4|𝟙𝟤𝟯𝟺𝐪𝑤𝒆𝓇𝟷𝟮𝟥𝟜𝓺𝔴𝕖𝖗𝟰]] ([[User talk:1234qwer1234qwer4|𝗍𝗮𝘭𝙠]]) 02:20, 13 September 2026 (UTC)

:{{vd}} With some reservations, in that just being a bad move doesn't make it ''not'' a strategy. That said, the lack of actual game presence means it's unnecessary to keep around. [[User:EggRoll97|EggRoll97]] ([[User talk:EggRoll97|discuss]] • [[Special:Contributions/EggRoll97|contribs]]) 16:16, 14 September 2026 (UTC)
== [[Art And AI]] ==
Suspected rampant LLM use; this also seems to violate [[WB:BLOG]] and [[WB:SOURCE]], since this seems largely like personal research/personal essays and opinions. —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 14:25, 17 September 2026 (UTC)

:{{vd}} - as a book, this isn't even particularly coherent. For instance, chapters like [[Art And AI/Tools Of The Artist]] have no clear relationship to the intended topic. And the chapters which do address the topic, like [[Art And AI/Can AIs Go On Strike]], certainly seem more like an opinion piece (if not outright fantasy content) than serious material appropriate for an instructional text. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 00:03, 18 September 2026 (UTC)
:{{vd}}, does not fit this project and appears to be LLM-generated. No useful content. [[User:Ternera|Ternera]] ([[User talk:Ternera|discuss]] • [[Special:Contributions/Ternera|contribs]]) 15:13, 19 September 2026 (UTC)</text>
      <sha1>h7xkfag9rsxyfm07k7kctvtj5on9oiv</sha1>
    </revision>
    <revision>
      <id>4671164</id>
      <parentid>4671163</parentid>
      <timestamp>2026-09-19T15:49:15Z</timestamp>
      <contributor>
        <username>~2026-40500-29</username>
        <id>3615407</id>
      </contributor>
      <comment>/* Suicide */ Reply: why</comment>
      <origin>4671164</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="45122" sha1="q018eeqkka2i8cvg49xix9lan07jjfs" xml:space="preserve">__NEWSECTIONLINK__
[[Category:Wikibooks deletion|{{PAGENAME}}]]
{{Discussion Rooms}}
{{TOCleft}}
{{shortcut|WB:RFD}}
{{Requests for deletion/New deletion}}
{{Requests for deletion/Deletion intro}}
&lt;!-- New deletion nominations go at the bottom of page. --&gt;

== [[Salute, Jonathan!]] and its translations ==

&lt;div style=&quot;column-count: 7;&quot;&gt;
* [[Salute, Jonathan!|Interlingue/Occidental]] ([[w:en:Occidental|w]], original)
* [[Òla, Ionatà!|Audià]]
* [[Holo, Jonathan!|Cristianés]]
* [[Terve, Jonathan!|Ekumenski]]
* [[Hej, Jonathan! (Germanisch)|Germanisch]]
* [[Salom, Jonatan!|Globasa]]
* [[Àlŏ, Jonathan!|Guosa]] ([[w:en:Guosa|w]])
* [[Salut, Jonathan!|Idiom Neutral]] ([[w:en:Idiom Neutral|w]])
* [[Saluto, Jonathan! (Ido)|Ido]] ([[w:en:Ido|w]])
* [[Hallo, Jonathan!|Interlingua]] ([[w:en:Interlingua|w]])
* [[Salut, Jonathan! (Interocidental)|Interocidental]]
* [[Bune Ğonatan!|Lingaust]]
* [[Oila, Jonatan!|Lingue Simple]]
* [[Haloo, Jonatan!|Lingwa de Planeta]] ([[w:en:Lingwa de Planeta|w]])
* [[Sin Chao, Jonathan!|Masa Tang]]
* [[Salut, ionatano!|Meteza]]
* [[Salu, Jon!|Mini]]
* [[Hay, Jonathan!|Mirad]]
* [[Hai, Jon!|Monav]]
* [[Sesan Jon!|Monkel]]
* [[Salam, Jonathan!|Mundeze]]
* [[Dag, Jonathan!|Negerhollands]] ([[w:en:Negerhollands|w]])
* [[Salut Jonathan!|Neo]] ([[w:en:Neo|w]])
* [[Hej, Jonathan!|Nordien]]
* [[Saluto, Jonathan!|Novial]] ([[w:en:Novial|w]])
* [[Salute, Jonathan! (Novlingue)|Novlingue]]
* [[Alo, Jonathan!|Numo]]
* [[Hela, Jonathan!|Proyo]]
* [[Salute, Jonathan! (Romanica)|Romanica]] ([[w:en:Romanica|w]])
* [[Simi, Jonathan!|Solresol]] ([[w:en:Solresol|w]])
* [[Toki a, jan Jonatan!|Toki Pona]] ([[w:en:Toki Pona|w]])
* [[Glidis, o Jonathan!|Volapük]] ([[w:en:Volapük|w]])
&lt;/div&gt;

There are a couple of issues here:

# Beyond their introductions, all of these books are written in languages which are not English, making them out of scope for the English Wikibooks.
# All but one of these books are in fact written in constructed languages, most of them in recently created conlangs. In some cases (e.g. [[Sin Chao, Jonathan!]]), I can't find any reliable sources describing the target language outside of the translation itself.
# Most of the translations (i.e. other than [[Salute, Jonathan!]] itself) were abandoned within the first five or so chapters (out of 100); none of them are complete, and there seems to be little effort to complete any of them.

While I recognize that this is an unusual project, and potentially one which could have some value, it's not at all clear to me that the English Wikibooks is the right place for it. — [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 00:24, 29 September 2024 (UTC)

: I'm really not sure what to do about these ones. While I recognize that this approach is certainly one method of teaching a language, I'm not sure that it constitutes an educational textbook. We do require that the English Wikibooks be written in English—for language-learning books, this typically means that the instructional parts are in English while the exercises are in the language being taught. I do think that if the language doesn't have much supporting evidence outside the book itself, it can safely be deleted. — [[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 01:01, 29 September 2024 (UTC)

: Author of the book here. I originally wanted to put it in the Interlingue Wikibooks https://ie.wikibooks.org/wiki/Principal_p%C3%A1gine but it somehow got locked when I wasn't paying attention and so I ended up putting it here. Getting it unlocked requires going through the process of starting an Incubator and all the rest so I opted for here and then started putting some English-only content once it was done. It's sort of in the same vein as books like Lingua Latina per se Illustrata that have separate versions with teacher notes and whatnot. [[Salute, Jonathan!/Capitul 1 - with notes]] After it was done the auxlang community really took to it which was a nice surprise. I think Ido has the largest number of chapters at the moment at 15.
:If the vast content of this book could be used to justify a quick reopening of the Interlingue Wikibooks to move it there, I'd love to do that. I imagine that an incubator with 100+ book chapters would be enough to open a Wikibooks and that's what this is. — [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 06:02, 29 September 2024 (UTC)

: Ah, I just realized that we do have a proposal to reopen the Interlingue Wikibooks: https://meta.wikimedia.org/wiki/Requests_for_new_languages/Wikibooks_Interlingue along with an Incubator page here. https://incubator.wikimedia.org/wiki/Wb/ie/Principal_p%C3%A1gine
: How easy would it be to migrate the entirety of Salute Jonathan to there? — [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 06:30, 29 September 2024 (UTC)

:: Hi @[[User:Mithridates|Mithridates]]! I'm not sure how incubator projects work, but I fully support migrating these books there. You may want to inquire over there and link to this discussion to support your request to move the content over there. Cheers! — [[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 13:16, 29 September 2024 (UTC)

::: Hi! Actually I have a third idea to propose after thinking about this again today (haven't been here much since I finished the book): I noticed that there is more English content than I remember and that might make it an awkward fit for the Interlingue Wikibooks. I definitely agree that having all the auxlang translations for new auxlang projects goes well beyond the scope of this Wikibooks. Finally, there are some auxlangs that are notable with their own Wikipedias.
::: So the idea is the following:
:::# Leave the original here and I can continue the work on the version with English notes and grammar. That will make it the same as Lingua Latina per se Illustrata, English by the Nature Method, Athenaze and all the rest.
:::# The Interlingua one can move to the Interlingua Wikibooks (maybe Romanica too if they want as it is sort of a dialect of Interlingua).
:::# For Ido and Lingua Franca Nova which have a Wikipedia but not a Wikibooks, I'm a little bit unsure...technically they could have their own version like the original one but would require English explanations. I could let them know and see if they are willing to do so and see what they think (work on adding English to the books vs. move the content elsewhere).
:::# The rest can move to a Github repo, then be deleted, and the front page of this book can have a single link to the repo.
::: Any thoughts on that? Adding the extra English content will be easy as it is my book and I know it inside and out.
::: Edit: [https://en.wikibooks.org/wiki/Salute,_Jonathan!/Grammar_(pronouns) this page] I just added.  — [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 13:50, 29 September 2024 (UTC)

:::: Thanks for taking the time to consider this! Here are my responses/questions:
::::* Is the original [[Salute, Jonathan!]] (Occidental)? Since that one is quite fleshed out, I agree that if you edit it so the primary language of the book (e.g. headers, instructions, etc) are written in English while leaving the actual story in Occidental, it would be okay and fit in more with instructional language textbooks.
::::* For your points 2 and 3, I'm not sure how those other projects work, so I'll leave it up to them. I'm not quite sure why they would need to move, since in theory they could be revised with English as the language of instruction? Although, they have been left incomplete for a long time.
::::* For your point 4, I have no problem with that. Cheers! — [[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 16:51, 29 September 2024 (UTC)

::::: Hello again, it's the weekend so I have a bit more time to work on this. I've decided to merge the extra content from the following five chapters since the difference is fairly small and the original chapters should now have this English content. Could you delete these five pages now that they are no longer needed? [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 14:02, 5 October 2024 (UTC)
::::: [[Salute, Jonathan!/Capitul 1 - with notes]]
::::: [[Salute, Jonathan!/Capitul 2 - with notes]]
::::: [[Salute, Jonathan!/Capitul 3 - with notes]]
::::: [[Salute, Jonathan!/Capitul 4 - with notes]]
::::: [[Salute, Jonathan!/Capitul 5 - with notes]] [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 14:02, 5 October 2024 (UTC)
:::::: [[File:Yes_check.svg|{{#ifeq:|small|8|15}}px|link=|alt=]] {{#ifeq:|small|&lt;small&gt;|}}'''Done'''{{#ifeq:|small|&lt;/small&gt;|}} — [[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 23:34, 5 October 2024 (UTC)

::::::: Hi again! No luck trying to find a home for the random language translations on other auxlang wikis, can't find one that is actively maintained.
::::::: The thought struck me that maybe I could just put those ones on a sub page of my user page, would that be permitted? If not, I think I'll just stick them somewhere in GitHub and call it a day since none of the people who started the translations seem to care enough to do anything about them. I'd rather not see them outright disappear but since they aren't mine I don't care enough about them to do much more work than copy and paste them somewhere.
::::::: (I would leave the ones in languages with an ISO-639 code and Wikipedia here, of course) — [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 14:13, 9 November 2024 (UTC)

:::::::: Thank you for checking! I don't personally see an issue with moving them to your user space right now. Cheers — [[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 17:21, 9 November 2024 (UTC)

::::::::: Thanks a lot! I've started a single page where I will put them all here [[User:Mithridates/SJ]] and will proceed slowly due to lack of time and also to avoid stepping on any toes / asking you to delete too much at a time and possibly deleting the wrong content.
::::::::: For this week I have put the content for the languages Audia, Cristianès, Guosa, Lingaust, Mini, Mirad, and Monav on that page as they all have a single page of content and didn't take much time to move. Please delete those. Once they are gone I will add a note on the main page letting people know where they have gone (in addition to a thank you for their interest in the book! I do love how many people have recognized it as a good source material for teaching a language). — [[User:Mithridates|Mithridates]] ([[User talk:Mithridates|discuss]] • [[Special:Contributions/Mithridates|contribs]]) 04:09, 10 November 2024 (UTC)

: {{keep}} the translations for languages that have an article on the English Wikipedia, i.e. Guosa, Idiom Neutral, Ido, Interlingua, Lingwa de Planeta, Negerhollands, Neo, Novial, Occidental, Romanica, Solresol, Toki Pona, and Volapük.
: Translations for languages that don't have an article can be kept if they have reliable sources, which I was able to find for the following languages (if you think they are not reliable, please let me know):
:* Globasa: [https://www.languagesandnumbers.com/how-to-count-in-globasa/en/globasa/] [https://greyson.conlang.org/2020/01/29/shouting-out-globasa-and-pandunia/]
:* Mini: [https://jprogr.github.io/mini] [https://www.omniglot.com/language/phrases/mini.htm] [https://www.languagesandnumbers.com/how-to-count-in-mini/en/mini/]
: {{del}} and move to [[User:Mithridates/SJ]] the rest of the translations, i.e. Audià/Audian, Cristianés, Ekumenski, Germanisch, Interocidental, Lingaust, Lingue Simple, Masa Tang, Mirad, Monav, Monkel, Mundeze, Nordien, Novlingue, Numo, Proyo, and Scuian/Meteza. If you can find reliable sources for those languages, please let me know.
: In particular, I could not find resources for Audià/Audian and Monav after searching through 15 and 17 pages on Google, respectively. It doesn't help that [[Òla, Ionatà!|their]] [[Hai, Jon!|translations]] don't explain what those languages are and where to find resources for them. This makes contributing to those translations almost impossible until @[[User:Caro de Segeda|Caro de Segeda]] can provide resources to us. It's possible that the resources may have disappared from the Internet, or that those languages were created by Caro de Segeda him/herself. If you can find resources for Audià/Audian and Monav, please let me know.
: I'm notifying the primary contributors of the translations: @[[User:Caro de Segeda|Caro de Segeda]], @[[User:Frzzl|Frzzl]], @[[User:Greatscotteh|Greatscotteh]], @[[User:IHateNumbers234|IHateNumbers234]], @[[User:Jayeless2|Jayeless2]], @[[User:Morozof|Morozof]], @[[User:Omnihom|Omnihom]], @[[User:Omoutuazn|Omoutuazn]], @[[User:PovriNaivon|PovriNaivon]], @[[User:Sir Beluga|Sir Beluga]] and @[[User:Tyoyafud|Tyoyafud]]. — [[User:EJPPhilippines|EJPPhilippines]] ([[User talk:EJPPhilippines|discuss]] • [[Special:Contributions/EJPPhilippines|contribs]]) 09:52, 30 June 2025 (UTC)

:: Caro de Segeda said on [https://www.reddit.com/r/conlangs/comments/1lcnz9g/comment/n0sc3wx/ Reddit] that Monav was created by him/her and that he/she didn't publish any resources about it other than [[Hai, Jon!]]. With '''zero''' other resources to rely on for contributing to the translation, and the fact that Monav is in [[User:Mithridates/SJ]], [[Hai, Jon!]] should be speedy deleted. — [[User:EJPPhilippines|EJPPhilippines]] ([[User talk:EJPPhilippines|discuss]] • [[Special:Contributions/EJPPhilippines|contribs]]) 01:38, 3 July 2025 (UTC)

::: I've undone the speedy deletion as Caro de Segeda posted a [https://prexins.wordpress.com/2025/07/04/monav/ resource] for Monav. — [[User:EJPPhilippines|EJPPhilippines]] ([[User talk:EJPPhilippines|discuss]] • [[Special:Contributions/EJPPhilippines|contribs]]) 07:18, 4 July 2025 (UTC)

:::: You can delete all the ones that I have created myself, I have already moved them to other places. — [[User:Caro de Segeda|Caro de Segeda]] ([[User talk:Caro de Segeda|discuss]] • [[Special:Contributions/Caro de Segeda|contribs]]) 12:39, 5 July 2025 (UTC)

{{outdent|::::}}I don't know if this is helpful since it wouldn't apply to most of these, but [[s:mul:]] could hold some of these. — [[User:Arlo Barnes|Arlo Barnes]] ([[User talk:Arlo Barnes|discuss]] • [[Special:Contributions/Arlo Barnes|contribs]]) 09:18, 30 November 2025 (UTC)

: I don't think that would be within the scope of that project. I'm not aware of any other situation where Wikisource publishes translations of texts created on Wikimedia projects - that's usually left up to other language editions of the same project. — [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 05:34, 1 December 2025 (UTC)

:: In this situation there isn't a separate [[s:ie:]] distinct from Multilingual Wikisource (see [[meta:Wikisource#List of Wikisources]]). In fact, there are very few multilingual wikis in the Wikimedia sphere; while this project ''could'' move to a Miraheze-hosted or similar wiki farm location, I think it would be a missed opportunity. I suppose an [[Interlingue]] book could be started in [[shelf:Constructed languages]] which would have all 100 chapters as an appendix (and likewise for the other languages), but that also seems non-ideal since it requires an English-language text that doesn't currently exist to be created. [[WB:AT]] seems to describe a similar situation to this one and prescribe Wikisource as the solution, and [[WB:SOURCE]] mentions fiction as out-of-scope for Wikibooks (even as in this case, language-educational fiction). [[s:mul:Wikisource:about Wikisource]] simply speaks of source texts and doesn't mention publication requirements, so maybe that is specific to some of the monolingual editions? — [[User:Arlo Barnes|Arlo Barnes]] ([[User talk:Arlo Barnes|discuss]] • [[Special:Contributions/Arlo Barnes|contribs]]) 22:28, 5 December 2025 (UTC)

:{{keep}} 100% keep. These books are a core part of language textbooks on Wikibooks and have been for years. Not sure why this is even being debated.--[[User:Xania|Xania]] [[Image:Flag_of_Estonia.svg|15px]]  [[Image:Flag_of_Ukraine.svg|15px]] [[User talk:Xania|&lt;sup&gt;talk&lt;/sup&gt;]] 17:55, 16 May 2026 (UTC)

::With all due respect, some of the books included in this nomination (like [[Sin Chao, Jonathan!]]) are written in constructed languages which are not substantially attested anywhere else. I struggle to imagine any educational purpose for such a book. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 00:12, 17 May 2026 (UTC)

== [[International Baccalaureate]] ==

Not actually a book in and of itself; rather, it is just a compilation of links to other books —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 23:24, 18 October 2024 (UTC)
: Could this be salvaged as a shelf? [[User:Pppery|Pppery]] ([[User talk:Pppery|discuss]] • [[Special:Contributions/Pppery|contribs]]) 05:23, 27 January 2025 (UTC)
::Probably, but are the linked books even useful? IB exams change from year to year - sometimes quite dramatically - so an old exam guide is of very limited value. Many of these books were written 10-15 years ago, and some of them (like [[IB French]]) even have comments indicating that they're no longer applicable. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 02:18, 8 December 2025 (UTC)

== [[Character List for Baxter&amp;Sagart]] ==

Seems completely out of scope as an educational book; it's just a list of characters and outlinks —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 23:53, 18 October 2024 (UTC)

:Adding [[Character List for Karlgren's GSR]] and [[Character List for Schuessler's CGSR]] for the same reason —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 23:55, 18 October 2024 (UTC)

:These three books do make a package and I agree they should be considered together. However, I strongly object to deleting them. They are really extremely useful resources. I use them every week and I know that many people who do work on Old Chinese phonology do so. There are lots of books out there that are lists of characters, these are called dictionaries. For example Axel Schuessler's ABC Etymological Dictionary of Old Chinese, or Pulleyblank's Lexicon of Reconstructed Pronunciation in Early Middle Chinese, Late Middle Chinese, and Early Mandarin. I see it as entirely a good thing for reference works of this kind to be available free online rather than only in expensive books in university research libraries. If this is in violation of a Wikibooks policy, I would at least like that policy to be drawn to my attention and to have some constructive comment offered about which Wikiproject such a resource should fall under. I will also say on a personal note that I have put literally hundreds of hours of work into these projects and it would grieve me a lot to see this work simply vanish, in particular when I know that colleagues around the world use these books. --[[User:Tibetologist|Tibetologist]] ([[User talk:Tibetologist|discuss]] • [[Special:Contributions/Tibetologist|contribs]]) 07:27, 1 November 2024 (UTC)
::Hi @[[User:Tibetologist|Tibetologist]], and thank you for the feedback! Official Wikibooks policy does not permit standalone dictionaries (see [[WB:DICT]]), though I understand the argument that it is a useful resource. I am wondering if there might be a home for it at [[Wiktionary:Wiktionary:Welcome, newcomers|Wiktionary]] or [[Wikiversity:Wikiversity:SHARE|Wikiversity]]? Cheers —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 12:14, 1 November 2024 (UTC)
:::The policy says to use Wiktionary, but these books cannot be moved there. In fact they link there, you can understand me as having made an index to wiktionary, if you like, where the ORDER of the characters is extremely important, information that would be lost in Wiktionary. 
:::Wikiversity is not a project I participate in, and in any event my books here are older than it, so this option was not available for me at the relevant moment. If you are offering to move my books to Wikiversity, that is very kind of you and I will very graciously accept. [[User:Tibetologist|Tibetologist]] ([[User talk:Tibetologist|discuss]] • [[Special:Contributions/Tibetologist|contribs]]) 14:10, 1 November 2024 (UTC)
::::I have pinged over at Wikiversity Colloquium to ask about suitability and have looped you into the conversation over there. Cheers —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 18:20, 1 November 2024 (UTC)
::I concur. I'm just an undergrad who tries to learn about Sino-Tibetan historical linguistics in his free time but I've found this wikibook to be incredibly useful, and I keep it open in one tab while I watch Professor Nathan Hill's lectures that he uploads to youtube in another tab, and another tab for taking notes. In fact if I remember correctly Professor Hill actually pointed his students to this wikibook. 
::I'm not familiar with [[wikiversity:Wikiversity:SHARE|Wikiversity]] but if all the content were as accessible there as it is here then I think that could work.  [[User:ChromeBones|ChromeBones]] ([[User talk:ChromeBones|discuss]] • [[Special:Contributions/ChromeBones|contribs]]) 02:43, 9 July 2025 (UTC)
:Per [[:v:Wikiversity:Colloquium#Import_Resource_From_Wikibooks?]], I recommend copying and pasting, including attribution via the edit summary and talk page, add appropriate categories and links, and then it could be deleted locally. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 22:32, 3 November 2024 (UTC)

== [[Suomen kieli käyttöön]] ==

Multiple pages in this book are written entirely in Finnish, which is out of the enWB scope. —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 00:09, 19 October 2024 (UTC)

:I was going to say whether we should ask any fiwikibooks sysop to maybe see if this could be transwikied to fiwb if it's within the scope there. But [[:fi:Toiminnot:Käyttäjät/sysop]] indicates that there are only 3 sysops, and only {{u|Anr}} and {{u|Zache}} have made edits this ''year''. If they deem it to be salvageable, then transwiki + delete, otherwise straight-up delete. --[[User:SHB2000|SHB2000]] ([[User talk:SHB2000|discuss]] • [[Special:Contributions/SHB2000|contribs]]) 11:24, 14 November 2024 (UTC)
::It seems that the idea behind the book was for the pages to be bilingual, as it’s a language learning book. That’s why there are Finnish texts included intentionally even on the pages that are complete. There are similar books in dewikibooks and ruwikibooks as well. For the English version, I think the easiest way to proceed would be to clean up and adjust the page layout to fit enwikibooks better, and then translate the missing parts. By the way, if anyone wants to update the book’s name in English, it can be titled ''&quot;Using the Finnish Language&quot;'' or ''&quot;Put Finnish Language into Use&quot;'' for a direct translation.   [[User:Zache|Zache]] ([[User talk:Zache|discuss]] • [[Special:Contributions/Zache|contribs]]) 11:57, 14 November 2024 (UTC)

== [[AT&amp;T Mobility FAQ]] ==

* [[AT&amp;T Mobility FAQ]]
* [[AT&amp;T Mobility FAQ/MEdia Net Configuration]]
* [[AT&amp;T Mobility FAQ/Data Connect Configuration]]
An ''extremely'' outdated FAQ on AT&amp;T's cell phone services. Most of this document was written 20+ years ago as a Usenet FAQ; very little of it is accurate or useful anymore (particularly the two subpages, which have to do with obsolete configurations for &quot;tethering&quot; a computer to a cell phone). No objection if someone wants to update it, but there's clearly been no appetite to do that. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 22:20, 30 December 2024 (UTC)

:I'm wondering if it might make sense for us to develop some kind of policy on archiving books here. There are many like this one that have a good deal of content but are extremely out of date and just not useful as originally intended. ——[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 22:34, 30 December 2024 (UTC)
::@[[User:Kittycataclysm|Kittycataclysm]]: See the newly developed [[Wikibooks:Outdated books]]. [[User:JJPMaster|JJP]]&lt;sub&gt;[[User talk:JJPMaster|Mas]]&lt;sub&gt;[[Special:Contributions/JJPMaster|ter]]&lt;/sub&gt;&lt;/sub&gt; ([[wikt:she|she]]/[[wikt:they|they]]) 00:16, 31 December 2024 (UTC)
:::Ooh, thanks - something like that seems like it could be an appropriate way to handle this book. A lot of the other outdated books I've tagged have been so incomplete that they wouldn't have been particularly useful even as historical references; this one might at least have some interest.
:::Any chance we can get a separate namespace (maybe &quot;Archive:&quot;) set up for archived book content? That'd make it possible to do things like exclude them from on-site search by default. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 21:07, 31 December 2024 (UTC)
::::I think this might be a more extended discussion, so I'll bump it over to the [[Wikibooks talk:Outdated books|talk page of the draft policy]]! —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 21:54, 31 December 2024 (UTC)

== Algebra/Chapter 10/Symmetric Polynomials ==

I personally believe that [[Algebra/Chapter 10/Symmetric Polynomials|this]], and all of the sections should be deleted for the fact that this goes WAY beyond the scope of what was intended for the Chapter (Algebra II level polynomials). [[User:GoreyCat|GoreyCat]] ([[User talk:GoreyCat|discuss]] • [[Special:Contributions/GoreyCat|contribs]]) 15:07, 6 February 2025 (UTC)

:'''Split''': Deletion here is not the best solution (see [[w:WP:ATD]]). Instead, this page and its subpages should be moved to another book, most likely [[Abstract Algebra]]. [[User:JJPMaster|JJP]]&lt;sub&gt;[[User talk:JJPMaster|Mas]]&lt;sub&gt;[[Special:Contributions/JJPMaster|ter]]&lt;/sub&gt;&lt;/sub&gt; ([[wikt:she|she]]/[[wikt:they|they]]) 17:35, 6 February 2025 (UTC)
:{{keep}} since there is a good amount of content. If [[Abstract Algebra]] is appropriate, it seems like a fine idea to move there. —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 22:59, 7 February 2025 (UTC)
::Eh, yeah, I supposed moving it is better. I just don't think it's suitable for where it appears. [[User:GoreyCat|GoreyCat]] ([[User talk:GoreyCat|discuss]] • [[Special:Contributions/GoreyCat|contribs]]) 01:40, 8 February 2025 (UTC)
== [[Puredyne]] ==

Development of Puredyne Linux was discontinued in 2012, and the software no longer appears to be available for download anywhere. (An archive of the web site is still up - with a bunch of embedded spam links - but the download links are all dead.) Is this a suitable candidate for archival (cf. [[Wikibooks:Outdated books]]), or should it just be deleted? [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 04:35, 5 March 2025 (UTC)

:I'd just archive stuff like this. Looks like a decent bit of work went into it, and you never know when someone might need to use Puredyne for some obscure project. I'd be willing to bet mirrors exist of it somewhere, or someone has it on a drive. If you want to find some stuff worth deleting, comb through [[:Category:Allbooks categories]]. [[User:MediaKyle|MediaKyle]] ([[User talk:MediaKyle|discuss]] • [[Special:Contributions/MediaKyle|contribs]]) 11:30, 5 March 2025 (UTC)

== [[Template:Qr-twwp]] ==
This isn't exactly a request to delete the template, but rather to merge it with {{tlx|Copypaste}}. The {{tlx|Qr-twwp}} template serves the same purpose as {{tlx|Copypaste}}, but without the seven-day period after which the page is deleted. This leads to confusion, as well as a perpetually full [[:Category:Queried pages]]. [[User:JJPMaster|JJP]]&lt;sub&gt;[[User talk:JJPMaster|Mas]]&lt;sub&gt;[[Special:Contributions/JJPMaster|ter]]&lt;/sub&gt;&lt;/sub&gt; ([[wikt:she|she]]/[[wikt:they|they]]) 17:37, 30 March 2025 (UTC)

== [[Ghouls of the Miskatonic]] ==

I don't think that a plot summary of a book is in-scope here. —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 18:43, 20 August 2025 (UTC)

:{{vd}} - at least, not a summary of ''this'' book. A summary and/or study guide to a notable work of literature might be in scope, but this is certainly not one. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 21:23, 25 August 2025 (UTC)
::Hi. I am the creator of the pages of this book. If I understand correctly, it has to be a summary of a notable work of literature? So what exactly is defined as such? I only started this as I thought it would be fun, interesting and encouraging to others who read the Arkham Horror novels, and I thought it was permitted as I've seen other summaries of books on wikibooks. [[User:Dayne90|Dayne90]] ([[User talk:Dayne90|discuss]] • [[Special:Contributions/Dayne90|contribs]]) 13:27, 26 August 2025 (UTC)
:::Your problem is it is just the plot... it needs to include an educational textual analysis to be in scope [[User:MarcGarver|MarcGarver]] ([[User talk:MarcGarver|discuss]] • [[Special:Contributions/MarcGarver|contribs]]) 12:47, 28 August 2025 (UTC)
::::And ideally it'd be a text which has ''already'' been the subject of literary analysis, such that the analysis on Wikibooks isn't original research. A notable work of literature like ''Frankenstein'' or ''Moby-Dick'' would easily meet that requirement; a tie-in novel for a tabletop RPG probably does not. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 22:08, 29 August 2025 (UTC)

== [[Objective Projection: Why the Brain Never Forgets Some Stories]] ==

Undisclosed AI-generated content. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 02:13, 9 May 2026 (UTC)

:&lt;nowiki&gt;'''Keep'''&lt;/nowiki&gt; — Comment from page author/subject expert.
:I am Levent Bulut, the originator of the &lt;nowiki&gt;''&lt;/nowiki&gt;Objective Projection&lt;nowiki&gt;''&lt;/nowiki&gt; methodology described in this book (ORCID: 0009-0007-7500-2261, Wikidata: Q138048287). I want to address the AI-generated content concern directly and transparently.
:&lt;nowiki&gt;'''&lt;/nowiki&gt;On the content itself:&lt;nowiki&gt;'''&lt;/nowiki&gt; The methodology, theoretical framework (the six-variable operator E(r) = projS(M, T, V, Δ, Ω, Ng), the Six Golden Rules, the Six-Layer Framework), and all original arguments are my own intellectual work, developed and published independently. This is documented through:
:* 26 DOI-registered academic publications on Zenodo (search: &quot;Levent Bulut Objective Projection&quot;)
:* A peer-reviewed submission currently under review at &lt;nowiki&gt;''&lt;/nowiki&gt;Digital Humanities Quarterly&lt;nowiki&gt;''&lt;/nowiki&gt;
:* Parallel Turkish-language Wikibook and Wikiversity pages on the same methodology
:* An open-source SFT dataset on Hugging Face (leventbulut/objective-projection)
:&lt;nowiki&gt;'''&lt;/nowiki&gt;On AI assistance:&lt;nowiki&gt;'''&lt;/nowiki&gt; I used AI tools (Claude) for English translation polish and copy-editing from my Turkish source materials — the same way a non-native English-speaking academic would use a human translator or editor. The &lt;nowiki&gt;''&lt;/nowiki&gt;ideas, structure, terminology, citations, and arguments&lt;nowiki&gt;''&lt;/nowiki&gt; are entirely my own and pre-date the Wikibooks version, traceable through Zenodo DOI timestamps starting in 2025.
:&lt;nowiki&gt;'''&lt;/nowiki&gt;Proposed remedy instead of deletion:&lt;nowiki&gt;'''&lt;/nowiki&gt; I am happy to:
:# Add a clear AI-assistance disclosure to the book's preface, per Wikibooks transparency norms
:# Add inline citations to the underlying DOI-registered publications for every major claim
:# Link to the parallel Turkish version and academic record
:This would address the &lt;nowiki&gt;''&lt;/nowiki&gt;undisclosed&lt;nowiki&gt;''&lt;/nowiki&gt; part of the concern (which is the actionable policy issue) while preserving content that is original academic work by an identifiable author with a published track record. Deletion of original scholarship because translation assistance was used would set a concerning precedent for non-native English contributors.
:&lt;nowiki&gt;I request a few days to add the disclosure and citations before any deletion action. ~~~~&lt;/nowiki&gt; [[Special:Contributions/&amp;#126;2026-28847-60|&amp;#126;2026-28847-60]] ([[User talk:&amp;#126;2026-28847-60|talk]]) 18:46, 13 May 2026 (UTC)
::Administrative assistance needed: Automated filters blocking structural improvements and disclosures
::'''Request for Help''' — I am Levent Bulut, the author of this book. I have already provided my AI disclosure and academic credentials (ORCID, DOI list) here in this discussion.
::I am trying to update the book to comply with Wikibooks standards by:
::Adding a formal '''AI assistance disclosure''' at the top of the page.
::Restructuring the content into an '''instructional textbook format''' (adding Learning Objectives).
::Converting plain text formulas into '''LaTeX''' ( format).
::Updating references to include full academic '''DOI''' records.
::However, the automated filter is blocking all my attempts:
::If I try to replace the content with the improved version, it triggers the '''&quot;large amount of content removal&quot;''' filter.
::If I try to add specific academic links, it triggers the '''&quot;automated link/spam&quot;''' filter.
::I am essentially trapped by the filters while trying to improve the book and follow transparency norms. Could an administrator please either whitelist my account or manually apply the improved version of the text? I am ready to provide the full MediaWiki code here if requested. My intent is purely constructive and academic. [[Special:Contributions/&amp;#126;2026-28847-60|&amp;#126;2026-28847-60]] ([[User talk:&amp;#126;2026-28847-60|talk]]) 19:15, 13 May 2026 (UTC)
::: Hi, @[[User:~2026-28847-60|~2026-28847-60]]. Your account was incorrectly locked by a steward. It is now currently unlocked. [[User:Codename Noreste|&lt;span style=&quot;color:#0024FF&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 17:44, 15 May 2026 (UTC)
:::: Pinging @[[User:Projection Architect|Projection Architect]], who was previously LeventBulut. [[User:Codename Noreste|&lt;span style=&quot;color:#0024FF&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 15:51, 4 July 2026 (UTC)
::Please review [[Wikibooks:Artificial intelligence]]. It states unequivocally that {{tq|LLMs may not be used to generate or summarize material and ideas at Wikibooks}}, and that {{tq|translations made by LLMs are not allowed on Wikibooks}}. The fact that you did not disclose your usage of AI is part of the problem, but disclosing it does not make it allowable either.
::More broadly, based on what you've said above, the content of this book is a reflection of your personal theories on writing. This is essentially [[Wikibooks:Original research]] and is not permitted. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 22:36, 13 May 2026 (UTC)

== [[Suicide]] ==

I realize this book has been nominated for deletion before ([[Wikibooks:Requests for deletion/Suicide|1]], [[Wikibooks:Requests for deletion/Suicide (2)|2]], [[Wikibooks:Requests for deletion/Suicide/Suffocation|3]]), but it's been over ten years since the last nomination. The project's position on what material is in its educational scope has shifted, as have some of the facts on the ground.

* The chartered purpose of Wikibooks is to produce &quot;open-content textbooks&quot; (cf. [[Wikibooks:What is Wikibooks?]]) which are suitable for use in an instructional environment. Providing educational information about suicide in the context of psychiatry could certainly be in scope, as psychiatry is an educational topic; however, instructional material on how to commit suicide is not an educational topic, and should not be considered in scope.
* This book is, and has always been, primarily intended as an instructional work guiding users on how to commit suicide. It provides effectively no meaningful analytical content ''about'' suicide as a topic. Most of the original content in the book was imported from an early-2000s wiki associated with the &lt;code&gt;alt.suicide.holiday&lt;/code&gt; Usenet group, the &quot;ASH wiki&quot;, which was specifically and unequivocally dedicated to describing and recommending methods by which readers could commit suicide, and this has carried through to the current version of the book.
* Most of the content in the book was removed in 2020 (by redirecting it to the book's main page, e.g. [[Special:Diff/3660495]]) over concerns that it was created by a WMF-banned user ([[User:Leucosticte]]), and because it was likely in violation of the ASH wiki's (unclear) copyright. These changes removed most of the content of the book; much of what remains is image gallery pages like [[Suicide/Blades]] which have no educational value.

Suicide is a sensitive topic; if it is covered by a textbook, it should be covered tastefully and with an aim to educate. This book is largely the opposite of that. Having it here is doing more harm than good.

If this book is deleted, the following related pages should be deleted as well:
* [[Template:Suicide methods]]
* [[Template:Infobox suicide method]] (currently unused)
* [[User:Leucosticte/About ASH]] - from the ASH wiki, as mentioned above
* [[User:Leucosticte/Frequently Asked Questions]] - also from the ASH wiki
[[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 22:41, 21 July 2026 (UTC)
: {{keep|weak keep}} a)&amp;nbsp;Age is no argument. There are many stale underdeveloped books I would rather delete than keeping around. b)&amp;nbsp;The book’s topic is exceptionally difficult to write about. ''This'' impedes collaborative authoring. c)&amp;nbsp;The book does not really explain ''how'' to commit suicide (like a step‐by‐step guide), neither is it the book’s learning objective. d)&amp;nbsp;Even if ''you construed'' the chapter summarizing various suicide methods ''as instructions'', instructional material on how to commit suicide ''is'' an educational topic. In most ''present‐day societies'' it is not ''ethical'' to teach students how to commit suicide, though. e)&amp;nbsp;Therefore the correct path is to first alter the [[WB:WIW#Wikibooks includes instructional texts|project scope]] to censor books on ethical grounds ''and then'' nominate the book for censorship. ‑‑[[User:Kai Burghardt|Kai Burghardt]] ([[User talk:Kai Burghardt|discuss]] • [[Special:Contributions/Kai Burghardt|contribs]]) 04:50, 28 July 2026 (UTC)
::Re. c: most of the explicit directions were edited out in 2020, as noted in my nomination, but are still visible in page history. For a couple of explicit examples, see e.g. [[Special:Permalink/3318613]] or [[Special:Permalink/3654645]]. Providing specific instructions was the original intent of this book, and it has never escaped that legacy. If someone were interested in writing a book ''about'' the phenomenon of suicide, they would be better off starting afresh. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 05:26, 28 July 2026 (UTC)
*'''Delete all'''. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 16:17, 28 July 2026 (UTC)
*:why? [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 15:49, 19 September 2026 (UTC)
* '''Delete all''' per the nomination above. [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 02:17, 30 July 2026 (UTC)
* '''Keep''' with caution. Rename to &quot;suicide prevention&quot;?--[[User:TunnelESON|TunnelESON]] ([[User talk:TunnelESON|discuss]] • [[Special:Contributions/TunnelESON|contribs]]) 04:03, 2 September 2026 (UTC)
*:Re. the rename: absolutely not. There is no content in the book about suicide prevention. If you are interested in writing a book on that topic, please start a new one. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 18:48, 5 September 2026 (UTC)

:{{keep}} - 
:1. &quot;instructional material on how to commit suicide is not an educational topic&quot; - I think it can be construed as one depending on the person (and does not have to imply that the person is at risk)
:2. Not a reason.
:3. Not a reason. It is up to the community to decide whether to accept a banned user's work. [[User:Leaderboard|Leaderboard]] ([[User talk:Leaderboard|discuss]] • [[Special:Contributions/Leaderboard|contribs]]) 13:37, 6 September 2026 (UTC)

== [[Chess Opening Theory/1. g4/1...Na6]] ==
Nonsense position, one of the worst opening moves for White countered by a move hurting development for Black. [https://www.365chess.com/search_position.php Searching] on 365chess.com finds zero games with this position. See also a similar [[Wikibooks:Requests for deletion/Chess Opening Theory/1. e4/1...e5/2. Na3]]. [[User:1234qwer1234qwer4|𝟙𝟤𝟯𝟺𝐪𝑤𝒆𝓇𝟷𝟮𝟥𝟜𝓺𝔴𝕖𝖗𝟰]] ([[User talk:1234qwer1234qwer4|𝗍𝗮𝘭𝙠]]) 02:20, 13 September 2026 (UTC)

:{{vd}} With some reservations, in that just being a bad move doesn't make it ''not'' a strategy. That said, the lack of actual game presence means it's unnecessary to keep around. [[User:EggRoll97|EggRoll97]] ([[User talk:EggRoll97|discuss]] • [[Special:Contributions/EggRoll97|contribs]]) 16:16, 14 September 2026 (UTC)
== [[Art And AI]] ==
Suspected rampant LLM use; this also seems to violate [[WB:BLOG]] and [[WB:SOURCE]], since this seems largely like personal research/personal essays and opinions. —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 14:25, 17 September 2026 (UTC)

:{{vd}} - as a book, this isn't even particularly coherent. For instance, chapters like [[Art And AI/Tools Of The Artist]] have no clear relationship to the intended topic. And the chapters which do address the topic, like [[Art And AI/Can AIs Go On Strike]], certainly seem more like an opinion piece (if not outright fantasy content) than serious material appropriate for an instructional text. [[User:Omphalographer|Omphalographer]] ([[User talk:Omphalographer|discuss]] • [[Special:Contributions/Omphalographer|contribs]]) 00:03, 18 September 2026 (UTC)
:{{vd}}, does not fit this project and appears to be LLM-generated. No useful content. [[User:Ternera|Ternera]] ([[User talk:Ternera|discuss]] • [[Special:Contributions/Ternera|contribs]]) 15:13, 19 September 2026 (UTC)</text>
      <sha1>q018eeqkka2i8cvg49xix9lan07jjfs</sha1>
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  </page>
  <page>
    <title>Chinese (Mandarin)</title>
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      <text bytes="6788" sha1="q8louf0hc0bwuqytwq8zp8t3dky3s2q" xml:space="preserve">&lt;div class=&quot;center&quot;&gt;''This book teaches Standard Mandarin Chinese. For other uses, see [[Subject:Chinese language]].''&lt;/div&gt;
[[File:Beijing-città proibita.jpg|right|thumb|300px|The Forbidden City in Beijing 北京紫禁城（故宫）]]
Welcome to the '''Mandarin''' Wikibook, a free Chinese textbook on the Standard Mandarin dialect. This page links to lessons using Simplified Han characters (used in mainland China, Singapore and Malaysia). There is also a [[/Traditional|Traditional Han Character Version]] available (used in Taiwan, Macau, and Hong Kong).

{{Ambox|type=notice|image=|text=&lt;span style=&quot;color:#cc0000;&quot;&gt;'''''Note''''':&lt;/span&gt; To use this book, your web browser must first be configured to [[/Displaying Chinese Characters|display Chinese characters]]. If the characters in the grey box below appear as blank boxes or garbage such as �?�?􏿾, it is not properly configured.}}

{| border=&quot;1&quot; cellspacing=&quot;0&quot; cellpadding=&quot;6&quot; align=&quot;center&quot;
| style=&quot;background-color: #eeeeee;&quot; | 我们需要您的帮助！如果您熟悉中文，请协助编撰本教科书。&lt;br&gt;我們需要您的幫助！如果您熟悉中文，請協助編撰本教科書。
|}
&lt;ul&gt;&lt;li&gt;You can search within this book from the following box: 
{{Book search|style=image}}
&lt;/li&gt;&lt;/ul&gt;
{{Category 4 Language}}

== Lessons / 课程 ==
{| border=&quot;0&quot; width=&quot;75%&quot;
|-
| valign=&quot;top&quot; width=&quot;48%&quot; |
'''Introduction / 介绍'''
* [[/About Chinese|About Mandarin&lt;br&gt;关于中文]] {{stage short|100%|Jan 24, 2005}}
* [[/How To Use This Textbook|How to use this textbook&lt;br&gt;如何使用这本教科书]] {{stage short|100%|Jan 24, 2005}}
* [[/How To Study Chinese|How to study Mandarin&lt;br&gt;如何学习中文]] {{stage short|100%|Jan 24, 2005}}
* [[/Writing in Chinese|Writing in Mandarin&lt;br&gt;如何用中文写作]] {{stage short|100%|Dec 21, 2006}}

'''Pronunciation / 发音'''
* [[/Pinyin Pronunciation|Pinyin Pronunciation Basics&lt;br&gt;基础拼音发音入门]] {{stage short|100%|Jan 24, 2005}}
* [[/Pronunciation of Initials|Pronunciation of Initials]] {{stage short|100%|Apr 26, 2012}}
* [[/Pronunciation of Finals|Pronunciation of Finals]] {{stage short|100%|Apr 26, 2012}}
* [[/Using Tones|Using Tones&lt;br&gt;使用声调]] {{stage short|100%|Apr 26, 2012}}
* [[/Pinyin|More About Hanyu Pinyin]] {{stage short|75%|Oct 2, 2014}}

'''Vocabulary 生字/字汇'''
# [[/Family|Family&lt;br&gt;第一部分：家庭]]
# [[/Commodities|Commodity&lt;br&gt;第二部分：日用品]]
# [[/Transport|Transport&lt;br&gt;第三部分：交通]]
# [[/Food|Food&lt;br&gt;第四部分：食物]]
# [[/Animals|Animals&lt;br&gt;第五部分：动物]]
| width=&quot;1%&quot; |
| valign=&quot;top&quot; width=&quot;48%&quot; |
'''Lesson Texts / 课文'''
# [[/Lesson 1|Hello!&lt;br&gt;第一课：你好！]] {{stage short|100%|Jan 24, 2005}}
# [[/Lesson 2|Are you busy today?&lt;br&gt;第二课：今天你忙不忙?]] {{stage short|75%|Jan 24, 2005}}
# [[/Lesson 3|An introduction to particles&lt;br&gt;第三课：助词]] {{stage short|75%|Jan 24, 2005}}
# [[/Lesson 4|Word order and Verbs&lt;br&gt;第四课：词序和动词]] {{stage short|75%|Jun 28, 2026}}
# [[/Lesson 5|Measure words/Counters&lt;br&gt;第五课：量词]] {{stage short|75%|August 16, 2009}}
# [[/Lesson 6|More on interrogatives&lt;br&gt;第六课：疑问助词]] {{stage short|100%|Jun 28, 2026}}
# [[/Lesson 7|What's this?&lt;br&gt;第七课：这是什么?]] {{stage short|100%|Jan 24, 2005}}
# [[/Lesson 8|Who is she?&lt;br&gt;第八课：她是谁?]] {{stage short|50%|Jun 28, 2026}}
# [[/Lesson 9|Where is the railway station?&lt;br&gt;第九课：火车站在哪里？]] {{stage short|75%|Oct 5, 2008}}
# [[/Lesson 10|A telephone conversation&lt;br&gt;第十课：电话]] {{stage short|75%|Dec 30,2026}}
# [[/Lesson 11|Taiwan&lt;br&gt;第十一课：台湾]] {{stage short|50%|Jun 28,2026}}
# [[/Lesson 12|Mandarin is so interesting!&lt;br&gt;第十二课：汉语真有趣]] {{stage short|50%|Jun 28,2026}}
# [[/Lesson 13|I'm sick&lt;br&gt;第十三课：我生病了]] {{stage short|75%|Jun 28,2026}}
# [[/Lesson 14|Drinking tea&lt;br&gt;第十四课：喝茶]] {{stage short|75%|Dec 30,2009}}
# [[/Lesson 15|China&lt;br&gt;第十五课：中国]] {{stage short|75%|Jun 28，2026}}
# [[/Lesson 16|Basic Chinese History&lt;br&gt;第十六课：基本中国历史]] {{stage short|75%|Jan 12，2012}}
# [[/Lesson 17|Basic Heteronym in Chinese&lt;br&gt;第十七课：基础多音字]] {{stage short|100%|Jul 3，2026}}
|}

== Appendices / 附录 ==
{| border=&quot;0&quot; width=&quot;75%&quot;
|-
| valign=&quot;top&quot; width=&quot;48%&quot; |
* [[/Common Phrases/]] {{stage short|100%|May 21, 2012}}
* [[/Everyday Phrases/]] {{stage short|50%|May 21, 2012}}
* [[/Answer Key|Answer Key&lt;br&gt;答案]] {{stage short|75%|Sep 20, 2026}}
* [[/Chinese-English Dictionary|Mandarin-English Dictionary&lt;br&gt;汉英字典]]
* [[/English-Chinese Dictionary|English-Mandarin Dictionary&lt;br&gt;英汉字典]] {{stage short|50%|May 21, 2012}}
* [[/Table of Initial-Final Combinations|Table of Initial-Final Combinations]] {{stage short|100%|Mar 08, 2006}}
| width=&quot;1%&quot; |
| valign=&quot;top&quot; width=&quot;48%&quot; |
* [[/Greetings|Greetings&lt;br&gt;问候语]] {{stage short|100%|Jan 24, 2005}}
* [[/Numbers|Numbers&lt;br&gt;数字]] {{stage short|75%|Jan 24, 2005}}
* [[/Nations of the World|Nations of the World&lt;br&gt;世界各国]] {{stage short|75%|Jun 28, 2026}}
* [[/Radicals|Radicals&lt;br&gt;部首]] {{stage short|100%|Jan 24, 2005}}
* [[/Slang|Slang&lt;br&gt;俚语]] {{stage short|100%|May 21, 2012}}
* [[/Web Resources|Web Resources&lt;br&gt;网络资源]] {{stage short|75%|Jan 24, 2005}}
|}

== Related Books 延伸阅读==
{{PDF version|Chinese (Mandarin)|File size: 272KB}}
{{Print version}}
{{InterWiki|code=zh}}

* [[Pinyin]]
* [[Bopomofo]]
* [[Mandarin Chinese]]
* [[Cookbook:Cuisine of China]]
* [[Written Chinese]]
* [[East Asian Calligraphy|Guide to Writing East Asian Languages - 汉字书写]]
* [[voy:Chinese phrasebook|Chinese Phrasebook]] (on WikiVoyage)
* [[Cantonese|Cantonese (Yue) - 广东话（粤语）]]
* [[Min Nan|Southern Min / Min Nan (Taiwanese) - 闽南话（台湾话）]]
* [[Pinyin/Pinyin-English News Summary|Pinyin-English News Summary for learners of Chinese language]]

== Contributors ==
* [[/Contributor's Guide|Contributor's Guide]] {{stage short|75%|Oct 3, 2013}}'''Update Needed - 需要更新'''
* [[/Planning|Textbook Planning - 课文安排]] {{stage short|75%|Oct 3, 2013}}'''Update Needed - 需要更新'''
* [[/Development History|Development History]] {{stage short|75%|Oct 3, 2013}}
* [[/Contributors|Contributors - 撰文者]] {{stage short|100%|Apr 22, 2006}}

{{Shelves|Chinese language}}
{{Alphabetical|C}}
{{Status|75%}}
__NOTOC__ __NOEDITSECTION__

[[de:Chinesisch]]
[[es:Chino Mandarín]]
[[fr:Enseignement du chinois]]
[[ko:중국어 입문]]
[[it:Cinese]]
[[mk:Кинески јазик]]
[[nl:Algemeen Beschaafd Chinees]]
[[ja:中国語]]
[[pl:Chiński]]
[[fi:Kiinan kieli]]
[[tr:Mandarin]]
[[uk:Китайська мова]]
[[zh:汉语]]</text>
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  <page>
    <title>Video Game Design/Programming</title>
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      <text bytes="12061" sha1="gkgico3syx7uxrjmn803n41tgsey6bn" xml:space="preserve">== Programming ==
Programming is the way you put your concept in practice, how you build your game. There are a wide variety of [http://en.wikipedia.org/wiki/Programming_language programming languages]. These languages will be covered in more detail later on.

Game programmer or game developers, take the implement the game design, most parts of a video game programming are boring and non-creative unless the game design requires some innovation or updates. But take care the worst situation for any developer especially one implementing a video game is in having a poor video game design to start with, the inability to make decisions or be non committal to choices will result in the developers having to implement bad concepts until the game designer accepts the results (or is forced to give the go ahead because of time/costs constrains), resulting in a substandard product.

Not all developing is attractive and in games most of it is not, for instance the front of a game is mostly common amongst most games designs doing one more is just going through hops. Now let's take for example the task of supporting hardware changes in video cards or even the low level optimization tasks, that would be the top of the cream for a creative programmer.

{{NOTE|This notions can also serve to establish a good game developing team, not all jobs are thesame or even as complex and depending on how down to basics you wish to go on developing your idea, you may need very few expert programmers.
}}

=== Learning to Program === 
Because it is arguably the most difficult part of game design, we are going to spend a fair bit of time on it. If you have some idea of what language you want to learn and have read up on the various languages, you should actually start learning. If you can take classes that is great, if not there are many alternatives. Buy some programming books, look up some tutorials on the Internet or on Wikibooks and look through the source code of Open Source programs. Don't think it will be easy, it is not; but try and have fun with it. If you do not have fun that sort of defeats the whole purpose does it not? 

Some Resources: 
[http://code.google.com/ Google Code], 
[http://sourceforge.net/ Sourceforge]

=== Choosing a Programming Language === 
Before you start programming, it is important to choose a programming language that suits your needs. 
Remember that no language is perfect for everyone or every situation. There is such an incredible selection of languages that it can be nearly impossible to choose one. Before you make up your mind to learn Java or Assembly, make sure you know what you are planning to make. How complex is the game? 
Certainly it would be counter-productive to spend a lot of time and energy learning a language that does not have the power to make what you are planning, just as it would be counter-productive to learn a language that is overly complex for your needs. 
When you start reading about the various languages, you will inevitably read about &quot;low-level&quot; and &quot;high-level&quot; languages. At this stage this does not concern you so much, but later on it will be very important. Essentially, low level languages (ex: C++, C, Asm) are more powerful and faster allowing you to control the inner workings of the computer. However, they are generally harder to learn. Higher level languages (ex: BASIC) are easier to learn and use, but lack the power and flexibility that lower level languages have.


=== Sound ===
Sound plays an integral part in any game as it affects the mood of the player at a conscious and subconscious level! Could you imagine playing UT or Quake without sound? It would be unbearable! Sound in games ( depending on the game of course ) generally consists of background music, event sound effects ( honking a car horn, gunfire etc ) and environmental sound effects (footsteps, wind blowing, birds, beach waves, bugs, echoes etc). 

Background music depending on the game can play all the time, but also like in film stop completely and change to fit certain moods, such as if you enter a battle the music might change to a track with a faster beat or become more erratic.

Sound effects on the other hand, play when they are triggered by some event. If a player were to open a door, there could be creaking noise coming from the door. Sound effects can add a lot of realism to a game and choosing the right sounds can really make a game come alive. Please note however, too many of them, or ones that have unrealistic properties, can hurt the game experience, or annoy the player. For example there is a game with a jetpack in it. This jetpack has unlimited fuel, so players can float in the air for an indefinite amount of time. While the jetpack is running, it makes a noise like rushing air. This noise becomes very annoying over time, because it is heard a lot during the game. Also, if a sound has strange properties, it can detract from realism. Eg, a machine gun that goes quack, or a machine gun that has sound faster than its actual firing rate.

Environmental sound effects are triggered simply when the player enters the environment and play in a loop until the player leaves. Please note that these sound files are most numerous and multiple sounds are sometimes looped in a random order to create a sense of variety in a environment (i.e. two birds singing that sound completely different or two characters walking and the shoes clucking sounds different for each character).

=== Input ===
Games usually give many options to players regarding input. Common means of input include the mouse, keyboard, joysticks, and gamepads. Ideally, a game engine should abstract the input so that the user can select from any of the above. Furthermore, one important thing to remember is that all gamers have different preferences in regards to key or button placement, and often want a certain specific configuration. This means the input should also be abstracted to allow buttons or keys to perform different actions in the game.

==== Keyboard ====
It's important to first understand the different ways keyboard events can be interpreted by the program. The most common ways to receive keyboard events are through ''callbacks'' and ''polling''.
* '''Callbacks''' - Often used by games that utilize the GLUT library, function pointers are passed to GLUT which &quot;register&quot; that function as the keyboard event callback. This means, any time a key is pressed or released, GLUT calls the respective function, passing the key data and allowing the program to respond accordingly.
* '''Polling''' - Used more often by games using SDL, polling is helpful if callback functions break abstraction in an engine. Polling is a process by which the game checks a collection of keyboard events in its spare time. So, for each pass through the game loop, your game can poll the collection, resulting in quick response to key events, and no loss of data.

=== Networking ===
Every operating system has its own TCP/IP API, so if you are planning on developing for a specific platform, then you must look into that OS's SDK (such as WinSock for the Windows API). If you are writing games for portability across multiple platforms, one good possibility is [http://jcatki.no-ip.org:8080/SDL_net/ SDL_net].

After choosing the networking API, classes should be constructed for a game engine that encapsulate sockets. One must also make the decision between networking protocols, TCP and UDP (although through abstraction, either could be used).

* '''TCP''' - This protocol sets up a connection between two computers. Data sent between computers is resent if any errors are present. The disadvantage to this protocol is that it is not as fast overall as UDP.
* '''UDP''' - This protocol does not set up a connection. Data packets are sent to an address, and the sender does not know if it arrived properly and error free. A protocol could be written using UDP to provide error checking and resending.

The decision is up to the programmer, and what is best for the game. If the subject is an online game of chess, where speed is not a major concern, TCP could be used to avoid some headaches. But, for a large team of people in a FPS, UDP would be a better choice, due to speed.

Free fire is the most coo game about 41 million people play free fire.Sea Limited was founded under the name Garena in Singapore in 2009 by Forrest Li, a graduate of Shanghai Jiaotong University and Stanford Graduate School of Business. Garena was originally intended to be a game development and publishing company, but later expanded to become a tech conglomerate which also offered financial services and e-commerce. Following a rebranding to Sea in 2017, the digital entertainment branch retained its name as Garena.

That same year, Free Fire launched as a battle royale multiplayer game and swiftly found international success. It was the most downloaded mobile game globally in 2019 and grew to become a significant stream of revenue for Garena.

In 2021, Garena released a graphically enhanced version, Free Fire Max, which has yet to surpass the original release in revenue generation. The two apps were the most downloaded shooter games in 2022 at over 100 million each, according to AppMagic.


Free Fire has become one of the “Big 3” shooter mobile games along with PUBG Mobile and Call of Duty: Mobile following the removal of Fortnite from the App Store and Google Play in August 2020. This trio earns the majority of revenue in the genre, which has been falling in popularity more rapidly than other game sub-sectors.

At the beginning of 2022, India banned Free Fire and 53 other apps which were considered as a threat to the country’s security; Free Fire Max remained available on the Google Play store. According to data.ai, Free Fire had been the second most downloaded app in the country, and had had the highest consumer spend. While Sea is based in Singapore, its biggest shareholder is the Chinese social media company Tencent Holdings. Annual revenue for Free Fire and for Sea fell significantly in 2022, which has been partially attributed to the Indian ban.

Since 2019, Free Fire has also ran esports competitions, with its World Series becoming the most-watched esports event in history with 5.4 million live viewers in 2021. These regional events are available globally and offer multi-million dollar jackpots.

Free Fire has been accused by PUBG Mobile’s developer Krafton of copyright infringement, and in January 2022 the company filed a lawsuit against Garena citing similarities in game items, mechanics and look. Apple and Google are also included in the lawsuit, which has not yet been settled, for distributing the game.

=== We have collected data and statistics on Free Fire. Read below to find out moreScripting ===
Here's a list of free scripting engines used in games development:
* [http://www.konsolscript.org KonsolScript] - A free software game scripting language
* [http://www.lua.org Lua] - The Lua scripting language

=== Game Tools ===
Here is a list of free software tools for use in game development.
* [http://www.blender.org Blender3D] - A free and very advanced modeling program, a bit tricky to get used to but just as capable as any other commercial modeling program.
* [http://www.ogre3d.org OGRE] - A free software graphics engine. Top notch.
* [http://www.planetside.co.uk/terragen/ Terragen] - A free for non-commercial use terrain generator
* [http://www.caligari.com/ TrueSpace] - Professional grade 3D modeling, animation and rendering package, previously costing up to $700 (USD), now available as a free download after a buy-out of Caligari by Microsoft.

=== Assembling and Coordinating the Team ===
Other:
* [http://www.vancouver.wsu.edu/fac/peabody/game-book/Coverpage.html The Art of Computer Game Design]
* [http://sloperama.com/advice.html Sloperama's Game Biz Advice page]
* [http://wiki.freegamedev.net/index.php/Links#Game_development_wikis List of game design wikis] on [http://wiki.freegamedev.net/ FreeGameDevWiki]

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{{Book title|{{BOOKNAME}}|An introduction to classical Greek language.}}
This text serves as an introduction to '''Classical Greek''', appropriate for a first year course. This text is in the development phase. Please join the discussion if you'd like to contribute.

==Before You Begin==
As you probably already know, Greek and English use different alphabets. For this reason, you must ensure that your Internet browser can accurately render Greek lettering. If you don't, they will appear as gibberish. Below, you should see the first line of the Iliad.

::μῆνιν ἄειδε θεὰ Πηληϊάδεω Ἀχιλῆος

Don't worry if you can't read the letters yet (that's the first lesson). You should see five words with a few types of accents. If you see question marks or boxes (even if you see a few Greek letters interspersed), you need to install a font which supports Polytonic Unicode Greek or upgrade your browser. If the size of the font makes reading uncomfortable for you, you may wish to adjust your browser or display settings.

== Table of Contents==
{{Book search}}
{{Print version}}
===Chapter I: Introduction to Classical Greek===
* [[/Preface/]]
* [[/Alphabet/]]
*: [[/Alphabet#Pronunciation|Pronunciation]] | [[/Alphabet#Diacritical Marks|Diacritical Marks]] | [[/Alphabet#Punctuation|Punctuation]]
* [[/Dialects/]]

===Chapter II: The Greek Noun ===
* [[/Basic Nouns/]]
*: [[/Basic Nouns/First Declension/]]
*: [[/Basic Nouns/Second Declension/]]
*: [[/Basic Nouns/Third Declension/]]

===Chapter III: Verbs===
* [[/Basic Verbs/|Verbs]]
*: [[/Basic Verbs#Personal Endings|Personal Endings]] | [[/Basic Verbs#Tenses|Tenses]] | [[/Basic Verbs#Irregular Verbs|Irregular Verbs]] | [[Ancient Greek/Basic Verbs#Deponent verbs|Deponent Verbs]]

===Appendices===
* [[/Glossary of Grammatical Terms/]]

== External links ==
*A free [https://www.lexilogos.com/keyboard/greek_ancient.htm/ Koine Greek Keyboard] is available from LEXILOGOS.
*The [http://www.perseus.tufts.edu/cache/perscoll_Greco-Roman.html Perseus Classics Library] at Tufts university has texts, grammars, and dictionary tools.
* For more free language-learning materials on classical Greek go to Textkit's website at http://www.textkit.com
* [http://www.ellopos.net/elpenor/greek-language.asp Greek Language Course and Libraries] at Elpenor; audio files, forums, select links.
* Once you have completed this course, Geoffrey Steadman provides a number of wonderful texts notated perfectly for second year students at [http://geoffreysteadman.com/ his website]. There are some mistakes in them, but he corrects them regularly and is happy for notes on what to fix.
* Great information on meter can be found at Aoidoi in [http://www.aoidoi.org/articles/meter/intro.pdf the introduction to Greek meter].

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[[File:Account of the construction of Athena Parthenos by Phidias.jpg|center|100px|Account of the construction of Athena Parthenos by Phidias]]
{{Book title|{{BOOKNAME}}|An introduction to classical Greek language.}}
This text serves as an introduction to '''Classical Greek''', appropriate for a first year course. This text is in the development phase. Please join the discussion if you'd like to contribute.

==Before You Begin==
As you probably already know, Greek and English use different alphabets. For this reason, you must ensure that your Internet browser can accurately render Greek lettering. If you don't, they will appear as gibberish. Below, you should see the first line of the Iliad.

::μῆνιν ἄειδε θεὰ Πηληϊάδεω Ἀχιλῆος

Don't worry if you can't read the letters yet (that's the first lesson). You should see five words with a few types of accents. If you see question marks or boxes (even if you see a few Greek letters interspersed), you need to install a font which supports Polytonic Unicode Greek or upgrade your browser. If the size of the font makes reading uncomfortable for you, you may wish to adjust your browser or display settings.

== Table of Contents==
{{Book search}}
{{Print version}}
===Chapter I: Introduction to Classical Greek===
* [[/Preface/]]
* [[/Alphabet/]]
*: [[/Alphabet#Pronunciation|Pronunciation]] | [[/Alphabet#Diacritical Marks|Diacritical Marks]] | [[/Alphabet#Punctuation|Punctuation]]
* [[/Dialects/]]

===Chapter II: The Greek Noun ===
* [[/Basic Nouns/]]
*: [[/Basic Nouns/First Declension/]]
*: [[/Basic Nouns/Second Declension/]]
*: [[/Basic Nouns/Third Declension/]]

===Chapter III: Verbs===
* [[/Basic Verbs/|Verbs]]
*: [[/Basic Verbs#Personal Endings|Personal Endings]] | [[/Basic Verbs#Tenses|Tenses]] | [[/Basic Verbs#Irregular Verbs|Irregular Verbs]] | [[Ancient Greek/Basic Verbs#Deponent verbs|Deponent Verbs]]

===Appendices===
* [[/Glossary of Grammatical Terms/]]

== External links ==
*A free [https://www.lexilogos.com/keyboard/greek_ancient.htm/ Koine Greek Keyboard] is available from LEXILOGOS.
*The [http://www.perseus.tufts.edu/cache/perscoll_Greco-Roman.html Perseus Classics Library] at Tufts university has texts, grammars, and dictionary tools.
* For more free language-learning materials on classical Greek go to Textkit's website at http://www.textkit.com
* [http://www.ellopos.net/elpenor/greek-language.asp Greek Language Course and Libraries] at Elpenor; audio files, forums, select links.
* Once you have completed this course, Geoffrey Steadman provides a number of wonderful texts notated perfectly for second year students at [http://geoffreysteadman.com/ his website]. There are some mistakes in them, but he corrects them regularly and is happy for notes on what to fix.
* Great information on meter can be found at Aoidoi in [http://www.aoidoi.org/articles/meter/intro.pdf the introduction to Greek meter].

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{{alphabetical|A}}
{{status|50%}}

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{{Book title|{{BOOKNAME}}|An introduction to classical Greek language.}}
This text serves as an introduction to '''Classical Greek''', appropriate for a first year course. This text is in the development phase. Please join the discussion if you'd like to contribute.

==Before You Begin==
As you probably already know, Greek and English use different alphabets. For this reason, you must ensure that your Internet browser can accurately render Greek lettering. If you don't, they will appear as gibberish. Below, you should see the first line of the Iliad.

::μῆνιν ἄειδε θεὰ Πηληϊάδεω Ἀχιλῆος

Don't worry if you can't read the letters yet (that's the first lesson). You should see five words with a few types of accents. If you see question marks or boxes (even if you see a few Greek letters interspersed), you need to install a font which supports Polytonic Unicode Greek or upgrade your browser. If the size of the font makes reading uncomfortable for you, you may wish to adjust your browser or display settings.

== Table of Contents==
{{Book search}}
{{Print version}}
===Chapter I: Introduction to Classical Greek===
* [[/Preface/]]
* [[/Alphabet/]]
*: [[/Alphabet#Pronunciation|Pronunciation]] | [[/Alphabet#Diacritical Marks|Diacritical Marks]] | [[/Alphabet#Punctuation|Punctuation]]
* [[/Dialects/]]

===Chapter II: The Greek Noun ===
* [[/Basic Nouns/]]
*: [[/Basic Nouns/First Declension/]]
*: [[/Basic Nouns/Second Declension/]]
*: [[/Basic Nouns/Third Declension/]]

===Chapter III: Verbs===
* [[/Basic Verbs/|Verbs]]
*: [[/Basic Verbs#Personal Endings|Personal Endings]] | [[/Basic Verbs#Tenses|Tenses]] | [[/Basic Verbs#Irregular Verbs|Irregular Verbs]] | [[Ancient Greek/Basic Verbs#Deponent verbs|Deponent Verbs]]

===Appendices===
* [[/Glossary of Grammatical Terms/]]

== External links ==
*A free [https://www.lexilogos.com/keyboard/greek_ancient.htm Koine Greek Keyboard] is available from LEXILOGOS.
*The [http://www.perseus.tufts.edu/cache/perscoll_Greco-Roman.html Perseus Classics Library] at Tufts university has texts, grammars, and dictionary tools.
* For more free language-learning materials on classical Greek go to Textkit's website at http://www.textkit.com
* [http://www.ellopos.net/elpenor/greek-language.asp Greek Language Course and Libraries] at Elpenor; audio files, forums, select links.
* Once you have completed this course, Geoffrey Steadman provides a number of wonderful texts notated perfectly for second year students at [http://geoffreysteadman.com/ his website]. There are some mistakes in them, but he corrects them regularly and is happy for notes on what to fix.
* Great information on meter can be found at Aoidoi in [http://www.aoidoi.org/articles/meter/intro.pdf the introduction to Greek meter].

{{Shelves|Greek language}}
{{alphabetical|A}}
{{status|50%}}

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==Untitled==
Hi folks. I jumped on this text because I think it'll be reasonably straightforward, at least in the early stages. Everyone has to learn the alphabet, definite articles, and so on, so I thought I'd get it started and hope some other folks join in.

I'm going to set up a page on the alphabet and pronunciation, which is the necessary first chapter. Then I'll worry about what comes next. Do please offer suggestions.

--[[User:George McAllister|George McAllister]] 21:02, 24 Jul 2004 (UTC)

Is there any activity on this anymore, or just the initial creation?  I would like to help.  Have you thought about the structure of the wikibook?

I may be adding things as I think of them, but it would be nice to keep flow with a ToC or other pre-planned format.

--[[User:Euphoria|Michael Greene]] 12:23, 23 Oct 2004 (UTC)

I would also be interested in helping, however, I lack the experience and knowledge to take a leadership role. I am a beginning ancient/classical Greek student with goals of studying post-grad classics. My hope is that working on a wiki like this from the early stages will reinforce my grammar studies, provide experience in shaping how the language can be taught, and learn more about the wikibook project.

As a beginner, where I might be of best use now would be in populating grammar tables and paradigms, researching examples, and other important, though time-consuming details. It could be that a more experienced Greek teacher could provide guidance about the overall arc of the course, the pace, etc., but would be less enthusiastic, as an example, about sitting down to type out tables. Perhaps that's where I can help.

Michael, I agree that a ToC is the place to start, at least one that covers the true and most unavoidable fundamentals, e.g. all parts of speech, present tense verbs, esp. to be.

To keep things moving, I typed up a table of definite articles (one of those unavoidables). I would post it but 1) I'll have to figure out how to edit/supplement the current ToC and 2) The table presupposes some other fundamentals, such as case and number, that may need to be written first.

Sorry for the dry first post, but you have to start somewhere. This could be fun (if we're already at the point of reading the AG discussion page, we must get some pleasure from studying the language, right?).

-Patrick

--[[User:Tomatosoupcake|Tomatosoupcake]] 16:13, 26 October 2005 (UTC)


Anyone still coming around here to talk? I can help on a limited basis. I've done page layout work for myself and professionally. I have taught Latin and Greek at the college level part time (got the sheepskins and everything), and I have some experience with computers. One thing that will help right up front, is a resource that's been around for a long time. It's a really good web page, though my thought is that this Wikibook either needs to ''create'' a similar page, or we need to get permission to link directly to the page I am referring to.

The page has a '''''very''''' nice list of free and for sale Greek fonts, as well as instructions for displaying ancient Greek in a web browser and sections of test text that the viewer can use to verify that the browser is working properly. The URL is http://www.tlg.uci.edu/help/UnicodeTest.html. 

The main site is for the TLG (Thesaurus Linguae Graecae), which is an academic project to digitize all remaining Greek literature to make it computer usable-accessible. The project has already been around for about 20 years.

Another good source to link to would probably be the Perseus Project at Tufts University: http://www.perseus.tufts.edu/. They have a wicked large amount of stuff already available on the web, including pictures, grammar aids, texts, maps, etc. Though I'm thinking the text portion might best be saved until '''after''' the students of this book here are ready for more challenging Greek texts! :-)

[[User:Darklon|Darklon]] 09:50, 15 February 2006 (UTC)

:Ah, great! The unicode fonts page looks good: I've added Perseus as a general resource, though I'm not sure if we should have a section (or even a page) directed at fonts. I suppose Wikibooks predetermines most of the layout, but it's still customiseable (e.g. see the modern greek pages). I'm aware that I may have messed up the IPA for the alphas and etas on the alphabet page, by the way (I did it all from memory); I will check - the problem comes trying to work out what changes came when! 
:Anyway, what I propose be done is that in each chapter, we havbe three sections: one for technical details: grammar, morphology, and so forth, one for teaching: Greek sentences or paragraphs with English translations (possibly some vocab), and the third for exercises: parsing, translations, compositions, and perhaps comprehension exercises (perhaps vocab glossed).
:Bearing in mind that we won't have the resources to write our own lexicon, I suspect we willl have to encourage people to use Perseus beyond the first few chapters.
--[[User:NemaFakei|NemaFakei]] 13:40, 15 February 2006 (UTC)

Hi all, I've added some material to the nouns section. Does anyone know of a way to put a line over the vowels to indicate that they're long? It'd be really helpful since accentuation depends so much on vowel quantity. 

[[User:Umop Apsdn|Umop Apsdn]] 19:03, 3 December 2006 (UTC)

down the bottom of the edit window there are a whole lot of vowels with accents and macrons etc. (macrons are what you are looking for - the line over the long vowels) if that it too laborious then you can write your edit in a word processing document with greek script and then copy it into the editing window. hope this helps [[User:Storeye|Storeye]] 11:58, 21 April 2007 (UTC)

Hello everyone. I was tempted to append the nouns page with a simple explanation of the second declension and modify the table that's already been posted for the first declension to include some masculine and feminine omicron-sigma stem nouns and maybe one or two neuter omictron-nu stems, but I decided I should run it by the group before I do anything (I could e-mail or post my handiwork if it sounds like a good idea to run it by everybody). I agree with a previous post that maybe it should be more divided up with some exercises, as it is an instructional text and if its present form is expanded it may just read like the wikipedia article on ancient greek. I'm only a beginner, and I study alone at that (out of Mastronarde's &lt;i&gt;Attic Greek&lt;/i&gt;, which I only recommend for the very serious), but working with such grammars I can do quite a bit of grunt work (though my knowledge of the differences between the different dialects is severely deficient, so i can really only speak for the Attic variety). Nice work so far, hope I can be of some assistance because I'm very excited about such a project. 

p.s. I don't know how to use whatever code it is that's been used for the tables and script thus far, and i've been trying to work with my character map, which takes a long time and lacks a rough breathing sign. If anyone could fill me in on the right way to do this, I'd be glad to. 

[[User:Slamoureux1|Slamoureux1]] 22:08, 6 May 2007 (UTC)Spencer Lamoureux

== Homeric, Attic, or Koine? ==

Well, I'm new to this site, so I'll admit I haven't looked through this much; but at a quick glance and a scroll, I haven't been able to tell just how ancient this Greek is. Will this be Homeric, Attic, Koine, or what?
-Thanks.

This book focuses on {{w|Attic Greek}}, the dialect of Ancient Greek spoken in the region of {{w|Attica}} (c. 500–300 B.C.). There is a dedicated Wikibook for [[Koine Greek]].
[[User:It-is-Truly-Meet|It-is-Truly-Meet]] ([[User talk:It-is-Truly-Meet|discuss]] • [[Special:Contributions/It-is-Truly-Meet|contribs]]) 17:07, 19 September 2026 (UTC)

== Work on Ancient Greek ==

Hi people,

I was planning on doing some work on this textbook since it looks like it hasn't been modified in a few years. I'm a PhD student in classics and I thought I would add a bunch of material, but I don't want to step one anyone's toes. Let me know if I should refrain because someone is currently working on it.

Thanks.

== Anyone here? ==

Hey folks, I am interested in seeing if i can contribute to our ancient greek pages as its something I am have been studying in university, but this looks very inactive. Just want to check if anyone is still watching the page and is interested in contributing when they can.

I also second the question above regarding what variation of greek we will be focusing on here. My experience extends to Attic Greek. [[User:Wobblywatch|Wobblywatch]] ([[User talk:Wobblywatch|discuss]] • [[Special:Contributions/Wobblywatch|contribs]]) 22:56, 3 January 2019 (UTC)

Please do so, contribute! Attic Greek would be great.  &lt;span style=&quot;background-color:#FCFF6C;{{Text default color}};padding:0.5px 2px;border-radius:2px&quot;&gt;[[User:Genoskill|&lt;span style=&quot;font-weight:bold&quot;&gt;Genoskill&lt;/span&gt;]]&lt;/span&gt; ([[User talk:Genoskill|discuss]] • [[Special:Contributions/Genoskill|contribs]]) 01:09, 7 April 2022 (UTC)

== typo ==

I believe that the word  ἰπποπόταμος in the section Rules for Accentuation has the wrong breathing mark over the ἰ (a smooth breathing mark instead of a rough breathing mark).    

My knowledge of ancient greek is very small, so I hesitated to go ahead and change it myself, but I wanted to point it out as a possible typo to a knowledgeable person
[[User:DlronW|DlronW]] ([[User talk:DlronW|discuss]] • [[Special:Contributions/DlronW|contribs]]) 23:19, 11 May 2023 (UTC)

== Outdated links ==

Hi, it seems the links to the [http://www.westarinstitute.org/resources/koine-greek-keyboard/ Koine Greek keyboard] and Middlebury College's [http://community.middlebury.edu/~harris/GreekGrammar.html The Intelligent Person's Guide to Greek] don't exist anymore. I have, however, found this Greek keyboard at [https://www.lexilogos.com/keyboard/greek_ancient.htm lexilogos.com]. [[User:HesselW|HesselW]] ([[User talk:HesselW|discuss]] • [[Special:Contributions/HesselW|contribs]]) 10:08, 11 January 2025 (UTC)</text>
      <sha1>8t51c710dw7tf9554xswtav2yyq8l4x</sha1>
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==Untitled==
Hi folks. I jumped on this text because I think it'll be reasonably straightforward, at least in the early stages. Everyone has to learn the alphabet, definite articles, and so on, so I thought I'd get it started and hope some other folks join in.

I'm going to set up a page on the alphabet and pronunciation, which is the necessary first chapter. Then I'll worry about what comes next. Do please offer suggestions.

--[[User:George McAllister|George McAllister]] 21:02, 24 Jul 2004 (UTC)

Is there any activity on this anymore, or just the initial creation?  I would like to help.  Have you thought about the structure of the wikibook?

I may be adding things as I think of them, but it would be nice to keep flow with a ToC or other pre-planned format.

--[[User:Euphoria|Michael Greene]] 12:23, 23 Oct 2004 (UTC)

I would also be interested in helping, however, I lack the experience and knowledge to take a leadership role. I am a beginning ancient/classical Greek student with goals of studying post-grad classics. My hope is that working on a wiki like this from the early stages will reinforce my grammar studies, provide experience in shaping how the language can be taught, and learn more about the wikibook project.

As a beginner, where I might be of best use now would be in populating grammar tables and paradigms, researching examples, and other important, though time-consuming details. It could be that a more experienced Greek teacher could provide guidance about the overall arc of the course, the pace, etc., but would be less enthusiastic, as an example, about sitting down to type out tables. Perhaps that's where I can help.

Michael, I agree that a ToC is the place to start, at least one that covers the true and most unavoidable fundamentals, e.g. all parts of speech, present tense verbs, esp. to be.

To keep things moving, I typed up a table of definite articles (one of those unavoidables). I would post it but 1) I'll have to figure out how to edit/supplement the current ToC and 2) The table presupposes some other fundamentals, such as case and number, that may need to be written first.

Sorry for the dry first post, but you have to start somewhere. This could be fun (if we're already at the point of reading the AG discussion page, we must get some pleasure from studying the language, right?).

-Patrick

--[[User:Tomatosoupcake|Tomatosoupcake]] 16:13, 26 October 2005 (UTC)


Anyone still coming around here to talk? I can help on a limited basis. I've done page layout work for myself and professionally. I have taught Latin and Greek at the college level part time (got the sheepskins and everything), and I have some experience with computers. One thing that will help right up front, is a resource that's been around for a long time. It's a really good web page, though my thought is that this Wikibook either needs to ''create'' a similar page, or we need to get permission to link directly to the page I am referring to.

The page has a '''''very''''' nice list of free and for sale Greek fonts, as well as instructions for displaying ancient Greek in a web browser and sections of test text that the viewer can use to verify that the browser is working properly. The URL is http://www.tlg.uci.edu/help/UnicodeTest.html. 

The main site is for the TLG (Thesaurus Linguae Graecae), which is an academic project to digitize all remaining Greek literature to make it computer usable-accessible. The project has already been around for about 20 years.

Another good source to link to would probably be the Perseus Project at Tufts University: http://www.perseus.tufts.edu/. They have a wicked large amount of stuff already available on the web, including pictures, grammar aids, texts, maps, etc. Though I'm thinking the text portion might best be saved until '''after''' the students of this book here are ready for more challenging Greek texts! :-)

[[User:Darklon|Darklon]] 09:50, 15 February 2006 (UTC)

:Ah, great! The unicode fonts page looks good: I've added Perseus as a general resource, though I'm not sure if we should have a section (or even a page) directed at fonts. I suppose Wikibooks predetermines most of the layout, but it's still customiseable (e.g. see the modern greek pages). I'm aware that I may have messed up the IPA for the alphas and etas on the alphabet page, by the way (I did it all from memory); I will check - the problem comes trying to work out what changes came when! 
:Anyway, what I propose be done is that in each chapter, we havbe three sections: one for technical details: grammar, morphology, and so forth, one for teaching: Greek sentences or paragraphs with English translations (possibly some vocab), and the third for exercises: parsing, translations, compositions, and perhaps comprehension exercises (perhaps vocab glossed).
:Bearing in mind that we won't have the resources to write our own lexicon, I suspect we willl have to encourage people to use Perseus beyond the first few chapters.
--[[User:NemaFakei|NemaFakei]] 13:40, 15 February 2006 (UTC)

Hi all, I've added some material to the nouns section. Does anyone know of a way to put a line over the vowels to indicate that they're long? It'd be really helpful since accentuation depends so much on vowel quantity. 

[[User:Umop Apsdn|Umop Apsdn]] 19:03, 3 December 2006 (UTC)

down the bottom of the edit window there are a whole lot of vowels with accents and macrons etc. (macrons are what you are looking for - the line over the long vowels) if that it too laborious then you can write your edit in a word processing document with greek script and then copy it into the editing window. hope this helps [[User:Storeye|Storeye]] 11:58, 21 April 2007 (UTC)

Hello everyone. I was tempted to append the nouns page with a simple explanation of the second declension and modify the table that's already been posted for the first declension to include some masculine and feminine omicron-sigma stem nouns and maybe one or two neuter omictron-nu stems, but I decided I should run it by the group before I do anything (I could e-mail or post my handiwork if it sounds like a good idea to run it by everybody). I agree with a previous post that maybe it should be more divided up with some exercises, as it is an instructional text and if its present form is expanded it may just read like the wikipedia article on ancient greek. I'm only a beginner, and I study alone at that (out of Mastronarde's &lt;i&gt;Attic Greek&lt;/i&gt;, which I only recommend for the very serious), but working with such grammars I can do quite a bit of grunt work (though my knowledge of the differences between the different dialects is severely deficient, so i can really only speak for the Attic variety). Nice work so far, hope I can be of some assistance because I'm very excited about such a project. 

p.s. I don't know how to use whatever code it is that's been used for the tables and script thus far, and i've been trying to work with my character map, which takes a long time and lacks a rough breathing sign. If anyone could fill me in on the right way to do this, I'd be glad to. 

[[User:Slamoureux1|Slamoureux1]] 22:08, 6 May 2007 (UTC)Spencer Lamoureux

== Homeric, Attic, or Koine? ==

Well, I'm new to this site, so I'll admit I haven't looked through this much; but at a quick glance and a scroll, I haven't been able to tell just how ancient this Greek is. Will this be Homeric, Attic, Koine, or what?
-Thanks.

This book focuses on {{w|Attic Greek}}, the dialect of Ancient Greek spoken in the region of {{w|Attica}} (c. 500–300 B.C.). There is a dedicated Wikibook for [[Koine Greek]].
[[User:It-is-Truly-Meet|It-is-Truly-Meet]] ([[User talk:It-is-Truly-Meet|discuss]] • [[Special:Contributions/It-is-Truly-Meet|contribs]]) 17:07, 19 September 2026 (UTC)

== Work on Ancient Greek ==

Hi people,

I was planning on doing some work on this textbook since it looks like it hasn't been modified in a few years. I'm a PhD student in classics and I thought I would add a bunch of material, but I don't want to step one anyone's toes. Let me know if I should refrain because someone is currently working on it.

Thanks.

Feel free to contribute, as &quot;[t]he Wikimedia movement is a global community of people, projects, and activities working together to create and share knowledge freely.&quot; Just don't repeat any information covered in this book already. [[User:It-is-Truly-Meet|It-is-Truly-Meet]] ([[User talk:It-is-Truly-Meet|discuss]] • [[Special:Contributions/It-is-Truly-Meet|contribs]]) 17:11, 19 September 2026 (UTC)

== Anyone here? ==

Hey folks, I am interested in seeing if i can contribute to our ancient greek pages as its something I am have been studying in university, but this looks very inactive. Just want to check if anyone is still watching the page and is interested in contributing when they can.

I also second the question above regarding what variation of greek we will be focusing on here. My experience extends to Attic Greek. [[User:Wobblywatch|Wobblywatch]] ([[User talk:Wobblywatch|discuss]] • [[Special:Contributions/Wobblywatch|contribs]]) 22:56, 3 January 2019 (UTC)

Please do so, contribute! Attic Greek would be great.  &lt;span style=&quot;background-color:#FCFF6C;{{Text default color}};padding:0.5px 2px;border-radius:2px&quot;&gt;[[User:Genoskill|&lt;span style=&quot;font-weight:bold&quot;&gt;Genoskill&lt;/span&gt;]]&lt;/span&gt; ([[User talk:Genoskill|discuss]] • [[Special:Contributions/Genoskill|contribs]]) 01:09, 7 April 2022 (UTC)

== typo ==

I believe that the word  ἰπποπόταμος in the section Rules for Accentuation has the wrong breathing mark over the ἰ (a smooth breathing mark instead of a rough breathing mark).    

My knowledge of ancient greek is very small, so I hesitated to go ahead and change it myself, but I wanted to point it out as a possible typo to a knowledgeable person
[[User:DlronW|DlronW]] ([[User talk:DlronW|discuss]] • [[Special:Contributions/DlronW|contribs]]) 23:19, 11 May 2023 (UTC)

== Outdated links ==

Hi, it seems the links to the [http://www.westarinstitute.org/resources/koine-greek-keyboard/ Koine Greek keyboard] and Middlebury College's [http://community.middlebury.edu/~harris/GreekGrammar.html The Intelligent Person's Guide to Greek] don't exist anymore. I have, however, found this Greek keyboard at [https://www.lexilogos.com/keyboard/greek_ancient.htm lexilogos.com]. [[User:HesselW|HesselW]] ([[User talk:HesselW|discuss]] • [[Special:Contributions/HesselW|contribs]]) 10:08, 11 January 2025 (UTC)</text>
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==Untitled==
Hi folks. I jumped on this text because I think it'll be reasonably straightforward, at least in the early stages. Everyone has to learn the alphabet, definite articles, and so on, so I thought I'd get it started and hope some other folks join in.

I'm going to set up a page on the alphabet and pronunciation, which is the necessary first chapter. Then I'll worry about what comes next. Do please offer suggestions.

--[[User:George McAllister|George McAllister]] 21:02, 24 Jul 2004 (UTC)

Is there any activity on this anymore, or just the initial creation?  I would like to help.  Have you thought about the structure of the wikibook?

I may be adding things as I think of them, but it would be nice to keep flow with a ToC or other pre-planned format.

--[[User:Euphoria|Michael Greene]] 12:23, 23 Oct 2004 (UTC)

I would also be interested in helping, however, I lack the experience and knowledge to take a leadership role. I am a beginning ancient/classical Greek student with goals of studying post-grad classics. My hope is that working on a wiki like this from the early stages will reinforce my grammar studies, provide experience in shaping how the language can be taught, and learn more about the wikibook project.

As a beginner, where I might be of best use now would be in populating grammar tables and paradigms, researching examples, and other important, though time-consuming details. It could be that a more experienced Greek teacher could provide guidance about the overall arc of the course, the pace, etc., but would be less enthusiastic, as an example, about sitting down to type out tables. Perhaps that's where I can help.

Michael, I agree that a ToC is the place to start, at least one that covers the true and most unavoidable fundamentals, e.g. all parts of speech, present tense verbs, esp. to be.

To keep things moving, I typed up a table of definite articles (one of those unavoidables). I would post it but 1) I'll have to figure out how to edit/supplement the current ToC and 2) The table presupposes some other fundamentals, such as case and number, that may need to be written first.

Sorry for the dry first post, but you have to start somewhere. This could be fun (if we're already at the point of reading the AG discussion page, we must get some pleasure from studying the language, right?).

-Patrick

--[[User:Tomatosoupcake|Tomatosoupcake]] 16:13, 26 October 2005 (UTC)


Anyone still coming around here to talk? I can help on a limited basis. I've done page layout work for myself and professionally. I have taught Latin and Greek at the college level part time (got the sheepskins and everything), and I have some experience with computers. One thing that will help right up front, is a resource that's been around for a long time. It's a really good web page, though my thought is that this Wikibook either needs to ''create'' a similar page, or we need to get permission to link directly to the page I am referring to.

The page has a '''''very''''' nice list of free and for sale Greek fonts, as well as instructions for displaying ancient Greek in a web browser and sections of test text that the viewer can use to verify that the browser is working properly. The URL is http://www.tlg.uci.edu/help/UnicodeTest.html. 

The main site is for the TLG (Thesaurus Linguae Graecae), which is an academic project to digitize all remaining Greek literature to make it computer usable-accessible. The project has already been around for about 20 years.

Another good source to link to would probably be the Perseus Project at Tufts University: http://www.perseus.tufts.edu/. They have a wicked large amount of stuff already available on the web, including pictures, grammar aids, texts, maps, etc. Though I'm thinking the text portion might best be saved until '''after''' the students of this book here are ready for more challenging Greek texts! :-)

[[User:Darklon|Darklon]] 09:50, 15 February 2006 (UTC)

:Ah, great! The unicode fonts page looks good: I've added Perseus as a general resource, though I'm not sure if we should have a section (or even a page) directed at fonts. I suppose Wikibooks predetermines most of the layout, but it's still customiseable (e.g. see the modern greek pages). I'm aware that I may have messed up the IPA for the alphas and etas on the alphabet page, by the way (I did it all from memory); I will check - the problem comes trying to work out what changes came when! 
:Anyway, what I propose be done is that in each chapter, we havbe three sections: one for technical details: grammar, morphology, and so forth, one for teaching: Greek sentences or paragraphs with English translations (possibly some vocab), and the third for exercises: parsing, translations, compositions, and perhaps comprehension exercises (perhaps vocab glossed).
:Bearing in mind that we won't have the resources to write our own lexicon, I suspect we willl have to encourage people to use Perseus beyond the first few chapters.
--[[User:NemaFakei|NemaFakei]] 13:40, 15 February 2006 (UTC)

Hi all, I've added some material to the nouns section. Does anyone know of a way to put a line over the vowels to indicate that they're long? It'd be really helpful since accentuation depends so much on vowel quantity. 

[[User:Umop Apsdn|Umop Apsdn]] 19:03, 3 December 2006 (UTC)

down the bottom of the edit window there are a whole lot of vowels with accents and macrons etc. (macrons are what you are looking for - the line over the long vowels) if that it too laborious then you can write your edit in a word processing document with greek script and then copy it into the editing window. hope this helps [[User:Storeye|Storeye]] 11:58, 21 April 2007 (UTC)

Hello everyone. I was tempted to append the nouns page with a simple explanation of the second declension and modify the table that's already been posted for the first declension to include some masculine and feminine omicron-sigma stem nouns and maybe one or two neuter omictron-nu stems, but I decided I should run it by the group before I do anything (I could e-mail or post my handiwork if it sounds like a good idea to run it by everybody). I agree with a previous post that maybe it should be more divided up with some exercises, as it is an instructional text and if its present form is expanded it may just read like the wikipedia article on ancient greek. I'm only a beginner, and I study alone at that (out of Mastronarde's &lt;i&gt;Attic Greek&lt;/i&gt;, which I only recommend for the very serious), but working with such grammars I can do quite a bit of grunt work (though my knowledge of the differences between the different dialects is severely deficient, so i can really only speak for the Attic variety). Nice work so far, hope I can be of some assistance because I'm very excited about such a project. 

p.s. I don't know how to use whatever code it is that's been used for the tables and script thus far, and i've been trying to work with my character map, which takes a long time and lacks a rough breathing sign. If anyone could fill me in on the right way to do this, I'd be glad to. 

[[User:Slamoureux1|Slamoureux1]] 22:08, 6 May 2007 (UTC)Spencer Lamoureux

== Homeric, Attic, or Koine? ==

Well, I'm new to this site, so I'll admit I haven't looked through this much; but at a quick glance and a scroll, I haven't been able to tell just how ancient this Greek is. Will this be Homeric, Attic, Koine, or what?
-Thanks.

This book focuses on {{w|Attic Greek}}, the dialect of Ancient Greek spoken in the region of {{w|Attica}} (c. 500–300 B.C.). There is a dedicated Wikibook for [[Koine Greek]].
[[User:It-is-Truly-Meet|It-is-Truly-Meet]] ([[User talk:It-is-Truly-Meet|discuss]] • [[Special:Contributions/It-is-Truly-Meet|contribs]]) 17:07, 19 September 2026 (UTC)

== Work on Ancient Greek ==

Hi people,

I was planning on doing some work on this textbook since it looks like it hasn't been modified in a few years. I'm a PhD student in classics and I thought I would add a bunch of material, but I don't want to step one anyone's toes. Let me know if I should refrain because someone is currently working on it.

Thanks.

Feel free to contribute, as &quot;[t]he Wikimedia movement is a global community of people, projects, and activities working together to create and share knowledge freely.&quot; Just don't repeat any information covered in this book already. [[User:It-is-Truly-Meet|It-is-Truly-Meet]] ([[User talk:It-is-Truly-Meet|discuss]] • [[Special:Contributions/It-is-Truly-Meet|contribs]]) 17:11, 19 September 2026 (UTC)

== Anyone here? ==

Hey folks, I am interested in seeing if i can contribute to our ancient greek pages as its something I am have been studying in university, but this looks very inactive. Just want to check if anyone is still watching the page and is interested in contributing when they can.

I also second the question above regarding what variation of greek we will be focusing on here. My experience extends to Attic Greek. [[User:Wobblywatch|Wobblywatch]] ([[User talk:Wobblywatch|discuss]] • [[Special:Contributions/Wobblywatch|contribs]]) 22:56, 3 January 2019 (UTC)

Please do so, contribute! Attic Greek would be great.  &lt;span style=&quot;background-color:#FCFF6C;{{Text default color}};padding:0.5px 2px;border-radius:2px&quot;&gt;[[User:Genoskill|&lt;span style=&quot;font-weight:bold&quot;&gt;Genoskill&lt;/span&gt;]]&lt;/span&gt; ([[User talk:Genoskill|discuss]] • [[Special:Contributions/Genoskill|contribs]]) 01:09, 7 April 2022 (UTC)

== typo ==

I believe that the word  ἰπποπόταμος in the section Rules for Accentuation has the wrong breathing mark over the ἰ (a smooth breathing mark instead of a rough breathing mark).    

My knowledge of ancient greek is very small, so I hesitated to go ahead and change it myself, but I wanted to point it out as a possible typo to a knowledgeable person
[[User:DlronW|DlronW]] ([[User talk:DlronW|discuss]] • [[Special:Contributions/DlronW|contribs]]) 23:19, 11 May 2023 (UTC)

:This book may have errors, as it is still under development. Thank you for pointing this out. [[User:It-is-Truly-Meet|It-is-Truly-Meet]] ([[User talk:It-is-Truly-Meet|discuss]] • [[Special:Contributions/It-is-Truly-Meet|contribs]]) 17:18, 19 September 2026 (UTC)

== Outdated links ==

Hi, it seems the links to the [http://www.westarinstitute.org/resources/koine-greek-keyboard/ Koine Greek keyboard] and Middlebury College's [http://community.middlebury.edu/~harris/GreekGrammar.html The Intelligent Person's Guide to Greek] don't exist anymore. I have, however, found this Greek keyboard at [https://www.lexilogos.com/keyboard/greek_ancient.htm lexilogos.com]. [[User:HesselW|HesselW]] ([[User talk:HesselW|discuss]] • [[Special:Contributions/HesselW|contribs]]) 10:08, 11 January 2025 (UTC)</text>
      <sha1>ac1aus2u6njgwwrwhvpfgp1ra7w8ozz</sha1>
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      <text bytes="2226" sha1="2mxp28ymva3qdl9anfsgdqi8xkcl6h5" xml:space="preserve">The purpose of this book is to provide a manual appropriate for a North American Amateur Radio Licensing course with added information so that beginning amateurs will have a good reference source to continue their hobby. One of the goals is to make this a practical rather than a theoretical manual and to keep the language simple and understandable.

==Contents==
[[Image:Amateurfunkstation.jpg|thumb|right|300px|A typical shack]]
[[Image:Amateurfunkantennen.jpg|thumb|right|300px|A Yagi/Uda antenna]]
===Basic Electronics===
#[[/Atoms/]] {{stage short|75%|Feb 10, 2005}}
#[[/Conductors and Insulators/]] {{stage short|50%|Feb 10, 2005}}
#[[/Sources of Current/]] {{stage short|75%|Feb 10, 2005}}
#[[/What is Current/]] {{stage short|50%|Feb 10, 2005}}
#[[/What is Voltage/]] {{stage short|50%|Feb 10, 2005}}
#[[/What is Resistance and Conductance/]] {{stage short|50%|Feb 10, 2005}}
#[[/Magnetism/]]
#[[/Ohm's Law and Resistors/]] {{stage short|100%|Feb 10, 2005}}
#[[/Direct and Alternating Current/]] {{stage short|25%|March 11, 2007}}
#[[/Sinusoidal Waveforms/]]
#[[/Capacitance/]]
#[[/Inductance/]]
#*[[/Inductors/]]
#*[[/Transformers/]]
#[[/Reactance/]]
#[[/Impedance/]]
#[[/Resonance/]]
#[[/Tuned Circuit/]]

===Active Components===
#[[/Diode/]]
#Transistors for Amplification
#*[[/FET/]]
#[[/Tubes/]] (Glassfet!)

===Power Supplies===

===Propagation===

===Feed Lines and Theory===

===Antennas and Antenna Theory===
#[[/Dipoles/]]
#[[/Verticals/]]
#[[/Directional Arrays/]]
#[[/Antenna Software/]]
#[[/Towers and Safety/]]
#[[/Practical Antenna Projects/]]

===Rules and Regulations===
#[[/Canada/]]
#[[/United States/]]

===Operating Procedures===
#[[/Amateur Radio Bands/]]
#[[/Transmission Frequencies/]]

== Further reading ==
* [[Communication Networks/Radio Communications]]; [[Communication Networks/Analog and Digital Radio]]
* [[Scouting/Earning the Radio merit badge]]
* [[Adventist Youth Honors Answer Book/Vocational/Radio]]
* [[Adventist Youth Honors Answer Book/Vocational/Radio Electronics]]
* [[Wireless Mesh Networks]]—the amateur packet-switched network is one of the first wireless mesh networks.

{{Shelves|Wireless communication}}
{{alphabetical|A}}
{{status|25%}}
__NOTOC__ __NOEDITSECTION__</text>
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  <page>
    <title>Chinese (Mandarin)/Lesson 5</title>
    <ns>0</ns>
    <id>19025</id>
    <revision>
      <id>4671263</id>
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      <timestamp>2026-09-20T03:46:00Z</timestamp>
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        <id>3609960</id>
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      <text bytes="9629" sha1="bpt31bfyvu3610vw556l07b1z0td05l" xml:space="preserve">{{Chinese (Mandarin)TOC}}
&lt;div class=&quot;noprint&quot;&gt;{{TOCright}}&lt;/div&gt;
=Lesson 5: Measure words=
==Text==
{|style=&quot;text-align:center;;&quot;
!width=&quot;100&quot;|Simplified Characters!!width=&quot;100&quot;|Traditional Characters
|-
|'''山村咏怀'''&lt;/br&gt;
&lt;small&gt;【宋】邵雍&lt;/small&gt;&lt;/br&gt;
一去二三里&lt;/br&gt;
烟村四五家&lt;/br&gt;
亭台六七座&lt;/br&gt;
八九十枝花&lt;/br&gt;
|'''山村詠懷'''&lt;/br&gt;
&lt;small&gt;【宋】邵雍&lt;/small&gt;&lt;/br&gt;
一去二三里&lt;/br&gt;
煙村四五家&lt;/br&gt;
亭臺六七座&lt;/br&gt;
八九十枝花&lt;/br&gt;
|-
!Pīnyīn!!English
|-
|'''Shāncun Yǒnghuái'''&lt;/br&gt;
&lt;small&gt;【Sòng】Shàoyōng&lt;/small&gt;&lt;/br&gt;
Yí qù èrsān lǐ&lt;/br&gt;
Yāncūn sìwǔjiā&lt;/br&gt;
Tíngtái liùqīzuò&lt;/br&gt;
Bājiǔshízhī huā&lt;/br&gt;
|'''The sigh for a village'''&lt;/br&gt;
&lt;small&gt;【[[w:Song Dynasty|Song]]】Shao Yong&lt;/small&gt;&lt;/br&gt;
The distance is two or three miles,&lt;/br&gt;
and I can see four or five houses&lt;/br&gt;
with smoking chimneys.&lt;/br&gt;
There are six or seven pavilions,&lt;/br&gt;
and eight, nine or ten flowers.&lt;/br&gt;
|}

== Vocabulary ==
{| border=&quot;0&quot; cellpadding=&quot;2&quot;
!width=&quot;10&quot;|
!width=&quot;100&quot; align=&quot;left&quot;|Simplified (traditional in parentheses)
!width=&quot;100&quot; align=&quot;left&quot;|Pīnyīn
!width=&quot;60&quot; align=&quot;left&quot;|[[Chinese/Abbreviations|Part of speech]]
!width=&quot;150&quot; align=&quot;left&quot;|English [&amp;zwj;[[Chinese/Abbreviations|m.]]&amp;zwj;]
!width=&quot;150&quot; align=&quot;left&quot;|notes
|-

|1.
|&lt;big&gt;一&lt;/big&gt;
|[[Media:zh-yi1.ogg|yī]]
|(adj)
|one
|-

|2.
|&lt;big&gt;二&lt;/big&gt;
|[[Media:zh-èr.ogg|èr]]
|(adj)
|two
|-

|3.
|&lt;big&gt;三&lt;/big&gt;
|[[Media:zh-san1.ogg|sān]]
|(adj)
|three
|-

|4.
|&lt;big&gt;四&lt;/big&gt;
|[[Media:zh-sì.ogg|sì]]
|(adj)
|four
|-

|5.
|&lt;big&gt;五&lt;/big&gt;
|[[Media:zh-wu3.ogg|wǔ]]
|(adj)
|five
|-

|6.
|&lt;big&gt;六&lt;/big&gt;
|[[Media:zh-liu4.ogg|liù]]
|(adj)
|six
|-

|7.
|&lt;big&gt;七&lt;/big&gt;
|[[Media:zh-qi1.ogg|qī]]
|(adj)
|seven
|-

|8.
|&lt;big&gt;八&lt;/big&gt;
|[[Media:zh-ba1.ogg|bā]]
|(adj)
|eight
|-

|9.
|&lt;big&gt;九&lt;/big&gt;
|[[Media:zh-jiu3.ogg|jiǔ]]
|(adj)
|nine
|-

|10.
|&lt;big&gt;十&lt;/big&gt;
|[[Media:zh-shi2.ogg|shí]]
|(adj)
|ten
|-

|11.
|&lt;big&gt;山村&lt;/big&gt;
|shāncūn
|(n)
|mountain village
|-

|12.
|&lt;big&gt;宋&lt;/big&gt;
|sòng
|(n)
|song
|It's short for 宋朝（song dynasty,960–1279）.
|-

|13.
|&lt;big&gt;邵雍&lt;/big&gt;
|shàoyōng
|(n)
|A poetic name.
|-

|14.
|&lt;big&gt;去&lt;/big&gt;
|qù
|(v)
|be apart (away) from;&lt;/br&gt;be at a distance from
|This usage is only used classical Chinese.
|-

|15.
|&lt;big&gt;里&lt;/big&gt;
|lǐ
|()
|mile
|Mile and 里 are not identical.In song dynasty,1里≈415.8m.Now China,1里=500m.
|-

|16.
|&lt;big&gt;烟村（煙村）&lt;/big&gt;
|yāncūn
|(n)
|The village with smoking chimneys
|This usage is only literary works.
|-

|17.
|&lt;big&gt;家&lt;/big&gt;
|jiā
|(ms)
|the measure Words of family
|-

|18.
|&lt;big&gt;亭&lt;/big&gt;
|tíng
|(n)
|pavilions
|-

|19.
|&lt;big&gt;台（臺）&lt;/big&gt;
|tái
|(n)
|platform
|-

|20.
|&lt;big&gt;座&lt;/big&gt;
|zuò
|(ms)
|the measure Words of building
|-

|21.
|&lt;big&gt;枝&lt;/big&gt;
|zhī
|(ms)
|the measure Words of flower
|-

|22.
|&lt;big&gt;花&lt;/big&gt;
|huā
|(n)
|flower
|-

|}

==Measure Words/量词(liàngcí)==
{| cellpadding=&quot;5&quot; rules=&quot;all&quot; style=&quot;margin-left: auto; margin-right: auto; border: 0px solid #000000;&quot;
|-
|style=&quot;white-space: wrap; background-color:#FFFFCC;{{Text default color}};&quot;| In Chinese, most specified or numbered nouns must be preceded by [[w:measure word|measure word]]s, also known as classifiers, according to the type of object. Consider the English phrase, &quot;two pairs of pants.&quot; Like the word &quot;pair,&quot; Chinese measure words are placed between the noun and the preceding number.
|}
1.  这本书里没有一个汉字。
:Zhè bĕn shū lǐ méi yŏu yí gè Hànzì.
:''This book doesn’t contain one Chinese character.''

2.  那间宿舍有六十个学生。
:Nà jiān sùshè yŏu liùshí ge xuésheng.
:''That dorm has sixty students.''

The phrase 一朵花 (yī duǒ huā) means &quot;one flower,&quot; but how would you say &quot;a pile of flowers?&quot; It's simple: just change the classifier. The phrase 一堆花 (yī duī huā) means &quot;a pile of flowers.&quot; You could also say 一把花 (yī bǎ huā; a handful of flowers), 一桶花 (yī tǒng huā; a bucket of flowers), or 一种花 (yī zhǒng huā; a kind of flower). You can see that measure words act as adjectives.

In Chinese, like in English, you can omit the noun if it's already known, leaving only the classifier. 你看到那种（花）吗？ (Nǐ kàn dào nà zhǒng (huā) ma?) means &quot;Did you see that kind (of flower)?&quot; You can see that measure words also act as nouns.

Measure words are also used with [[w:demonstrative|demonstrative pronouns]] (this, that). For example, 这朵花 means &quot;this flower,&quot; and 那朵花 means &quot;that flower.&quot;

You might also encounter something like this: 书架上有书本。 (Shūjià shàng yǒu shūběn.) which means &quot;The bookshelf has books on it.&quot; Note that the classifier is after the noun. This signifies multiple books where the exact number is not important, here translated &quot;books.&quot; The sentence 书架上有书。, means the same as above, but is without the classifier.

===Some Common Measure Words===

Column key: Trad. is Traditional, Simp. shows changes made for the simplified variant (if any).

{| class=&quot;wikitable sortable&quot;
|-
! scope=&quot;col&quot; width=&quot;45&quot; class=&quot;unsortable&quot; | Trad.
! scope=&quot;col&quot; width=&quot;45&quot; class=&quot;unsortable&quot; | Simp.
! scope=&quot;col&quot; | Pinyin
! scope=&quot;col&quot; class=&quot;unsortable&quot; | Main uses
! scope=&quot;col&quot; class=&quot;unsortable&quot; | Example
|-
| 個 || 个 || ge 
| individual things, people &amp;mdash; usage of this classifier in conjunction with any noun is generally accepted if the person does not know the proper classifier.
| 一个书包 yí ge shūbāo, a schoolbag
|-
| 把 || || bǎ
| &quot;handful&quot;, &quot;fistful&quot; &amp;mdash; objects that can be held or grabbed (knives, scissors, keys; also chairs)
| 一把刀 yì bă dāo. One knife. 
一把盐 yì bă yán. A handful of salt.

|-
| 包 || || bāo
| &quot;package&quot;, &quot;bundle&quot;
|一包纸巾 yì bāo zhǐ jīn. A package of paper towels.
|-
| 杯 || || bēi
| &quot;cup&quot; &amp;mdash; drinks
|一杯水 yì bēi shuǐ. A cup of water.
|-
| 本 || || běn
| &quot;volume&quot; &amp;mdash; any bound print or written matter (books, etc.)
|一本书  yì běn shū. A book.
|-
| 册 || || cè
| slimmer volumes of books
|-
| 次 || || cì
| &quot;time&quot; &amp;mdash; opportunities, accidents
| 两次 liǎng cì. Twice. 三次 sān cì. Three times.
|-
| 滴 || || dī
| &quot;droplet&quot; — water, blood, and other such fluids
| 一滴水 yì dī shuǐ. A drop of water.
|-
| 點 || 点 || diǎn
| ideas, suggestions, can also mean &quot;a bit&quot;
| 你睡一点。 Nǐ shuì yīdiǎn. Sleep a bit.
|-
| 堆 || || duī
| &quot;pile&quot; — anything in a pile
| 一堆书 yī duī shū. A pile of books.
|-
| 朵 || || duǒ
| flowers, clouds
| 一朵花 yì duŏ huā. One flower.
|-
| 份 || || fèn 
| newspapers, jobs
| 一份报 yì fèn bào. A newspaper
|-
| 根 || || gēn
| thin, slender objects, lit. &quot;a root of a...&quot; (needles, pillars, grass, vegetable roots etc.)
| 一根针 yì gēn zhēn. A needle
|-
| 家 || || jiā
| gathering of people (families, companies, etc.)
| 一家人 yī jiā rén. A family of people.
|-
| 架 || || jià 
| objects with a &quot;frame&quot; or structure; generally used for machines or mechanical objects (esp. cars, planes, etc.)
| 一架飞机 yī jià fēijī. One plane.
|-
| 件 || || jiàn
| matters, clothing, etc.
| 一件衣服 yí jiàn yī fù. An article of clothing.
|-
| 節 || 节 || jié
| &quot;a section&quot; &amp;mdash; of bamboo, tutorials and classes, etc.
|-
| 輛 || 辆 || liàng
| automobiles, bicycles, vehicles, etc.
| 一辆车 yí liàng chē. One car.
|-
| 面 || || miàn
| any flat and smooth objects, lit. &quot;a surface of a...&quot; (mirrors, flags, walls, etc.)
|一面镜子 yí miàn jìng zi. One mirror
|-
| 匹 || || pǐ
| horses and other mounts, or rolls/bolts of cloth
| 一匹马 yì pǐ mă. One horse.
|-
| 片 || || piàn 
| &quot;slice&quot; &amp;mdash; any flat object, like cards, slices of bread, tree leaves, etc.
| 一片叶子 yì piàn yè zi. One leaf.
|-
| 瓶 || || píng
| &quot;bottle&quot; &amp;mdash; drinks
|-
| 扇 || || shàn
| objects that open and close (doors, windows)
| 一扇门  yì shàn mén. One door
|-
| 艘 || || sōu
| ships
| 一艘船 yì sōu chuán. One ship.
|-
| 所 || || suǒ
| any buildings, apartment
|-
| 台 || || tái
| heavy objects (TVs, computers, etc.) and performances (esp. in theatre, etc.)
| 一台电脑 yī tái diànnǎo. One computer.
|- 
| 條 || 条 || tiáo
| long, narrow, flexible objects (fish, trousers, etc.)
| 一条鱼 yì tiáo yú. One fish.
|-
| 頭 || 头 || tóu
| &quot;head&quot; &amp;mdash; herd animals (pigs, cows, sheep etc., ''never'' for fowls or birds), hair
| 一头牛 yì tóu niú. One head of cattle (Literally translated into English, &quot;头&quot; means head).
|-
| 位 || || wèi
| polite classifier for people (e.g. gentlemen, professors, customers)
| 几位？Jǐ wèi? How many (people)?
|-
| 些 || || xiē
| &quot;some&quot; — anything that's plural
| 一些书 yī xiē shū. Some books. ''Never'' 两些书
|-
| 張 || 张 || zhāng
| &quot;sheet&quot; &amp;mdash; squarish or rectangular flat objects (paper, tables, etc.), faces, bows, paintings, tickets, constellations
| 一张纸 yì zhāng zhǐ. One piece of paper.
|-
| 支 || || zhī
| stick-like objects (pens, chopsticks, etc.)
| 一支笔 yì zhī bǐ. One pen.
|-
| 隻 || 只 || zhī
| one of a pair (e.g. hands, limbs), animals (birds, cats, etc.)
| 一只狗 yì zhī gŏu. One dog.
|-
| 種 || 种 || zhǒng
| types or kinds of objects, ideas, etc.
| 一种书 yì zhǒng shū. One type of book.
|-
| 棟 || 栋 || dǒng
| building object
| 一栋房子 yí dòng fáng zí. One house
|}

See [[w:Chinese measure word|Chinese measure words]] on Wikipedia for a more complete reference.
----

{{Chinese (Mandarin)TOC}}

{{BookCat}}</text>
      <sha1>bpt31bfyvu3610vw556l07b1z0td05l</sha1>
    </revision>
  </page>
  <page>
    <title>Piano</title>
    <ns>0</ns>
    <id>29672</id>
    <revision>
      <id>4671216</id>
      <parentid>4466144</parentid>
      <timestamp>2026-09-19T22:51:15Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
      <minor />
      <origin>4671216</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2946" sha1="c5u0xrrtvmxex6cciptyln14ouf9vry" xml:space="preserve">[[File:DuplexScaling.jpg|300x300px|thumb]]The '''piano''' is a versatile and widely used musical instrument known for its range, expressive capability, and adaptability across various musical genres. It is a chordophonic instrument and one that belongs to the percussion and string instrument families. It produces sound by pressing keys on the keyboard that activate felt-covered hammers into striking strings inside the instrument. It typically has 88 keys (52 white keys and 36 black keys).  

==Table of Contents==
* [[/Introduction/]] {{stage short|25%|}}
** [[/Types of Pianos/]] {{stage short|75%|}}
** [[/Why Play Piano?/]] {{stage short|75%|}}
** [[History of the Piano]] {{stage short|00%|}}
** [[/The Basics/]] {{stage short|25%|}}
*  [[/Reading Music/]] {{stage short|25%|}}
** [[/Rhythm/]] {{stage short|00%|}}
*** [[/Fundamental Rhythm/]] {{stage short|00%|}}
**** [[/Audio Examples/]] {{stage short|00%|}}
*** [[/Rhythmic Notation/]] {{stage short|00%|}}
** [[/Melody/]] {{stage short|00%|}}
*** [[/Single Notes/]] {{stage short|00%|}}
*** [[/One Note per Clef/]] {{stage short|00%|}}
** [[/Harmony/]] {{stage short|00%|}}
*** [[/Four Part Harmony/]] {{stage short|00%|}}
*** [[/Figured Bass/]] {{stage short|00%|}}
** [[/Bach and Mozart/]] {{stage short|00%|}}
** [[/Leadsheets/]] {{stage short|00%|}}
** [[/Treble Clef and Bass Clef/]] {{stage short|50%|}}
** [[/Notes of the Staves/]] {{stage short|25%|}}
** [[/Ledger Lines/]] {{stage short|00%}}
** [[/Fingering/]] {{stage short|00%|}}
** [[/Value/]] {{stage short|00%|}}
** [[/Rests/]] {{stage short|50%}}
** [[/Measures/]] {{stage short|00%|}}
** [[/Time Signatures/]] {{stage short|50%|}}
** [[/Tied Notes/]] {{stage short|00%|}}
** [[/Accidentals/]] {{stage short|25%|}}
** [[/Key Signature/]] {{stage short|50%|}}
** [[/Intervals/]] {{stage short|25%|}}
** [[/Pickup Measures/]] {{stage short|00%|}}
** [[/Repetitions/]] {{stage short|00%|}}
* [[/Playing by Ear/]] {{stage short|75%|}}
** [[/Practicing Playing by Ear/]] {{stage short|25%|}}
*** [[/Playing by Ear: Lesson 01/]] {{stage short|75%|}}
*** [[/Playing by Ear: Lesson 02/]] {{stage short|75%|}}
* Other pages (Please either incorporate these into the text or mark them for deletion by typing &lt;nowiki&gt;{{delete|Reason for deletion}}&lt;/nowiki&gt; on each page. Thanks.)
** [[/Chords (and pop examples)/]] {{stage short|50%|}}
** [[/Climatization]]
** [[/Scales/]] 
** [[/Piano Practice/]]
** [[/Pedals/]] {{stage short|100%}}
** [[/How Piano Works/]]
** [[/Alternative Notation: Klavar/]] 

{{Stages}}

{{Shelves|Musical instruments}}
{{Alphabetical|P}}
{{status|25%}}

== Extra Resources ==
* [[/Chords (and pop examples)/]] {{stage short|50%|}}
* [[/Climatization|Climatization]]
* [[/Scales/]] 
* [[/Piano Practice/]]
* [[/Bach and Mozart/]] {{stage short|00%|}}
* [[/Pedals/]] {{stage short|100%}}
* [[/How Piano Works/]]
* [[/Alternative Notation: Klavar/]] 

== Contributing Authors ==
[[th:เปียโน]]</text>
      <sha1>c5u0xrrtvmxex6cciptyln14ouf9vry</sha1>
    </revision>
    <revision>
      <id>4671217</id>
      <parentid>4671216</parentid>
      <timestamp>2026-09-19T22:53:05Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
      <minor />
      <origin>4671217</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2978" sha1="dvbnrjor0sj5vwte4q2p4kezgxkv4oi" xml:space="preserve">[[File:DuplexScaling.jpg|300x300px|thumb]]The '''piano''' is a versatile and widely used musical instrument known for its range, expressive capability, and adaptability across various musical genres. It is a chordophonic instrument and one that belongs to the percussion and string instrument families. It produces sound by pressing keys on the keyboard that activate felt-covered hammers into striking strings inside the instrument. It typically has 88 keys (52 white keys and 36 black keys).  

==Table of Contents==
=== Chapter I: Introduction to Pianos ===
* [[/Introduction/]] {{stage short|25%|}}
** [[/Types of Pianos/]] {{stage short|75%|}}
** [[/Why Play Piano?/]] {{stage short|75%|}}
** [[/History of the Piano/]] {{stage short|00%|}}
** [[/The Basics/]] {{stage short|25%|}}
*  [[/Reading Music/]] {{stage short|25%|}}
** [[/Rhythm/]] {{stage short|00%|}}
*** [[/Fundamental Rhythm/]] {{stage short|00%|}}
**** [[/Audio Examples/]] {{stage short|00%|}}
*** [[/Rhythmic Notation/]] {{stage short|00%|}}
** [[/Melody/]] {{stage short|00%|}}
*** [[/Single Notes/]] {{stage short|00%|}}
*** [[/One Note per Clef/]] {{stage short|00%|}}
** [[/Harmony/]] {{stage short|00%|}}
*** [[/Four Part Harmony/]] {{stage short|00%|}}
*** [[/Figured Bass/]] {{stage short|00%|}}
** [[/Bach and Mozart/]] {{stage short|00%|}}
** [[/Leadsheets/]] {{stage short|00%|}}
** [[/Treble Clef and Bass Clef/]] {{stage short|50%|}}
** [[/Notes of the Staves/]] {{stage short|25%|}}
** [[/Ledger Lines/]] {{stage short|00%}}
** [[/Fingering/]] {{stage short|00%|}}
** [[/Value/]] {{stage short|00%|}}
** [[/Rests/]] {{stage short|50%}}
** [[/Measures/]] {{stage short|00%|}}
** [[/Time Signatures/]] {{stage short|50%|}}
** [[/Tied Notes/]] {{stage short|00%|}}
** [[/Accidentals/]] {{stage short|25%|}}
** [[/Key Signature/]] {{stage short|50%|}}
** [[/Intervals/]] {{stage short|25%|}}
** [[/Pickup Measures/]] {{stage short|00%|}}
** [[/Repetitions/]] {{stage short|00%|}}
* [[/Playing by Ear/]] {{stage short|75%|}}
** [[/Practicing Playing by Ear/]] {{stage short|25%|}}
*** [[/Playing by Ear: Lesson 01/]] {{stage short|75%|}}
*** [[/Playing by Ear: Lesson 02/]] {{stage short|75%|}}
* Other pages (Please either incorporate these into the text or mark them for deletion by typing &lt;nowiki&gt;{{delete|Reason for deletion}}&lt;/nowiki&gt; on each page. Thanks.)
** [[/Chords (and pop examples)/]] {{stage short|50%|}}
** [[/Climatization]]
** [[/Scales/]] 
** [[/Piano Practice/]]
** [[/Pedals/]] {{stage short|100%}}
** [[/How Piano Works/]]
** [[/Alternative Notation: Klavar/]] 

{{Shelves|Musical instruments}}
{{Alphabetical|P}}
{{status|25%}}

== Extra Resources ==
* [[/Chords (and pop examples)/]] {{stage short|50%|}}
* [[/Climatization|Climatization]]
* [[/Scales/]] 
* [[/Piano Practice/]]
* [[/Bach and Mozart/]] {{stage short|00%|}}
* [[/Pedals/]] {{stage short|100%}}
* [[/How Piano Works/]]
* [[/Alternative Notation: Klavar/]] 

== Contributing Authors ==
[[th:เปียโน]]</text>
      <sha1>dvbnrjor0sj5vwte4q2p4kezgxkv4oi</sha1>
    </revision>
    <revision>
      <id>4671218</id>
      <parentid>4671217</parentid>
      <timestamp>2026-09-19T22:54:18Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
      <minor />
      <origin>4671218</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2968" sha1="5owfx3p8s4uhf99qudr4mql0cq81scc" xml:space="preserve">[[File:DuplexScaling.jpg|300x300px|thumb]]The '''piano''' is a versatile and widely used musical instrument known for its range, expressive capability, and adaptability across various musical genres. It is a chordophonic instrument and one that belongs to the percussion and string instrument families. It produces sound by pressing keys on the keyboard that activate felt-covered hammers into striking strings inside the instrument. It typically has 88 keys (52 white keys and 36 black keys).  

==Table of Contents==
=== Chapter I: Introduction to Pianos ===
* [[/Introduction/]] {{stage short|25%|}}
** [[/Types of Pianos/]] {{stage short|75%|}}
** [[/Why Play Piano?/]] {{stage short|75%|}}
** [[/History of the Piano/]] {{stage short|00%|}}
** [[/The Basics/]] {{stage short|25%|}}

=== Chapter II: Reading Music ===
*  [[/Reading Music/]] {{stage short|25%|}}
** [[/Rhythm/]] {{stage short|00%|}}
*** [[/Fundamental Rhythm/]] {{stage short|00%|}}
**** [[/Audio Examples/]] {{stage short|00%|}}
*** [[/Rhythmic Notation/]] {{stage short|00%|}}
** [[/Melody/]] {{stage short|00%|}}
*** [[/Single Notes/]] {{stage short|00%|}}
*** [[/One Note per Clef/]] {{stage short|00%|}}
** [[/Harmony/]] {{stage short|00%|}}
*** [[/Four Part Harmony/]] {{stage short|00%|}}
*** [[/Figured Bass/]] {{stage short|00%|}}
** [[/Leadsheets/]] {{stage short|00%|}}
** [[/Treble Clef and Bass Clef/]] {{stage short|50%|}}
** [[/Notes of the Staves/]] {{stage short|25%|}}
** [[/Ledger Lines/]] {{stage short|00%}}
** [[/Fingering/]] {{stage short|00%|}}
** [[/Value/]] {{stage short|00%|}}
** [[/Rests/]] {{stage short|50%}}
** [[/Measures/]] {{stage short|00%|}}
** [[/Time Signatures/]] {{stage short|50%|}}
** [[/Tied Notes/]] {{stage short|00%|}}
** [[/Accidentals/]] {{stage short|25%|}}
** [[/Key Signature/]] {{stage short|50%|}}
** [[/Intervals/]] {{stage short|25%|}}
** [[/Pickup Measures/]] {{stage short|00%|}}
** [[/Repetitions/]] {{stage short|00%|}}

* [[/Playing by Ear/]] {{stage short|75%|}}
** [[/Practicing Playing by Ear/]] {{stage short|25%|}}
*** [[/Playing by Ear: Lesson 01/]] {{stage short|75%|}}
*** [[/Playing by Ear: Lesson 02/]] {{stage short|75%|}}
* Other pages (Please either incorporate these into the text or mark them for deletion by typing &lt;nowiki&gt;{{delete|Reason for deletion}}&lt;/nowiki&gt; on each page. Thanks.)
** [[/Chords (and pop examples)/]] {{stage short|50%|}}
** [[/Climatization]]
** [[/Scales/]] 
** [[/Piano Practice/]]
** [[/Pedals/]] {{stage short|100%}}
** [[/How Piano Works/]]
** [[/Alternative Notation: Klavar/]] 

{{Shelves|Musical instruments}}
{{Alphabetical|P}}
{{status|25%}}

== Extra Resources ==
* [[/Chords (and pop examples)/]] {{stage short|50%|}}
* [[/Climatization|Climatization]]
* [[/Scales/]] 
* [[/Piano Practice/]]
* [[/Bach and Mozart/]] {{stage short|00%|}}
* [[/Pedals/]] {{stage short|100%}}
* [[/How Piano Works/]]
* [[/Alternative Notation: Klavar/]] 

== Contributing Authors ==
[[th:เปียโน]]</text>
      <sha1>5owfx3p8s4uhf99qudr4mql0cq81scc</sha1>
    </revision>
    <revision>
      <id>4671219</id>
      <parentid>4671218</parentid>
      <timestamp>2026-09-19T22:57:33Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
      <minor />
      <origin>4671219</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2904" sha1="ptl83ou9pb9ythjaou16sonkew2x75p" xml:space="preserve">[[File:DuplexScaling.jpg|300x300px|thumb]]The '''piano''' is a versatile and widely used musical instrument known for its range, expressive capability, and adaptability across various musical genres. It is a chordophonic instrument and one that belongs to the percussion and string instrument families. It produces sound by pressing keys on the keyboard that activate felt-covered hammers into striking strings inside the instrument. It typically has 88 keys (52 white keys and 36 black keys).  

==Table of Contents==
=== Chapter I: Introduction to Pianos ===
* [[/Introduction/]] {{stage short|25%|}}
** [[/Types of Pianos/]] {{stage short|75%|}}
** [[/Why Play Piano?/]] {{stage short|75%|}}
** [[/History of the Piano/]] {{stage short|00%|}}
** [[/The Basics/]] {{stage short|25%|}}

=== Chapter II: Reading Music ===
*  [[/Reading Music/]] {{stage short|25%|}}
** [[/Rhythm/]] {{stage short|00%|}}
*** [[/Fundamental Rhythm/]] {{stage short|00%|}}
**** [[/Audio Examples/]] {{stage short|00%|}}
*** [[/Rhythmic Notation/]] {{stage short|00%|}}
** [[/Melody/]] {{stage short|00%|}}
*** [[/Single Notes/]] {{stage short|00%|}}
*** [[/One Note per Clef/]] {{stage short|00%|}}
** [[/Harmony/]] {{stage short|00%|}}
*** [[/Four Part Harmony/]] {{stage short|00%|}}
*** [[/Figured Bass/]] {{stage short|00%|}}
** [[/Leadsheets/]] {{stage short|00%|}}
** [[/Treble Clef and Bass Clef/]] {{stage short|50%|}}
** [[/Notes of the Staves/]] {{stage short|25%|}}
** [[/Ledger Lines/]] {{stage short|00%}}
** [[/Fingering/]] {{stage short|00%|}}
** [[/Value/]] {{stage short|00%|}}
** [[/Rests/]] {{stage short|50%}}
** [[/Measures/]] {{stage short|00%|}}
** [[/Time Signatures/]] {{stage short|50%|}}
** [[/Tied Notes/]] {{stage short|00%|}}
** [[/Accidentals/]] {{stage short|25%|}}
** [[/Key Signature/]] {{stage short|50%|}}
** [[/Intervals/]] {{stage short|25%|}}
** [[/Pickup Measures/]] {{stage short|00%|}}
** [[/Repetitions/]] {{stage short|00%|}}

* [[/Playing by Ear/]] {{stage short|75%|}}
** [[/Practicing Playing by Ear/]] {{stage short|25%|}}
*** [[/Playing by Ear: Lesson 01/]] {{stage short|75%|}}
*** [[/Playing by Ear: Lesson 02/]] {{stage short|75%|}}
* Other pages (Please either incorporate these into the text or mark them for deletion by typing &lt;nowiki&gt;{{delete|Reason for deletion}}&lt;/nowiki&gt; on each page. Thanks.)
** [[/Chords (and pop examples)/]] {{stage short|50%|}}
** [[/Climatization]]
** [[/Scales/]] 
** [[/Piano Practice/]]
** [[/Pedals/]] {{stage short|100%}}

{{Shelves|Musical instruments}}
{{Alphabetical|P}}
{{status|25%}}

== Extra Resources ==
* [[/Chords (and pop examples)/]] {{stage short|50%|}}
* [[/Climatization|Climatization]]
* [[/Scales/]] 
* [[/Piano Practice/]]
* [[/Bach and Mozart/]] {{stage short|00%|}}
* [[/Pedals/]] {{stage short|100%}}
* [[/How Piano Works/]]
* [[/Alternative Notation: Klavar/]] 

== Contributing Authors ==
[[th:เปียโน]]</text>
      <sha1>ptl83ou9pb9ythjaou16sonkew2x75p</sha1>
    </revision>
    <revision>
      <id>4671220</id>
      <parentid>4671219</parentid>
      <timestamp>2026-09-19T22:57:42Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
      <origin>4671220</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2826" sha1="qj8cfrpsfu3x1atd6ol5pcnejjqp01t" xml:space="preserve">[[File:DuplexScaling.jpg|300x300px|thumb]]The '''piano''' is a versatile and widely used musical instrument known for its range, expressive capability, and adaptability across various musical genres. It is a chordophonic instrument and one that belongs to the percussion and string instrument families. It produces sound by pressing keys on the keyboard that activate felt-covered hammers into striking strings inside the instrument. It typically has 88 keys (52 white keys and 36 black keys).  

==Table of Contents==
=== Chapter I: Introduction to Pianos ===
* [[/Introduction/]] {{stage short|25%|}}
** [[/Types of Pianos/]] {{stage short|75%|}}
** [[/Why Play Piano?/]] {{stage short|75%|}}
** [[/History of the Piano/]] {{stage short|00%|}}
** [[/The Basics/]] {{stage short|25%|}}

=== Chapter II: Reading Music ===
*  [[/Reading Music/]] {{stage short|25%|}}
** [[/Rhythm/]] {{stage short|00%|}}
*** [[/Fundamental Rhythm/]] {{stage short|00%|}}
**** [[/Audio Examples/]] {{stage short|00%|}}
*** [[/Rhythmic Notation/]] {{stage short|00%|}}
** [[/Melody/]] {{stage short|00%|}}
*** [[/Single Notes/]] {{stage short|00%|}}
*** [[/One Note per Clef/]] {{stage short|00%|}}
** [[/Harmony/]] {{stage short|00%|}}
*** [[/Four Part Harmony/]] {{stage short|00%|}}
*** [[/Figured Bass/]] {{stage short|00%|}}
** [[/Leadsheets/]] {{stage short|00%|}}
** [[/Treble Clef and Bass Clef/]] {{stage short|50%|}}
** [[/Notes of the Staves/]] {{stage short|25%|}}
** [[/Ledger Lines/]] {{stage short|00%}}
** [[/Fingering/]] {{stage short|00%|}}
** [[/Value/]] {{stage short|00%|}}
** [[/Rests/]] {{stage short|50%}}
** [[/Measures/]] {{stage short|00%|}}
** [[/Time Signatures/]] {{stage short|50%|}}
** [[/Tied Notes/]] {{stage short|00%|}}
** [[/Accidentals/]] {{stage short|25%|}}
** [[/Key Signature/]] {{stage short|50%|}}
** [[/Intervals/]] {{stage short|25%|}}
** [[/Pickup Measures/]] {{stage short|00%|}}
** [[/Repetitions/]] {{stage short|00%|}}

* [[/Playing by Ear/]] {{stage short|75%|}}
** [[/Practicing Playing by Ear/]] {{stage short|25%|}}
*** [[/Playing by Ear: Lesson 01/]] {{stage short|75%|}}
*** [[/Playing by Ear: Lesson 02/]] {{stage short|75%|}}
* Other pages (Please either incorporate these into the text or mark them for deletion by typing &lt;nowiki&gt;{{delete|Reason for deletion}}&lt;/nowiki&gt; on each page. Thanks.)
** [[/Chords (and pop examples)/]] {{stage short|50%|}}
** [[/Climatization]]

{{Shelves|Musical instruments}}
{{Alphabetical|P}}
{{status|25%}}

== Extra Resources ==
* [[/Chords (and pop examples)/]] {{stage short|50%|}}
* [[/Climatization|Climatization]]
* [[/Scales/]] 
* [[/Piano Practice/]]
* [[/Bach and Mozart/]] {{stage short|00%|}}
* [[/Pedals/]] {{stage short|100%}}
* [[/How Piano Works/]]
* [[/Alternative Notation: Klavar/]] 

== Contributing Authors ==
[[th:เปียโน]]</text>
      <sha1>qj8cfrpsfu3x1atd6ol5pcnejjqp01t</sha1>
    </revision>
    <revision>
      <id>4671221</id>
      <parentid>4671220</parentid>
      <timestamp>2026-09-19T22:57:56Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
      <origin>4671221</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2748" sha1="slbdctct34joleapjlfd51o3k5kdrq4" xml:space="preserve">[[File:DuplexScaling.jpg|300x300px|thumb]]The '''piano''' is a versatile and widely used musical instrument known for its range, expressive capability, and adaptability across various musical genres. It is a chordophonic instrument and one that belongs to the percussion and string instrument families. It produces sound by pressing keys on the keyboard that activate felt-covered hammers into striking strings inside the instrument. It typically has 88 keys (52 white keys and 36 black keys).  

==Table of Contents==
=== Chapter I: Introduction to Pianos ===
* [[/Introduction/]] {{stage short|25%|}}
** [[/Types of Pianos/]] {{stage short|75%|}}
** [[/Why Play Piano?/]] {{stage short|75%|}}
** [[/History of the Piano/]] {{stage short|00%|}}
** [[/The Basics/]] {{stage short|25%|}}

=== Chapter II: Reading Music ===
*  [[/Reading Music/]] {{stage short|25%|}}
** [[/Rhythm/]] {{stage short|00%|}}
*** [[/Fundamental Rhythm/]] {{stage short|00%|}}
**** [[/Audio Examples/]] {{stage short|00%|}}
*** [[/Rhythmic Notation/]] {{stage short|00%|}}
** [[/Melody/]] {{stage short|00%|}}
*** [[/Single Notes/]] {{stage short|00%|}}
*** [[/One Note per Clef/]] {{stage short|00%|}}
** [[/Harmony/]] {{stage short|00%|}}
*** [[/Four Part Harmony/]] {{stage short|00%|}}
*** [[/Figured Bass/]] {{stage short|00%|}}
** [[/Leadsheets/]] {{stage short|00%|}}
** [[/Treble Clef and Bass Clef/]] {{stage short|50%|}}
** [[/Notes of the Staves/]] {{stage short|25%|}}
** [[/Ledger Lines/]] {{stage short|00%}}
** [[/Fingering/]] {{stage short|00%|}}
** [[/Value/]] {{stage short|00%|}}
** [[/Rests/]] {{stage short|50%}}
** [[/Measures/]] {{stage short|00%|}}
** [[/Time Signatures/]] {{stage short|50%|}}
** [[/Tied Notes/]] {{stage short|00%|}}
** [[/Accidentals/]] {{stage short|25%|}}
** [[/Key Signature/]] {{stage short|50%|}}
** [[/Intervals/]] {{stage short|25%|}}
** [[/Pickup Measures/]] {{stage short|00%|}}
** [[/Repetitions/]] {{stage short|00%|}}

* [[/Playing by Ear/]] {{stage short|75%|}}
** [[/Practicing Playing by Ear/]] {{stage short|25%|}}
*** [[/Playing by Ear: Lesson 01/]] {{stage short|75%|}}
*** [[/Playing by Ear: Lesson 02/]] {{stage short|75%|}}
* Other pages (Please either incorporate these into the text or mark them for deletion by typing &lt;nowiki&gt;{{delete|Reason for deletion}}&lt;/nowiki&gt; on each page. Thanks.)

{{Shelves|Musical instruments}}
{{Alphabetical|P}}
{{status|25%}}

== Extra Resources ==
* [[/Chords (and pop examples)/]] {{stage short|50%|}}
* [[/Climatization|Climatization]]
* [[/Scales/]] 
* [[/Piano Practice/]]
* [[/Bach and Mozart/]] {{stage short|00%|}}
* [[/Pedals/]] {{stage short|100%}}
* [[/How Piano Works/]]
* [[/Alternative Notation: Klavar/]] 

== Contributing Authors ==
[[th:เปียโน]]</text>
      <sha1>slbdctct34joleapjlfd51o3k5kdrq4</sha1>
    </revision>
    <revision>
      <id>4671222</id>
      <parentid>4671221</parentid>
      <timestamp>2026-09-19T22:58:31Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
      <origin>4671222</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2716" sha1="9sb6gdp161rjmt3941q48690aqlcdaa" xml:space="preserve">[[File:DuplexScaling.jpg|300x300px|thumb]]The '''piano''' is a versatile and widely used musical instrument known for its range, expressive capability, and adaptability across various musical genres. It is a chordophonic instrument and one that belongs to the percussion and string instrument families. It produces sound by pressing keys on the keyboard that activate felt-covered hammers into striking strings inside the instrument. It typically has 88 keys (52 white keys and 36 black keys).  

==Table of Contents==
=== Chapter I: Introduction to Pianos ===
* [[/Introduction/]] {{stage short|25%|}}
** [[/Types of Pianos/]] {{stage short|75%|}}
** [[/Why Play Piano?/]] {{stage short|75%|}}
** [[/History of the Piano/]] {{stage short|00%|}}
** [[/The Basics/]] {{stage short|25%|}}

=== Chapter II: Reading Music ===
*  [[/Reading Music/]] {{stage short|25%|}}
** [[/Rhythm/]] {{stage short|00%|}}
*** [[/Fundamental Rhythm/]] {{stage short|00%|}}
**** [[/Audio Examples/]] {{stage short|00%|}}
*** [[/Rhythmic Notation/]] {{stage short|00%|}}
** [[/Melody/]] {{stage short|00%|}}
*** [[/Single Notes/]] {{stage short|00%|}}
*** [[/One Note per Clef/]] {{stage short|00%|}}
** [[/Harmony/]] {{stage short|00%|}}
*** [[/Four Part Harmony/]] {{stage short|00%|}}
*** [[/Figured Bass/]] {{stage short|00%|}}
** [[/Leadsheets/]] {{stage short|00%|}}
** [[/Treble Clef and Bass Clef/]] {{stage short|50%|}}
** [[/Notes of the Staves/]] {{stage short|25%|}}
** [[/Ledger Lines/]] {{stage short|00%}}
** [[/Fingering/]] {{stage short|00%|}}
** [[/Value/]] {{stage short|00%|}}
** [[/Rests/]] {{stage short|50%}}
** [[/Measures/]] {{stage short|00%|}}
** [[/Time Signatures/]] {{stage short|50%|}}
** [[/Tied Notes/]] {{stage short|00%|}}
** [[/Accidentals/]] {{stage short|25%|}}
** [[/Key Signature/]] {{stage short|50%|}}
** [[/Intervals/]] {{stage short|25%|}}
** [[/Pickup Measures/]] {{stage short|00%|}}
** [[/Repetitions/]] {{stage short|00%|}}

* [[/Playing by Ear/]] {{stage short|75%|}}
** [[/Practicing Playing by Ear/]] {{stage short|25%|}}
*** [[/Playing by Ear: Lesson 01/]] {{stage short|75%|}}
*** [[/Playing by Ear: Lesson 02/]] {{stage short|75%|}}
* Other pages (Please either incorporate these into the text or mark them for deletion by typing &lt;nowiki&gt;{{delete|Reason for deletion}}

{{Shelves|Musical instruments}}
{{Alphabetical|P}}
{{status|25%}}

== Extra Resources ==
* [[/Chords (and pop examples)/]] {{stage short|50%|}}
* [[/Climatization|Climatization]]
* [[/Scales/]] 
* [[/Piano Practice/]]
* [[/Bach and Mozart/]] {{stage short|00%|}}
* [[/Pedals/]] {{stage short|100%}}
* [[/How Piano Works/]]
* [[/Alternative Notation: Klavar/]] 

== Contributing Authors ==
[[th:เปียโน]]</text>
      <sha1>9sb6gdp161rjmt3941q48690aqlcdaa</sha1>
    </revision>
    <revision>
      <id>4671224</id>
      <parentid>4671222</parentid>
      <timestamp>2026-09-19T23:07:30Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
      <origin>4671224</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2725" sha1="h6dir49zx5mzo8gsfokcwewq52odogd" xml:space="preserve">[[File:DuplexScaling.jpg|300x300px|thumb]]The '''piano''' is a versatile and widely used musical instrument known for its range, expressive capability, and adaptability across various musical genres. It is a chordophonic instrument and one that belongs to the percussion and string instrument families. It produces sound by pressing keys on the keyboard that activate felt-covered hammers into striking strings inside the instrument. It typically has 88 keys (52 white keys and 36 black keys).  

==Table of Contents==
=== Chapter I: Introduction to Pianos ===
* [[/Introduction/]] {{stage short|25%|}}
** [[/Types of Pianos/]] {{stage short|75%|}}
** [[/Why Play Piano?/]] {{stage short|75%|}}
** [[/History of the Piano/]] {{stage short|00%|}}
** [[/The Basics/]] {{stage short|25%|}}

=== Chapter II: Reading Music ===
*  [[/Reading Music/]] {{stage short|25%|}}
** [[/Rhythm/]] {{stage short|00%|}}
*** [[/Fundamental Rhythm/]] {{stage short|00%|}}
**** [[/Audio Examples/]] {{stage short|00%|}}
*** [[/Rhythmic Notation/]] {{stage short|00%|}}
** [[/Melody/]] {{stage short|00%|}}
*** [[/Single Notes/]] {{stage short|00%|}}
*** [[/One Note per Clef/]] {{stage short|00%|}}
** [[/Harmony/]] {{stage short|00%|}}
*** [[/Four Part Harmony/]] {{stage short|00%|}}
*** [[/Figured Bass/]] {{stage short|00%|}}
** [[/Leadsheets/]] {{stage short|00%|}}
** [[/Treble Clef and Bass Clef/]] {{stage short|50%|}}
** [[/Notes of the Staves/]] {{stage short|25%|}}
** [[/Ledger Lines/]] {{stage short|00%}}
** [[/Fingering/]] {{stage short|00%|}}
** [[/Value/]] {{stage short|00%|}}
** [[/Rests/]] {{stage short|50%}}
** [[/Measures/]] {{stage short|00%|}}
** [[/Time Signatures/]] {{stage short|50%|}}
** [[/Tied Notes/]] {{stage short|00%|}}
** [[/Accidentals/]] {{stage short|25%|}}
** [[/Key Signature/]] {{stage short|50%|}}
** [[/Intervals/]] {{stage short|25%|}}
** [[/Pickup Measures/]] {{stage short|00%|}}
** [[/Repetitions/]] {{stage short|00%|}}

* [[/Playing by Ear/]] {{stage short|75%|}}
** [[/Practicing Playing by Ear/]] {{stage short|25%|}}
*** [[/Playing by Ear: Lesson 01/]] {{stage short|75%|}}
*** [[/Playing by Ear: Lesson 02/]] {{stage short|75%|}}
* Other pages (Please either incorporate these into the text or mark them for deletion by typing &lt;nowiki&gt;{{delete|Reason for deletion}}&lt;/nowiki&gt;

{{Shelves|Musical instruments}}
{{Alphabetical|P}}
{{status|25%}}

== Extra Resources ==
* [[/Chords (and pop examples)/]] {{stage short|50%|}}
* [[/Climatization|Climatization]]
* [[/Scales/]] 
* [[/Piano Practice/]]
* [[/Bach and Mozart/]] {{stage short|00%|}}
* [[/Pedals/]] {{stage short|100%}}
* [[/How Piano Works/]]
* [[/Alternative Notation: Klavar/]] 

== Contributing Authors ==
[[th:เปียโน]]</text>
      <sha1>h6dir49zx5mzo8gsfokcwewq52odogd</sha1>
    </revision>
  </page>
  <page>
    <title>German/Level I/Filme</title>
    <ns>0</ns>
    <id>74292</id>
    <revision>
      <id>4671183</id>
      <parentid>2074179</parentid>
      <timestamp>2026-09-19T17:01:03Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
      <minor />
      <origin>4671183</origin>
      <model>wikitext</model>
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      <text bytes="516" sha1="lxiujhdw2dy2l58yutwku0rzxoim8fr" xml:space="preserve">&lt;noinclude&gt;{{Yellow Warning|This page is in severe development. It is and will not be a good read or make much sense until that development is done!}}
&lt;/noinclude&gt;
{|align=&quot;right&quot;
 | __TOC__
|}

=Lesson I.14: Filme=
In this lesson, you will learn about movies, types of movies, &quot;Was für...?&quot;, using mögen to express preference.
==Im Kino==
{| class=&quot;wikitable&quot; {{German/Table|Vocabulary|Movies|Filme|0|2}}
! English||German
|-
|movie||der Film
|-
|
|}

&lt;noinclude&gt;{{German/Level I/Footer}}&lt;/noinclude&gt;

{{BookCat}}</text>
      <sha1>lxiujhdw2dy2l58yutwku0rzxoim8fr</sha1>
    </revision>
  </page>
  <page>
    <title>Ancient Greek/Basic Nouns</title>
    <ns>0</ns>
    <id>102458</id>
    <revision>
      <id>4671264</id>
      <parentid>3693725</parentid>
      <timestamp>2026-09-20T03:54:15Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
      <origin>4671264</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="7156" sha1="8ygznzx189c0rr6nykmot6njsfa6350" xml:space="preserve">==Gender==
Ancient Greek, like many other languages, has nouns of different ''genders''. An Ancient Greek noun is either masculine, feminine, or neuter. The names of men and male gods are always masculine, whereas those of women and goddesses are always feminine. A group consisting of only men, or both men and women, is grammatically masculine, and a group consisting of only women is grammatically feminine.

Furthermore, the grammatical gender in Greek is not always linked with actual gender. Inanimate objects are not necessarily neuter: they can be either masculine, feminine, or neuter. One can sometimes, but not always, infer the gender of a noun from its ending. It is important to know the gender of a noun because any adjectives used to describe that noun will have to match the noun in gender.

==Number==
In English, most nouns can be either singular or plural. The same is true in Ancient Greek. Ancient Greek also retained the ''dual number'' from {{w|Proto-Indo-European}}, which, in its earliest attestations, was used instead of the plural when there were exactly two of something. It is not necessary to learn the dual number right now, as it gradually faded from the language, and in the Classical era it was already rare.
:: '''τὼ''' δ’ αὖτ’ ἐν προθύροισι δόμων '''αὐτώ''' τε καὶ '''ἵππω''', — And '''the two''', the '''pair''' themselves and their '''horses''', at the doors of the house (Homer, ''Odyssey'' 4.20).

==Case==
In English, word order and prepositions are used to indicate the roles that nouns play in sentences. For example, the sentences &quot;Alice sees Bob&quot; and &quot;Bob sees Alice&quot; use exactly the same words, but in different orders; in the former, it is understood that Alice is the subject and Bob is the object, and in the latter, ''vice versa''. In Ancient Greek, on the other hand, there is considerable (although not total) freedom in the ordering of words in a sentence. How did the Greeks know which noun was the subject and which was the object? They changed the ''endings'' of the nouns, rather than their ''order''. This is known as ''declension''. (They also changed the ending of the word in the plural, just as we often do in English by adding &quot;s&quot;.) Only some pronouns in English still retain the vestiges of declension; &quot;I&quot;/&quot;me&quot; is one good example, as is &quot;who&quot;/&quot;whom&quot;.

Declension in Ancient Greek is complex because not all nouns use the same set of endings. Nouns are classified into three broad categories, known as the ''first declension'', ''second declension'', and ''third declension''. Even nouns belonging to the same category do not necessarily use the same set of endings, although there are conspicuous similarities.

There are 5 ''cases'' in Greek. The case of a noun tells you something about its role in the sentence:

* The ''nominative case'' is used when a noun is the subject of a sentence (''e.g.'', '''''I''' am running''). It is also used when it is the predicate of a copula whose subject is in the nominative (''e.g.'', ''Who is it? It is '''I''''').
* The ''genitive case'' denotes possession or limitation. Whereas in English we often use &quot;'s&quot; or the word &quot;of&quot; to denote possession (''e.g.'', ''Alice''''s''' car'', or ''the end '''of''' the day''), in Greek the noun is simply put into the genitive case.
* The ''dative case'' is the case into which indirect objects fall; whereas in English we usually use the word &quot;to&quot; (''e.g.'', ''My friend gave a book '''to''' me''), in Greek the noun is simply put into the dative case. The dative case has many other uses, to be explained later.
* The ''accusative case'' is usually used for the direct object of a verb.
* The ''vocative case'' is used when directly addressing a person, god, ''etc''.

The accusative, genitive, and dative cases, but not the nominative and vocative, are also used for nouns that are objects of prepositions. Prepositions indicating motion towards, into, or against something are generally used with an accusative noun; prepositions governing motion away, out of, or under, the genitive; fixed position and proximity, the dative.

With nouns expressing time or dimension, the accusative case indicates a length of time or space (as in ''Odysseus sailed for ten years''); the genitive indicates time within which (as in ''We'll arrive within the next hour''), and the dative indicates when something happened (as in ''There will be a test tomorrow'').

'''Important''': When a noun is indicated in the dictionary or in the vocabulary of a textbook such as this, usually both its nominative singular and genitive singular forms are given. This is because the nominative form often does not give enough information to decline the noun, whereas the nominative and genitive together often do. Of course, if the noun has no singular form, then the nominative and genitive plural will be given.

== The Definite Article ==
The English definite article is 'the,' and it's the '''only''' one we have. However, the Greek definite article changes according to gender (this is the same difference between 'la' and 'le' in French and 'el' and 'la' in Spanish), number (this is the 'los' and 'las' of Spanish or the 'les' of French), and case, though it's not influenced by noun declensions. The definite article derives from an old ''demonstrative'' system and functions primarily as a marker of ''definiteness'' and ''anaphoric reference'' (e.g., '''ὁ''' δὲ ἀποκριθεὶς ἑνὶ αὐτῶν εἶπεν...).

The definite article may also not be used in the same grammatical way that it is in modern languages: Since ancient Greek doesn’t always follow the same word order as modern languages, the article may be used multiple times around the same word; placed after the word it’s connected to to emphasize it; or before or after it, along with another word, to achieve the same effect.

Note that it '''typically precedes the noun''', which may be [[Ancient Greek/Glossary of Grammatical Terms#Noun|abstract]]; marks the beginning of the noun phrase; and is repeated with each ''coordinated noun'' when each noun is ''independently definite''. It may even substantivize adjectives into nouns (e.g., ὁ κακός — the evil one).
:: ἕως ἂν παρέλθῃ '''ὁ''' οὐρανὸς καὶ '''ἡ''' γῆ, ἰῶτα ἓν ἢ μία κεραία οὐ μὴ παρέλθῃ ἀπὸ '''τοῦ''' νόμου — until heaven and earth disappear, not the smallest letter, not the least stroke of a pen, will by any means disappear from the Law (Matthew 5.18).

{| class=&quot;wikitable&quot; style=&quot;text-align:center&quot;
! rowspan=2 | Case
! colspan=3 | Singular
! rowspan=2 | Dual
! colspan=3 | Plural 
|-
! Masculine
! Neuter
! Feminine
! Masculine
! Neuter
! Feminine
|-
! Nominative 
| ὁ
| rowspan=2 | τό
| ἡ
| rowspan=2 | τώ
| οἱ
| rowspan=2 | τά
| αἱ
|-
! Accusative 
| τόν
| τήν
| τούς
| τάς
|-
! Genitive
| colspan=2|τοῦ
| τῆς
| rowspan=2|τοῖν
| colspan=3|τῶν
|-
! Dative 
| colspan=2|τῷ
| τῇ
| colspan=2|τοῖς
| ταῖς
|-
! colspan=8|
|-
! Vocative
| colspan=7|ὦ
|}

{{BookCat}}</text>
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    </revision>
    <revision>
      <id>4671269</id>
      <parentid>4671264</parentid>
      <timestamp>2026-09-20T04:24:56Z</timestamp>
      <contributor>
        <username>It-is-Truly-Meet</username>
        <id>3624460</id>
      </contributor>
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      <text bytes="7009" sha1="l74j72icozvtnip5ehuqipbp8wy7ky4" xml:space="preserve">==Gender==
Ancient Greek, like many other languages, has nouns of different ''genders''. An Ancient Greek noun is either masculine, feminine, or neuter. The names of men and male gods are always masculine, whereas those of women and goddesses are always feminine. A group consisting of only men, or both men and women, is grammatically masculine, and a group consisting of only women is grammatically feminine.

Furthermore, the grammatical gender in Greek is not always linked with actual gender. Inanimate objects are not necessarily neuter: they can be either masculine, feminine, or neuter. One can sometimes, but not always, infer the gender of a noun from its ending. It is important to know the gender of a noun because any adjectives used to describe that noun will have to match the noun in gender.

==Number==
In English, most nouns can be either singular or plural. The same is true in Ancient Greek. Ancient Greek also retained the ''dual number'' from {{w|Proto-Indo-European}}, which, in its earliest attestations, was used instead of the plural when there were exactly two of something. It is not necessary to learn the dual number right now, as it gradually faded from the language, and in the Classical era it was already rare.
:: '''τὼ''' δ’ αὖτ’ ἐν προθύροισι δόμων '''αὐτώ''' τε καὶ '''ἵππω''', — And '''the two''', the '''pair''' themselves and their '''horses''', at the doors of the house (Homer, ''Odyssey'' 4.20).

==Case==
In English, word order and prepositions are used to indicate the roles that nouns play in sentences. For example, the sentences &quot;Alice sees Bob&quot; and &quot;Bob sees Alice&quot; use exactly the same words, but in different orders; in the former, it is understood that Alice is the subject and Bob is the object, and in the latter, ''vice versa''. In Ancient Greek, on the other hand, there is considerable (although not total) freedom in the ordering of words in a sentence. How did the Greeks know which noun was the subject and which was the object? They changed the ''endings'' of the nouns, rather than their ''order''. This is known as ''declension''. (They also changed the ending of the word in the plural, just as we often do in English by adding &quot;s&quot;.) Only some pronouns in English still retain the vestiges of declension; &quot;I&quot;/&quot;me&quot; is one good example, as is &quot;who&quot;/&quot;whom&quot;.

Declension in Ancient Greek is complex because not all nouns use the same set of endings. Nouns are classified into three broad categories, known as the ''first declension'', ''second declension'', and ''third declension''. Even nouns belonging to the same category do not necessarily use the same set of endings, although there are conspicuous similarities.

There are 5 ''cases'' in Greek. The case of a noun tells you something about its role in the sentence:

* The ''nominative case'' is used when a noun is the subject of a sentence (''e.g.'', '''''I''' am running''). It is also used when it is the predicate of a copula whose subject is in the nominative (''e.g.'', ''Who is it? It is '''I''''').
* The ''genitive case'' denotes possession or limitation. Whereas in English we often use &quot;'s&quot; or the word &quot;of&quot; to denote possession (''e.g.'', ''Alice''''s''' car'', or ''the end '''of''' the day''), in Greek the noun is simply put into the genitive case.
* The ''dative case'' is the case into which indirect objects fall; whereas in English we usually use the word &quot;to&quot; (''e.g.'', ''My friend gave a book '''to''' me''), in Greek the noun is simply put into the dative case. The dative case has many other uses, to be explained later.
* The ''accusative case'' is usually used for the direct object of a verb.
* The ''vocative case'' is used when directly addressing a person, god, ''etc''.

The accusative, genitive, and dative cases, but not the nominative and vocative, are also used for nouns that are objects of prepositions. Prepositions indicating motion towards, into, or against something are generally used with an accusative noun; prepositions governing motion away, out of, or under, the genitive; fixed position and proximity, the dative.

With nouns expressing time or dimension, the accusative case indicates a length of time or space (as in ''Odysseus sailed for ten years''); the genitive indicates time within which (as in ''We'll arrive within the next hour''), and the dative indicates when something happened (as in ''There will be a test tomorrow'').

'''Important''': When a noun is indicated in the dictionary or in the vocabulary of a textbook such as this, usually both its nominative singular and genitive singular forms are given. This is because the nominative form often does not give enough information to decline the noun, whereas the nominative and genitive together often do. Of course, if the noun has no singular form, then the nominative and genitive plural will be given.

== The Definite Article ==
English's '''sole''' definite article is 'the.' However, the Greek definite article changes according to gender (this is the same difference between 'la' and 'le' in French and 'el' and 'la' in Spanish), number (this is the 'los' and 'las' of Spanish or the 'les' of French), and case, though it's not influenced by noun declensions. The definite article derives from an old ''demonstrative'' system and functions primarily as a marker of ''definiteness'' and ''anaphoric reference'' (e.g., '''ὁ''' δὲ ἀποκριθεὶς ἑνὶ αὐτῶν εἶπεν...).

Since Greek doesn’t always follow the same word order as modern languages, the article may be used multiple times around the same word, placed after the word it’s connected to to emphasize it, or before or after it with another word like 'δέ' for emphasis. 

Note that it '''typically precedes the noun''', which may be [[Ancient Greek/Glossary of Grammatical Terms#Noun|abstract]]; marks the beginning of the noun phrase; and is repeated with each ''coordinated noun'' when each noun is ''independently definite''. It may even substantivize adjectives into nouns (e.g., ὁ κακός — the evil one).
:: ἕως ἂν παρέλθῃ '''ὁ''' οὐρανὸς καὶ '''ἡ''' γῆ, ἰῶτα ἓν ἢ μία κεραία οὐ μὴ παρέλθῃ ἀπὸ '''τοῦ''' νόμου — until heaven and earth disappear, not the smallest letter, not the least stroke of a pen, will by any means disappear from the Law (Matthew 5.18).

{| class=&quot;wikitable&quot; style=&quot;text-align:center&quot;
! rowspan=2 | Case
! colspan=3 | Singular
! rowspan=2 | Dual
! colspan=3 | Plural 
|-
! Masculine
! Neuter
! Feminine
! Masculine
! Neuter
! Feminine
|-
! Nominative 
| ὁ
| rowspan=2 | τό
| ἡ
| rowspan=2 | τώ
| οἱ
| rowspan=2 | τά
| αἱ
|-
! Accusative 
| τόν
| τήν
| τούς
| τάς
|-
! Genitive
| colspan=2|τοῦ
| τῆς
| rowspan=2|τοῖν
| colspan=3|τῶν
|-
! Dative 
| colspan=2|τῷ
| τῇ
| colspan=2|τοῖς
| ταῖς
|-
! colspan=8|
|-
! Vocative
| colspan=7|ὦ
|}

{{BookCat}}</text>
      <sha1>l74j72icozvtnip5ehuqipbp8wy7ky4</sha1>
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  </page>
  <page>
    <title>Cookbook:Pancakes (North American)</title>
    <ns>102</ns>
    <id>105063</id>
    <revision>
      <id>4671208</id>
      <parentid>4585403</parentid>
      <timestamp>2026-09-19T21:52:41Z</timestamp>
      <contributor>
        <username>FeralHogs30-50</username>
        <id>3566045</id>
      </contributor>
      <minor />
      <comment>Fixed discrepancy between units: 120g flour is 1c flour, not 1/2c</comment>
      <origin>4671208</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="3486" sha1="4mnuco5of5yv6w9m7hri5gbr4m0hh2k" xml:space="preserve">{{recipesummary
| category = Pancake recipes
| Yield = 12–14 pancakes
| servings = 3
| time = 15 minutes
| difficulty = 2
| Image = [[Image:Banana on pancake.jpg|300px|Pancakes]]|
}}
{{recipe}} | [[Cookbook: Flatbread|Flatbread]]

'''North American pancakes''' are a type of [[Cookbook:Pancake|pancake]] prepared from a [[Cookbook: Batter|batter]] that is baked on a hot griddle or frying pan. They exist in several variations in many different local [[Cookbook: Cuisine|cuisines]].

== Ingredients ==
* 120 [[Cookbook: Gram|g]] (1 [[Cookbook: Cup|cup]] or 8 [[Cookbook: Ounce|oz]]) wheat [[Cookbook: Flour|flour]] (white, whole grain or 1:1 mix of white and whole grain)
* 1 ½ [[Cookbook: Teaspoon|tsp]] [[Cookbook: Baking Powder|baking powder]]
* 1 [[Cookbook:Pinch|pinch]] [[Cookbook: Salt|salt]]
* 250 [[Cookbook: Milliliter|ml]] (1 cup or 8 [[Cookbook: Fluid Ounce|fl oz]]) [[Cookbook: Milk|milk]] (substitute [[Cookbook:Buttermilk|buttermilk]] or 1:1 mix of milk and buttermilk)
* 1 [[Cookbook: Eggs|egg]], [[Cookbook: Separate|separated]]
* 1 [[Cookbook: Tablespoon|tbsp]] [[Cookbook: White sugar|white sugar]] (optional; this will add a sweetness to your pancakes and is recommended if you are not using any sauces, syrups or ingredient such as bananas or blueberries that will add natural sugars to the mix)

== Procedure ==
# In a large bowl, mix dry ingredients together until well-blended.
# Add milk and mix well until smooth.
# [[Cookbook: Separate|Separate]] the egg, placing the whites in a medium bowl and the yolks in the batter. Mix batter well.
# [[Cookbook:Whipping|Whip]] whites until stiff and then [[Cookbook: Fold|fold]] into batter gently (skip this step for heavier pancakes or if 1 cup buttermilk is substituted for milk).
# Pour ladles of the mixture into a non-stick [[Cookbook:Frying Pan|pan]], one at a time.
# Cook until the edges are dry and bubbles appear on surface. Flip, then cook until golden.

== Notes, tips, and variations ==
* Serve with [[Cookbook:Butter|butter]], [[Cookbook:Maple Syrup|maple syrup]], fruit, chocolate spread, melted [[Cookbook:Chocolate|chocolate]], [[Cookbook:Jam|jam]], or [[Cookbook:Cheese|cheese]].
* Many variations of this recipe use a whole [[Cookbook: Beaten egg|beaten egg]] instead of the yolk and whipped whites. In these variations, all wet ingredients are mixed together with the dry ingredients to make the batter before moving on to the cooking.
* Use [[Cookbook: Buttermilk|buttermilk]] or yogurt instead of milk, or wholegrain flours instead of white. This will change the consistency of the final product—whole grain flours generally lead to a denser heavier pancake, so try mixing white and wheat in various proportions as suggested above to get the feel you want.
* Try adding sliced fruit such as [[Cookbook: Banana|banana]] and [[Cookbook: Apple|apple]], or broken crispy bacon to the batter after pouring into the skillet and before flipping.

[[Category:Recipes for pancakes|{{PAGENAME}}]]
[[Category: Breakfast recipes|{{PAGENAME}}]]
[[Category: Recipes with metric units|{{PAGENAME}}]]
[[Category: Vegan recipes|{{PAGENAME}}]]
[[Category: Vegetarian recipes|{{PAGENAME}}]]
[[Category:Recipes using baking powder]]
[[Category:Recipes using egg]]

[[fr:Cuisine:Pancake]]
[[he:ספר מתכונים/פנקייק]]
[[it:Libro di cucina/Ricette/Pancake]]
[[nl:Kookboek/Pannenkoeken]]
[[Category:Recipes using white sugar]]
[[Category:Recipes using wheat flour]]
[[Category:Recipes using cow milk]]</text>
      <sha1>4mnuco5of5yv6w9m7hri5gbr4m0hh2k</sha1>
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  </page>
  <page>
    <title>Cookbook talk:Pancakes (North American)</title>
    <ns>103</ns>
    <id>105064</id>
    <revision>
      <id>4671203</id>
      <parentid>4621839</parentid>
      <timestamp>2026-09-19T20:24:02Z</timestamp>
      <contributor>
        <username>MeerPup1</username>
        <id>3626350</id>
      </contributor>
      <comment>/* Wrong Milk to Flour Ratio */ Reply</comment>
      <origin>4671203</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2863" sha1="34hq191r3uim3j2act7znuu55nrnksu" xml:space="preserve">==This is not a recipe==
Something that starts &quot;2 cups original Bisquick mix&quot; is not a recipe, it's directions. You can't start a recipe on pancakes with &quot;Open a box of pancake mix.&quot;
:Actually, it ''is'' a recipe.  It's a simple one from Bisquick.  Bisquick already premixed some of the ingredients; that's all. [[User:Marcus2|Marcus2]] 18:24, 5 January 2007 (UTC)

What the hell is an &quot;Original Bisquick mix&quot;? I agree with the first poster that the recipe should have real ingredients, not some brand-specific products which might not even be available outside a given area. --[[User:163.1.42.166|163.1.42.166]] 11:32, 22 January 2007 (UTC)

== I agree ==

I agree. if someone doesn't want to go to the bother of making pancakes yourself, and buys a mix, then the directions are on the box, therefore i think the section is obsolete. Please comment, and if noone comments ill delete it.
[[User:Mcmillan0520|Mcmillan0520]] 21:01, 5 November 2007 (UTC)
delete it my dear its useless

== 12 - 14 pancakes my foot. ==

It's looking like I'm going to have 4 pancakes from this mix so far.  Maybe 6 if I'm lucky.  Am I the only one?

== 12 - 14 pancakes depends on your ingredients. ==
Some flours give you denser taller pancakes (oat flour) while others (white flour) will give flatter pancake.  I used the recipe doubled with oat flour and ended up with ca. 15.  Egg size will also change the yield somewhat.

== 12-14 pancakes if you make them really small ==
Using white and wheat flour, when I make the pancakes about six inches in diameter I have enough batter for at least six whole pancakes, and they come out pretty thick. I'm sure some people must make them smaller. If you're getting less than six pancakes from the current recipe you must be going full Uncle Buck on them.

Thanks for the tip [[User:Lorraine Lorreta|Lorraine Lorreta]] ([[User talk:Lorraine Lorreta|discuss]] • [[Special:Contributions/Lorraine Lorreta|contribs]]) 11:05, 31 May 2020 (UTC)

== Wrong Milk to Flour Ratio ==

The current recipe calls for 1/2 cup flour, 1 cup milk. This resulted in a very soupy batter that didn't cook well. After adding another 1/2 cup of flour, I found that it worked a lot better. This may have just been my experience and I would like for someone to double check before making any changes. Also, doubling the flour gave a result close to the anticipated yield which would solve that dispute. [[User:FeralHogs30-50|FeralHogs30-50]] ([[User talk:FeralHogs30-50|discuss]] • [[Special:Contributions/FeralHogs30-50|contribs]]) 19:34, 6 March 2026 (UTC)

:I agree with this. Although I haven't tried adding more flour to this specific recipe, I can confirm the batter as it is produces soupy batter and thin pancakes. [[User:MeerPup1|MeerPup1]] ([[User talk:MeerPup1|discuss]] • [[Special:Contributions/MeerPup1|contribs]]) 20:24, 19 September 2026 (UTC)</text>
      <sha1>34hq191r3uim3j2act7znuu55nrnksu</sha1>
    </revision>
    <revision>
      <id>4671209</id>
      <parentid>4671203</parentid>
      <timestamp>2026-09-19T21:55:58Z</timestamp>
      <contributor>
        <username>FeralHogs30-50</username>
        <id>3566045</id>
      </contributor>
      <comment>/* Wrong Milk to Flour Ratio */ Reply</comment>
      <origin>4671209</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="3195" sha1="kwfihz3uiqh7tj7jfvdps5gxuf5mzx5" xml:space="preserve">==This is not a recipe==
Something that starts &quot;2 cups original Bisquick mix&quot; is not a recipe, it's directions. You can't start a recipe on pancakes with &quot;Open a box of pancake mix.&quot;
:Actually, it ''is'' a recipe.  It's a simple one from Bisquick.  Bisquick already premixed some of the ingredients; that's all. [[User:Marcus2|Marcus2]] 18:24, 5 January 2007 (UTC)

What the hell is an &quot;Original Bisquick mix&quot;? I agree with the first poster that the recipe should have real ingredients, not some brand-specific products which might not even be available outside a given area. --[[User:163.1.42.166|163.1.42.166]] 11:32, 22 January 2007 (UTC)

== I agree ==

I agree. if someone doesn't want to go to the bother of making pancakes yourself, and buys a mix, then the directions are on the box, therefore i think the section is obsolete. Please comment, and if noone comments ill delete it.
[[User:Mcmillan0520|Mcmillan0520]] 21:01, 5 November 2007 (UTC)
delete it my dear its useless

== 12 - 14 pancakes my foot. ==

It's looking like I'm going to have 4 pancakes from this mix so far.  Maybe 6 if I'm lucky.  Am I the only one?

== 12 - 14 pancakes depends on your ingredients. ==
Some flours give you denser taller pancakes (oat flour) while others (white flour) will give flatter pancake.  I used the recipe doubled with oat flour and ended up with ca. 15.  Egg size will also change the yield somewhat.

== 12-14 pancakes if you make them really small ==
Using white and wheat flour, when I make the pancakes about six inches in diameter I have enough batter for at least six whole pancakes, and they come out pretty thick. I'm sure some people must make them smaller. If you're getting less than six pancakes from the current recipe you must be going full Uncle Buck on them.

Thanks for the tip [[User:Lorraine Lorreta|Lorraine Lorreta]] ([[User talk:Lorraine Lorreta|discuss]] • [[Special:Contributions/Lorraine Lorreta|contribs]]) 11:05, 31 May 2020 (UTC)

== Wrong Milk to Flour Ratio ==

The current recipe calls for 1/2 cup flour, 1 cup milk. This resulted in a very soupy batter that didn't cook well. After adding another 1/2 cup of flour, I found that it worked a lot better. This may have just been my experience and I would like for someone to double check before making any changes. Also, doubling the flour gave a result close to the anticipated yield which would solve that dispute. [[User:FeralHogs30-50|FeralHogs30-50]] ([[User talk:FeralHogs30-50|discuss]] • [[Special:Contributions/FeralHogs30-50|contribs]]) 19:34, 6 March 2026 (UTC)

:I agree with this. Although I haven't tried adding more flour to this specific recipe, I can confirm the batter as it is produces soupy batter and thin pancakes. [[User:MeerPup1|MeerPup1]] ([[User talk:MeerPup1|discuss]] • [[Special:Contributions/MeerPup1|contribs]]) 20:24, 19 September 2026 (UTC)
:After looking over this again, I realized that the recipe calls for 120g of flour which is roughly 1c of flour, not 1/2 cup. I submitted a revision to reconcile this.  [[User:FeralHogs30-50|FeralHogs30-50]] ([[User talk:FeralHogs30-50|discuss]] • [[Special:Contributions/FeralHogs30-50|contribs]]) 21:55, 19 September 2026 (UTC)</text>
      <sha1>kwfihz3uiqh7tj7jfvdps5gxuf5mzx5</sha1>
    </revision>
  </page>
  <page>
    <title>Wikibooks:Reading room/General</title>
    <ns>4</ns>
    <id>112405</id>
    <revision>
      <id>4671167</id>
      <parentid>4670921</parentid>
      <timestamp>2026-09-19T16:10:09Z</timestamp>
      <contributor>
        <username>~2026-40500-29</username>
        <id>3615407</id>
      </contributor>
      <comment>/* Wikibooks project is not defined by goal */ Reply good question</comment>
      <origin>4671167</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="14036" sha1="8ts2xhg8umjebfnpisktg7fy3fmz0zt" xml:space="preserve">__NEWSECTIONLINK__ {{Discussion Rooms}} {{Shortcut|WB:CHAT|WB:RR/G|WB:GENERAL}} {{TOC left|limit=3}}
{{User:MiszaBot/config
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Welcome to the '''General reading room'''. On this page, Wikibookians are free to talk about the Wikibooks project in general. For proposals for improving Wikibooks, see the [[../Proposals/]] reading room.
{{clear}}

[[Category:Reading room]]

== Request for comment (the future of Abstract Wikipedia) ==

&lt;bdi lang=&quot;en&quot; dir=&quot;ltr&quot; class=&quot;mw-content-ltr&quot;&gt;You are invited to voice your opinions in a [[:m:Requests for comment/The future of Abstract Wikipedia|request for comment about the future of Abstract Wikipedia]]. {{Int:Feedback-thanks-title}} [[:m:User:Kowal2701|Kowal2701]] ([[:m:User talk:Kowal2701|talk]])  12:24, 24 July 2026 (UTC)&lt;/bdi&gt;
&lt;!-- Message sent by User:DreamRimmer@metawiki using the list at https://meta.wikimedia.org/w/index.php?title=Distribution_list/Global_message_delivery&amp;oldid=30513860 --&gt;

== Call for administrators ==

Any experienced editor who has a good understanding of Wikibooks' policies should consider applying for administrator permissions at [[Wikibooks:Requests for permissions]]. Thank you. [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 22:10, 5 August 2026 (UTC)

:Is there a page here that describes what admins do? I am curious because I checked [https://en.wikibooks.org/wiki/Special:ListUsers?username=&amp;group=sysop&amp;wpsubmit=&amp;wpFormIdentifier=mw-listusers-form&amp;limit=50 List of admins] and I see that there are already quite a few admins here and wonder which areas have a shortage.
:Just curious. [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 00:56, 16 September 2026 (UTC)
::[[Wikibooks:Administrators]]. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 01:09, 16 September 2026 (UTC)

== August 2026 Wikimedia Café meetups regarding [https://meta.wikimedia.org/wiki/Next_25 Next 25] ==

&lt;div class=&quot;border-box&quot; style=&quot;background-color: var(--background-color-warning-subtle, #f8eaba); max-width: 875px; padding: 5px; border: 1px solid black; margin: 5px; color: var(--clr-dark)&quot;&gt;
&lt;div class=&quot;box&quot; style=&quot;float:left; padding-top: 10px; padding-right: 10px; padding-left: 10px; padding-bottom: 10px;&quot;&gt;[[File:Wikimedia Café logo in plain SVG format.svg|60px|alt=The logo for the Wikimedia Café]]&lt;/div&gt;
Hello! There will be two '''[https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9 Wikimedia Café]''' discussion opportunities in August. Both sessions will focus on [https://meta.wikimedia.org/wiki/Next_25 the Next 25 initiative], including [https://meta.wikimedia.org/wiki/Next_25/A_proposal_to_frame_Next_25 framing the initiative]. Participants may attend either or both Café sessions. 


#'''29 August 2026 15:00 UTC''' ([https://zonestamp.toolforge.org/1788015600 timestamp converter]), at a time friendly to the Americas, Africa, and Europe
#'''30 August 2026 03:00 UTC''' ([https://zonestamp.toolforge.org/1788058800 timestamp converter]), at a time friendly to Asia and the Pacific

Please see the [https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9 Café] page for more information, including [https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9#Agenda._This_will_be_an_approximately_1_hour_Caf%C3%A9_session agenda details] and [https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9#How_to_attend_the_session how to register]!

To subscribe or unsubscribe for Café notices on your talk page please [https://meta.wikimedia.org/wiki/Global_message_delivery/Targets/Wikimedia_Caf%C3%A9 go here].
&lt;br /&gt;
[[File:Buntstifte Eberhard Faber crop 64h.jpg|860px|alt=cropped image of colored pencils]]&lt;/div&gt;
&lt;span style=&quot;white-space:nowrap;&quot;&gt;[[User:Pine|&lt;span style=&quot;color:#01796f; text-shadow:#00BFFF 0 0 1.0em&quot;&gt;༄ᨒ𖠰 Pine&lt;/span&gt;]] [[User talk:Pine|&lt;span style=&quot;color:DeepSkyBlue&quot;&gt;(&lt;b style=&quot;color:#FFDF00;text-shadow:#FFDF00 0 0 1.0em&quot;&gt;✉&lt;/b&gt;)&lt;/span&gt;]]&lt;/span&gt; 01:32, 17 August 2026 (UTC)

== Wikibooks project is not defined by goal ==

If it is for texbooks why is it called Wikibooks? It should be called Wikitextbooks! If it is for textbooks why does it contain cookbooks? For textbooks it's not supposed to have a [[Wikibooks:Featured books]]. [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 09:20, 1 September 2026 (UTC)

:It's &quot;textbooks&quot; broadly construed: guides, manuals, how-tos, etc. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 11:15, 1 September 2026 (UTC)
::So we should change &quot;Wikibooks:Featured books&quot; to &quot;Wikibooks:Featured texts&quot;. [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 11:17, 1 September 2026 (UTC)
:::I disagree and even if I agreed, it would be priority #49,389. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 11:20, 1 September 2026 (UTC)
::::It's according to community consensus that says this website contains textbooks not books. [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 11:23, 1 September 2026 (UTC)
:::::&quot;[[wb:WIW|Simply, Wikibooks is a collection of open-content textbooks.]]&quot; [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 11:26, 1 September 2026 (UTC)
:Most textbooks are made by collaboration of some authors, co-authors and editors. Wikibooks help pages and guidelines remain silent when it comes to stages of writing a new texbooks. Even [[Using Wikibooks]] is not complete emough for enthusiasts. --[[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 18:13, 3 September 2026 (UTC)
:@[[User:Vivairan2|Vivairan2]], In my opinion this is a good question. I wish more users would chime in. [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 16:10, 19 September 2026 (UTC)

== Wishlist 2027, invitation to share feedback ==

Hi, I’m [[m:User:SPerry-WMF|Sonja]] and I lead some of the [[mw:Contributors|teams]] at the Foundation who will be responsible for picking up wish work under the new wishlist process.

As you may know, the [[m:Community_Wishlist|Community Wishlist]] started out as an annual process through which Wikimedia contributors submit and vote on technical improvements they would like the Wikimedia Foundation to work on. The main goal of it is and has been to improve the editing experience by making changes and features the community asks for specifically.

In recent years, the process behind the wishlist has changed, and we’ve heard from many of you that it no longer meets many community members’ needs. So now, the Foundation is designing a new process with the community to improve how wishes are triaged, voted on, and prioritized in a way that is transparent, balanced across project families and language editions, and takes into account what the Foundation can deliver.

I would like to get community input specifically on these three stages of the Wishlist process:

* The [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#triage|'''triage stage''']], meaning how wishes are fleshed out, organized and filtered prior to voting
** We recommend to have a working group, including volunteers from various wikis and Wikimedia Foundation staff to work through this together
* The [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#vote|'''voting stage''']], including who may vote and how votes are structured
* The [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#postvote|'''post-vote stage''']], including how to bring equity into what work is prioritized
** One way to do this is to rank wishes within 3 categories: Large Wikipedias or covering all wikis, small and medium-sized Wikipedias, and '''sister projects''', so that top-voted wishes from smaller projects also get attention

This message is an abstract of the full proposed process. As you [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027|read the proposed ideas on Meta]] (available in your language), please speak up about whether you think this will work well or if there are ways to make it stronger.

Regarding the timeline, this consultation is open for two weeks. You can post your feedback on Meta (in your preferred language) or in response below.

For this year’s cycle, [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#timeline|we plan]] to have the wish submission period in late October/early November and the triage process completed by late November. To respect the end-of-year holiday season, voting would happen in early to mid January. This first voting cycle is meant as a first step to try out a new process, and there will be more opportunities to provide feedback along the way, so that we can figure out the best process for future years together.

[[oldwikisource:M:User:SPerry-WMF|SPerry-WMF]], delivered by [[User:Trizek (WMF)|Trizek (WMF)]] ([[User talk:Trizek (WMF)|discuss]] • [[Special:Contributions/Trizek (WMF)|contribs]]) 13:52, 1 September 2026 (UTC)

:Thank you to everyone who engaged in the discussion around [[m:Talk:Community_Wishlist/Community_Wishlist_2027|the proposal from August 26]]. We've processed your feedback and [https://meta.wikimedia.org/w/index.php?title=Community_Wishlist/Community_Wishlist_2027&amp;diff=prev&amp;oldid=31041090 made changes] accordingly. Note that we weren’t able to implement all of it for this cycle, mostly for logistical reasons, but this is merely meant to be a first step and we will continue to improve this process with you all before we run through the next cycle. We plan to use [[m:Community_Wishlist/Community_Wishlist_2027#Updated_Community_Wishlist_Process_2027/2028|this updated version]] for the Wishlist 2027, and we look forward to hearing from you all during the submission and voting periods.
:[[:M:User:SPerry-WMF|SPerry-WMF]], delivered by [[User:Trizek (WMF)|Trizek (WMF)]] ([[User talk:Trizek (WMF)|discuss]] • [[Special:Contributions/Trizek (WMF)|contribs]]) 14:49, 17 September 2026 (UTC)

== How Do I Get My Book On A Shelf? ==

Help, I don't know how shelves work. I don't know how to put my book on a shelf. Can anyone help?
The book is called''' Art And AI''' [[User:3MMPEYTON|3MMPEYTON]] ([[User talk:3MMPEYTON|discuss]] • [[Special:Contributions/3MMPEYTON|contribs]]) 23:00, 8 September 2026 (UTC)
: Which shelf are you referring? [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] /// [[User talk:Codename Noreste|⭐️✨]] 14:45, 10 September 2026 (UTC)

== Who is allowed to delete pages here? ==
On Aug 14, 2026 a user by the name of Max deleted a page I created in my user space. I don't see max in the list of admins here. Do they have the right to delete pages? Is there any documentation here I can consult?

Thanks in advance, [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 22:38, 15 September 2026 (UTC)

:We have local admins who have the technical ability to delete pages and virtually all material deleted here would be done by us (I'm one of them). A fairly small amount of users have global rights across all Wikimedia Foundation wikis and they will very rarely make deletions (e.g. if there are some kind of legal implications to material). [[User:Ottawahitech/American politics]] was deleted by [[User:Max]], who has [[Special:UserRights/Max|no special rights here]] but is one of the [[:m:Global sysops|global sysops]] I mentioned earlier. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 22:55, 15 September 2026 (UTC)
: Probably unrelated to the above, but Ottawahitech should do that with their account, unless if they are blocked. [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] /// [[User talk:Codename Noreste|⭐️✨]] 23:33, 15 September 2026 (UTC)
::Agreed and [[User:Ottawahitech]] is not blocked here, so no idea why he's using a temp account. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 23:43, 15 September 2026 (UTC)
:::There may be many reasons registered users are &quot;editing&quot; without logging in. Is it possible that they want to go about peacefully without attracting too much attention? [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 15:01, 16 September 2026 (UTC)

== Assistance to get page reviewed ==
My page is a translation page: [[Baiyi Zhuan]] 

It is a single page, it is translated according to my own ability and familiarity with the language with a disclosure on external tools. I would like it to get reviewed if possible as I do not have the rights.  [[User:Taitesena|Taitesena]] ([[User talk:Taitesena|discuss]] • [[Special:Contributions/Taitesena|contribs]]) 11:19, 18 September 2026 (UTC)</text>
      <sha1>8ts2xhg8umjebfnpisktg7fy3fmz0zt</sha1>
    </revision>
    <revision>
      <id>4671170</id>
      <parentid>4671167</parentid>
      <timestamp>2026-09-19T16:28:13Z</timestamp>
      <contributor>
        <username>~2026-40500-29</username>
        <id>3615407</id>
      </contributor>
      <comment>/* Wishlist 2027, invitation to share feedback */ Reply</comment>
      <origin>4671170</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="14612" sha1="dxm3rtlz4gssitm1y3zn2cbo8iypnl9" xml:space="preserve">__NEWSECTIONLINK__ {{Discussion Rooms}} {{Shortcut|WB:CHAT|WB:RR/G|WB:GENERAL}} {{TOC left|limit=3}}
{{User:MiszaBot/config
|archive = Wikibooks:Reading room/Archives/%(year)d/%(monthname)s
|algo = old(60d)
|counter = 1
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Welcome to the '''General reading room'''. On this page, Wikibookians are free to talk about the Wikibooks project in general. For proposals for improving Wikibooks, see the [[../Proposals/]] reading room.
{{clear}}

[[Category:Reading room]]

== Request for comment (the future of Abstract Wikipedia) ==

&lt;bdi lang=&quot;en&quot; dir=&quot;ltr&quot; class=&quot;mw-content-ltr&quot;&gt;You are invited to voice your opinions in a [[:m:Requests for comment/The future of Abstract Wikipedia|request for comment about the future of Abstract Wikipedia]]. {{Int:Feedback-thanks-title}} [[:m:User:Kowal2701|Kowal2701]] ([[:m:User talk:Kowal2701|talk]])  12:24, 24 July 2026 (UTC)&lt;/bdi&gt;
&lt;!-- Message sent by User:DreamRimmer@metawiki using the list at https://meta.wikimedia.org/w/index.php?title=Distribution_list/Global_message_delivery&amp;oldid=30513860 --&gt;

== Call for administrators ==

Any experienced editor who has a good understanding of Wikibooks' policies should consider applying for administrator permissions at [[Wikibooks:Requests for permissions]]. Thank you. [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 22:10, 5 August 2026 (UTC)

:Is there a page here that describes what admins do? I am curious because I checked [https://en.wikibooks.org/wiki/Special:ListUsers?username=&amp;group=sysop&amp;wpsubmit=&amp;wpFormIdentifier=mw-listusers-form&amp;limit=50 List of admins] and I see that there are already quite a few admins here and wonder which areas have a shortage.
:Just curious. [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 00:56, 16 September 2026 (UTC)
::[[Wikibooks:Administrators]]. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 01:09, 16 September 2026 (UTC)

== August 2026 Wikimedia Café meetups regarding [https://meta.wikimedia.org/wiki/Next_25 Next 25] ==

&lt;div class=&quot;border-box&quot; style=&quot;background-color: var(--background-color-warning-subtle, #f8eaba); max-width: 875px; padding: 5px; border: 1px solid black; margin: 5px; color: var(--clr-dark)&quot;&gt;
&lt;div class=&quot;box&quot; style=&quot;float:left; padding-top: 10px; padding-right: 10px; padding-left: 10px; padding-bottom: 10px;&quot;&gt;[[File:Wikimedia Café logo in plain SVG format.svg|60px|alt=The logo for the Wikimedia Café]]&lt;/div&gt;
Hello! There will be two '''[https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9 Wikimedia Café]''' discussion opportunities in August. Both sessions will focus on [https://meta.wikimedia.org/wiki/Next_25 the Next 25 initiative], including [https://meta.wikimedia.org/wiki/Next_25/A_proposal_to_frame_Next_25 framing the initiative]. Participants may attend either or both Café sessions. 


#'''29 August 2026 15:00 UTC''' ([https://zonestamp.toolforge.org/1788015600 timestamp converter]), at a time friendly to the Americas, Africa, and Europe
#'''30 August 2026 03:00 UTC''' ([https://zonestamp.toolforge.org/1788058800 timestamp converter]), at a time friendly to Asia and the Pacific

Please see the [https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9 Café] page for more information, including [https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9#Agenda._This_will_be_an_approximately_1_hour_Caf%C3%A9_session agenda details] and [https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9#How_to_attend_the_session how to register]!

To subscribe or unsubscribe for Café notices on your talk page please [https://meta.wikimedia.org/wiki/Global_message_delivery/Targets/Wikimedia_Caf%C3%A9 go here].
&lt;br /&gt;
[[File:Buntstifte Eberhard Faber crop 64h.jpg|860px|alt=cropped image of colored pencils]]&lt;/div&gt;
&lt;span style=&quot;white-space:nowrap;&quot;&gt;[[User:Pine|&lt;span style=&quot;color:#01796f; text-shadow:#00BFFF 0 0 1.0em&quot;&gt;༄ᨒ𖠰 Pine&lt;/span&gt;]] [[User talk:Pine|&lt;span style=&quot;color:DeepSkyBlue&quot;&gt;(&lt;b style=&quot;color:#FFDF00;text-shadow:#FFDF00 0 0 1.0em&quot;&gt;✉&lt;/b&gt;)&lt;/span&gt;]]&lt;/span&gt; 01:32, 17 August 2026 (UTC)

== Wikibooks project is not defined by goal ==

If it is for texbooks why is it called Wikibooks? It should be called Wikitextbooks! If it is for textbooks why does it contain cookbooks? For textbooks it's not supposed to have a [[Wikibooks:Featured books]]. [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 09:20, 1 September 2026 (UTC)

:It's &quot;textbooks&quot; broadly construed: guides, manuals, how-tos, etc. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 11:15, 1 September 2026 (UTC)
::So we should change &quot;Wikibooks:Featured books&quot; to &quot;Wikibooks:Featured texts&quot;. [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 11:17, 1 September 2026 (UTC)
:::I disagree and even if I agreed, it would be priority #49,389. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 11:20, 1 September 2026 (UTC)
::::It's according to community consensus that says this website contains textbooks not books. [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 11:23, 1 September 2026 (UTC)
:::::&quot;[[wb:WIW|Simply, Wikibooks is a collection of open-content textbooks.]]&quot; [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 11:26, 1 September 2026 (UTC)
:Most textbooks are made by collaboration of some authors, co-authors and editors. Wikibooks help pages and guidelines remain silent when it comes to stages of writing a new texbooks. Even [[Using Wikibooks]] is not complete emough for enthusiasts. --[[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 18:13, 3 September 2026 (UTC)
:@[[User:Vivairan2|Vivairan2]], In my opinion this is a good question. I wish more users would chime in. [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 16:10, 19 September 2026 (UTC)

== Wishlist 2027, invitation to share feedback ==

Hi, I’m [[m:User:SPerry-WMF|Sonja]] and I lead some of the [[mw:Contributors|teams]] at the Foundation who will be responsible for picking up wish work under the new wishlist process.

As you may know, the [[m:Community_Wishlist|Community Wishlist]] started out as an annual process through which Wikimedia contributors submit and vote on technical improvements they would like the Wikimedia Foundation to work on. The main goal of it is and has been to improve the editing experience by making changes and features the community asks for specifically.

In recent years, the process behind the wishlist has changed, and we’ve heard from many of you that it no longer meets many community members’ needs. So now, the Foundation is designing a new process with the community to improve how wishes are triaged, voted on, and prioritized in a way that is transparent, balanced across project families and language editions, and takes into account what the Foundation can deliver.

I would like to get community input specifically on these three stages of the Wishlist process:

* The [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#triage|'''triage stage''']], meaning how wishes are fleshed out, organized and filtered prior to voting
** We recommend to have a working group, including volunteers from various wikis and Wikimedia Foundation staff to work through this together
* The [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#vote|'''voting stage''']], including who may vote and how votes are structured
* The [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#postvote|'''post-vote stage''']], including how to bring equity into what work is prioritized
** One way to do this is to rank wishes within 3 categories: Large Wikipedias or covering all wikis, small and medium-sized Wikipedias, and '''sister projects''', so that top-voted wishes from smaller projects also get attention

This message is an abstract of the full proposed process. As you [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027|read the proposed ideas on Meta]] (available in your language), please speak up about whether you think this will work well or if there are ways to make it stronger.

Regarding the timeline, this consultation is open for two weeks. You can post your feedback on Meta (in your preferred language) or in response below.

For this year’s cycle, [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#timeline|we plan]] to have the wish submission period in late October/early November and the triage process completed by late November. To respect the end-of-year holiday season, voting would happen in early to mid January. This first voting cycle is meant as a first step to try out a new process, and there will be more opportunities to provide feedback along the way, so that we can figure out the best process for future years together.

[[oldwikisource:M:User:SPerry-WMF|SPerry-WMF]], delivered by [[User:Trizek (WMF)|Trizek (WMF)]] ([[User talk:Trizek (WMF)|discuss]] • [[Special:Contributions/Trizek (WMF)|contribs]]) 13:52, 1 September 2026 (UTC)

:Thank you to everyone who engaged in the discussion around [[m:Talk:Community_Wishlist/Community_Wishlist_2027|the proposal from August 26]]. We've processed your feedback and [https://meta.wikimedia.org/w/index.php?title=Community_Wishlist/Community_Wishlist_2027&amp;diff=prev&amp;oldid=31041090 made changes] accordingly. Note that we weren’t able to implement all of it for this cycle, mostly for logistical reasons, but this is merely meant to be a first step and we will continue to improve this process with you all before we run through the next cycle. We plan to use [[m:Community_Wishlist/Community_Wishlist_2027#Updated_Community_Wishlist_Process_2027/2028|this updated version]] for the Wishlist 2027, and we look forward to hearing from you all during the submission and voting periods.
:[[:M:User:SPerry-WMF|SPerry-WMF]], delivered by [[User:Trizek (WMF)|Trizek (WMF)]] ([[User talk:Trizek (WMF)|discuss]] • [[Special:Contributions/Trizek (WMF)|contribs]]) 14:49, 17 September 2026 (UTC)
::@[[User:SPerry-WMF|User:SPerry-WMF]],@[[User:Trizek (WMF)|Trizek (WMF)]]: Thank you for posting info regarding the wishlist to the English Wikibooks. I am sure there are many new users here who can benefit.
::I used to participate in those discussions years ago and I know a lot of effort goes into making discussions useful not only for users of wikipedia, but also for the many language versions of the smaller wikimedia projects such as Wikibooks. [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 16:28, 19 September 2026 (UTC)

== How Do I Get My Book On A Shelf? ==

Help, I don't know how shelves work. I don't know how to put my book on a shelf. Can anyone help?
The book is called''' Art And AI''' [[User:3MMPEYTON|3MMPEYTON]] ([[User talk:3MMPEYTON|discuss]] • [[Special:Contributions/3MMPEYTON|contribs]]) 23:00, 8 September 2026 (UTC)
: Which shelf are you referring? [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] /// [[User talk:Codename Noreste|⭐️✨]] 14:45, 10 September 2026 (UTC)

== Who is allowed to delete pages here? ==
On Aug 14, 2026 a user by the name of Max deleted a page I created in my user space. I don't see max in the list of admins here. Do they have the right to delete pages? Is there any documentation here I can consult?

Thanks in advance, [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 22:38, 15 September 2026 (UTC)

:We have local admins who have the technical ability to delete pages and virtually all material deleted here would be done by us (I'm one of them). A fairly small amount of users have global rights across all Wikimedia Foundation wikis and they will very rarely make deletions (e.g. if there are some kind of legal implications to material). [[User:Ottawahitech/American politics]] was deleted by [[User:Max]], who has [[Special:UserRights/Max|no special rights here]] but is one of the [[:m:Global sysops|global sysops]] I mentioned earlier. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 22:55, 15 September 2026 (UTC)
: Probably unrelated to the above, but Ottawahitech should do that with their account, unless if they are blocked. [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] /// [[User talk:Codename Noreste|⭐️✨]] 23:33, 15 September 2026 (UTC)
::Agreed and [[User:Ottawahitech]] is not blocked here, so no idea why he's using a temp account. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 23:43, 15 September 2026 (UTC)
:::There may be many reasons registered users are &quot;editing&quot; without logging in. Is it possible that they want to go about peacefully without attracting too much attention? [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 15:01, 16 September 2026 (UTC)

== Assistance to get page reviewed ==
My page is a translation page: [[Baiyi Zhuan]] 

It is a single page, it is translated according to my own ability and familiarity with the language with a disclosure on external tools. I would like it to get reviewed if possible as I do not have the rights.  [[User:Taitesena|Taitesena]] ([[User talk:Taitesena|discuss]] • [[Special:Contributions/Taitesena|contribs]]) 11:19, 18 September 2026 (UTC)</text>
      <sha1>dxm3rtlz4gssitm1y3zn2cbo8iypnl9</sha1>
    </revision>
    <revision>
      <id>4671236</id>
      <parentid>4671170</parentid>
      <timestamp>2026-09-20T00:34:12Z</timestamp>
      <contributor>
        <username>TechVindicator</username>
        <id>3626296</id>
      </contributor>
      <comment>/* Translation of books */ new section</comment>
      <origin>4671236</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="14928" sha1="k9t76asg641ycn0if9v63bjswo4z30h" xml:space="preserve">__NEWSECTIONLINK__ {{Discussion Rooms}} {{Shortcut|WB:CHAT|WB:RR/G|WB:GENERAL}} {{TOC left|limit=3}}
{{User:MiszaBot/config
|archive = Wikibooks:Reading room/Archives/%(year)d/%(monthname)s
|algo = old(60d)
|counter = 1
|minthreadstoarchive = 1
|minthreadsleft = 1
|key = 7a0ac23cf8049e4d9ff70cabb5649d1a
}}
Welcome to the '''General reading room'''. On this page, Wikibookians are free to talk about the Wikibooks project in general. For proposals for improving Wikibooks, see the [[../Proposals/]] reading room.
{{clear}}

[[Category:Reading room]]

== Request for comment (the future of Abstract Wikipedia) ==

&lt;bdi lang=&quot;en&quot; dir=&quot;ltr&quot; class=&quot;mw-content-ltr&quot;&gt;You are invited to voice your opinions in a [[:m:Requests for comment/The future of Abstract Wikipedia|request for comment about the future of Abstract Wikipedia]]. {{Int:Feedback-thanks-title}} [[:m:User:Kowal2701|Kowal2701]] ([[:m:User talk:Kowal2701|talk]])  12:24, 24 July 2026 (UTC)&lt;/bdi&gt;
&lt;!-- Message sent by User:DreamRimmer@metawiki using the list at https://meta.wikimedia.org/w/index.php?title=Distribution_list/Global_message_delivery&amp;oldid=30513860 --&gt;

== Call for administrators ==

Any experienced editor who has a good understanding of Wikibooks' policies should consider applying for administrator permissions at [[Wikibooks:Requests for permissions]]. Thank you. [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 22:10, 5 August 2026 (UTC)

:Is there a page here that describes what admins do? I am curious because I checked [https://en.wikibooks.org/wiki/Special:ListUsers?username=&amp;group=sysop&amp;wpsubmit=&amp;wpFormIdentifier=mw-listusers-form&amp;limit=50 List of admins] and I see that there are already quite a few admins here and wonder which areas have a shortage.
:Just curious. [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 00:56, 16 September 2026 (UTC)
::[[Wikibooks:Administrators]]. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 01:09, 16 September 2026 (UTC)

== August 2026 Wikimedia Café meetups regarding [https://meta.wikimedia.org/wiki/Next_25 Next 25] ==

&lt;div class=&quot;border-box&quot; style=&quot;background-color: var(--background-color-warning-subtle, #f8eaba); max-width: 875px; padding: 5px; border: 1px solid black; margin: 5px; color: var(--clr-dark)&quot;&gt;
&lt;div class=&quot;box&quot; style=&quot;float:left; padding-top: 10px; padding-right: 10px; padding-left: 10px; padding-bottom: 10px;&quot;&gt;[[File:Wikimedia Café logo in plain SVG format.svg|60px|alt=The logo for the Wikimedia Café]]&lt;/div&gt;
Hello! There will be two '''[https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9 Wikimedia Café]''' discussion opportunities in August. Both sessions will focus on [https://meta.wikimedia.org/wiki/Next_25 the Next 25 initiative], including [https://meta.wikimedia.org/wiki/Next_25/A_proposal_to_frame_Next_25 framing the initiative]. Participants may attend either or both Café sessions. 


#'''29 August 2026 15:00 UTC''' ([https://zonestamp.toolforge.org/1788015600 timestamp converter]), at a time friendly to the Americas, Africa, and Europe
#'''30 August 2026 03:00 UTC''' ([https://zonestamp.toolforge.org/1788058800 timestamp converter]), at a time friendly to Asia and the Pacific

Please see the [https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9 Café] page for more information, including [https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9#Agenda._This_will_be_an_approximately_1_hour_Caf%C3%A9_session agenda details] and [https://meta.wikimedia.org/wiki/Wikimedia_Caf%C3%A9#How_to_attend_the_session how to register]!

To subscribe or unsubscribe for Café notices on your talk page please [https://meta.wikimedia.org/wiki/Global_message_delivery/Targets/Wikimedia_Caf%C3%A9 go here].
&lt;br /&gt;
[[File:Buntstifte Eberhard Faber crop 64h.jpg|860px|alt=cropped image of colored pencils]]&lt;/div&gt;
&lt;span style=&quot;white-space:nowrap;&quot;&gt;[[User:Pine|&lt;span style=&quot;color:#01796f; text-shadow:#00BFFF 0 0 1.0em&quot;&gt;༄ᨒ𖠰 Pine&lt;/span&gt;]] [[User talk:Pine|&lt;span style=&quot;color:DeepSkyBlue&quot;&gt;(&lt;b style=&quot;color:#FFDF00;text-shadow:#FFDF00 0 0 1.0em&quot;&gt;✉&lt;/b&gt;)&lt;/span&gt;]]&lt;/span&gt; 01:32, 17 August 2026 (UTC)

== Wikibooks project is not defined by goal ==

If it is for texbooks why is it called Wikibooks? It should be called Wikitextbooks! If it is for textbooks why does it contain cookbooks? For textbooks it's not supposed to have a [[Wikibooks:Featured books]]. [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 09:20, 1 September 2026 (UTC)

:It's &quot;textbooks&quot; broadly construed: guides, manuals, how-tos, etc. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 11:15, 1 September 2026 (UTC)
::So we should change &quot;Wikibooks:Featured books&quot; to &quot;Wikibooks:Featured texts&quot;. [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 11:17, 1 September 2026 (UTC)
:::I disagree and even if I agreed, it would be priority #49,389. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 11:20, 1 September 2026 (UTC)
::::It's according to community consensus that says this website contains textbooks not books. [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 11:23, 1 September 2026 (UTC)
:::::&quot;[[wb:WIW|Simply, Wikibooks is a collection of open-content textbooks.]]&quot; [[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 11:26, 1 September 2026 (UTC)
:Most textbooks are made by collaboration of some authors, co-authors and editors. Wikibooks help pages and guidelines remain silent when it comes to stages of writing a new texbooks. Even [[Using Wikibooks]] is not complete emough for enthusiasts. --[[User:Vivairan2|Vivairan2]] ([[User talk:Vivairan2|discuss]] • [[Special:Contributions/Vivairan2|contribs]]) 18:13, 3 September 2026 (UTC)
:@[[User:Vivairan2|Vivairan2]], In my opinion this is a good question. I wish more users would chime in. [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 16:10, 19 September 2026 (UTC)

== Wishlist 2027, invitation to share feedback ==

Hi, I’m [[m:User:SPerry-WMF|Sonja]] and I lead some of the [[mw:Contributors|teams]] at the Foundation who will be responsible for picking up wish work under the new wishlist process.

As you may know, the [[m:Community_Wishlist|Community Wishlist]] started out as an annual process through which Wikimedia contributors submit and vote on technical improvements they would like the Wikimedia Foundation to work on. The main goal of it is and has been to improve the editing experience by making changes and features the community asks for specifically.

In recent years, the process behind the wishlist has changed, and we’ve heard from many of you that it no longer meets many community members’ needs. So now, the Foundation is designing a new process with the community to improve how wishes are triaged, voted on, and prioritized in a way that is transparent, balanced across project families and language editions, and takes into account what the Foundation can deliver.

I would like to get community input specifically on these three stages of the Wishlist process:

* The [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#triage|'''triage stage''']], meaning how wishes are fleshed out, organized and filtered prior to voting
** We recommend to have a working group, including volunteers from various wikis and Wikimedia Foundation staff to work through this together
* The [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#vote|'''voting stage''']], including who may vote and how votes are structured
* The [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#postvote|'''post-vote stage''']], including how to bring equity into what work is prioritized
** One way to do this is to rank wishes within 3 categories: Large Wikipedias or covering all wikis, small and medium-sized Wikipedias, and '''sister projects''', so that top-voted wishes from smaller projects also get attention

This message is an abstract of the full proposed process. As you [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027|read the proposed ideas on Meta]] (available in your language), please speak up about whether you think this will work well or if there are ways to make it stronger.

Regarding the timeline, this consultation is open for two weeks. You can post your feedback on Meta (in your preferred language) or in response below.

For this year’s cycle, [[m:Special:MyLanguage/Community_Wishlist/Community_Wishlist_2027#timeline|we plan]] to have the wish submission period in late October/early November and the triage process completed by late November. To respect the end-of-year holiday season, voting would happen in early to mid January. This first voting cycle is meant as a first step to try out a new process, and there will be more opportunities to provide feedback along the way, so that we can figure out the best process for future years together.

[[oldwikisource:M:User:SPerry-WMF|SPerry-WMF]], delivered by [[User:Trizek (WMF)|Trizek (WMF)]] ([[User talk:Trizek (WMF)|discuss]] • [[Special:Contributions/Trizek (WMF)|contribs]]) 13:52, 1 September 2026 (UTC)

:Thank you to everyone who engaged in the discussion around [[m:Talk:Community_Wishlist/Community_Wishlist_2027|the proposal from August 26]]. We've processed your feedback and [https://meta.wikimedia.org/w/index.php?title=Community_Wishlist/Community_Wishlist_2027&amp;diff=prev&amp;oldid=31041090 made changes] accordingly. Note that we weren’t able to implement all of it for this cycle, mostly for logistical reasons, but this is merely meant to be a first step and we will continue to improve this process with you all before we run through the next cycle. We plan to use [[m:Community_Wishlist/Community_Wishlist_2027#Updated_Community_Wishlist_Process_2027/2028|this updated version]] for the Wishlist 2027, and we look forward to hearing from you all during the submission and voting periods.
:[[:M:User:SPerry-WMF|SPerry-WMF]], delivered by [[User:Trizek (WMF)|Trizek (WMF)]] ([[User talk:Trizek (WMF)|discuss]] • [[Special:Contributions/Trizek (WMF)|contribs]]) 14:49, 17 September 2026 (UTC)
::@[[User:SPerry-WMF|User:SPerry-WMF]],@[[User:Trizek (WMF)|Trizek (WMF)]]: Thank you for posting info regarding the wishlist to the English Wikibooks. I am sure there are many new users here who can benefit.
::I used to participate in those discussions years ago and I know a lot of effort goes into making discussions useful not only for users of wikipedia, but also for the many language versions of the smaller wikimedia projects such as Wikibooks. [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 16:28, 19 September 2026 (UTC)

== How Do I Get My Book On A Shelf? ==

Help, I don't know how shelves work. I don't know how to put my book on a shelf. Can anyone help?
The book is called''' Art And AI''' [[User:3MMPEYTON|3MMPEYTON]] ([[User talk:3MMPEYTON|discuss]] • [[Special:Contributions/3MMPEYTON|contribs]]) 23:00, 8 September 2026 (UTC)
: Which shelf are you referring? [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] /// [[User talk:Codename Noreste|⭐️✨]] 14:45, 10 September 2026 (UTC)

== Who is allowed to delete pages here? ==
On Aug 14, 2026 a user by the name of Max deleted a page I created in my user space. I don't see max in the list of admins here. Do they have the right to delete pages? Is there any documentation here I can consult?

Thanks in advance, [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 22:38, 15 September 2026 (UTC)

:We have local admins who have the technical ability to delete pages and virtually all material deleted here would be done by us (I'm one of them). A fairly small amount of users have global rights across all Wikimedia Foundation wikis and they will very rarely make deletions (e.g. if there are some kind of legal implications to material). [[User:Ottawahitech/American politics]] was deleted by [[User:Max]], who has [[Special:UserRights/Max|no special rights here]] but is one of the [[:m:Global sysops|global sysops]] I mentioned earlier. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 22:55, 15 September 2026 (UTC)
: Probably unrelated to the above, but Ottawahitech should do that with their account, unless if they are blocked. [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] /// [[User talk:Codename Noreste|⭐️✨]] 23:33, 15 September 2026 (UTC)
::Agreed and [[User:Ottawahitech]] is not blocked here, so no idea why he's using a temp account. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 23:43, 15 September 2026 (UTC)
:::There may be many reasons registered users are &quot;editing&quot; without logging in. Is it possible that they want to go about peacefully without attracting too much attention? [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 15:01, 16 September 2026 (UTC)

== Assistance to get page reviewed ==
My page is a translation page: [[Baiyi Zhuan]] 

It is a single page, it is translated according to my own ability and familiarity with the language with a disclosure on external tools. I would like it to get reviewed if possible as I do not have the rights.  [[User:Taitesena|Taitesena]] ([[User talk:Taitesena|discuss]] • [[Special:Contributions/Taitesena|contribs]]) 11:19, 18 September 2026 (UTC)

== Translation of books ==
Hello,
I would like to translate books from other Wikibooks into English. Are there any guidelines regarding how to do this? [[User:TechVindicator|TechVindicator]] ([[User talk:TechVindicator|discuss]] • [[Special:Contributions/TechVindicator|contribs]]) 00:34, 20 September 2026 (UTC)</text>
      <sha1>k9t76asg641ycn0if9v63bjswo4z30h</sha1>
    </revision>
  </page>
  <page>
    <title>Template:Goodbook/Consciousness Studies</title>
    <ns>10</ns>
    <id>122287</id>
    <revision>
      <id>4671202</id>
      <parentid>1799294</parentid>
      <timestamp>2026-09-19T19:39:50Z</timestamp>
      <contributor>
        <username>Acrions</username>
        <id>3509296</id>
      </contributor>
      <comment>fix pronouns</comment>
      <origin>4671202</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="373" sha1="5ytdq9p07rif79h437hwezm3ajxxmvy" xml:space="preserve">{{Goodbook|edit={{{edit|}}}|box={{{box|}}}
 |title=Consciousness Studies
 |cover=RobertFuddBewusstsein17Jh.png
 |desc=Everyone has their own view of the nature of consciousness. The intention of [[Consciousness Studies]] is to expand this view by providing an insight into the various ideas and beliefs on the subject as well as a review of current work in neuroscience.
}}</text>
      <sha1>5ytdq9p07rif79h437hwezm3ajxxmvy</sha1>
    </revision>
  </page>
  <page>
    <title>Vehicle Identification Numbers (VIN codes)/Land Rover/VIN Codes</title>
    <ns>0</ns>
    <id>142029</id>
    <revision>
      <id>4671339</id>
      <parentid>4607935</parentid>
      <timestamp>2026-09-20T11:06:49Z</timestamp>
      <contributor>
        <username>JustTheFacts33</username>
        <id>3434282</id>
      </contributor>
      <comment>/* Engine Type (All models 2017-) */</comment>
      <origin>4671339</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="18836" sha1="ch556przwe044mxr6k7z1rk6hce6xqm" xml:space="preserve">{{Vehicle Identification Numbers (VIN codes)/Warning}}{{clear}}
From 1948 to the early eighties, Land Rover used for their cars chassis numbers of their own format. These formats are described in the table below. Since 1980 Land Rover deploys the standard 17-character Vehicle Identification Number ('''VIN'''), complying with international standards. 

Car details can be derived (decoded, calculated) from the chassis numbers and the VIN. Typically, the model (Defender, Discovery, Range Rover, Freelander), model type (station wagon, three/four door, etc), wheelbase (90 inch, 100 inch, 110 inch, etc.), engine, LHD/RHD, gearbox, and model year is included in the VIN. 

==Chassis number formats over the years==
&lt;table&gt;
&lt;tr&gt;&lt;th&gt;Description&lt;/th&gt;&lt;th&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/th&gt;&lt;th&gt;Format&lt;/th&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, International VIN, 1980-later&lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;SAL..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Int. VIN for LR do Brazil  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;93R..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Int. VIN for AAD, 1985-1995 &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;AAD..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, US/Canada VIN, 1987-later  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;SAL.................&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Brazil VIN for JLR Brazil, 2016-later  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;99J.................&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;14-characters: is actually the 17-char&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;VIN missing the SAL bit&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1955      &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;17.6.....&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1956 to 1961  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;1........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1950      &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;L........ or R........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1962 to 1979  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1948 to 1949  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.8......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1950 to 1953  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.6......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1954 to 1955  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.7......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;7-character numbers, 1948 to 1949  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;6-character numbers, ???? prototypes &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;110F..&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;3-character numbers, 1948 prototypes &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;R.. or L..&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;

==Land Rover WMIs (1981-) (Position 1-3)==

* SAL - Land Rover (UK &amp; Europe)
* 99J - JLR Brazil
* L2C - Chery Jaguar Land Rover (China)


==Model Line==

{| class=&quot;wikitable&quot;
|+Position 4
!VIN code
!Description
|-
|A
|[[w:Land Rover Discovery#Discovery 3 / LR3 (2004–2009)|Land Rover LR3]] ('05-'09)
|-
|A
|[[w:Land Rover Discovery#Discovery 4 / LR4 (2009–2016)|Land Rover LR4]] ('10-'16)
|-
|C
|[[w:Land Rover Discovery Sport|Land Rover Discovery Sport]] ('15-)
|-
|D
|[[w:Land Rover Defender#North American Specification (NAS) Defenders|Land Rover Defender]] ('93-'95, '97) 
|-
|E
|[[w:Land Rover Defender (L663)|Land Rover Defender (L663)]] ('20-)
|-
|F
|[[w:Land Rover Freelander#Freelander 2 (L359; 2006–2015)|Land Rover LR2]] ('08-'15)
|-
|G 
|[[w:Range Rover (L405)|Land Rover Range Rover (L405)]] (4th gen.) ('13-'22)
|-
|H 
|[[w:Range Rover Classic|Land Rover Range Rover/Range Rover Classic]] (1st gen.) ('87-'95)
|-
|J 
|[[w:Land Rover Discovery#First &amp; Second generation Discovery|Land Rover Discovery]] ('94-'98 &amp; '99 Discovery SD)
|-
|K 
|[[w:Range Rover (L460)|Land Rover Range Rover (L460)]] (5th gen.) ('23-)
|-
|M 
|[[w:Range Rover (L322)|Land Rover Range Rover (L322)]] (3rd gen.) ('03-'12)
|-
|N
|[[w:Land Rover Freelander#Freelander in North America|Land Rover Freelander]] ('02-'05)
|-
|P 
|[[w:Range Rover (P38A)|Land Rover Range Rover (P38A)]] (2nd gen.) ('95-'02)
|-
|R
|[[w:Land Rover Discovery#Fifth generation Discovery (L462; 2017–present)|Land Rover Discovery]] ('17-)
|-
|S 
|[[w:Range Rover Sport#First generation (L320; 2005)|Land Rover Range Rover Sport]] (1st gen.) ('06-'13)
|-
|T 
|[[w:Land Rover Discovery#Discovery Series II (L318; 1998–2004)|Land Rover Discovery Series II]] ('99-'04)
|-
|V 
|[[w:Range Rover Evoque#First generation (L538; 2011)|Land Rover Range Rover Evoque]] (1st gen.) ('12-'19)
|-
|W 
|[[w:Range Rover Sport#Second generation (L494; 2013)|Land Rover Range Rover Sport]] (2nd gen.) ('14-'22)
|-
|Y 
|[[w:Range Rover Velar|Land Rover Range Rover Velar]] (1st gen.) ('18-)
|-
|Z 
|[[w:Range Rover Evoque#Second generation (L551; 2018)|Land Rover Range Rover Evoque]] (2nd gen.) ('20-)
|-
|1 
|[[w:Range Rover Sport#Third generation (L461; 2022)|Land Rover Range Rover Sport]] (3rd gen.) ('23-)
|-
|}

==Model Series/GVWR==

{| class=&quot;wikitable&quot;
|+Position 5
!VIN code
!Series
!GVWR
|-
|V (following H)
|Range Rover 100&quot; wheelbase (1st gen.)
|Class E
|-
|E (following H)
|Range Rover 100&quot; wheelbase (CA emissions) (1st gen.) ('95)
|Class E
|-
|C (following H)
|Range Rover LWB 108&quot; wheelbase (1st gen.)
|Class E
|-
|F (following H)
|Range Rover LWB 108&quot; wheelbase (CA emissions) (1st gen.) ('95)
|Class E
|-
|H (following D)
|Defender 110 ('93)
|Class E
|-
|V (following D)
|Defender 90 ('94-'95, '97)
|Class E
|-
|X (following D)
|Defender 90 (CA emissions) ('95)
|Class E
|-
|Y (following J)
|Discovery ('94-'98 &amp; '99 Discovery SD)
|Class E
|-
|N (following J)
|Discovery (CA emissions) ('95-'96)
|Class E
|-
|Y (following T)
|Discovery Series II ('99-'00)
|Class E
|-
|V (following P)
|Range Rover (2nd gen.) ('95-'98)
|Class E
|-
|E (following P)
|Range Rover (2nd gen.) (CA emissions) ('95-'96)
|Class E
|-
|A (following P)
|Range Rover (2nd gen.) (GEMS engine management) (Early '99)
|Class E
|-
|V (following P)
|Range Rover (2nd gen.) (Bosch engine management) ('99-'00)
|Class E
|-
|C (following P)
|Range Rover 4.6 HSE Callaway Edition (2nd gen.) (Callaway-modified engine) ('99)
|Class E
|-
|}

==Model Series/Trim Level/GVWR==

{| class=&quot;wikitable&quot;
|+Position 5
!VIN code
!Series
!GVWR
|-
|M (following N)
|Freelander S ('02-'03)
|Class C
|-
|Y (following N)
|Freelander SE ('02-'05), SE3 ('03-'05)
|Class C
|-
|E (following N)
|Freelander HSE ('02-'04)
|Class C
|-
|L (following T)
|Discovery Series II SD ('01-'02), S ('03-'04)
|Class E
|-
|K (following T)
|Discovery Series II SD7 ('01-'02), S7 ('03-'04)
|Class E
|-
|Y (following T)
|Discovery Series II SE ('01-'04)
|Class E
|-
|W (following T)
|Discovery Series II SE7 ('01-'04)
|Class E
|-
|H (following T)
|Discovery Series II LE ('01)
|Class E
|-
|J (following T)
|Discovery Series II LE7 ('01)
|Class E
|-
|P (following T)
|Discovery Series II HSE ('03-'04)
|Class E
|-
|R (following T)
|Discovery Series II HSE7 ('03-'04)
|Class E
|-
|L (following P)
|Range Rover (2nd gen.) 4.6 SE ('01)
|Class E
|-
|M (following P)
|Range Rover (2nd gen.) 4.6 HSE ('01-'02), Westminster Edition ('02)
|Class E
|-
|H (following M)
|Range Rover (3rd gen.) Westminster Edition ('04-'05)
|Class E
|-
|}

==Body Type==
{| class=&quot;wikitable&quot;
|+Position 6
!VIN code
!Description
|-
|1
|4-door wagon (Range Rover '87-'12, Defender 110 '93, Discovery '94-'04)
|-
|1
|2-door soft top (Freelander SE3) ('03-'05)
|-
|1
|2-door wagon (Range Rover Evoque 2-d '12-'17)
|-
|2
|2-door soft top (Defender 90) ('94-'95, '97)
|-
|2
|4-door wagon (Freelander) ('02-'05)
|-
|2
|4-door wagon (LR2 '08-'15, Discovery Sport '15-, Range Rover Evoque 4-d '12-, LR3 '05-'09, LR4 '10-'16, Discovery '18-, Range Rover Sport '06-'22, Range Rover Sport P400e '20, Range Rover SWB (L405) '13-'22, Range Rover Velar '18-)
|-
|3
|2-door wagon (Defender 90) ('95, '97)
|-
|3
|4-door wagon LWB (Range Rover LWB '14-'16)
|-
|3
|4-door wagon LWB w/Class E GVWR (Range Rover SV Autobiography LWB '17)
|-
|4
|4-door wagon [[w:Plug-in hybrid|PHEV]] (Range Rover P400e '20-'21, Range Rover Sport P400e '21-Early '22)
|-
|5
|4-door wagon LWB w/Class F GVWR (Range Rover Supercharged LWB &amp; Autobiography LWB '17)
|-
|5
|4-door wagon LWB w/Class F GVWR (Range Rover LWB (L405) '18-'22)
|-
|5
|2-door convertible (Range Rover Evoque convertible '17-'19)
|-
|6
|2-door wagon (Defender 90 '21-)
|-
|7
|4-door wagon w/2 rows of seating (Defender 110 '20-)
|-
|9
|4-door wagon (Range Rover SWB (L460) '22-, Range Rover Sport '23-)
|-
|B
|4-door wagon (Discovery '17)
|-
|B
|4-door wagon LWB (Range Rover LWB (L460) '22-)
|-
|E
|4-door wagon w/3 rows of seating (Defender 110 '20-)
|-
|F
|4-door wagon w/extended length (Defender 130 '23-)
|}
SWB=Short-wheelbase, LWB=Long-wheelbase

==Engine Type (All Models 1987-2016 EXCEPT LR2, Discovery Sport, Range Rover Evoque)==

{| class=&quot;wikitable&quot;
|+Position 7
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| 1 || 3.5L || V8 || Gas ||OHV||MPI. [[w:Rover V8 engine|(Ex-GM) Rover V8 engine]]. Land Rover Range Rover ('87-'88).
|-
| 1 || 4.4L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Single VANOS (Intake VVT). BMW M62TUB44 engine. Land Rover Range Rover ('03-'05).
|-
| 2 || 3.9L || V8 || Gas ||OHV||MPI. (Ex-GM) Rover V8 engine.&lt;br&gt; Land Rover Range Rover SWB ('89-'94), Range Rover County Classic [SWB] ('95), Defender 110 ('93),&lt;br&gt; Defender 90 ('94-'95), Discovery ('94-'95).
|-
| 2 || 4.0L || V8 || Gas ||OHV||Sequential MPI. (3947 cc, actually 3.9L). (Ex-GM) Rover V8 engine. Land Rover Range Rover 4.0 SE ('95-'99),&lt;br&gt; Discovery ('96-'02), Defender 90 ('97).
|-
| 2 || 2.5L || 90° V6 || Gas ||DOHC,&lt;br /&gt; 24 valve||Sequential MPI. VIS. [[w:Rover KV6 engine|Rover KV6 engine]]. Land Rover Freelander ('02-'05).
|-
| 3 || 4.2L || V8 || Gas ||OHV||MPI. (4275 cc, actually 4.3L). (Ex-GM) Rover V8 engine. Land Rover Range Rover County LWB ('93-'95).
|-
| 3 || 4.2L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Jaguar AJ33S engine. Land Rover Range Rover ('06-'09), Range Rover Sport ('06-'09).
|-
| 4 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. Land Rover Range Rover 4.6 HSE ('96-'99), Discovery ('03).
|-
| 4 || 4.0L || 60° V6 || Gas ||SOHC,&lt;br /&gt; 12 valve||Sequential MPI. Variable intake manifold. Ford Cologne V6 engine.&lt;br&gt; Land Rover LR3 ('05-'07 &amp; also '08-'09 in Canada).
|-
| 5 || 4.0L || V8 || Gas ||OHV||Sequential MPI. (3947 cc, actually 3.9L). (Ex-GM) Rover V8 engine. LEV.&lt;br&gt; Land Rover Range Rover 4.0 SE ('00), Discovery ('00-'02).
|-
| 5 || 4.4L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Continuously VCP (Intake VVT). Jaguar AJ41 engine.&lt;br&gt; Land Rover LR3 ('05-'09), Range Rover ('06-'09), Range Rover Sport ('06-'09).
|-
| 6 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. LEV ('00-'02) or ULEV ('03).&lt;br&gt; Land Rover Range Rover 4.6 HSE ('00-'02), 4.6 SE ('01), Discovery ('03).
|-
| 9 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. Land Rover Discovery ('04).
|-
| D || 5.0L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). CPS (Intake VVL). VIS. Jaguar AJ133 engine (LR-V8).&lt;br&gt; Land Rover LR4 ('10-'13), Range Rover ('10-'13), Range Rover Sport ('10-'13).
|-
| E || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('10-'16), Range Rover Sport ('10-'16).
|-
| K || 3.0L || 60° V6 Turbo [[w:Intercooler|IC]] || Diesel ||DOHC,&lt;br /&gt; 24 valve||Common-rail Direct injection. Ford-PSA &quot;Lion&quot; AJD-V6 engine.&lt;br&gt; Land Rover Range Rover Td6 ('16), Range Rover Sport Td6 ('16).
|-
| P || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover Range Rover ('16), Range Rover Sport ('16).
|-
| T || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas/E85 ||DOHC,&lt;br /&gt; 32 valve||Flex Fuel. Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('14-'15), Range Rover Sport ('14-'15).
|-
| V || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover LR4 ('14-'16), Range Rover ('14-'16), Range Rover Sport ('14-'16).
|-
| W || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas/E85 ||DOHC,&lt;br /&gt; 24 valve||Flex Fuel. Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover Range Rover ('14), Range Rover Sport ('14).
|}
VVT=Variable Valve Timing. VCP=Variable Camshaft Phasing. VCT=Variable Camshaft Timing. VIS=Variable Intake System. LEV=Low Emissions Vehicle. ULEV=Ultra-Low Emissions Vehicle. CPS=Cam Profile Switching. VVL=Variable Valve Lift.

==Transmission Type (LR2, Discovery Sport, Range Rover Evoque only 2008-2016)==
{| class=&quot;wikitable&quot;
|+Position 7
!VIN code
!Description
|-
|4
|6-speed automatic (Aisin AWF21) (LR2 '08-'09)
|-
|B
|6-speed automatic (Aisin AWF21) (LR2 '10-'15, Range Rover Evoque '12-'13)
|-
|B
|9-speed automatic (ZF 9HP) (Discovery Sport '15-'16, Range Rover Evoque '14-'16)
|}

==Transmission Type (All models 2017-)==
{| class=&quot;wikitable&quot;
|+Position 7
!VIN code
!Description
|-
|B
|8-speed automatic (ZF 8HP) (Discovery '17)
|-
|B
|9-speed automatic (ZF 9HP) (Discovery Sport '17, Range Rover Evoque '17)
|-
|F
|8-speed automatic (ZF 8HP) (Range Rover '17, Range Rover Sport '17)
|}

==Transmission Type (All Models 1987-2016 EXCEPT LR2, Discovery Sport, Range Rover Evoque)==
{| class=&quot;wikitable&quot;
|+Position 8
!VIN code
!Description
|-
|2
|5-speed automatic [manual shift mode: Steptronic or CommandShift] (Jatco JF506E) (Freelander '02-'05)
|-
|4
|4-speed automatic (ZF 4HP22 or w/4.6L V8: 4HP24) (Range Rover '87-'02, Discovery '94-'04, Defender 90 '97)
|-
|4
|5-speed automatic (ZF 5HP24) (Range Rover '03-'05)
|-
|4
|6-speed automatic (ZF 6HP26X) (LR3 '05-'09, Range Rover '06-'09, Range Rover Sport '06-'09)
|-
|4
|6-speed automatic (ZF 6HP28X) (LR4 '10-'13, Range Rover '10-'12, Range Rover Sport '10-'13)
|-
|6
|8-speed automatic (ZF 8HP) (LR4 '14-'16)
|-
|8
|5-speed manual (Defender 110 '93, Defender 90 '94-'95, Discovery '94-'97)
|-
|F
|8-speed automatic (ZF 8HP) (Range Rover '13-'16, Range Rover Sport '14-'16)
|}
All are LHD (Left-hand drive).

==Engine Type (LR2, Discovery Sport, Range Rover Evoque only 2008-2016)==

{| class=&quot;wikitable&quot;
|+Position 8
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| G || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. Ford EcoBoost engine (Mazda L engine-based).&lt;br&gt; Land Rover LR2 ('13-'15), Discovery Sport ('15-'16), Range Rover Evoque ('12-'16).
|-
| N || 3.2L || I6 || Gas ||DOHC,&lt;br /&gt; 24 valve||MPI. VCT (Intake VVT). CPS (Intake VVL). VIS. [[w:Volvo SI6 engine#B6324S5|Volvo SI6 engine - B6324S5]]. Land Rover LR2 ('08-'12).
|-
|}
VCT=Variable Cam Timing. VVT=Variable Valve Timing. CPS=Cam Profile Switching. VVL=Variable Valve Lift. VIS=Variable Intake System.

==Engine Type (All models 2017-)==

{| class=&quot;wikitable&quot;
|+Position 8
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| E || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('17-'22), Range Rover Sport ('17-'22),&lt;br&gt; Range Rover Velar SVAutobiography Dynamic ('20), Defender V8 ('22-'26).
|-
| G || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. Ford EcoBoost engine (Mazda L engine-based).&lt;br&gt; Land Rover Discovery Sport ('17), Range Rover Evoque ('17).
|-
| K || 3.0L || 60° V6 Turbo [[w:Intercooler|IC]] || Diesel ||DOHC,&lt;br /&gt; 24 valve||Common-rail Direct injection. Ford-PSA &quot;Lion&quot; AJD-V6 engine.&lt;br&gt; Land Rover Discovery Td6 ('17-'20), Range Rover Td6 ('17-'21), Range Rover Sport Td6 ('17-'21).
|-
| N || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Diesel || DOHC,&lt;br /&gt; 16 valve||Common-rail Direct Injection. Exhaust VVT. JLR Ingenium AJ20D engine.&lt;br&gt; Land Rover Range Rover Velar ('18-'19)
|-
| U || 3.0L || I6 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 24 valve||48v Mild Hybrid. E-supercharger. Direct Injection. Dual VVT.  CVVL (Intake VVL).&lt;br&gt; JLR Ingenium AJ20P6/AJ300P engine.&lt;br&gt; Land Rover Discovery ('21-), Range Rover ('20-), Range Rover Sport (Mid '19-), Range Rover Velar ('21-), Defender ('20-).
|-
| V || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine. Land Rover Discovery ('17-'20),&lt;br&gt; Range Rover ('17-'19), Range Rover Sport ('17-Mid '19), Range Rover Velar ('18-'20).
|-
| X || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. CVVL (Intake VVL). JLR Ingenium AJ20P4/AJ200P engine.&lt;br&gt; Land Rover Discovery Sport ('18-), Range Rover Evoque ('18-), Range Rover Velar ('18-), Defender ('20-), Discovery ('21-).
|-
| Y || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas-Electric [[w:Plug-in hybrid|PHEV]] || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. CVVL (Intake VVL). JLR Ingenium AJ20P4/AJ200P engine + 1 Front motor.&lt;br&gt; 12.4 kWh Lithium-ion Battery Pack.&lt;br&gt; Land Rover Range Rover P400e ('20-'21), Range Rover Sport P400e ('20-Early '22).
|-
| 4 || 3.0L || I6 Turbo [[w:Intercooler|IC]] || Gas-Electric [[w:Plug-in hybrid|PHEV]] || DOHC,&lt;br /&gt; 24 valve||E-supercharger. Direct Injection. Dual VVT. CVVL (Intake VVL).&lt;br&gt; JLR Ingenium AJ20P6/AJ300P engine + 1 Front motor. 31.8 kWh Lithium-ion Battery Pack.&lt;br&gt; Land Rover Range Rover P440e ('23), P550e ('24-); Range Rover Sport P440e ('23), P460e ('25-), P550e ('24-).
|-
| 7 || 4.4L || V8 Twin Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 32 valve||Direct Injection. Dual VVT (Double VANOS). Valvetronic (Intake VVL). BMW N63B44T3 [N63TU3] engine [JLR NC10-P8H]. Land Rover Range Rover [L460] ('22-'23), Range Rover Sport ('23).
|-
| 9 || 4.4L || V8 Twin Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 32 valve||48v Mild Hybrid. Direct Injection. Dual VVT (Double VANOS). Valvetronic (Intake VVL). BMW S68B44TO [S68B44A] engine [JLR NC11-P8S]. Land Rover Range Rover [L460] ('24-), Range Rover Sport ('24-),&lt;br&gt; Defender Octa ('25-).
|-
|}
CVVL=Continuously Variable Valve Lift.

==Check Digit/Gearbox (Position 9)==
* USA /Canada [[Vehicle Identification Numbers (VIN codes)/Check digit|Check digit]]

==Model Year Code (Position 10)==
''See: [[Vehicle Identification Numbers (VIN codes)/Model year]]''

==Plant Codes (Position 11)==
* A - Solihull, West Midlands, England, UK
* H - Halewood, Merseyside, England, UK
* 2 - Nitra, Slovakia

==External links==
* [http://www.clifton.nl/calvin.html CalVIN, the on-line free Land Rover VIN CALculator]
* [http://www.fourfold.org/LR_FAQ Land Rover FAQ archive]
* [http://www.vindecoderz.com/EN/Land%20Rover Land Rover VIN decoder]


{{BookCat}}</text>
      <sha1>ch556przwe044mxr6k7z1rk6hce6xqm</sha1>
    </revision>
    <revision>
      <id>4671340</id>
      <parentid>4671339</parentid>
      <timestamp>2026-09-20T11:10:06Z</timestamp>
      <contributor>
        <username>JustTheFacts33</username>
        <id>3434282</id>
      </contributor>
      <comment>/* Engine Type (All models 2017-) */</comment>
      <origin>4671340</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="18839" sha1="by2tl9ge3ybxmfug0vhcg8kqw8kxicd" xml:space="preserve">{{Vehicle Identification Numbers (VIN codes)/Warning}}{{clear}}
From 1948 to the early eighties, Land Rover used for their cars chassis numbers of their own format. These formats are described in the table below. Since 1980 Land Rover deploys the standard 17-character Vehicle Identification Number ('''VIN'''), complying with international standards. 

Car details can be derived (decoded, calculated) from the chassis numbers and the VIN. Typically, the model (Defender, Discovery, Range Rover, Freelander), model type (station wagon, three/four door, etc), wheelbase (90 inch, 100 inch, 110 inch, etc.), engine, LHD/RHD, gearbox, and model year is included in the VIN. 

==Chassis number formats over the years==
&lt;table&gt;
&lt;tr&gt;&lt;th&gt;Description&lt;/th&gt;&lt;th&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/th&gt;&lt;th&gt;Format&lt;/th&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, International VIN, 1980-later&lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;SAL..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Int. VIN for LR do Brazil  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;93R..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Int. VIN for AAD, 1985-1995 &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;AAD..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, US/Canada VIN, 1987-later  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;SAL.................&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Brazil VIN for JLR Brazil, 2016-later  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;99J.................&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;14-characters: is actually the 17-char&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;VIN missing the SAL bit&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1955      &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;17.6.....&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1956 to 1961  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;1........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1950      &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;L........ or R........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1962 to 1979  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1948 to 1949  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.8......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1950 to 1953  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.6......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1954 to 1955  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.7......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;7-character numbers, 1948 to 1949  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;6-character numbers, ???? prototypes &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;110F..&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;3-character numbers, 1948 prototypes &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;R.. or L..&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;

==Land Rover WMIs (1981-) (Position 1-3)==

* SAL - Land Rover (UK &amp; Europe)
* 99J - JLR Brazil
* L2C - Chery Jaguar Land Rover (China)


==Model Line==

{| class=&quot;wikitable&quot;
|+Position 4
!VIN code
!Description
|-
|A
|[[w:Land Rover Discovery#Discovery 3 / LR3 (2004–2009)|Land Rover LR3]] ('05-'09)
|-
|A
|[[w:Land Rover Discovery#Discovery 4 / LR4 (2009–2016)|Land Rover LR4]] ('10-'16)
|-
|C
|[[w:Land Rover Discovery Sport|Land Rover Discovery Sport]] ('15-)
|-
|D
|[[w:Land Rover Defender#North American Specification (NAS) Defenders|Land Rover Defender]] ('93-'95, '97) 
|-
|E
|[[w:Land Rover Defender (L663)|Land Rover Defender (L663)]] ('20-)
|-
|F
|[[w:Land Rover Freelander#Freelander 2 (L359; 2006–2015)|Land Rover LR2]] ('08-'15)
|-
|G 
|[[w:Range Rover (L405)|Land Rover Range Rover (L405)]] (4th gen.) ('13-'22)
|-
|H 
|[[w:Range Rover Classic|Land Rover Range Rover/Range Rover Classic]] (1st gen.) ('87-'95)
|-
|J 
|[[w:Land Rover Discovery#First &amp; Second generation Discovery|Land Rover Discovery]] ('94-'98 &amp; '99 Discovery SD)
|-
|K 
|[[w:Range Rover (L460)|Land Rover Range Rover (L460)]] (5th gen.) ('23-)
|-
|M 
|[[w:Range Rover (L322)|Land Rover Range Rover (L322)]] (3rd gen.) ('03-'12)
|-
|N
|[[w:Land Rover Freelander#Freelander in North America|Land Rover Freelander]] ('02-'05)
|-
|P 
|[[w:Range Rover (P38A)|Land Rover Range Rover (P38A)]] (2nd gen.) ('95-'02)
|-
|R
|[[w:Land Rover Discovery#Fifth generation Discovery (L462; 2017–present)|Land Rover Discovery]] ('17-)
|-
|S 
|[[w:Range Rover Sport#First generation (L320; 2005)|Land Rover Range Rover Sport]] (1st gen.) ('06-'13)
|-
|T 
|[[w:Land Rover Discovery#Discovery Series II (L318; 1998–2004)|Land Rover Discovery Series II]] ('99-'04)
|-
|V 
|[[w:Range Rover Evoque#First generation (L538; 2011)|Land Rover Range Rover Evoque]] (1st gen.) ('12-'19)
|-
|W 
|[[w:Range Rover Sport#Second generation (L494; 2013)|Land Rover Range Rover Sport]] (2nd gen.) ('14-'22)
|-
|Y 
|[[w:Range Rover Velar|Land Rover Range Rover Velar]] (1st gen.) ('18-)
|-
|Z 
|[[w:Range Rover Evoque#Second generation (L551; 2018)|Land Rover Range Rover Evoque]] (2nd gen.) ('20-)
|-
|1 
|[[w:Range Rover Sport#Third generation (L461; 2022)|Land Rover Range Rover Sport]] (3rd gen.) ('23-)
|-
|}

==Model Series/GVWR==

{| class=&quot;wikitable&quot;
|+Position 5
!VIN code
!Series
!GVWR
|-
|V (following H)
|Range Rover 100&quot; wheelbase (1st gen.)
|Class E
|-
|E (following H)
|Range Rover 100&quot; wheelbase (CA emissions) (1st gen.) ('95)
|Class E
|-
|C (following H)
|Range Rover LWB 108&quot; wheelbase (1st gen.)
|Class E
|-
|F (following H)
|Range Rover LWB 108&quot; wheelbase (CA emissions) (1st gen.) ('95)
|Class E
|-
|H (following D)
|Defender 110 ('93)
|Class E
|-
|V (following D)
|Defender 90 ('94-'95, '97)
|Class E
|-
|X (following D)
|Defender 90 (CA emissions) ('95)
|Class E
|-
|Y (following J)
|Discovery ('94-'98 &amp; '99 Discovery SD)
|Class E
|-
|N (following J)
|Discovery (CA emissions) ('95-'96)
|Class E
|-
|Y (following T)
|Discovery Series II ('99-'00)
|Class E
|-
|V (following P)
|Range Rover (2nd gen.) ('95-'98)
|Class E
|-
|E (following P)
|Range Rover (2nd gen.) (CA emissions) ('95-'96)
|Class E
|-
|A (following P)
|Range Rover (2nd gen.) (GEMS engine management) (Early '99)
|Class E
|-
|V (following P)
|Range Rover (2nd gen.) (Bosch engine management) ('99-'00)
|Class E
|-
|C (following P)
|Range Rover 4.6 HSE Callaway Edition (2nd gen.) (Callaway-modified engine) ('99)
|Class E
|-
|}

==Model Series/Trim Level/GVWR==

{| class=&quot;wikitable&quot;
|+Position 5
!VIN code
!Series
!GVWR
|-
|M (following N)
|Freelander S ('02-'03)
|Class C
|-
|Y (following N)
|Freelander SE ('02-'05), SE3 ('03-'05)
|Class C
|-
|E (following N)
|Freelander HSE ('02-'04)
|Class C
|-
|L (following T)
|Discovery Series II SD ('01-'02), S ('03-'04)
|Class E
|-
|K (following T)
|Discovery Series II SD7 ('01-'02), S7 ('03-'04)
|Class E
|-
|Y (following T)
|Discovery Series II SE ('01-'04)
|Class E
|-
|W (following T)
|Discovery Series II SE7 ('01-'04)
|Class E
|-
|H (following T)
|Discovery Series II LE ('01)
|Class E
|-
|J (following T)
|Discovery Series II LE7 ('01)
|Class E
|-
|P (following T)
|Discovery Series II HSE ('03-'04)
|Class E
|-
|R (following T)
|Discovery Series II HSE7 ('03-'04)
|Class E
|-
|L (following P)
|Range Rover (2nd gen.) 4.6 SE ('01)
|Class E
|-
|M (following P)
|Range Rover (2nd gen.) 4.6 HSE ('01-'02), Westminster Edition ('02)
|Class E
|-
|H (following M)
|Range Rover (3rd gen.) Westminster Edition ('04-'05)
|Class E
|-
|}

==Body Type==
{| class=&quot;wikitable&quot;
|+Position 6
!VIN code
!Description
|-
|1
|4-door wagon (Range Rover '87-'12, Defender 110 '93, Discovery '94-'04)
|-
|1
|2-door soft top (Freelander SE3) ('03-'05)
|-
|1
|2-door wagon (Range Rover Evoque 2-d '12-'17)
|-
|2
|2-door soft top (Defender 90) ('94-'95, '97)
|-
|2
|4-door wagon (Freelander) ('02-'05)
|-
|2
|4-door wagon (LR2 '08-'15, Discovery Sport '15-, Range Rover Evoque 4-d '12-, LR3 '05-'09, LR4 '10-'16, Discovery '18-, Range Rover Sport '06-'22, Range Rover Sport P400e '20, Range Rover SWB (L405) '13-'22, Range Rover Velar '18-)
|-
|3
|2-door wagon (Defender 90) ('95, '97)
|-
|3
|4-door wagon LWB (Range Rover LWB '14-'16)
|-
|3
|4-door wagon LWB w/Class E GVWR (Range Rover SV Autobiography LWB '17)
|-
|4
|4-door wagon [[w:Plug-in hybrid|PHEV]] (Range Rover P400e '20-'21, Range Rover Sport P400e '21-Early '22)
|-
|5
|4-door wagon LWB w/Class F GVWR (Range Rover Supercharged LWB &amp; Autobiography LWB '17)
|-
|5
|4-door wagon LWB w/Class F GVWR (Range Rover LWB (L405) '18-'22)
|-
|5
|2-door convertible (Range Rover Evoque convertible '17-'19)
|-
|6
|2-door wagon (Defender 90 '21-)
|-
|7
|4-door wagon w/2 rows of seating (Defender 110 '20-)
|-
|9
|4-door wagon (Range Rover SWB (L460) '22-, Range Rover Sport '23-)
|-
|B
|4-door wagon (Discovery '17)
|-
|B
|4-door wagon LWB (Range Rover LWB (L460) '22-)
|-
|E
|4-door wagon w/3 rows of seating (Defender 110 '20-)
|-
|F
|4-door wagon w/extended length (Defender 130 '23-)
|}
SWB=Short-wheelbase, LWB=Long-wheelbase

==Engine Type (All Models 1987-2016 EXCEPT LR2, Discovery Sport, Range Rover Evoque)==

{| class=&quot;wikitable&quot;
|+Position 7
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| 1 || 3.5L || V8 || Gas ||OHV||MPI. [[w:Rover V8 engine|(Ex-GM) Rover V8 engine]]. Land Rover Range Rover ('87-'88).
|-
| 1 || 4.4L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Single VANOS (Intake VVT). BMW M62TUB44 engine. Land Rover Range Rover ('03-'05).
|-
| 2 || 3.9L || V8 || Gas ||OHV||MPI. (Ex-GM) Rover V8 engine.&lt;br&gt; Land Rover Range Rover SWB ('89-'94), Range Rover County Classic [SWB] ('95), Defender 110 ('93),&lt;br&gt; Defender 90 ('94-'95), Discovery ('94-'95).
|-
| 2 || 4.0L || V8 || Gas ||OHV||Sequential MPI. (3947 cc, actually 3.9L). (Ex-GM) Rover V8 engine. Land Rover Range Rover 4.0 SE ('95-'99),&lt;br&gt; Discovery ('96-'02), Defender 90 ('97).
|-
| 2 || 2.5L || 90° V6 || Gas ||DOHC,&lt;br /&gt; 24 valve||Sequential MPI. VIS. [[w:Rover KV6 engine|Rover KV6 engine]]. Land Rover Freelander ('02-'05).
|-
| 3 || 4.2L || V8 || Gas ||OHV||MPI. (4275 cc, actually 4.3L). (Ex-GM) Rover V8 engine. Land Rover Range Rover County LWB ('93-'95).
|-
| 3 || 4.2L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Jaguar AJ33S engine. Land Rover Range Rover ('06-'09), Range Rover Sport ('06-'09).
|-
| 4 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. Land Rover Range Rover 4.6 HSE ('96-'99), Discovery ('03).
|-
| 4 || 4.0L || 60° V6 || Gas ||SOHC,&lt;br /&gt; 12 valve||Sequential MPI. Variable intake manifold. Ford Cologne V6 engine.&lt;br&gt; Land Rover LR3 ('05-'07 &amp; also '08-'09 in Canada).
|-
| 5 || 4.0L || V8 || Gas ||OHV||Sequential MPI. (3947 cc, actually 3.9L). (Ex-GM) Rover V8 engine. LEV.&lt;br&gt; Land Rover Range Rover 4.0 SE ('00), Discovery ('00-'02).
|-
| 5 || 4.4L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Continuously VCP (Intake VVT). Jaguar AJ41 engine.&lt;br&gt; Land Rover LR3 ('05-'09), Range Rover ('06-'09), Range Rover Sport ('06-'09).
|-
| 6 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. LEV ('00-'02) or ULEV ('03).&lt;br&gt; Land Rover Range Rover 4.6 HSE ('00-'02), 4.6 SE ('01), Discovery ('03).
|-
| 9 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. Land Rover Discovery ('04).
|-
| D || 5.0L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). CPS (Intake VVL). VIS. Jaguar AJ133 engine (LR-V8).&lt;br&gt; Land Rover LR4 ('10-'13), Range Rover ('10-'13), Range Rover Sport ('10-'13).
|-
| E || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('10-'16), Range Rover Sport ('10-'16).
|-
| K || 3.0L || 60° V6 Turbo [[w:Intercooler|IC]] || Diesel ||DOHC,&lt;br /&gt; 24 valve||Common-rail Direct injection. Ford-PSA &quot;Lion&quot; AJD-V6 engine.&lt;br&gt; Land Rover Range Rover Td6 ('16), Range Rover Sport Td6 ('16).
|-
| P || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover Range Rover ('16), Range Rover Sport ('16).
|-
| T || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas/E85 ||DOHC,&lt;br /&gt; 32 valve||Flex Fuel. Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('14-'15), Range Rover Sport ('14-'15).
|-
| V || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover LR4 ('14-'16), Range Rover ('14-'16), Range Rover Sport ('14-'16).
|-
| W || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas/E85 ||DOHC,&lt;br /&gt; 24 valve||Flex Fuel. Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover Range Rover ('14), Range Rover Sport ('14).
|}
VVT=Variable Valve Timing. VCP=Variable Camshaft Phasing. VCT=Variable Camshaft Timing. VIS=Variable Intake System. LEV=Low Emissions Vehicle. ULEV=Ultra-Low Emissions Vehicle. CPS=Cam Profile Switching. VVL=Variable Valve Lift.

==Transmission Type (LR2, Discovery Sport, Range Rover Evoque only 2008-2016)==
{| class=&quot;wikitable&quot;
|+Position 7
!VIN code
!Description
|-
|4
|6-speed automatic (Aisin AWF21) (LR2 '08-'09)
|-
|B
|6-speed automatic (Aisin AWF21) (LR2 '10-'15, Range Rover Evoque '12-'13)
|-
|B
|9-speed automatic (ZF 9HP) (Discovery Sport '15-'16, Range Rover Evoque '14-'16)
|}

==Transmission Type (All models 2017-)==
{| class=&quot;wikitable&quot;
|+Position 7
!VIN code
!Description
|-
|B
|8-speed automatic (ZF 8HP) (Discovery '17)
|-
|B
|9-speed automatic (ZF 9HP) (Discovery Sport '17, Range Rover Evoque '17)
|-
|F
|8-speed automatic (ZF 8HP) (Range Rover '17, Range Rover Sport '17)
|}

==Transmission Type (All Models 1987-2016 EXCEPT LR2, Discovery Sport, Range Rover Evoque)==
{| class=&quot;wikitable&quot;
|+Position 8
!VIN code
!Description
|-
|2
|5-speed automatic [manual shift mode: Steptronic or CommandShift] (Jatco JF506E) (Freelander '02-'05)
|-
|4
|4-speed automatic (ZF 4HP22 or w/4.6L V8: 4HP24) (Range Rover '87-'02, Discovery '94-'04, Defender 90 '97)
|-
|4
|5-speed automatic (ZF 5HP24) (Range Rover '03-'05)
|-
|4
|6-speed automatic (ZF 6HP26X) (LR3 '05-'09, Range Rover '06-'09, Range Rover Sport '06-'09)
|-
|4
|6-speed automatic (ZF 6HP28X) (LR4 '10-'13, Range Rover '10-'12, Range Rover Sport '10-'13)
|-
|6
|8-speed automatic (ZF 8HP) (LR4 '14-'16)
|-
|8
|5-speed manual (Defender 110 '93, Defender 90 '94-'95, Discovery '94-'97)
|-
|F
|8-speed automatic (ZF 8HP) (Range Rover '13-'16, Range Rover Sport '14-'16)
|}
All are LHD (Left-hand drive).

==Engine Type (LR2, Discovery Sport, Range Rover Evoque only 2008-2016)==

{| class=&quot;wikitable&quot;
|+Position 8
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| G || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. Ford EcoBoost engine (Mazda L engine-based).&lt;br&gt; Land Rover LR2 ('13-'15), Discovery Sport ('15-'16), Range Rover Evoque ('12-'16).
|-
| N || 3.2L || I6 || Gas ||DOHC,&lt;br /&gt; 24 valve||MPI. VCT (Intake VVT). CPS (Intake VVL). VIS. [[w:Volvo SI6 engine#B6324S5|Volvo SI6 engine - B6324S5]]. Land Rover LR2 ('08-'12).
|-
|}
VCT=Variable Cam Timing. VVT=Variable Valve Timing. CPS=Cam Profile Switching. VVL=Variable Valve Lift. VIS=Variable Intake System.

==Engine Type (All models 2017-)==

{| class=&quot;wikitable&quot;
|+Position 8
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| E || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('17-'22), Range Rover Sport ('17-'22),&lt;br&gt; Range Rover Velar SVAutobiography Dynamic ('20), Defender V8 ('22-'26).
|-
| G || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. Ford EcoBoost engine (Mazda L engine-based).&lt;br&gt; Land Rover Discovery Sport ('17), Range Rover Evoque ('17).
|-
| K || 3.0L || 60° V6 Turbo [[w:Intercooler|IC]] || Diesel ||DOHC,&lt;br /&gt; 24 valve||Common-rail Direct injection. Ford-PSA &quot;Lion&quot; AJD-V6 engine.&lt;br&gt; Land Rover Discovery Td6 ('17-'20), Range Rover Td6 ('17-'21), Range Rover Sport Td6 ('17-'21).
|-
| N || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Diesel || DOHC,&lt;br /&gt; 16 valve||Common-rail Direct Injection. Exhaust VVT. JLR Ingenium AJ20D engine.&lt;br&gt; Land Rover Range Rover Velar ('18-'19)
|-
| U || 3.0L || I6 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 24 valve||48v Mild Hybrid. E-supercharger. Direct Injection. Dual VVT.  CVVL (Intake VVL).&lt;br&gt; JLR Ingenium AJ20P6/AJ300P engine.&lt;br&gt; Land Rover Discovery ('21-), Range Rover ('20-), Range Rover Sport (Mid '19-), Range Rover Velar ('21-), Defender ('20-).
|-
| V || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine. Land Rover Discovery ('17-'20),&lt;br&gt; Range Rover ('17-'19), Range Rover Sport ('17-Mid '19), Range Rover Velar ('18-'20).
|-
| X || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. CVVL (Intake VVL). JLR Ingenium AJ20P4/AJ200P engine.&lt;br&gt; Land Rover Discovery Sport ('18-), Range Rover Evoque ('18-), Range Rover Velar ('18-), Defender ('20-'26), Discovery ('21-).
|-
| Y || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas-Electric [[w:Plug-in hybrid|PHEV]] || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. CVVL (Intake VVL). JLR Ingenium AJ20P4/AJ200P engine + 1 Front motor.&lt;br&gt; 12.4 kWh Lithium-ion Battery Pack.&lt;br&gt; Land Rover Range Rover P400e ('20-'21), Range Rover Sport P400e ('20-Early '22).
|-
| 4 || 3.0L || I6 Turbo [[w:Intercooler|IC]] || Gas-Electric [[w:Plug-in hybrid|PHEV]] || DOHC,&lt;br /&gt; 24 valve||E-supercharger. Direct Injection. Dual VVT. CVVL (Intake VVL).&lt;br&gt; JLR Ingenium AJ20P6/AJ300P engine + 1 Front motor. 31.8 kWh Lithium-ion Battery Pack.&lt;br&gt; Land Rover Range Rover P440e ('23), P550e ('24-); Range Rover Sport P440e ('23), P460e ('25-), P550e ('24-).
|-
| 7 || 4.4L || V8 Twin Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 32 valve||Direct Injection. Dual VVT (Double VANOS). Valvetronic (Intake VVL). BMW N63B44T3 [N63TU3] engine [JLR NC10-P8H]. Land Rover Range Rover [L460] ('22-'23), Range Rover Sport ('23).
|-
| 9 || 4.4L || V8 Twin Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 32 valve||48v Mild Hybrid. Direct Injection. Dual VVT (Double VANOS). Valvetronic (Intake VVL). BMW S68B44TO [S68B44A] engine [JLR NC11-P8S]. Land Rover Range Rover [L460] ('24-), Range Rover Sport ('24-),&lt;br&gt; Defender Octa ('25-).
|-
|}
CVVL=Continuously Variable Valve Lift.

==Check Digit/Gearbox (Position 9)==
* USA /Canada [[Vehicle Identification Numbers (VIN codes)/Check digit|Check digit]]

==Model Year Code (Position 10)==
''See: [[Vehicle Identification Numbers (VIN codes)/Model year]]''

==Plant Codes (Position 11)==
* A - Solihull, West Midlands, England, UK
* H - Halewood, Merseyside, England, UK
* 2 - Nitra, Slovakia

==External links==
* [http://www.clifton.nl/calvin.html CalVIN, the on-line free Land Rover VIN CALculator]
* [http://www.fourfold.org/LR_FAQ Land Rover FAQ archive]
* [http://www.vindecoderz.com/EN/Land%20Rover Land Rover VIN decoder]


{{BookCat}}</text>
      <sha1>by2tl9ge3ybxmfug0vhcg8kqw8kxicd</sha1>
    </revision>
    <revision>
      <id>4671342</id>
      <parentid>4671340</parentid>
      <timestamp>2026-09-20T11:20:00Z</timestamp>
      <contributor>
        <username>JustTheFacts33</username>
        <id>3434282</id>
      </contributor>
      <comment>/* Model Line */</comment>
      <origin>4671342</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="18842" sha1="97bmg70fb0nlrj12goip8jqbrkptbyf" xml:space="preserve">{{Vehicle Identification Numbers (VIN codes)/Warning}}{{clear}}
From 1948 to the early eighties, Land Rover used for their cars chassis numbers of their own format. These formats are described in the table below. Since 1980 Land Rover deploys the standard 17-character Vehicle Identification Number ('''VIN'''), complying with international standards. 

Car details can be derived (decoded, calculated) from the chassis numbers and the VIN. Typically, the model (Defender, Discovery, Range Rover, Freelander), model type (station wagon, three/four door, etc), wheelbase (90 inch, 100 inch, 110 inch, etc.), engine, LHD/RHD, gearbox, and model year is included in the VIN. 

==Chassis number formats over the years==
&lt;table&gt;
&lt;tr&gt;&lt;th&gt;Description&lt;/th&gt;&lt;th&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/th&gt;&lt;th&gt;Format&lt;/th&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, International VIN, 1980-later&lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;SAL..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Int. VIN for LR do Brazil  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;93R..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Int. VIN for AAD, 1985-1995 &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;AAD..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, US/Canada VIN, 1987-later  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;SAL.................&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Brazil VIN for JLR Brazil, 2016-later  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;99J.................&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;14-characters: is actually the 17-char&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;VIN missing the SAL bit&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1955      &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;17.6.....&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1956 to 1961  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;1........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1950      &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;L........ or R........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1962 to 1979  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1948 to 1949  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.8......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1950 to 1953  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.6......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1954 to 1955  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.7......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;7-character numbers, 1948 to 1949  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;6-character numbers, ???? prototypes &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;110F..&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;3-character numbers, 1948 prototypes &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;R.. or L..&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;

==Land Rover WMIs (1981-) (Position 1-3)==

* SAL - Land Rover (UK &amp; Europe)
* 99J - JLR Brazil
* L2C - Chery Jaguar Land Rover (China)


==Model Line==

{| class=&quot;wikitable&quot;
|+Position 4
!VIN code
!Description
|-
|A
|[[w:Land Rover Discovery#Discovery 3 / LR3 (2004–2009)|Land Rover LR3]] ('05-'09)
|-
|A
|[[w:Land Rover Discovery#Discovery 4 / LR4 (2009–2016)|Land Rover LR4]] ('10-'16)
|-
|C
|[[w:Land Rover Discovery Sport|Land Rover Discovery Sport]] ('15-'26)
|-
|D
|[[w:Land Rover Defender#North American Specification (NAS) Defenders|Land Rover Defender]] ('93-'95, '97) 
|-
|E
|[[w:Land Rover Defender (L663)|Land Rover Defender (L663)]] ('20-)
|-
|F
|[[w:Land Rover Freelander#Freelander 2 (L359; 2006–2015)|Land Rover LR2]] ('08-'15)
|-
|G 
|[[w:Range Rover (L405)|Land Rover Range Rover (L405)]] (4th gen.) ('13-'22)
|-
|H 
|[[w:Range Rover Classic|Land Rover Range Rover/Range Rover Classic]] (1st gen.) ('87-'95)
|-
|J 
|[[w:Land Rover Discovery#First &amp; Second generation Discovery|Land Rover Discovery]] ('94-'98 &amp; '99 Discovery SD)
|-
|K 
|[[w:Range Rover (L460)|Land Rover Range Rover (L460)]] (5th gen.) ('23-)
|-
|M 
|[[w:Range Rover (L322)|Land Rover Range Rover (L322)]] (3rd gen.) ('03-'12)
|-
|N
|[[w:Land Rover Freelander#Freelander in North America|Land Rover Freelander]] ('02-'05)
|-
|P 
|[[w:Range Rover (P38A)|Land Rover Range Rover (P38A)]] (2nd gen.) ('95-'02)
|-
|R
|[[w:Land Rover Discovery#Fifth generation Discovery (L462; 2017–present)|Land Rover Discovery]] ('17-)
|-
|S 
|[[w:Range Rover Sport#First generation (L320; 2005)|Land Rover Range Rover Sport]] (1st gen.) ('06-'13)
|-
|T 
|[[w:Land Rover Discovery#Discovery Series II (L318; 1998–2004)|Land Rover Discovery Series II]] ('99-'04)
|-
|V 
|[[w:Range Rover Evoque#First generation (L538; 2011)|Land Rover Range Rover Evoque]] (1st gen.) ('12-'19)
|-
|W 
|[[w:Range Rover Sport#Second generation (L494; 2013)|Land Rover Range Rover Sport]] (2nd gen.) ('14-'22)
|-
|Y 
|[[w:Range Rover Velar|Land Rover Range Rover Velar]] (1st gen.) ('18-)
|-
|Z 
|[[w:Range Rover Evoque#Second generation (L551; 2018)|Land Rover Range Rover Evoque]] (2nd gen.) ('20-)
|-
|1 
|[[w:Range Rover Sport#Third generation (L461; 2022)|Land Rover Range Rover Sport]] (3rd gen.) ('23-)
|-
|}

==Model Series/GVWR==

{| class=&quot;wikitable&quot;
|+Position 5
!VIN code
!Series
!GVWR
|-
|V (following H)
|Range Rover 100&quot; wheelbase (1st gen.)
|Class E
|-
|E (following H)
|Range Rover 100&quot; wheelbase (CA emissions) (1st gen.) ('95)
|Class E
|-
|C (following H)
|Range Rover LWB 108&quot; wheelbase (1st gen.)
|Class E
|-
|F (following H)
|Range Rover LWB 108&quot; wheelbase (CA emissions) (1st gen.) ('95)
|Class E
|-
|H (following D)
|Defender 110 ('93)
|Class E
|-
|V (following D)
|Defender 90 ('94-'95, '97)
|Class E
|-
|X (following D)
|Defender 90 (CA emissions) ('95)
|Class E
|-
|Y (following J)
|Discovery ('94-'98 &amp; '99 Discovery SD)
|Class E
|-
|N (following J)
|Discovery (CA emissions) ('95-'96)
|Class E
|-
|Y (following T)
|Discovery Series II ('99-'00)
|Class E
|-
|V (following P)
|Range Rover (2nd gen.) ('95-'98)
|Class E
|-
|E (following P)
|Range Rover (2nd gen.) (CA emissions) ('95-'96)
|Class E
|-
|A (following P)
|Range Rover (2nd gen.) (GEMS engine management) (Early '99)
|Class E
|-
|V (following P)
|Range Rover (2nd gen.) (Bosch engine management) ('99-'00)
|Class E
|-
|C (following P)
|Range Rover 4.6 HSE Callaway Edition (2nd gen.) (Callaway-modified engine) ('99)
|Class E
|-
|}

==Model Series/Trim Level/GVWR==

{| class=&quot;wikitable&quot;
|+Position 5
!VIN code
!Series
!GVWR
|-
|M (following N)
|Freelander S ('02-'03)
|Class C
|-
|Y (following N)
|Freelander SE ('02-'05), SE3 ('03-'05)
|Class C
|-
|E (following N)
|Freelander HSE ('02-'04)
|Class C
|-
|L (following T)
|Discovery Series II SD ('01-'02), S ('03-'04)
|Class E
|-
|K (following T)
|Discovery Series II SD7 ('01-'02), S7 ('03-'04)
|Class E
|-
|Y (following T)
|Discovery Series II SE ('01-'04)
|Class E
|-
|W (following T)
|Discovery Series II SE7 ('01-'04)
|Class E
|-
|H (following T)
|Discovery Series II LE ('01)
|Class E
|-
|J (following T)
|Discovery Series II LE7 ('01)
|Class E
|-
|P (following T)
|Discovery Series II HSE ('03-'04)
|Class E
|-
|R (following T)
|Discovery Series II HSE7 ('03-'04)
|Class E
|-
|L (following P)
|Range Rover (2nd gen.) 4.6 SE ('01)
|Class E
|-
|M (following P)
|Range Rover (2nd gen.) 4.6 HSE ('01-'02), Westminster Edition ('02)
|Class E
|-
|H (following M)
|Range Rover (3rd gen.) Westminster Edition ('04-'05)
|Class E
|-
|}

==Body Type==
{| class=&quot;wikitable&quot;
|+Position 6
!VIN code
!Description
|-
|1
|4-door wagon (Range Rover '87-'12, Defender 110 '93, Discovery '94-'04)
|-
|1
|2-door soft top (Freelander SE3) ('03-'05)
|-
|1
|2-door wagon (Range Rover Evoque 2-d '12-'17)
|-
|2
|2-door soft top (Defender 90) ('94-'95, '97)
|-
|2
|4-door wagon (Freelander) ('02-'05)
|-
|2
|4-door wagon (LR2 '08-'15, Discovery Sport '15-, Range Rover Evoque 4-d '12-, LR3 '05-'09, LR4 '10-'16, Discovery '18-, Range Rover Sport '06-'22, Range Rover Sport P400e '20, Range Rover SWB (L405) '13-'22, Range Rover Velar '18-)
|-
|3
|2-door wagon (Defender 90) ('95, '97)
|-
|3
|4-door wagon LWB (Range Rover LWB '14-'16)
|-
|3
|4-door wagon LWB w/Class E GVWR (Range Rover SV Autobiography LWB '17)
|-
|4
|4-door wagon [[w:Plug-in hybrid|PHEV]] (Range Rover P400e '20-'21, Range Rover Sport P400e '21-Early '22)
|-
|5
|4-door wagon LWB w/Class F GVWR (Range Rover Supercharged LWB &amp; Autobiography LWB '17)
|-
|5
|4-door wagon LWB w/Class F GVWR (Range Rover LWB (L405) '18-'22)
|-
|5
|2-door convertible (Range Rover Evoque convertible '17-'19)
|-
|6
|2-door wagon (Defender 90 '21-)
|-
|7
|4-door wagon w/2 rows of seating (Defender 110 '20-)
|-
|9
|4-door wagon (Range Rover SWB (L460) '22-, Range Rover Sport '23-)
|-
|B
|4-door wagon (Discovery '17)
|-
|B
|4-door wagon LWB (Range Rover LWB (L460) '22-)
|-
|E
|4-door wagon w/3 rows of seating (Defender 110 '20-)
|-
|F
|4-door wagon w/extended length (Defender 130 '23-)
|}
SWB=Short-wheelbase, LWB=Long-wheelbase

==Engine Type (All Models 1987-2016 EXCEPT LR2, Discovery Sport, Range Rover Evoque)==

{| class=&quot;wikitable&quot;
|+Position 7
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| 1 || 3.5L || V8 || Gas ||OHV||MPI. [[w:Rover V8 engine|(Ex-GM) Rover V8 engine]]. Land Rover Range Rover ('87-'88).
|-
| 1 || 4.4L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Single VANOS (Intake VVT). BMW M62TUB44 engine. Land Rover Range Rover ('03-'05).
|-
| 2 || 3.9L || V8 || Gas ||OHV||MPI. (Ex-GM) Rover V8 engine.&lt;br&gt; Land Rover Range Rover SWB ('89-'94), Range Rover County Classic [SWB] ('95), Defender 110 ('93),&lt;br&gt; Defender 90 ('94-'95), Discovery ('94-'95).
|-
| 2 || 4.0L || V8 || Gas ||OHV||Sequential MPI. (3947 cc, actually 3.9L). (Ex-GM) Rover V8 engine. Land Rover Range Rover 4.0 SE ('95-'99),&lt;br&gt; Discovery ('96-'02), Defender 90 ('97).
|-
| 2 || 2.5L || 90° V6 || Gas ||DOHC,&lt;br /&gt; 24 valve||Sequential MPI. VIS. [[w:Rover KV6 engine|Rover KV6 engine]]. Land Rover Freelander ('02-'05).
|-
| 3 || 4.2L || V8 || Gas ||OHV||MPI. (4275 cc, actually 4.3L). (Ex-GM) Rover V8 engine. Land Rover Range Rover County LWB ('93-'95).
|-
| 3 || 4.2L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Jaguar AJ33S engine. Land Rover Range Rover ('06-'09), Range Rover Sport ('06-'09).
|-
| 4 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. Land Rover Range Rover 4.6 HSE ('96-'99), Discovery ('03).
|-
| 4 || 4.0L || 60° V6 || Gas ||SOHC,&lt;br /&gt; 12 valve||Sequential MPI. Variable intake manifold. Ford Cologne V6 engine.&lt;br&gt; Land Rover LR3 ('05-'07 &amp; also '08-'09 in Canada).
|-
| 5 || 4.0L || V8 || Gas ||OHV||Sequential MPI. (3947 cc, actually 3.9L). (Ex-GM) Rover V8 engine. LEV.&lt;br&gt; Land Rover Range Rover 4.0 SE ('00), Discovery ('00-'02).
|-
| 5 || 4.4L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Continuously VCP (Intake VVT). Jaguar AJ41 engine.&lt;br&gt; Land Rover LR3 ('05-'09), Range Rover ('06-'09), Range Rover Sport ('06-'09).
|-
| 6 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. LEV ('00-'02) or ULEV ('03).&lt;br&gt; Land Rover Range Rover 4.6 HSE ('00-'02), 4.6 SE ('01), Discovery ('03).
|-
| 9 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. Land Rover Discovery ('04).
|-
| D || 5.0L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). CPS (Intake VVL). VIS. Jaguar AJ133 engine (LR-V8).&lt;br&gt; Land Rover LR4 ('10-'13), Range Rover ('10-'13), Range Rover Sport ('10-'13).
|-
| E || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('10-'16), Range Rover Sport ('10-'16).
|-
| K || 3.0L || 60° V6 Turbo [[w:Intercooler|IC]] || Diesel ||DOHC,&lt;br /&gt; 24 valve||Common-rail Direct injection. Ford-PSA &quot;Lion&quot; AJD-V6 engine.&lt;br&gt; Land Rover Range Rover Td6 ('16), Range Rover Sport Td6 ('16).
|-
| P || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover Range Rover ('16), Range Rover Sport ('16).
|-
| T || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas/E85 ||DOHC,&lt;br /&gt; 32 valve||Flex Fuel. Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('14-'15), Range Rover Sport ('14-'15).
|-
| V || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover LR4 ('14-'16), Range Rover ('14-'16), Range Rover Sport ('14-'16).
|-
| W || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas/E85 ||DOHC,&lt;br /&gt; 24 valve||Flex Fuel. Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover Range Rover ('14), Range Rover Sport ('14).
|}
VVT=Variable Valve Timing. VCP=Variable Camshaft Phasing. VCT=Variable Camshaft Timing. VIS=Variable Intake System. LEV=Low Emissions Vehicle. ULEV=Ultra-Low Emissions Vehicle. CPS=Cam Profile Switching. VVL=Variable Valve Lift.

==Transmission Type (LR2, Discovery Sport, Range Rover Evoque only 2008-2016)==
{| class=&quot;wikitable&quot;
|+Position 7
!VIN code
!Description
|-
|4
|6-speed automatic (Aisin AWF21) (LR2 '08-'09)
|-
|B
|6-speed automatic (Aisin AWF21) (LR2 '10-'15, Range Rover Evoque '12-'13)
|-
|B
|9-speed automatic (ZF 9HP) (Discovery Sport '15-'16, Range Rover Evoque '14-'16)
|}

==Transmission Type (All models 2017-)==
{| class=&quot;wikitable&quot;
|+Position 7
!VIN code
!Description
|-
|B
|8-speed automatic (ZF 8HP) (Discovery '17)
|-
|B
|9-speed automatic (ZF 9HP) (Discovery Sport '17, Range Rover Evoque '17)
|-
|F
|8-speed automatic (ZF 8HP) (Range Rover '17, Range Rover Sport '17)
|}

==Transmission Type (All Models 1987-2016 EXCEPT LR2, Discovery Sport, Range Rover Evoque)==
{| class=&quot;wikitable&quot;
|+Position 8
!VIN code
!Description
|-
|2
|5-speed automatic [manual shift mode: Steptronic or CommandShift] (Jatco JF506E) (Freelander '02-'05)
|-
|4
|4-speed automatic (ZF 4HP22 or w/4.6L V8: 4HP24) (Range Rover '87-'02, Discovery '94-'04, Defender 90 '97)
|-
|4
|5-speed automatic (ZF 5HP24) (Range Rover '03-'05)
|-
|4
|6-speed automatic (ZF 6HP26X) (LR3 '05-'09, Range Rover '06-'09, Range Rover Sport '06-'09)
|-
|4
|6-speed automatic (ZF 6HP28X) (LR4 '10-'13, Range Rover '10-'12, Range Rover Sport '10-'13)
|-
|6
|8-speed automatic (ZF 8HP) (LR4 '14-'16)
|-
|8
|5-speed manual (Defender 110 '93, Defender 90 '94-'95, Discovery '94-'97)
|-
|F
|8-speed automatic (ZF 8HP) (Range Rover '13-'16, Range Rover Sport '14-'16)
|}
All are LHD (Left-hand drive).

==Engine Type (LR2, Discovery Sport, Range Rover Evoque only 2008-2016)==

{| class=&quot;wikitable&quot;
|+Position 8
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| G || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. Ford EcoBoost engine (Mazda L engine-based).&lt;br&gt; Land Rover LR2 ('13-'15), Discovery Sport ('15-'16), Range Rover Evoque ('12-'16).
|-
| N || 3.2L || I6 || Gas ||DOHC,&lt;br /&gt; 24 valve||MPI. VCT (Intake VVT). CPS (Intake VVL). VIS. [[w:Volvo SI6 engine#B6324S5|Volvo SI6 engine - B6324S5]]. Land Rover LR2 ('08-'12).
|-
|}
VCT=Variable Cam Timing. VVT=Variable Valve Timing. CPS=Cam Profile Switching. VVL=Variable Valve Lift. VIS=Variable Intake System.

==Engine Type (All models 2017-)==

{| class=&quot;wikitable&quot;
|+Position 8
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| E || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('17-'22), Range Rover Sport ('17-'22),&lt;br&gt; Range Rover Velar SVAutobiography Dynamic ('20), Defender V8 ('22-'26).
|-
| G || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. Ford EcoBoost engine (Mazda L engine-based).&lt;br&gt; Land Rover Discovery Sport ('17), Range Rover Evoque ('17).
|-
| K || 3.0L || 60° V6 Turbo [[w:Intercooler|IC]] || Diesel ||DOHC,&lt;br /&gt; 24 valve||Common-rail Direct injection. Ford-PSA &quot;Lion&quot; AJD-V6 engine.&lt;br&gt; Land Rover Discovery Td6 ('17-'20), Range Rover Td6 ('17-'21), Range Rover Sport Td6 ('17-'21).
|-
| N || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Diesel || DOHC,&lt;br /&gt; 16 valve||Common-rail Direct Injection. Exhaust VVT. JLR Ingenium AJ20D engine.&lt;br&gt; Land Rover Range Rover Velar ('18-'19)
|-
| U || 3.0L || I6 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 24 valve||48v Mild Hybrid. E-supercharger. Direct Injection. Dual VVT.  CVVL (Intake VVL).&lt;br&gt; JLR Ingenium AJ20P6/AJ300P engine.&lt;br&gt; Land Rover Discovery ('21-), Range Rover ('20-), Range Rover Sport (Mid '19-), Range Rover Velar ('21-), Defender ('20-).
|-
| V || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine. Land Rover Discovery ('17-'20),&lt;br&gt; Range Rover ('17-'19), Range Rover Sport ('17-Mid '19), Range Rover Velar ('18-'20).
|-
| X || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. CVVL (Intake VVL). JLR Ingenium AJ20P4/AJ200P engine.&lt;br&gt; Land Rover Discovery Sport ('18-), Range Rover Evoque ('18-), Range Rover Velar ('18-), Defender ('20-'26), Discovery ('21-).
|-
| Y || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas-Electric [[w:Plug-in hybrid|PHEV]] || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. CVVL (Intake VVL). JLR Ingenium AJ20P4/AJ200P engine + 1 Front motor.&lt;br&gt; 12.4 kWh Lithium-ion Battery Pack.&lt;br&gt; Land Rover Range Rover P400e ('20-'21), Range Rover Sport P400e ('20-Early '22).
|-
| 4 || 3.0L || I6 Turbo [[w:Intercooler|IC]] || Gas-Electric [[w:Plug-in hybrid|PHEV]] || DOHC,&lt;br /&gt; 24 valve||E-supercharger. Direct Injection. Dual VVT. CVVL (Intake VVL).&lt;br&gt; JLR Ingenium AJ20P6/AJ300P engine + 1 Front motor. 31.8 kWh Lithium-ion Battery Pack.&lt;br&gt; Land Rover Range Rover P440e ('23), P550e ('24-); Range Rover Sport P440e ('23), P460e ('25-), P550e ('24-).
|-
| 7 || 4.4L || V8 Twin Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 32 valve||Direct Injection. Dual VVT (Double VANOS). Valvetronic (Intake VVL). BMW N63B44T3 [N63TU3] engine [JLR NC10-P8H]. Land Rover Range Rover [L460] ('22-'23), Range Rover Sport ('23).
|-
| 9 || 4.4L || V8 Twin Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 32 valve||48v Mild Hybrid. Direct Injection. Dual VVT (Double VANOS). Valvetronic (Intake VVL). BMW S68B44TO [S68B44A] engine [JLR NC11-P8S]. Land Rover Range Rover [L460] ('24-), Range Rover Sport ('24-),&lt;br&gt; Defender Octa ('25-).
|-
|}
CVVL=Continuously Variable Valve Lift.

==Check Digit/Gearbox (Position 9)==
* USA /Canada [[Vehicle Identification Numbers (VIN codes)/Check digit|Check digit]]

==Model Year Code (Position 10)==
''See: [[Vehicle Identification Numbers (VIN codes)/Model year]]''

==Plant Codes (Position 11)==
* A - Solihull, West Midlands, England, UK
* H - Halewood, Merseyside, England, UK
* 2 - Nitra, Slovakia

==External links==
* [http://www.clifton.nl/calvin.html CalVIN, the on-line free Land Rover VIN CALculator]
* [http://www.fourfold.org/LR_FAQ Land Rover FAQ archive]
* [http://www.vindecoderz.com/EN/Land%20Rover Land Rover VIN decoder]


{{BookCat}}</text>
      <sha1>97bmg70fb0nlrj12goip8jqbrkptbyf</sha1>
    </revision>
    <revision>
      <id>4671343</id>
      <parentid>4671342</parentid>
      <timestamp>2026-09-20T11:20:35Z</timestamp>
      <contributor>
        <username>JustTheFacts33</username>
        <id>3434282</id>
      </contributor>
      <comment>/* Body Type */</comment>
      <origin>4671343</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="18845" sha1="nhzxi5onuwqp55bgcakezv4iatg2h48" xml:space="preserve">{{Vehicle Identification Numbers (VIN codes)/Warning}}{{clear}}
From 1948 to the early eighties, Land Rover used for their cars chassis numbers of their own format. These formats are described in the table below. Since 1980 Land Rover deploys the standard 17-character Vehicle Identification Number ('''VIN'''), complying with international standards. 

Car details can be derived (decoded, calculated) from the chassis numbers and the VIN. Typically, the model (Defender, Discovery, Range Rover, Freelander), model type (station wagon, three/four door, etc), wheelbase (90 inch, 100 inch, 110 inch, etc.), engine, LHD/RHD, gearbox, and model year is included in the VIN. 

==Chassis number formats over the years==
&lt;table&gt;
&lt;tr&gt;&lt;th&gt;Description&lt;/th&gt;&lt;th&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/th&gt;&lt;th&gt;Format&lt;/th&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, International VIN, 1980-later&lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;SAL..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Int. VIN for LR do Brazil  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;93R..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Int. VIN for AAD, 1985-1995 &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;AAD..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, US/Canada VIN, 1987-later  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;SAL.................&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Brazil VIN for JLR Brazil, 2016-later  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;99J.................&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;14-characters: is actually the 17-char&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;VIN missing the SAL bit&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1955      &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;17.6.....&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1956 to 1961  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;1........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1950      &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;L........ or R........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1962 to 1979  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1948 to 1949  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.8......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1950 to 1953  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.6......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1954 to 1955  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.7......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;7-character numbers, 1948 to 1949  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;6-character numbers, ???? prototypes &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;110F..&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;3-character numbers, 1948 prototypes &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;R.. or L..&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;

==Land Rover WMIs (1981-) (Position 1-3)==

* SAL - Land Rover (UK &amp; Europe)
* 99J - JLR Brazil
* L2C - Chery Jaguar Land Rover (China)


==Model Line==

{| class=&quot;wikitable&quot;
|+Position 4
!VIN code
!Description
|-
|A
|[[w:Land Rover Discovery#Discovery 3 / LR3 (2004–2009)|Land Rover LR3]] ('05-'09)
|-
|A
|[[w:Land Rover Discovery#Discovery 4 / LR4 (2009–2016)|Land Rover LR4]] ('10-'16)
|-
|C
|[[w:Land Rover Discovery Sport|Land Rover Discovery Sport]] ('15-'26)
|-
|D
|[[w:Land Rover Defender#North American Specification (NAS) Defenders|Land Rover Defender]] ('93-'95, '97) 
|-
|E
|[[w:Land Rover Defender (L663)|Land Rover Defender (L663)]] ('20-)
|-
|F
|[[w:Land Rover Freelander#Freelander 2 (L359; 2006–2015)|Land Rover LR2]] ('08-'15)
|-
|G 
|[[w:Range Rover (L405)|Land Rover Range Rover (L405)]] (4th gen.) ('13-'22)
|-
|H 
|[[w:Range Rover Classic|Land Rover Range Rover/Range Rover Classic]] (1st gen.) ('87-'95)
|-
|J 
|[[w:Land Rover Discovery#First &amp; Second generation Discovery|Land Rover Discovery]] ('94-'98 &amp; '99 Discovery SD)
|-
|K 
|[[w:Range Rover (L460)|Land Rover Range Rover (L460)]] (5th gen.) ('23-)
|-
|M 
|[[w:Range Rover (L322)|Land Rover Range Rover (L322)]] (3rd gen.) ('03-'12)
|-
|N
|[[w:Land Rover Freelander#Freelander in North America|Land Rover Freelander]] ('02-'05)
|-
|P 
|[[w:Range Rover (P38A)|Land Rover Range Rover (P38A)]] (2nd gen.) ('95-'02)
|-
|R
|[[w:Land Rover Discovery#Fifth generation Discovery (L462; 2017–present)|Land Rover Discovery]] ('17-)
|-
|S 
|[[w:Range Rover Sport#First generation (L320; 2005)|Land Rover Range Rover Sport]] (1st gen.) ('06-'13)
|-
|T 
|[[w:Land Rover Discovery#Discovery Series II (L318; 1998–2004)|Land Rover Discovery Series II]] ('99-'04)
|-
|V 
|[[w:Range Rover Evoque#First generation (L538; 2011)|Land Rover Range Rover Evoque]] (1st gen.) ('12-'19)
|-
|W 
|[[w:Range Rover Sport#Second generation (L494; 2013)|Land Rover Range Rover Sport]] (2nd gen.) ('14-'22)
|-
|Y 
|[[w:Range Rover Velar|Land Rover Range Rover Velar]] (1st gen.) ('18-)
|-
|Z 
|[[w:Range Rover Evoque#Second generation (L551; 2018)|Land Rover Range Rover Evoque]] (2nd gen.) ('20-)
|-
|1 
|[[w:Range Rover Sport#Third generation (L461; 2022)|Land Rover Range Rover Sport]] (3rd gen.) ('23-)
|-
|}

==Model Series/GVWR==

{| class=&quot;wikitable&quot;
|+Position 5
!VIN code
!Series
!GVWR
|-
|V (following H)
|Range Rover 100&quot; wheelbase (1st gen.)
|Class E
|-
|E (following H)
|Range Rover 100&quot; wheelbase (CA emissions) (1st gen.) ('95)
|Class E
|-
|C (following H)
|Range Rover LWB 108&quot; wheelbase (1st gen.)
|Class E
|-
|F (following H)
|Range Rover LWB 108&quot; wheelbase (CA emissions) (1st gen.) ('95)
|Class E
|-
|H (following D)
|Defender 110 ('93)
|Class E
|-
|V (following D)
|Defender 90 ('94-'95, '97)
|Class E
|-
|X (following D)
|Defender 90 (CA emissions) ('95)
|Class E
|-
|Y (following J)
|Discovery ('94-'98 &amp; '99 Discovery SD)
|Class E
|-
|N (following J)
|Discovery (CA emissions) ('95-'96)
|Class E
|-
|Y (following T)
|Discovery Series II ('99-'00)
|Class E
|-
|V (following P)
|Range Rover (2nd gen.) ('95-'98)
|Class E
|-
|E (following P)
|Range Rover (2nd gen.) (CA emissions) ('95-'96)
|Class E
|-
|A (following P)
|Range Rover (2nd gen.) (GEMS engine management) (Early '99)
|Class E
|-
|V (following P)
|Range Rover (2nd gen.) (Bosch engine management) ('99-'00)
|Class E
|-
|C (following P)
|Range Rover 4.6 HSE Callaway Edition (2nd gen.) (Callaway-modified engine) ('99)
|Class E
|-
|}

==Model Series/Trim Level/GVWR==

{| class=&quot;wikitable&quot;
|+Position 5
!VIN code
!Series
!GVWR
|-
|M (following N)
|Freelander S ('02-'03)
|Class C
|-
|Y (following N)
|Freelander SE ('02-'05), SE3 ('03-'05)
|Class C
|-
|E (following N)
|Freelander HSE ('02-'04)
|Class C
|-
|L (following T)
|Discovery Series II SD ('01-'02), S ('03-'04)
|Class E
|-
|K (following T)
|Discovery Series II SD7 ('01-'02), S7 ('03-'04)
|Class E
|-
|Y (following T)
|Discovery Series II SE ('01-'04)
|Class E
|-
|W (following T)
|Discovery Series II SE7 ('01-'04)
|Class E
|-
|H (following T)
|Discovery Series II LE ('01)
|Class E
|-
|J (following T)
|Discovery Series II LE7 ('01)
|Class E
|-
|P (following T)
|Discovery Series II HSE ('03-'04)
|Class E
|-
|R (following T)
|Discovery Series II HSE7 ('03-'04)
|Class E
|-
|L (following P)
|Range Rover (2nd gen.) 4.6 SE ('01)
|Class E
|-
|M (following P)
|Range Rover (2nd gen.) 4.6 HSE ('01-'02), Westminster Edition ('02)
|Class E
|-
|H (following M)
|Range Rover (3rd gen.) Westminster Edition ('04-'05)
|Class E
|-
|}

==Body Type==
{| class=&quot;wikitable&quot;
|+Position 6
!VIN code
!Description
|-
|1
|4-door wagon (Range Rover '87-'12, Defender 110 '93, Discovery '94-'04)
|-
|1
|2-door soft top (Freelander SE3) ('03-'05)
|-
|1
|2-door wagon (Range Rover Evoque 2-d '12-'17)
|-
|2
|2-door soft top (Defender 90) ('94-'95, '97)
|-
|2
|4-door wagon (Freelander) ('02-'05)
|-
|2
|4-door wagon (LR2 '08-'15, Discovery Sport '15-'26, Range Rover Evoque 4-d '12-, LR3 '05-'09, LR4 '10-'16, Discovery '18-, Range Rover Sport '06-'22, Range Rover Sport P400e '20, Range Rover SWB (L405) '13-'22, Range Rover Velar '18-)
|-
|3
|2-door wagon (Defender 90) ('95, '97)
|-
|3
|4-door wagon LWB (Range Rover LWB '14-'16)
|-
|3
|4-door wagon LWB w/Class E GVWR (Range Rover SV Autobiography LWB '17)
|-
|4
|4-door wagon [[w:Plug-in hybrid|PHEV]] (Range Rover P400e '20-'21, Range Rover Sport P400e '21-Early '22)
|-
|5
|4-door wagon LWB w/Class F GVWR (Range Rover Supercharged LWB &amp; Autobiography LWB '17)
|-
|5
|4-door wagon LWB w/Class F GVWR (Range Rover LWB (L405) '18-'22)
|-
|5
|2-door convertible (Range Rover Evoque convertible '17-'19)
|-
|6
|2-door wagon (Defender 90 '21-)
|-
|7
|4-door wagon w/2 rows of seating (Defender 110 '20-)
|-
|9
|4-door wagon (Range Rover SWB (L460) '22-, Range Rover Sport '23-)
|-
|B
|4-door wagon (Discovery '17)
|-
|B
|4-door wagon LWB (Range Rover LWB (L460) '22-)
|-
|E
|4-door wagon w/3 rows of seating (Defender 110 '20-)
|-
|F
|4-door wagon w/extended length (Defender 130 '23-)
|}
SWB=Short-wheelbase, LWB=Long-wheelbase

==Engine Type (All Models 1987-2016 EXCEPT LR2, Discovery Sport, Range Rover Evoque)==

{| class=&quot;wikitable&quot;
|+Position 7
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| 1 || 3.5L || V8 || Gas ||OHV||MPI. [[w:Rover V8 engine|(Ex-GM) Rover V8 engine]]. Land Rover Range Rover ('87-'88).
|-
| 1 || 4.4L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Single VANOS (Intake VVT). BMW M62TUB44 engine. Land Rover Range Rover ('03-'05).
|-
| 2 || 3.9L || V8 || Gas ||OHV||MPI. (Ex-GM) Rover V8 engine.&lt;br&gt; Land Rover Range Rover SWB ('89-'94), Range Rover County Classic [SWB] ('95), Defender 110 ('93),&lt;br&gt; Defender 90 ('94-'95), Discovery ('94-'95).
|-
| 2 || 4.0L || V8 || Gas ||OHV||Sequential MPI. (3947 cc, actually 3.9L). (Ex-GM) Rover V8 engine. Land Rover Range Rover 4.0 SE ('95-'99),&lt;br&gt; Discovery ('96-'02), Defender 90 ('97).
|-
| 2 || 2.5L || 90° V6 || Gas ||DOHC,&lt;br /&gt; 24 valve||Sequential MPI. VIS. [[w:Rover KV6 engine|Rover KV6 engine]]. Land Rover Freelander ('02-'05).
|-
| 3 || 4.2L || V8 || Gas ||OHV||MPI. (4275 cc, actually 4.3L). (Ex-GM) Rover V8 engine. Land Rover Range Rover County LWB ('93-'95).
|-
| 3 || 4.2L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Jaguar AJ33S engine. Land Rover Range Rover ('06-'09), Range Rover Sport ('06-'09).
|-
| 4 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. Land Rover Range Rover 4.6 HSE ('96-'99), Discovery ('03).
|-
| 4 || 4.0L || 60° V6 || Gas ||SOHC,&lt;br /&gt; 12 valve||Sequential MPI. Variable intake manifold. Ford Cologne V6 engine.&lt;br&gt; Land Rover LR3 ('05-'07 &amp; also '08-'09 in Canada).
|-
| 5 || 4.0L || V8 || Gas ||OHV||Sequential MPI. (3947 cc, actually 3.9L). (Ex-GM) Rover V8 engine. LEV.&lt;br&gt; Land Rover Range Rover 4.0 SE ('00), Discovery ('00-'02).
|-
| 5 || 4.4L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Continuously VCP (Intake VVT). Jaguar AJ41 engine.&lt;br&gt; Land Rover LR3 ('05-'09), Range Rover ('06-'09), Range Rover Sport ('06-'09).
|-
| 6 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. LEV ('00-'02) or ULEV ('03).&lt;br&gt; Land Rover Range Rover 4.6 HSE ('00-'02), 4.6 SE ('01), Discovery ('03).
|-
| 9 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. Land Rover Discovery ('04).
|-
| D || 5.0L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). CPS (Intake VVL). VIS. Jaguar AJ133 engine (LR-V8).&lt;br&gt; Land Rover LR4 ('10-'13), Range Rover ('10-'13), Range Rover Sport ('10-'13).
|-
| E || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('10-'16), Range Rover Sport ('10-'16).
|-
| K || 3.0L || 60° V6 Turbo [[w:Intercooler|IC]] || Diesel ||DOHC,&lt;br /&gt; 24 valve||Common-rail Direct injection. Ford-PSA &quot;Lion&quot; AJD-V6 engine.&lt;br&gt; Land Rover Range Rover Td6 ('16), Range Rover Sport Td6 ('16).
|-
| P || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover Range Rover ('16), Range Rover Sport ('16).
|-
| T || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas/E85 ||DOHC,&lt;br /&gt; 32 valve||Flex Fuel. Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('14-'15), Range Rover Sport ('14-'15).
|-
| V || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover LR4 ('14-'16), Range Rover ('14-'16), Range Rover Sport ('14-'16).
|-
| W || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas/E85 ||DOHC,&lt;br /&gt; 24 valve||Flex Fuel. Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover Range Rover ('14), Range Rover Sport ('14).
|}
VVT=Variable Valve Timing. VCP=Variable Camshaft Phasing. VCT=Variable Camshaft Timing. VIS=Variable Intake System. LEV=Low Emissions Vehicle. ULEV=Ultra-Low Emissions Vehicle. CPS=Cam Profile Switching. VVL=Variable Valve Lift.

==Transmission Type (LR2, Discovery Sport, Range Rover Evoque only 2008-2016)==
{| class=&quot;wikitable&quot;
|+Position 7
!VIN code
!Description
|-
|4
|6-speed automatic (Aisin AWF21) (LR2 '08-'09)
|-
|B
|6-speed automatic (Aisin AWF21) (LR2 '10-'15, Range Rover Evoque '12-'13)
|-
|B
|9-speed automatic (ZF 9HP) (Discovery Sport '15-'16, Range Rover Evoque '14-'16)
|}

==Transmission Type (All models 2017-)==
{| class=&quot;wikitable&quot;
|+Position 7
!VIN code
!Description
|-
|B
|8-speed automatic (ZF 8HP) (Discovery '17)
|-
|B
|9-speed automatic (ZF 9HP) (Discovery Sport '17, Range Rover Evoque '17)
|-
|F
|8-speed automatic (ZF 8HP) (Range Rover '17, Range Rover Sport '17)
|}

==Transmission Type (All Models 1987-2016 EXCEPT LR2, Discovery Sport, Range Rover Evoque)==
{| class=&quot;wikitable&quot;
|+Position 8
!VIN code
!Description
|-
|2
|5-speed automatic [manual shift mode: Steptronic or CommandShift] (Jatco JF506E) (Freelander '02-'05)
|-
|4
|4-speed automatic (ZF 4HP22 or w/4.6L V8: 4HP24) (Range Rover '87-'02, Discovery '94-'04, Defender 90 '97)
|-
|4
|5-speed automatic (ZF 5HP24) (Range Rover '03-'05)
|-
|4
|6-speed automatic (ZF 6HP26X) (LR3 '05-'09, Range Rover '06-'09, Range Rover Sport '06-'09)
|-
|4
|6-speed automatic (ZF 6HP28X) (LR4 '10-'13, Range Rover '10-'12, Range Rover Sport '10-'13)
|-
|6
|8-speed automatic (ZF 8HP) (LR4 '14-'16)
|-
|8
|5-speed manual (Defender 110 '93, Defender 90 '94-'95, Discovery '94-'97)
|-
|F
|8-speed automatic (ZF 8HP) (Range Rover '13-'16, Range Rover Sport '14-'16)
|}
All are LHD (Left-hand drive).

==Engine Type (LR2, Discovery Sport, Range Rover Evoque only 2008-2016)==

{| class=&quot;wikitable&quot;
|+Position 8
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| G || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. Ford EcoBoost engine (Mazda L engine-based).&lt;br&gt; Land Rover LR2 ('13-'15), Discovery Sport ('15-'16), Range Rover Evoque ('12-'16).
|-
| N || 3.2L || I6 || Gas ||DOHC,&lt;br /&gt; 24 valve||MPI. VCT (Intake VVT). CPS (Intake VVL). VIS. [[w:Volvo SI6 engine#B6324S5|Volvo SI6 engine - B6324S5]]. Land Rover LR2 ('08-'12).
|-
|}
VCT=Variable Cam Timing. VVT=Variable Valve Timing. CPS=Cam Profile Switching. VVL=Variable Valve Lift. VIS=Variable Intake System.

==Engine Type (All models 2017-)==

{| class=&quot;wikitable&quot;
|+Position 8
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| E || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('17-'22), Range Rover Sport ('17-'22),&lt;br&gt; Range Rover Velar SVAutobiography Dynamic ('20), Defender V8 ('22-'26).
|-
| G || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. Ford EcoBoost engine (Mazda L engine-based).&lt;br&gt; Land Rover Discovery Sport ('17), Range Rover Evoque ('17).
|-
| K || 3.0L || 60° V6 Turbo [[w:Intercooler|IC]] || Diesel ||DOHC,&lt;br /&gt; 24 valve||Common-rail Direct injection. Ford-PSA &quot;Lion&quot; AJD-V6 engine.&lt;br&gt; Land Rover Discovery Td6 ('17-'20), Range Rover Td6 ('17-'21), Range Rover Sport Td6 ('17-'21).
|-
| N || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Diesel || DOHC,&lt;br /&gt; 16 valve||Common-rail Direct Injection. Exhaust VVT. JLR Ingenium AJ20D engine.&lt;br&gt; Land Rover Range Rover Velar ('18-'19)
|-
| U || 3.0L || I6 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 24 valve||48v Mild Hybrid. E-supercharger. Direct Injection. Dual VVT.  CVVL (Intake VVL).&lt;br&gt; JLR Ingenium AJ20P6/AJ300P engine.&lt;br&gt; Land Rover Discovery ('21-), Range Rover ('20-), Range Rover Sport (Mid '19-), Range Rover Velar ('21-), Defender ('20-).
|-
| V || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine. Land Rover Discovery ('17-'20),&lt;br&gt; Range Rover ('17-'19), Range Rover Sport ('17-Mid '19), Range Rover Velar ('18-'20).
|-
| X || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. CVVL (Intake VVL). JLR Ingenium AJ20P4/AJ200P engine.&lt;br&gt; Land Rover Discovery Sport ('18-), Range Rover Evoque ('18-), Range Rover Velar ('18-), Defender ('20-'26), Discovery ('21-).
|-
| Y || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas-Electric [[w:Plug-in hybrid|PHEV]] || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. CVVL (Intake VVL). JLR Ingenium AJ20P4/AJ200P engine + 1 Front motor.&lt;br&gt; 12.4 kWh Lithium-ion Battery Pack.&lt;br&gt; Land Rover Range Rover P400e ('20-'21), Range Rover Sport P400e ('20-Early '22).
|-
| 4 || 3.0L || I6 Turbo [[w:Intercooler|IC]] || Gas-Electric [[w:Plug-in hybrid|PHEV]] || DOHC,&lt;br /&gt; 24 valve||E-supercharger. Direct Injection. Dual VVT. CVVL (Intake VVL).&lt;br&gt; JLR Ingenium AJ20P6/AJ300P engine + 1 Front motor. 31.8 kWh Lithium-ion Battery Pack.&lt;br&gt; Land Rover Range Rover P440e ('23), P550e ('24-); Range Rover Sport P440e ('23), P460e ('25-), P550e ('24-).
|-
| 7 || 4.4L || V8 Twin Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 32 valve||Direct Injection. Dual VVT (Double VANOS). Valvetronic (Intake VVL). BMW N63B44T3 [N63TU3] engine [JLR NC10-P8H]. Land Rover Range Rover [L460] ('22-'23), Range Rover Sport ('23).
|-
| 9 || 4.4L || V8 Twin Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 32 valve||48v Mild Hybrid. Direct Injection. Dual VVT (Double VANOS). Valvetronic (Intake VVL). BMW S68B44TO [S68B44A] engine [JLR NC11-P8S]. Land Rover Range Rover [L460] ('24-), Range Rover Sport ('24-),&lt;br&gt; Defender Octa ('25-).
|-
|}
CVVL=Continuously Variable Valve Lift.

==Check Digit/Gearbox (Position 9)==
* USA /Canada [[Vehicle Identification Numbers (VIN codes)/Check digit|Check digit]]

==Model Year Code (Position 10)==
''See: [[Vehicle Identification Numbers (VIN codes)/Model year]]''

==Plant Codes (Position 11)==
* A - Solihull, West Midlands, England, UK
* H - Halewood, Merseyside, England, UK
* 2 - Nitra, Slovakia

==External links==
* [http://www.clifton.nl/calvin.html CalVIN, the on-line free Land Rover VIN CALculator]
* [http://www.fourfold.org/LR_FAQ Land Rover FAQ archive]
* [http://www.vindecoderz.com/EN/Land%20Rover Land Rover VIN decoder]


{{BookCat}}</text>
      <sha1>nhzxi5onuwqp55bgcakezv4iatg2h48</sha1>
    </revision>
    <revision>
      <id>4671344</id>
      <parentid>4671343</parentid>
      <timestamp>2026-09-20T11:23:14Z</timestamp>
      <contributor>
        <username>JustTheFacts33</username>
        <id>3434282</id>
      </contributor>
      <comment>/* Engine Type (All models 2017-) */</comment>
      <origin>4671344</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="18848" sha1="1a38p3zeujdffvotu5pb8y6vbogqi21" xml:space="preserve">{{Vehicle Identification Numbers (VIN codes)/Warning}}{{clear}}
From 1948 to the early eighties, Land Rover used for their cars chassis numbers of their own format. These formats are described in the table below. Since 1980 Land Rover deploys the standard 17-character Vehicle Identification Number ('''VIN'''), complying with international standards. 

Car details can be derived (decoded, calculated) from the chassis numbers and the VIN. Typically, the model (Defender, Discovery, Range Rover, Freelander), model type (station wagon, three/four door, etc), wheelbase (90 inch, 100 inch, 110 inch, etc.), engine, LHD/RHD, gearbox, and model year is included in the VIN. 

==Chassis number formats over the years==
&lt;table&gt;
&lt;tr&gt;&lt;th&gt;Description&lt;/th&gt;&lt;th&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/th&gt;&lt;th&gt;Format&lt;/th&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, International VIN, 1980-later&lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;SAL..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Int. VIN for LR do Brazil  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;93R..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Int. VIN for AAD, 1985-1995 &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;AAD..............&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, US/Canada VIN, 1987-later  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;SAL.................&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;17-characters, Brazil VIN for JLR Brazil, 2016-later  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;99J.................&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;14-characters: is actually the 17-char&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;VIN missing the SAL bit&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1955      &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;17.6.....&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1956 to 1961  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;1........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1950      &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;L........ or R........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;9-character numbers, 1962 to 1979  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.........&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1948 to 1949  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.8......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1950 to 1953  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.6......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;8-character numbers, 1954 to 1955  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.7......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;7-character numbers, 1948 to 1949  &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;.......&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;6-character numbers, ???? prototypes &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;110F..&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td&gt;3-character numbers, 1948 prototypes &lt;/td&gt;&lt;td&gt;&lt;/td&gt;&lt;td&gt;R.. or L..&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;

==Land Rover WMIs (1981-) (Position 1-3)==

* SAL - Land Rover (UK &amp; Europe)
* 99J - JLR Brazil
* L2C - Chery Jaguar Land Rover (China)


==Model Line==

{| class=&quot;wikitable&quot;
|+Position 4
!VIN code
!Description
|-
|A
|[[w:Land Rover Discovery#Discovery 3 / LR3 (2004–2009)|Land Rover LR3]] ('05-'09)
|-
|A
|[[w:Land Rover Discovery#Discovery 4 / LR4 (2009–2016)|Land Rover LR4]] ('10-'16)
|-
|C
|[[w:Land Rover Discovery Sport|Land Rover Discovery Sport]] ('15-'26)
|-
|D
|[[w:Land Rover Defender#North American Specification (NAS) Defenders|Land Rover Defender]] ('93-'95, '97) 
|-
|E
|[[w:Land Rover Defender (L663)|Land Rover Defender (L663)]] ('20-)
|-
|F
|[[w:Land Rover Freelander#Freelander 2 (L359; 2006–2015)|Land Rover LR2]] ('08-'15)
|-
|G 
|[[w:Range Rover (L405)|Land Rover Range Rover (L405)]] (4th gen.) ('13-'22)
|-
|H 
|[[w:Range Rover Classic|Land Rover Range Rover/Range Rover Classic]] (1st gen.) ('87-'95)
|-
|J 
|[[w:Land Rover Discovery#First &amp; Second generation Discovery|Land Rover Discovery]] ('94-'98 &amp; '99 Discovery SD)
|-
|K 
|[[w:Range Rover (L460)|Land Rover Range Rover (L460)]] (5th gen.) ('23-)
|-
|M 
|[[w:Range Rover (L322)|Land Rover Range Rover (L322)]] (3rd gen.) ('03-'12)
|-
|N
|[[w:Land Rover Freelander#Freelander in North America|Land Rover Freelander]] ('02-'05)
|-
|P 
|[[w:Range Rover (P38A)|Land Rover Range Rover (P38A)]] (2nd gen.) ('95-'02)
|-
|R
|[[w:Land Rover Discovery#Fifth generation Discovery (L462; 2017–present)|Land Rover Discovery]] ('17-)
|-
|S 
|[[w:Range Rover Sport#First generation (L320; 2005)|Land Rover Range Rover Sport]] (1st gen.) ('06-'13)
|-
|T 
|[[w:Land Rover Discovery#Discovery Series II (L318; 1998–2004)|Land Rover Discovery Series II]] ('99-'04)
|-
|V 
|[[w:Range Rover Evoque#First generation (L538; 2011)|Land Rover Range Rover Evoque]] (1st gen.) ('12-'19)
|-
|W 
|[[w:Range Rover Sport#Second generation (L494; 2013)|Land Rover Range Rover Sport]] (2nd gen.) ('14-'22)
|-
|Y 
|[[w:Range Rover Velar|Land Rover Range Rover Velar]] (1st gen.) ('18-)
|-
|Z 
|[[w:Range Rover Evoque#Second generation (L551; 2018)|Land Rover Range Rover Evoque]] (2nd gen.) ('20-)
|-
|1 
|[[w:Range Rover Sport#Third generation (L461; 2022)|Land Rover Range Rover Sport]] (3rd gen.) ('23-)
|-
|}

==Model Series/GVWR==

{| class=&quot;wikitable&quot;
|+Position 5
!VIN code
!Series
!GVWR
|-
|V (following H)
|Range Rover 100&quot; wheelbase (1st gen.)
|Class E
|-
|E (following H)
|Range Rover 100&quot; wheelbase (CA emissions) (1st gen.) ('95)
|Class E
|-
|C (following H)
|Range Rover LWB 108&quot; wheelbase (1st gen.)
|Class E
|-
|F (following H)
|Range Rover LWB 108&quot; wheelbase (CA emissions) (1st gen.) ('95)
|Class E
|-
|H (following D)
|Defender 110 ('93)
|Class E
|-
|V (following D)
|Defender 90 ('94-'95, '97)
|Class E
|-
|X (following D)
|Defender 90 (CA emissions) ('95)
|Class E
|-
|Y (following J)
|Discovery ('94-'98 &amp; '99 Discovery SD)
|Class E
|-
|N (following J)
|Discovery (CA emissions) ('95-'96)
|Class E
|-
|Y (following T)
|Discovery Series II ('99-'00)
|Class E
|-
|V (following P)
|Range Rover (2nd gen.) ('95-'98)
|Class E
|-
|E (following P)
|Range Rover (2nd gen.) (CA emissions) ('95-'96)
|Class E
|-
|A (following P)
|Range Rover (2nd gen.) (GEMS engine management) (Early '99)
|Class E
|-
|V (following P)
|Range Rover (2nd gen.) (Bosch engine management) ('99-'00)
|Class E
|-
|C (following P)
|Range Rover 4.6 HSE Callaway Edition (2nd gen.) (Callaway-modified engine) ('99)
|Class E
|-
|}

==Model Series/Trim Level/GVWR==

{| class=&quot;wikitable&quot;
|+Position 5
!VIN code
!Series
!GVWR
|-
|M (following N)
|Freelander S ('02-'03)
|Class C
|-
|Y (following N)
|Freelander SE ('02-'05), SE3 ('03-'05)
|Class C
|-
|E (following N)
|Freelander HSE ('02-'04)
|Class C
|-
|L (following T)
|Discovery Series II SD ('01-'02), S ('03-'04)
|Class E
|-
|K (following T)
|Discovery Series II SD7 ('01-'02), S7 ('03-'04)
|Class E
|-
|Y (following T)
|Discovery Series II SE ('01-'04)
|Class E
|-
|W (following T)
|Discovery Series II SE7 ('01-'04)
|Class E
|-
|H (following T)
|Discovery Series II LE ('01)
|Class E
|-
|J (following T)
|Discovery Series II LE7 ('01)
|Class E
|-
|P (following T)
|Discovery Series II HSE ('03-'04)
|Class E
|-
|R (following T)
|Discovery Series II HSE7 ('03-'04)
|Class E
|-
|L (following P)
|Range Rover (2nd gen.) 4.6 SE ('01)
|Class E
|-
|M (following P)
|Range Rover (2nd gen.) 4.6 HSE ('01-'02), Westminster Edition ('02)
|Class E
|-
|H (following M)
|Range Rover (3rd gen.) Westminster Edition ('04-'05)
|Class E
|-
|}

==Body Type==
{| class=&quot;wikitable&quot;
|+Position 6
!VIN code
!Description
|-
|1
|4-door wagon (Range Rover '87-'12, Defender 110 '93, Discovery '94-'04)
|-
|1
|2-door soft top (Freelander SE3) ('03-'05)
|-
|1
|2-door wagon (Range Rover Evoque 2-d '12-'17)
|-
|2
|2-door soft top (Defender 90) ('94-'95, '97)
|-
|2
|4-door wagon (Freelander) ('02-'05)
|-
|2
|4-door wagon (LR2 '08-'15, Discovery Sport '15-'26, Range Rover Evoque 4-d '12-, LR3 '05-'09, LR4 '10-'16, Discovery '18-, Range Rover Sport '06-'22, Range Rover Sport P400e '20, Range Rover SWB (L405) '13-'22, Range Rover Velar '18-)
|-
|3
|2-door wagon (Defender 90) ('95, '97)
|-
|3
|4-door wagon LWB (Range Rover LWB '14-'16)
|-
|3
|4-door wagon LWB w/Class E GVWR (Range Rover SV Autobiography LWB '17)
|-
|4
|4-door wagon [[w:Plug-in hybrid|PHEV]] (Range Rover P400e '20-'21, Range Rover Sport P400e '21-Early '22)
|-
|5
|4-door wagon LWB w/Class F GVWR (Range Rover Supercharged LWB &amp; Autobiography LWB '17)
|-
|5
|4-door wagon LWB w/Class F GVWR (Range Rover LWB (L405) '18-'22)
|-
|5
|2-door convertible (Range Rover Evoque convertible '17-'19)
|-
|6
|2-door wagon (Defender 90 '21-)
|-
|7
|4-door wagon w/2 rows of seating (Defender 110 '20-)
|-
|9
|4-door wagon (Range Rover SWB (L460) '22-, Range Rover Sport '23-)
|-
|B
|4-door wagon (Discovery '17)
|-
|B
|4-door wagon LWB (Range Rover LWB (L460) '22-)
|-
|E
|4-door wagon w/3 rows of seating (Defender 110 '20-)
|-
|F
|4-door wagon w/extended length (Defender 130 '23-)
|}
SWB=Short-wheelbase, LWB=Long-wheelbase

==Engine Type (All Models 1987-2016 EXCEPT LR2, Discovery Sport, Range Rover Evoque)==

{| class=&quot;wikitable&quot;
|+Position 7
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| 1 || 3.5L || V8 || Gas ||OHV||MPI. [[w:Rover V8 engine|(Ex-GM) Rover V8 engine]]. Land Rover Range Rover ('87-'88).
|-
| 1 || 4.4L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Single VANOS (Intake VVT). BMW M62TUB44 engine. Land Rover Range Rover ('03-'05).
|-
| 2 || 3.9L || V8 || Gas ||OHV||MPI. (Ex-GM) Rover V8 engine.&lt;br&gt; Land Rover Range Rover SWB ('89-'94), Range Rover County Classic [SWB] ('95), Defender 110 ('93),&lt;br&gt; Defender 90 ('94-'95), Discovery ('94-'95).
|-
| 2 || 4.0L || V8 || Gas ||OHV||Sequential MPI. (3947 cc, actually 3.9L). (Ex-GM) Rover V8 engine. Land Rover Range Rover 4.0 SE ('95-'99),&lt;br&gt; Discovery ('96-'02), Defender 90 ('97).
|-
| 2 || 2.5L || 90° V6 || Gas ||DOHC,&lt;br /&gt; 24 valve||Sequential MPI. VIS. [[w:Rover KV6 engine|Rover KV6 engine]]. Land Rover Freelander ('02-'05).
|-
| 3 || 4.2L || V8 || Gas ||OHV||MPI. (4275 cc, actually 4.3L). (Ex-GM) Rover V8 engine. Land Rover Range Rover County LWB ('93-'95).
|-
| 3 || 4.2L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Jaguar AJ33S engine. Land Rover Range Rover ('06-'09), Range Rover Sport ('06-'09).
|-
| 4 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. Land Rover Range Rover 4.6 HSE ('96-'99), Discovery ('03).
|-
| 4 || 4.0L || 60° V6 || Gas ||SOHC,&lt;br /&gt; 12 valve||Sequential MPI. Variable intake manifold. Ford Cologne V6 engine.&lt;br&gt; Land Rover LR3 ('05-'07 &amp; also '08-'09 in Canada).
|-
| 5 || 4.0L || V8 || Gas ||OHV||Sequential MPI. (3947 cc, actually 3.9L). (Ex-GM) Rover V8 engine. LEV.&lt;br&gt; Land Rover Range Rover 4.0 SE ('00), Discovery ('00-'02).
|-
| 5 || 4.4L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Sequential MPI. Continuously VCP (Intake VVT). Jaguar AJ41 engine.&lt;br&gt; Land Rover LR3 ('05-'09), Range Rover ('06-'09), Range Rover Sport ('06-'09).
|-
| 6 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. LEV ('00-'02) or ULEV ('03).&lt;br&gt; Land Rover Range Rover 4.6 HSE ('00-'02), 4.6 SE ('01), Discovery ('03).
|-
| 9 || 4.6L || V8 || Gas ||OHV||Sequential MPI. (Ex-GM) Rover V8 engine. Land Rover Discovery ('04).
|-
| D || 5.0L || V8 || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). CPS (Intake VVL). VIS. Jaguar AJ133 engine (LR-V8).&lt;br&gt; Land Rover LR4 ('10-'13), Range Rover ('10-'13), Range Rover Sport ('10-'13).
|-
| E || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('10-'16), Range Rover Sport ('10-'16).
|-
| K || 3.0L || 60° V6 Turbo [[w:Intercooler|IC]] || Diesel ||DOHC,&lt;br /&gt; 24 valve||Common-rail Direct injection. Ford-PSA &quot;Lion&quot; AJD-V6 engine.&lt;br&gt; Land Rover Range Rover Td6 ('16), Range Rover Sport Td6 ('16).
|-
| P || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover Range Rover ('16), Range Rover Sport ('16).
|-
| T || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas/E85 ||DOHC,&lt;br /&gt; 32 valve||Flex Fuel. Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('14-'15), Range Rover Sport ('14-'15).
|-
| V || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover LR4 ('14-'16), Range Rover ('14-'16), Range Rover Sport ('14-'16).
|-
| W || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas/E85 ||DOHC,&lt;br /&gt; 24 valve||Flex Fuel. Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine.&lt;br&gt; Land Rover Range Rover ('14), Range Rover Sport ('14).
|}
VVT=Variable Valve Timing. VCP=Variable Camshaft Phasing. VCT=Variable Camshaft Timing. VIS=Variable Intake System. LEV=Low Emissions Vehicle. ULEV=Ultra-Low Emissions Vehicle. CPS=Cam Profile Switching. VVL=Variable Valve Lift.

==Transmission Type (LR2, Discovery Sport, Range Rover Evoque only 2008-2016)==
{| class=&quot;wikitable&quot;
|+Position 7
!VIN code
!Description
|-
|4
|6-speed automatic (Aisin AWF21) (LR2 '08-'09)
|-
|B
|6-speed automatic (Aisin AWF21) (LR2 '10-'15, Range Rover Evoque '12-'13)
|-
|B
|9-speed automatic (ZF 9HP) (Discovery Sport '15-'16, Range Rover Evoque '14-'16)
|}

==Transmission Type (All models 2017-)==
{| class=&quot;wikitable&quot;
|+Position 7
!VIN code
!Description
|-
|B
|8-speed automatic (ZF 8HP) (Discovery '17)
|-
|B
|9-speed automatic (ZF 9HP) (Discovery Sport '17, Range Rover Evoque '17)
|-
|F
|8-speed automatic (ZF 8HP) (Range Rover '17, Range Rover Sport '17)
|}

==Transmission Type (All Models 1987-2016 EXCEPT LR2, Discovery Sport, Range Rover Evoque)==
{| class=&quot;wikitable&quot;
|+Position 8
!VIN code
!Description
|-
|2
|5-speed automatic [manual shift mode: Steptronic or CommandShift] (Jatco JF506E) (Freelander '02-'05)
|-
|4
|4-speed automatic (ZF 4HP22 or w/4.6L V8: 4HP24) (Range Rover '87-'02, Discovery '94-'04, Defender 90 '97)
|-
|4
|5-speed automatic (ZF 5HP24) (Range Rover '03-'05)
|-
|4
|6-speed automatic (ZF 6HP26X) (LR3 '05-'09, Range Rover '06-'09, Range Rover Sport '06-'09)
|-
|4
|6-speed automatic (ZF 6HP28X) (LR4 '10-'13, Range Rover '10-'12, Range Rover Sport '10-'13)
|-
|6
|8-speed automatic (ZF 8HP) (LR4 '14-'16)
|-
|8
|5-speed manual (Defender 110 '93, Defender 90 '94-'95, Discovery '94-'97)
|-
|F
|8-speed automatic (ZF 8HP) (Range Rover '13-'16, Range Rover Sport '14-'16)
|}
All are LHD (Left-hand drive).

==Engine Type (LR2, Discovery Sport, Range Rover Evoque only 2008-2016)==

{| class=&quot;wikitable&quot;
|+Position 8
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| G || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. Ford EcoBoost engine (Mazda L engine-based).&lt;br&gt; Land Rover LR2 ('13-'15), Discovery Sport ('15-'16), Range Rover Evoque ('12-'16).
|-
| N || 3.2L || I6 || Gas ||DOHC,&lt;br /&gt; 24 valve||MPI. VCT (Intake VVT). CPS (Intake VVL). VIS. [[w:Volvo SI6 engine#B6324S5|Volvo SI6 engine - B6324S5]]. Land Rover LR2 ('08-'12).
|-
|}
VCT=Variable Cam Timing. VVT=Variable Valve Timing. CPS=Cam Profile Switching. VVL=Variable Valve Lift. VIS=Variable Intake System.

==Engine Type (All models 2017-)==

{| class=&quot;wikitable&quot;
|+Position 8
|-
! VIN !! Size !! Type !! Fuel !! Valvetrain !! Engine Family/Notes/Applications
|-
| E || 5.0L || V8 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 32 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ133S engine (LR-V8S).&lt;br&gt; Land Rover Range Rover ('17-'22), Range Rover Sport ('17-'22),&lt;br&gt; Range Rover Velar SVAutobiography Dynamic ('20), Defender V8 ('22-'26).
|-
| G || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. Ford EcoBoost engine (Mazda L engine-based).&lt;br&gt; Land Rover Discovery Sport ('17), Range Rover Evoque ('17).
|-
| K || 3.0L || 60° V6 Turbo [[w:Intercooler|IC]] || Diesel ||DOHC,&lt;br /&gt; 24 valve||Common-rail Direct injection. Ford-PSA &quot;Lion&quot; AJD-V6 engine.&lt;br&gt; Land Rover Discovery Td6 ('17-'20), Range Rover Td6 ('17-'21), Range Rover Sport Td6 ('17-'21).
|-
| N || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Diesel || DOHC,&lt;br /&gt; 16 valve||Common-rail Direct Injection. Exhaust VVT. JLR Ingenium AJ20D engine.&lt;br&gt; Land Rover Range Rover Velar ('18-'19)
|-
| U || 3.0L || I6 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 24 valve||48v Mild Hybrid. E-supercharger. Direct Injection. Dual VVT.  CVVL (Intake VVL).&lt;br&gt; JLR Ingenium AJ20P6/AJ300P engine.&lt;br&gt; Land Rover Discovery ('21-), Range Rover ('20-), Range Rover Sport (Mid '19-), Range Rover Velar ('21-), Defender ('20-).
|-
| V || 3.0L || 90° V6 [[w:Supercharged|SC]] [[w:Intercooler|IC]] || Gas ||DOHC,&lt;br /&gt; 24 valve||Direct injection. Dual Continuously VCT (VVT). Jaguar AJ126 engine. Land Rover Discovery ('17-'20),&lt;br&gt; Range Rover ('17-'19), Range Rover Sport ('17-Mid '19), Range Rover Velar ('18-'20).
|-
| X || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. CVVL (Intake VVL). JLR Ingenium AJ20P4/AJ200P engine.&lt;br&gt; Land Rover Discovery Sport ('18-'26), Range Rover Evoque ('18-), Range Rover Velar ('18-), Defender ('20-'26), Discovery ('21-).
|-
| Y || 2.0L || I4 Turbo [[w:Intercooler|IC]] || Gas-Electric [[w:Plug-in hybrid|PHEV]] || DOHC,&lt;br /&gt; 16 valve||Direct Injection. Dual VVT. CVVL (Intake VVL). JLR Ingenium AJ20P4/AJ200P engine + 1 Front motor.&lt;br&gt; 12.4 kWh Lithium-ion Battery Pack.&lt;br&gt; Land Rover Range Rover P400e ('20-'21), Range Rover Sport P400e ('20-Early '22).
|-
| 4 || 3.0L || I6 Turbo [[w:Intercooler|IC]] || Gas-Electric [[w:Plug-in hybrid|PHEV]] || DOHC,&lt;br /&gt; 24 valve||E-supercharger. Direct Injection. Dual VVT. CVVL (Intake VVL).&lt;br&gt; JLR Ingenium AJ20P6/AJ300P engine + 1 Front motor. 31.8 kWh Lithium-ion Battery Pack.&lt;br&gt; Land Rover Range Rover P440e ('23), P550e ('24-); Range Rover Sport P440e ('23), P460e ('25-), P550e ('24-).
|-
| 7 || 4.4L || V8 Twin Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 32 valve||Direct Injection. Dual VVT (Double VANOS). Valvetronic (Intake VVL). BMW N63B44T3 [N63TU3] engine [JLR NC10-P8H]. Land Rover Range Rover [L460] ('22-'23), Range Rover Sport ('23).
|-
| 9 || 4.4L || V8 Twin Turbo [[w:Intercooler|IC]] || Gas || DOHC,&lt;br /&gt; 32 valve||48v Mild Hybrid. Direct Injection. Dual VVT (Double VANOS). Valvetronic (Intake VVL). BMW S68B44TO [S68B44A] engine [JLR NC11-P8S]. Land Rover Range Rover [L460] ('24-), Range Rover Sport ('24-),&lt;br&gt; Defender Octa ('25-).
|-
|}
CVVL=Continuously Variable Valve Lift.

==Check Digit/Gearbox (Position 9)==
* USA /Canada [[Vehicle Identification Numbers (VIN codes)/Check digit|Check digit]]

==Model Year Code (Position 10)==
''See: [[Vehicle Identification Numbers (VIN codes)/Model year]]''

==Plant Codes (Position 11)==
* A - Solihull, West Midlands, England, UK
* H - Halewood, Merseyside, England, UK
* 2 - Nitra, Slovakia

==External links==
* [http://www.clifton.nl/calvin.html CalVIN, the on-line free Land Rover VIN CALculator]
* [http://www.fourfold.org/LR_FAQ Land Rover FAQ archive]
* [http://www.vindecoderz.com/EN/Land%20Rover Land Rover VIN decoder]


{{BookCat}}</text>
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  <page>
    <title>Suicide</title>
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      <comment>/* Defining Suicide */ can't designate as a minor change</comment>
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{{suicide methods}}
{{Warning|If you are seeking help dealing with depressive and suicidal thoughts, '''this book is not for you'''; there are regional services that offer local hot-lines for help.
Also, as a reminder, this book will touch upon issues that some may find disturbing, depressing or taboo.  Remember that some of the material may be [[WB:CENSOR|inappropriate for minors]].}}
This book discusses the philosophical and practical issues revolving around the subject of suicide. It aims to be a scholarly discussion of the subject and not a debate, guide or recommendation. The authors do not condone or object to the conscious and reflected termination of oneself.
 
Just as with other causes of death, accidental or inflicted, suicides are mostly about emotional and mental issues and not surprisingly different societies have arrived at different attitudes and points of view regarding suicide and these have varied throughout history. Countries with highest suicide rates include China and India taking first and second place. This topic is sensitive and it should not be for others to rationalize or establish what a proper or acceptable motivation should be behind the act. There should at least exist a degree of respect for this final act of self determination when carefully considered in all its implications, especially beyond those to the self.
 
Finally, this book is a work in progress. Currently it has had few contributors and part of the content was absorbed from the no longer active [http://wikiindex.org/SuicideWiki SuicideWiki] and often streamlined and complemented with content from [[Wikipedia]] so what text there is has had little review, due to the nature of the book there may be some attempts of censure and erasure, so check page histories edits when editing. Please [[WB:BOLD|feel free]] to contribute where you can in order to improve it.
 
==Defining Suicide==
In the simplest terms, &quot;suicide&quot; is defined as the intentional act of taking ones own life: the ending all bodily systems and functions of oneself through one's action and direction.

The act of suicide has many nuances. For example, the legal term ''suicide attempt'' typically applies to theatrical acts often committed not with the necessary goal of life termination but as a social statement or cry for help. Even inconclusive self-inflicted damage or accidental death can fall under the term ''suicide'' and ''suicide attempt'' in the legal form. In medicine there is also the term ''euthanasia'' which is a form of ''assisted'' suicide. In certain cultures, there are honorary forms of suicide which derive from: taking responsibility for one's own failures; sacrificing one's life in warfare for the perceived benefit of one's kin; and sacrificing oneself in the name of a deity and religious struggle.    
 
In this section we will explore different definitions of suicide and discuss their merits.  We will examine
*Sub-intentional suicide
*Self Sacrifice made for the benefit of others
*Suicide as part of different cultures
*Depression and other mental illness

== Suicide as a means to an end ==
Suicide has been practiced for a long time as a means to an end. While the individual does not gain anything from the act, they may often find a goal (the advancement of an idea or ideology, the survival of family or friends, or the defense of their land) worth sacrificing their own life.
 
* [[/Self-Sacrifice/]]
* Suicide in Nature (non human)
* Suicide in [[/Hinduism/]] (Prayopavesa)
* Suicide in [[/Buddhism/]] (Sokushinbutsu)
* Suicide in [[/Voodoo/]] ([[w:Voodoo death]])
* Suicide in [[/Jainism/]] (Sallekhana)
* Suicide in [[/Christianity/]]
* Suicide in [[/Radical Islam/]]
* Suicide in [[/Paganism/]] ([[w:Coronavirus party]])([[w:Bugchasing]])
* The Japanese [[/Kamikaze/]]

== Honor ==
*[[/Seppuku/]] in Japan.

== Involuntary suicides ==
*Certain soldiers on duty have (involuntarily) committed suicides to avoid being captured alive by the enemies, to be posthumously considered heroes.
{{Wikipedia|Forced suicide}}
*Forced suicides may be a way of execution, or a major crime if not legally authorized.

== Flight from suffering ==
 
A major reason for suicides is the flight from some form of suffering. This can be emotional or physical suffering but either way, the thought of continued living is so overwhelming to some people that they choose to end their lives.
 
There are arguments for and against such a decision. These include:
* the potential for recovery which would make the person willing to continue later on
* the feelings of those who would lose their loved one
* [[/The Right to Die|the moral right to die]]

*[[/Moral Reasoning/]] (Note: the bit at the end should be moved to a page linked to from the &quot;means to an end&quot; page)

=== Common triggers ===
Thoughts of suicide are often brought on by external triggers. These can be crises in an individual's personal or professional life, but can be aggravated by other factors.
 
* Drugs
** Alcohol
** Prescription drugs
* Environmental
** Mental torture
* Influence of Others
** Peer pressure, including [[w:Template:Bullying|bullying]] having resulted in so many suicides, even several murder–suicides
* Hormonal dysfunction, such as during adolescence
* Mental Condition
{{SAMPLE|sampletext=&quot;I feel certain that I'm going mad again. I feel we can't go through another of those terrible times. And I shan't recover this time. I begin to hear voices.&quot;|caption=—from [[w:Suicide note|suicide note]] of [[w:Virginia Woolf|Virginia Woolf]]}}
* Depression
{{SAMPLE|sampletext=
&quot;Despair and depression,&lt;br&gt;together they grow.&lt;br&gt;Hope shall meet hopeless&lt;br&gt;when there's nowhere to go.&quot;|caption=—from [[w:Suicide note|suicide note]] of Misao Fujimura, Japanese high school philosophy student, d. 1903}}
* Self determination
{{SAMPLE|sampletext=
&quot;No More Games. No More Bombs. No More Walking. No More Fun. No More Swimming. 67. That is 17 years past 50. 17 more than I needed or wanted. Boring. I am always bitchy. No Fun – for anybody. 67. You are getting Greedy. Act your old age. Relax – This won't hurt.&quot;|caption=—by [[w:Hunter S. Thompson|Hunter S. Thompson]] (1937–2005), suicide note entitled &quot;Football Season is Over&quot;. Hunter was actually speaking to his wife, Anita, on the telephone, with the word &quot;Counselor&quot; typed on his typewriter, when he shot himself. The above quote was written a week or so earlier.}}

=== Getting help ===
* [http://suicidehotlines.com/ Suicide Hotlines] for the US.
* [http://www.samaritans.org/ Samaritans] is an organization to help people in the United Kingdom and Ireland.  They describe themselves in this way &quot;Samaritans provides confidential  non-judgemental emotional support, 24 hours a day for people who are experiencing feelings of distress or despair, including those which could lead to suicide.&quot;
* [http://suicidehotlines.com/canada.html Hotlines] for Canada.
* [http://www.lifeline.org.au/ Lifeline] is a support service for those living in Australia.
* [http://kaffhopeline.org/ Karam And Friends Foundation] working for Suicide Prevention

== Statistics ==
[[Image:Suicide rates map-en.svg|680px|center|thumb|World Health Organization (WHO) data from 2007. Suicide rates per 100,000 people. [http://www.who.int/mental_health/prevention/suicide/suicideprevent/en/ Current figures].]]
 
[[Image:Suicide death rates for females aged 15 years and older, by race (1998).gif|480px|center|thumb|Suicide death rates for females aged 15 years and older in the United States, by race (1998)]]

== Considering Others ==
*[[/Saying Goodbye/]]

==Methods==
[[Image:Suicide rates by methods, aged 15-19 (1992-2001).gif|390px|right|thumb|Suicide rates by methods, aged 15-19 (1992-2001).]]
 
*[[/Anaphylaxis/]]
*[[/Blades/]]
*[[/Collision/]]
*[[/Firearm/]]
*[[/Diseases/]]
*[[/Drugs/]]
*[[/Exsanguination/]] (bleeding)
*[[/Electrocution/]]
*[[/Explosion/]]
*[[/Exposure/]]
*[[/Immolation/]] (burning)
*[[/Terminal dehydration/]]
*[[/Starvation/]]
*[[/Toxification/]] (poisons or poisonous dosages)
**[[/Suffocation/]] (a specific method of Toxification but at a cellular level, by refusing oxygen to normally enter the organism)
***[[/Drowning/]]  (a particular method of Suffocation)
*[[/Jumping/]]
**[[/Hanging/]] (a particular method of Jumping or Suffocation, sometimes with fatal spinal/neck injuries)

==Other resources==
*[[/Literature/]]
*[[/Film/|Filmography]]
*[[w:Suicide|Suicide (at Wikipedia)]]
*[[Wikiversity:Suicide|Suicide (at Wikiversity)]]
*[http://www.newscientist.com/article/mg19626252.800 Death special: How does it feel to die?, in New Scientist Print Edition, 13 October 2007]
*[http://science.slashdot.org/article.pl?sid=08/04/12/192245&amp;from=rss Internet Sites Biased Towards Supporting Suicide, posted on slashdot by kdawson on Saturday April 12]
*[http://www.newscientist.com/channel/health/dn13769-does-the-earths-magnetic-field-cause-suicides.html?feedId=online-news_rss20 Does the Earth's magnetic field cause suicides?, in NewScientist.com by Catherine Brahic 24 April 2008, ]
 
{{Shelves|Sociology|Psychology}}
{{Alphabetical|S}}
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  <page>
    <title>Talk:Suicide</title>
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      <text bytes="20759" sha1="75978wqdrz7nusryhrawg8imet0mgih" xml:space="preserve">{{Rfd-survived2|discussions=See
* [[Wikibooks:Requests for deletion/Suicide]].
* [[Wikibooks:Requests for deletion/Suicide (2)]].
* [[Wikibooks:Requests for deletion/Suicide/Suffocation]].}}

===Speedy Delete?===
Why? &gt;.&lt; [[User:Hoogli|Hoogli]] ([[User talk:Hoogli|talk]]) 00:11, 3 April 2008 (UTC)

== &quot;Subscription Drugs&quot;? ==

What exactly are these? I've never heard the term before. [[User:Hoogli|Hoogli]] ([[User talk:Hoogli|talk]]) 21:23, 4 April 2008 (UTC)

:There are several papers/articles that claim that some subscription drugs increase suicidal tendencies, by altering the brain chemic, some affect only certain age groups or have a long term effect (especially in children and teenagers).  --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|talk]]) 22:05, 4 April 2008 (UTC)
:Do you mean prescription drugs? (I'm from the US, maybe the term is different elsewhere) [[User:Hoogli|Hoogli]] ([[User talk:Hoogli|talk]]) 02:18, 10 May 2008 (UTC)
::Lol, yup probably my mistake... Subscription is the paper need to get some of the most active substances (legally controlled). Prescription is mostly a medical act, that can result or not in a subscription (legal paper, that can also have economical value to the state or other entities) to the patient (in some places of the world not only medical doctors can prescribe drugs, ie: Midwifes in Holland for instance can do it also, if I remember it correctly), since I was thinking on the level of control, not on the act of prescription itself I don't know what best qualifies it...
::I did a google search and you get things like:
::&quot;...direct-mail subscription drug program...&quot;, &quot;Annual Subscription of Drugs Cases...&quot; or &quot;...potential interactions between subscription drugs...&quot;, so I think both of us may be correct, English is not my natural language so some stuff may be lost in translation but the distinction seems relevant...   --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|talk]]) 02:43, 10 May 2008 (UTC)

== Scrapping the Considering Others pages ==

I don't think the content on the pages linked from [[Suicide#Considering Others]]; [[Suicide/Saying Goodbye]] and [[Suicide/Suicide Notes]], is helpful. It's just unsourced personal opinion and plain obvious stuff. More the sort someone would write as a mental exercise while contemplating suicide rather than something useful to someone wanting to know about the topic.

The book might discuss suicide notes, but a this-is-how-to-write-a-suicide-note section is going to be inherently flawed unless it takes into account all the various issues surrounding it and the different situations a person might be in. These two pages don't even begin to do so. --[[User:Swift|Swift]] ([[User talk:Swift|talk]]) 17:45, 8 May 2010 (UTC)

:It is a stub. It can be useful to deals with the impact of a suicide on others, people that have had a suicide in the family etc...  --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|talk]]) 20:24, 8 May 2010 (UTC)

::As might be obvious, I agree with Swift.  Exactly this type of unsourced personal doesn't live up to our inclusion criteria, which was one of the reasons I brought this book up at [[WB:RfD]].  I think removing/replacing this content would go a long way to improving this book. [[User:Thenub314|Thenub314]] ([[User talk:Thenub314|talk]]) 08:54, 9 May 2010 (UTC)

:: It can be useful if it actually contributes something. It doesn't. It implies a certain state of mind and the logic is broken (see the first three sentences for an amazing example of syllogism from another world).
:: This would be a stub if it laid out the issues surrounding bidding farewell that were more applicable to a broad range of situations. Currently, it implies too much and categorises based on that. That ''isn't'' useful.
:: The topic should be covered, but is probably best done so separately depending on the situation. It should furthermore focus on issues rather than methods, as they are more transferable to various situations. --[[User:Swift|Swift]] ([[User talk:Swift|talk]]) 09:39, 9 May 2010 (UTC)
:: Sorry, the previous comment referred specifically to [[Suicide/Saying Goodbye]]. I'll agree that [[Suicide/Suicide Notes]] is considerably better. --[[User:Swift|Swift]] ([[User talk:Swift|talk]]) 09:44, 9 May 2010 (UTC)

== Unusual methods useful? ==

Does anyone think it's useful to have the [[Suicide#Unusual Methods]] section? Personally it just looks like uninformative gore. I can see that it's interesting in the &quot;wow, that's wacky!&quot; sense, but I don't see its merit as a &quot;hmm, my life is more full for having learnt this&quot; topic. --[[User:Swift|Swift]] ([[User talk:Swift|talk]]) 17:49, 8 May 2010 (UTC)

:For what it is worth I agree, it was one of the sections I originally complained about. [[User:Thenub314|Thenub314]] ([[User talk:Thenub314|talk]]) 19:07, 8 May 2010 (UTC)

:Unusual methods can cover suicide by cop, suicide by committing capital crimes, suicide pacts, mass suicides.   --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|talk]]) 20:21, 8 May 2010 (UTC)

:: &quot;''Unusual methods can cover suicide by cop''&quot; Sorry, but you're speaking in some strange language again, Panic. As for suicide pacts and mass suicides, these are separate subjects. --[[User:Swift|Swift]] ([[User talk:Swift|talk]]) 09:03, 9 May 2010 (UTC)

::: Huh [[w:Suicide by cop|suicide by cop]] ?!? (commuting -&gt; committing)  --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|talk]]) 19:08, 9 May 2010 (UTC)

:::: :-D That's one phrase I'm proud not to have known! &quot;''Committing''&quot;: Thanks, that explains that one a bit. It doesn't, however, explain why this merits a special section. --[[User:Swift|Swift]] ([[User talk:Swift|talk]]) 21:27, 9 May 2010 (UTC)

::::: Except for assisted suicided (that requires an participative collaboration) those other &quot;methods&quot; go beyond a personal decision.
::::: I do think that this quality assurance (beyond the reasonable), unnecessary need for justification (since none else was editing) and overbearing criticism will be the death of the project.  
::::: Heck, I'm not committing to this book, I already have 3 other books going on. I was and I am just proving that the subject is worth keeping, valid under the WIW, with valid content and all can be extended to be a constructive resource of information, of course I understand Thenub314 point of view (if based on personal feeling, religion or moral). Even if I disagree with it. Being incarcerated '''is''' mental torture even at its best it causes always mental stress, that should be plain to anyone (this is why undomesticated animals in captivity often die, go mad or fail to reproduce). I'm not going to fight over the subject, I becoming strongly demotivated by all this friction, for instance the removal of the Dr. Death image/reference (that would be easy to be extended) in general it is annoying that people still go to such lengths, commenting on quality and subjective reasons without in reality doing any real work to improve the content...
::::: I'm done for now here, I've made my point, posted my vote and opinion on the RfD and done my bit to improve the work so I'll move along. If people decide to contribute positively, I'm willing to collaborate since the subject merits being covered.  --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|talk]]) 22:57, 9 May 2010 (UTC)
{{outdent|:::::}} I am sorry if I have brought a negative tone to this discussion.  My comments about prison systems are largely motivated by my personal experience with it.  My remaining comments revolve around stem from what I feel a textbook is, and what I feel is academically relevant to this subject, which is in turn based on the courses I have taken.  In way of an apology let me emphasize a few points which might have been overshadowed by my strong objections to the work.  I meant what I said when I claimed that this book might be OK if it lived up to its own description of itself.  I sincerely meant to give praise when I described the work you did as &quot;excellent&quot;.  I did not want to detract from this praise, and I fully believe any implicit OR was accidental. Let me further say that I think the subject is worthy of academic discussion, my objections where always based upon what was written instead of the subject itself.  I have tried to contribute positively, even through my criticisms.  For example, I do not spend time on the weekend reading forensic pathology books because I enjoy it, but because I see fact checking part of the editorial process.  I have avoided removing information I find suspect as I am the person who initiated the  RfD, and I saw it as polite not to take actions others might view as deteriorating the quality of the work while I simultaneously worked toward deleting it.  I have thought seriously about what I might add, and I have been busy reading references about the subject. [[User:Thenub314|Thenub314]] ([[User talk:Thenub314|talk]]) 10:17, 10 May 2010 (UTC)

:Though it is off topic, the argumentative side of me cannot help to point out that your arguments about the success of animals in captivity is deeply flawed. While many undomesticated animals do die, it is just as often due to a misunderstanding of the animal itself as opposed to the confines of its space.  You fail to acknowledge that some breeding programs, say amongst higher apes are quite successful, while others are not (FYI: Because of the success of breeding programs for chimpanzees there is now an &quot;over popluation&quot; in the US. Relative of course to the available appropriate space for them.)  Other animals, such as elephants, will die without others of the species around and are notoriously difficult to breed.  As different species react differently, the real question in our case is about the human species.  I grant that there is undoubtedly a certain amount of stress involved with being incarcerated.  But I would stop far short of being put in jail or prison in the US a form of mental ''torture''. [[User:Thenub314|Thenub314]] ([[User talk:Thenub314|talk]]) 10:17, 10 May 2010 (UTC)

== Focus ==
I have spent a bit of time reading textbooks (or sections of textbooks) about suicide and I see a place where a decision needs to be made.  The textbooks I have found fall under three major disciplines: Philosophy, Sociology, and  Psychology.  Depending on the discipline very different perspectives are taken, indeed many differ on the definition of suicide.  I think there is a lot to be gained by choosing a discipline we hope this book would be written from.  I think it would:
*identify a set of references for a bibliography, as well as helping to improve our verifiability;
*help make clear the scope of our book, making it clear whether sections on subjects like &quot;Unusual methods&quot; are relevant.
My personal preference is the philosophical approach, because this is the one I know best.  What do other people think.  (Note to Panic: 3 sections, all located after your reply). [[User:Thenub314|Thenub314]] ([[User talk:Thenub314|talk]]) 10:17, 10 May 2010 (UTC)

== Suicide methods ==

There is a bunch of content I could bring here from the now-defunct [[wikiindex:SuicideWiki|SuicideWiki]] (which in turn got a lot of the content from the now-defunct [[wikiindex:ASH|ASH wiki]]). Specifically, I could add pages on: Amitriptyline cocktail, Carbon monoxide poisoning, Chloroquine cocktail, Cyanide poisoning, Darvon cocktail, Diphenhydramine, Exit (plastic) bag with sedatives, Fentanyl, Hanging, Helium, Hydrogen sulfide, Ligature strangulation, Methadone, Morphine and heroin, Nicotine, Non-suspension strangulation, Pentobarbital, Promethazine, Terminal dehydration, Wrist cutting, Suicide method characteristics, Availability, Peacefulness, Preparation and administration, Reliability, Safety to others, Speed of effect, Storage, Undetectability, Antiemetic regimen, Bad methods, Capsules, Cold water extraction, Drugs' shelf lives, Method contraindications, Obtaining drugs, Payment options, and Repackaging drugs in capsules.

This was attempted at Wikiversity and led to the pages being deleted. See [[wikiversity:Talk:Suicide]]. Can it be done at Wikibooks instead? Thanks. [[User:Leucosticte|Leucosticte]] ([[User talk:Leucosticte|discuss]] • [[Special:Contributions/Leucosticte|contribs]]) 22:32, 16 October 2014 (UTC)

:It depends on the content, if factual bring it over, also police the revisions of the pages, due to the sensitivity of the subject and social taboo regarding death in general people try to avoid the subject and hide it as much as possible as not to face it. Or having facing it and dealt with it, became traumatized by events an unable to go beyond their own feelings on the subject. PS: There has been some deletions here especially on a section regarding Dr. Kevorkian that I haven't had the time to see if reversion is doable...  --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|discuss]] • [[Special:Contributions/Panic2k4|contribs]]) 04:47, 17 October 2014 (UTC)
::All right, I'll bring the content over and see what happens. I started with [[Suicide/Pentobarbital]]. [[User:Leucosticte|Leucosticte]] ([[User talk:Leucosticte|discuss]] • [[Special:Contributions/Leucosticte|contribs]]) 05:36, 17 October 2014 (UTC)
:::It will be a huge task to clean it all up, you could probably expedite it by first importing the wikified text and then replace it with a dewikified version (content will be lost but it all depends on the commitment you are putting on the work).
:::I have moved the page to the already existing subsection about toxics and did some minor edits to keep the headings correct. Note that as it was the subject seemed as a collection of articles in here they will be in a book format some some consideration is required to make it fit with the needs of a reader and self contained (the information required for the reader), not a priority but something that must be kept in mind.  --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|discuss]] • [[Special:Contributions/Panic2k4|contribs]]) 23:56, 17 October 2014 (UTC)
::::Does a pentobarbital overdose count as toxification? It's not really poisoning yourself. More like putting yourself to sleep (in the veterinary sense). Also, do we want the methods to be subpages of Suicide/ or Suicide/Suicide methods/ ? [[User:Leucosticte|Leucosticte]] ([[User talk:Leucosticte|discuss]] • [[Special:Contributions/Leucosticte|contribs]]) 00:23, 18 October 2014 (UTC)
:::::No one dies from sleep, right ? Overdose is the killer the toxicity of it to the organism, that suppresses life maintaining functions...
:::::The location should depend on the size of content that one would include to make Suicide/Suicide methods viable as a subsection in itself (that a reader would need to navigate into). 
:::::PS: If you see the word &quot;exit&quot; used in the context of suicide in the pages you are importing I would appreciate that you change it to suicide. One could create a section about the subject but &quot;exit&quot; has implications that shouldn't be included in the present context of the work (exit to where, exit from where, exit implies that something passes, a beyond the threshold concept that is more in the field of religion). In a more metaphysical consideration one could even say that &quot;exit&quot; requires presence and if a presence exist no one would require or consider an &quot;exit&quot;.   --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|discuss]] • [[Special:Contributions/Panic2k4|contribs]]) 00:42, 18 October 2014 (UTC)
::::::When I think of poisoning, I think of a violently gruesome death like Michael Marin's, as opposed to just drifting off to sleep. Maybe that's just my personal aesthetics, though. &quot;Exit&quot; maybe means &quot;exit life,&quot; &quot;exit consciousness (permanently)&quot;? [[User:Leucosticte|Leucosticte]] ([[User talk:Leucosticte|discuss]] • [[Special:Contributions/Leucosticte|contribs]]) 00:51, 18 October 2014 (UTC)
:::::::Again the word is unnecessary and creates the need to clarify other topics that should be beyond the topic at hand. What is life ? What is to be living ? Would a &quot;living&quot; person ever consider &quot;exiting&quot; ?!? Does &quot;consciousness&quot; end after death ? I have my on answers to those questions (I'm a pantheist) but I respect that others may have different ones as nothing on those subjects is really certain and falls into the field of faith and self understanding.  --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|discuss]] • [[Special:Contributions/Panic2k4|contribs]]) 01:01, 18 October 2014 (UTC)
Someone wrote at Suicide Methods Hideout, &quot;Pentobarbital would be a central nervous system depressant, so i don't think it would be considered a death by toxification. The h2s method might count as toxification, though i'm not certain. Other than that i can think of poisons and extremely slow death by being an avid smoker.&quot; [[User:Leucosticte|Leucosticte]] ([[User talk:Leucosticte|discuss]] • [[Special:Contributions/Leucosticte|contribs]]) 19:11, 18 October 2014 (UTC)
:Its a toxic dosage, you can also die by drinking too much water, its the dosage that becomes toxic as the organism will not be able to process it.  --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|discuss]] • [[Special:Contributions/Panic2k4|contribs]]) 06:23, 19 October 2014 (UTC)

=== Removing the suicide methods section ===
I don't see value of this section, now or in the future.  A book discussing suicide (from any of the perspectives mentioned by [[user:thenub314|thenub314]] above) may be worth having around; a how-to manual is not.  There's a reason those other wikis became defunct; I don't think we should preserve that material here.  In addition to the obvious health and safety concerns, quality and reliability are unlikely to ever be high.  For instance, the current material is random and not well researched, long after the book was created.  [[User:Sj|Sj]] ([[User talk:Sj|discuss]] • [[Special:Contributions/Sj|contribs]]) 02:49, 4 December 2014 (UTC)

:While you may not see a value in it (debatable) you present no just validation for any content removal. We avoid deleting stubs on Wikibooks (meaning that quality is a transient feature here and no project ultimately has a deadline or a &quot;perfect state&quot;). In any case in general we consider deletions as non contributive and we reserve them only for material that has no place here or is supplanted by better contributions.  --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|discuss]] • [[Special:Contributions/Panic2k4|contribs]]) 05:43, 4 December 2014 (UTC)

: On the contrary, information on painless, simple and guaranteed suicide methods is precisely the kind of material that should be included in this book. According to many opinion polls, large majorities of people would prefer euthanasia to a prolonged and agonizing death from an incurable terminal illness such as cancer, but unfortunately assisting euthanasia is illegal in many countries in spite of popular opinion, due to powerful religious lobbies. So, unassisted suicide is the only option for the terminally ill cancer sufferers; a doctor or family member who assisted them would be liable to be prosecuted for murder or manslaughter.

== Sidebar ==

What do you think of the [[Template:Suicide methods]] sidebar? I thought it made navigation pretty easy. [[User:Leucosticte|Leucosticte]] ([[User talk:Leucosticte|discuss]] • [[Special:Contributions/Leucosticte|contribs]]) 03:42, 18 October 2014 (UTC)

:I dislike navebars templates by default, they are hard to maintain, hinder new users and not very helpful considering that the software already creates navigational links if the structure of the pages is &quot;correct&quot;. I don't object but I will not help maintain them. --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|discuss]] • [[Special:Contributions/Panic2k4|contribs]]) 06:13, 19 October 2014 (UTC)

== Subpages ==

There are a lot of subpages that need to be linked to: [[Special:PrefixIndex/Suicide]] [[User:Leucosticte|Leucosticte]] ([[User talk:Leucosticte|discuss]] • [[Special:Contributions/Leucosticte|contribs]]) 01:39, 19 October 2014 (UTC)

:I think you should leave that to the end stage, if I recall it is done by the &lt;nowiki&gt;{{BookCat}}&lt;/nowiki&gt; template. You can add them if you remember but as you will be moving pages and content it may not be urgent.  --[[User:Panic2k4|Panic]] ([[User talk:Panic2k4|discuss]] • [[Special:Contributions/Panic2k4|contribs]]) 06:20, 19 October 2014 (UTC)

== In this section  or In these sections ==
Re: my minor change

I am not sure what the intention of the original author  of [[Suicide#Defining Suicide]] was. Was it ''In this section''  or ''In these sections''? [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 17:10, 19 September 2026 (UTC)</text>
      <sha1>75978wqdrz7nusryhrawg8imet0mgih</sha1>
    </revision>
  </page>
  <page>
    <title>Wikibooks:Reading room/Proposals</title>
    <ns>4</ns>
    <id>155682</id>
    <revision>
      <id>4671232</id>
      <parentid>4669969</parentid>
      <timestamp>2026-09-20T00:26:30Z</timestamp>
      <contributor>
        <username>TechVindicator</username>
        <id>3626296</id>
      </contributor>
      <minor />
      <comment>/* Approve Wikibooks:CheckUser as a local policy? */</comment>
      <origin>4671232</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="5436" sha1="116n0fyp5gkc9uw1wkcrwgs3hwggq7r" xml:space="preserve">__NEWSECTIONLINK__ {{Discussion Rooms}} {{Shortcut|WB:RFC|WB:PROPOSALS}} {{TOC left&lt;!--|limit=2--&gt;}}

Welcome to the '''Proposals reading room'''. On this page, Wikibookians are free to talk about suggestions for improving Wikibooks.

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== New gadget to browse subpages ==

Hi all! I developed a gadget to easily browse subpages through a collapsible menu, that I think might be useful in Wikibooks. Here's a little demo video:

[[File:Subpages_gadget_demo.webm|frameless]]

To test it yourself, add the following to [[Special:MyPage/common.js|your common.js]]:

&lt;syntaxhighlight lang=&quot;javascript&quot;&gt;
mw.loader.load( '//www.mediawiki.org/w/load.php?modules=ext.gadget.Global-Subpages' );
&lt;/syntaxhighlight&gt;

If you find it useful, I can enable it as a gadget to make it generally available from the preferences. Thoughts? Cheers! [[User:Sophivorus|Sophivorus]] ([[User talk:Sophivorus|discuss]] • [[Special:Contributions/Sophivorus|contribs]]) 16:02, 2 July 2026 (UTC)

:Wikibooks relies heavily on subpages, so this is a nice addition. Merci. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 16:43, 2 July 2026 (UTC)
:This could be extremely useful for books here!! I'll note, though, that it doesn't work quite right with the vector legacy skin (what I use). —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 01:20, 3 July 2026 (UTC)
: @[[User:Sophivorus|Sophivorus]] I will be the one in charge installing this as a gadget since there is no objection, but what dependecies does this gadget need to use? You might also want to read Kittycataclysm's suggestion above. ''Muchos saludos''. [[User:Codename Noreste|&lt;span style=&quot;color:#0024FF&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 23:08, 9 July 2026 (UTC)
::@[[User:Codename Noreste|Codename Noreste]] Hi! I just fixed the issue with Vector legacy and also for other skins. Regarding dependencies, this gadget requires &lt;code&gt;mediawiki.api&lt;/code&gt; and &lt;code&gt;@wikimedia/codex&lt;/code&gt;. If you want to take care of the installation, please do not copy-paste the source code, but rather load the global version using &lt;code&gt;mw.loader.load( '//www.mediawiki.org/w/load.php?modules=ext.gadget.Global-Subpages' );&lt;/code&gt;, like other [[mw:Global gadgets|global gadgets]]. Thanks! [[User:Sophivorus|Sophivorus]] ([[User talk:Sophivorus|discuss]] • [[Special:Contributions/Sophivorus|contribs]]) 14:22, 22 July 2026 (UTC)
::: I put the code on the gadgets definition page @[[User:Sophivorus|Sophivorus]], but feel free to fix what I placed. [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 21:45, 22 July 2026 (UTC)

== Breadcrumbs in the title ==

Hi! I think breadcrumbs would be more intuitive, compact and cleaner if they were integrated into the title rather than below it, like so:

&lt;gallery&gt;
Wikisource breadcrumbs proposal (before).png|Current breadcrumbs
Wikisource breadcrumbs proposal (after).png|Proposed breadcrumbs
&lt;/gallery&gt;

What do you think? [[User:Sophivorus|Sophivorus]] ([[User talk:Sophivorus|discuss]] • [[Special:Contributions/Sophivorus|contribs]]) 16:02, 17 August 2026 (UTC)

:I appreciate the effort, but I don't see a big difference or that one would be more usable than another. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 19:14, 17 August 2026 (UTC)

== Approve [[Wikibooks:CheckUser]] as a local policy? ==
Some of the text was based off of the global CheckUser policy, but in this case, should we approve [[Wikibooks:CheckUser]] as a local policy? There is a special clause allowing stewards to perform checks even during non-emergency situations (as set in [[Wikibooks:Global rights policy]]). I have yet to include a part where users may request CU checks. [[User:Codename Noreste|&lt;span style=&quot;color: blue&quot;&gt;Codename Noreste&lt;/span&gt;]] /// [[User talk:Codename Noreste|⭐️✨]] 21:55, 13 September 2026 (UTC)

:I'm somewhat just unsure on what the benefit of making this policy would be. Sure, there's strength in policy, of course. But this seems to be doing fine overall as an information page, no? It doesn't differ very much from the global CU policy, so I'm not sure that a page without any Wikibooks-specific information really benefits from policy status. [[User:EggRoll97|EggRoll97]] ([[User talk:EggRoll97|discuss]] • [[Special:Contributions/EggRoll97|contribs]]) 00:22, 14 September 2026 (UTC)
::I would {{support}} this. [[User:TechVindicator|TechVindicator]] ([[User talk:TechVindicator|discuss]] • [[Special:Contributions/TechVindicator|contribs]]) 00:26, 20 September 2026 (UTC)</text>
      <sha1>116n0fyp5gkc9uw1wkcrwgs3hwggq7r</sha1>
    </revision>
  </page>
  <page>
    <title>Annotations of The Complete Peanuts/1967 to 1968</title>
    <ns>0</ns>
    <id>165830</id>
    <revision>
      <id>4671258</id>
      <parentid>3748363</parentid>
      <timestamp>2026-09-20T02:31:12Z</timestamp>
      <contributor>
        <username>EmetMen</username>
        <id>3624038</id>
      </contributor>
      <comment>added new notation on snoopy's reference to &quot;twiggy&quot;</comment>
      <origin>4671258</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="6123" sha1="66x5jafa1o39mbi3nfnswqmvrj17hgv" xml:space="preserve">&lt;includeonly&gt;==1967&amp;ndash;1968==&lt;/includeonly&gt;
Annotations to '''''The Complete Peanuts: 1967 to 1968''''' by Charles M. Schulz (Fantagraphics Books, 2008. {{ISBN|1560978260}}

*p.&amp;nbsp;8 (January 18, 1967).  The [[w:Fokker D.VII|Fokker D7]] (actually Fokker D.VII) was an advanced German biplane that came into service at the end of [[w:World War I|World War I]], while [[w:Nieuport|Nieuports]] were French-built biplanes widely flown by the Allies.  The [[w:Unter Den Linden|Unter Den Linden]] is a grand boulevard in Berlin, and is here being used as a German substitution for Broadway in the famous song. 

*p.&amp;nbsp;14 (February 1, 1967).  [[w:Barnstorming|Barnstorming]] was an ancestor of the modern Airshow during the 1920s, where First World War pilots flying military surplus aircraft demonstrated aerobatics and were paid to take passengers on brief flights.

*p.&amp;nbsp;23 (February 22, 1967). Charlie Brown invokes the name of [[w:George Washington|George Washington]] on Washington's birthday, to make Sally feel guilty about lying, as Washington was noted for youthful honesty in the apocryphal story of his childhood behavior of, after chopping down a cherry tree, telling his father, &quot;I cannot tell a lie.&quot;

*p.&amp;nbsp;46 (April 16, 1967).  [[w:Sandy Koufax|Sandy Koufax]] was a well known pitcher for the Brooklyn/Los Angeles Dodgers, who had retired in 1966.

*p.&amp;nbsp;68 (June 5, 1967). [[wikipedia:Twiggy|Twiggy]] is an English model who became internationally known in 1966. Her look was very polarizing owing to her skinny figure, short hair, and long eyelashes; all of which contribute to an appearance that some&lt;ref&gt;{{Cite book |last=Nicholson |first=Virginia |title=How was it for you? women, sex, love and power in the 1960s |date=2019 |publisher=Viking, an imprint of Penguin Books |isbn=978-0-241-24237-7 |location=[London], UK}}&lt;/ref&gt;&lt;ref&gt;{{Cite book |last=Woodspring |first=Naomi |title=Baby boomers, age, and beauty |date=2018 |publisher=Emerald Publishing Limited |isbn=978-1-78743-824-8 |pages=p.7}}&lt;/ref&gt; have described as &quot;boyish&quot; 

*p.&amp;nbsp;69 (June 8, 1967). [[w:John J. Pershing|General Pershing]] was the commander of the United States Army in Europe during the First World War.

*p.&amp;nbsp;121 (October 8, 1967).  [[w:Bobby Hull|Bobby Hull]] was one of the finest hockey players of all time, and at the time was playing Left Wing for the Chicago Black Hawks.

*p.&amp;nbsp;141 (November 25, 1967).  At the time of this strip, the [[w:New York Mets|New York Mets]] were a recent expansion Baseball club with a terrible win-loss record, which is what Linus is referring to here.

*p.&amp;nbsp;146 (December 4, 1967).  [[w:Sonja Henie|Sonja Henie]] was a three-time gold medal winning Olympic figure skater from Norway, who later became a professional figure skater and film star.

*p.&amp;nbsp;200 (April 9, 1968).  “Arnold and Winnie” refers to golfer [[w:Arnold Palmer|Arnold Palmer]], one of the best known golfers of the era, and his wife Winifred.

*p.&amp;nbsp;200 (April 10, 1968).  The golfers being referred to here are [[w:Arnold Palmer|Arnold Palmer]], [[w:Sam Snead|Sam Snead]], and [[w:Ben Hogan|Ben Hogan]]. 

*p.&amp;nbsp;201 (April 9, 1968).  “Snoopy‘s Squad” presumably refers to the many fans of Arnold Palmer, who were collectively known as “Arnie’s Army”.

*p.&amp;nbsp;206 (April 22, 1968).  [[w:Petaluma, California|Petaluma, Ca.]], has held the world wrist wrestling championships from 1952 to 2003.

*p.&amp;nbsp;226 (June 9, 1968).  Schroeder is playing the first movement of Beethoven's piano sonata No. 8 in c minor, op. 13, the &quot;Pathethique&quot;.

*p.&amp;nbsp;227 (June 10, 1968).  The phrase in the final frame is a spoof on the then current television spy show ''[[w:Mission: Impossible|Mission: Impossible]]'', in which the leader of the Impossible Mission Force is delivered a mission at the beginning of each show in the form of a tape recording.  After describing the mission, the recording then warns that it will “self-destruct in five seconds” before it disintegrates in a puff of smoke.

*p.&amp;nbsp;248 (July 31, 1968).  Franklin’s first appearance in the strip.

*p.&amp;nbsp;250 (August 4, 1968).  [[w:Muscle Beach|Muscle Beach]] is a beachfront area in the Los Angeles, California area, known for demonstrations by weightlifters and acrobats.

*p.&amp;nbsp;251 (August 6, 1968).  &quot;[[w:Chloe (song)|Chloe]]&quot; is a Jazz standard from 1927 with music by Neil Moret and lyrics by Gus Kahn.

*p.&amp;nbsp;266 (September 10, 1968).  [[w:Tiny Tim (musician)|Tiny Tim]] was the stage name of Herbert Khaury, a popular novelty musician of the time.

*p.&amp;nbsp;268 (September 15, 1968).  [[w:Love beads|Love beads]] were a frequent fashion accessory of the time worn by both male and female [[w:Hippie|hippies]].

*p.&amp;nbsp;273 (September 28, 1968).  A [[w:Holding (aviation)|holding pattern]] is a circling manoeuvre used by aircraft that are waiting to land at an overcrowded airport.

*p.&amp;nbsp;279 (October 11, 1968).  Snoopy is acknowledging some of the best hockey players of the era:  Stan ([[w:Stan Mikita|Mikita]]), Bobby ([[w:Bobby Hull|Hull]] or [[w:Bobby Orr|Orr]]) , and Maurice ([[w:Maurice Richard|‘Rocket’ Richard)]]. 

*p.&amp;nbsp;289 (September 28, 1968).  [[w:Minnesota Fats|Minnesota Fats]] is the nickname of fictional pool hustler George Hegerman, created  by author [[w:Walter Tevis|Walter Tevis]] in the novels ''[[w:The Hustler (novel)|The Hustler]]'' and ''[[w:The Color of Money|The Color of Money]]''.

*p.&amp;nbsp;305 (December 11, 1968).  [[w:Jack Nicklaus|Jack Nicklaus]] was one of the finest professional golfers of all time.

*p.&amp;nbsp;308 (December 18, 1968).  Rosebud is a reference to the film ''[[w:Citizen Kane|Citizen Kane]]'' by Orson Welles.

*p.&amp;nbsp;310 (December 22, 1968).  Linus is taking Lucy’s dictation with [[w:Shorthand|shorthand]], an abbreviated form of writing that was more commonly used before the wide availability of voice recording equipment.  In this era, secretaries were almost inevitably female, and a female with a male secretary would have been considered most unusual.

{{:Annotations of The Complete Peanuts/PeanutsNavLine}}</text>
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    </revision>
    <revision>
      <id>4671259</id>
      <parentid>4671258</parentid>
      <timestamp>2026-09-20T02:32:18Z</timestamp>
      <contributor>
        <username>EmetMen</username>
        <id>3624038</id>
      </contributor>
      <minor />
      <origin>4671259</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="6121" sha1="gvzmk1eogt65ae6l2t8zsq69o9osvgt" xml:space="preserve">&lt;includeonly&gt;==1967&amp;ndash;1968==&lt;/includeonly&gt;
Annotations to '''''The Complete Peanuts: 1967 to 1968''''' by Charles M. Schulz (Fantagraphics Books, 2008. {{ISBN|1560978260}}

*p.&amp;nbsp;8 (January 18, 1967).  The [[w:Fokker D.VII|Fokker D7]] (actually Fokker D.VII) was an advanced German biplane that came into service at the end of [[w:World War I|World War I]], while [[w:Nieuport|Nieuports]] were French-built biplanes widely flown by the Allies.  The [[w:Unter Den Linden|Unter Den Linden]] is a grand boulevard in Berlin, and is here being used as a German substitution for Broadway in the famous song. 

*p.&amp;nbsp;14 (February 1, 1967).  [[w:Barnstorming|Barnstorming]] was an ancestor of the modern Airshow during the 1920s, where First World War pilots flying military surplus aircraft demonstrated aerobatics and were paid to take passengers on brief flights.

*p.&amp;nbsp;23 (February 22, 1967). Charlie Brown invokes the name of [[w:George Washington|George Washington]] on Washington's birthday, to make Sally feel guilty about lying, as Washington was noted for youthful honesty in the apocryphal story of his childhood behavior of, after chopping down a cherry tree, telling his father, &quot;I cannot tell a lie.&quot;

*p.&amp;nbsp;46 (April 16, 1967).  [[w:Sandy Koufax|Sandy Koufax]] was a well known pitcher for the Brooklyn/Los Angeles Dodgers, who had retired in 1966.

*p.&amp;nbsp;68 (June 5, 1967). [[wikipedia:Twiggy|Twiggy]] is an English model who became internationally known in 1966. Her look was very polarizing owing to her skinny figure, short hair, and long eyelashes; all of which contribute to an appearance that some&lt;ref&gt;{{Cite book |last=Nicholson |first=Virginia |title=How was it for you? women, sex, love and power in the 1960s |date=2019 |publisher=Viking, an imprint of Penguin Books |isbn=978-0-241-24237-7 |location=[London], UK}}&lt;/ref&gt;&lt;ref&gt;{{Cite book |last=Woodspring |first=Naomi |title=Baby boomers, age, and beauty |date=2018 |publisher=Emerald Publishing Limited |isbn=978-1-78743-824-8 |pages=7}}&lt;/ref&gt; have described as &quot;boyish&quot; 

*p.&amp;nbsp;69 (June 8, 1967). [[w:John J. Pershing|General Pershing]] was the commander of the United States Army in Europe during the First World War.

*p.&amp;nbsp;121 (October 8, 1967).  [[w:Bobby Hull|Bobby Hull]] was one of the finest hockey players of all time, and at the time was playing Left Wing for the Chicago Black Hawks.

*p.&amp;nbsp;141 (November 25, 1967).  At the time of this strip, the [[w:New York Mets|New York Mets]] were a recent expansion Baseball club with a terrible win-loss record, which is what Linus is referring to here.

*p.&amp;nbsp;146 (December 4, 1967).  [[w:Sonja Henie|Sonja Henie]] was a three-time gold medal winning Olympic figure skater from Norway, who later became a professional figure skater and film star.

*p.&amp;nbsp;200 (April 9, 1968).  “Arnold and Winnie” refers to golfer [[w:Arnold Palmer|Arnold Palmer]], one of the best known golfers of the era, and his wife Winifred.

*p.&amp;nbsp;200 (April 10, 1968).  The golfers being referred to here are [[w:Arnold Palmer|Arnold Palmer]], [[w:Sam Snead|Sam Snead]], and [[w:Ben Hogan|Ben Hogan]]. 

*p.&amp;nbsp;201 (April 9, 1968).  “Snoopy‘s Squad” presumably refers to the many fans of Arnold Palmer, who were collectively known as “Arnie’s Army”.

*p.&amp;nbsp;206 (April 22, 1968).  [[w:Petaluma, California|Petaluma, Ca.]], has held the world wrist wrestling championships from 1952 to 2003.

*p.&amp;nbsp;226 (June 9, 1968).  Schroeder is playing the first movement of Beethoven's piano sonata No. 8 in c minor, op. 13, the &quot;Pathethique&quot;.

*p.&amp;nbsp;227 (June 10, 1968).  The phrase in the final frame is a spoof on the then current television spy show ''[[w:Mission: Impossible|Mission: Impossible]]'', in which the leader of the Impossible Mission Force is delivered a mission at the beginning of each show in the form of a tape recording.  After describing the mission, the recording then warns that it will “self-destruct in five seconds” before it disintegrates in a puff of smoke.

*p.&amp;nbsp;248 (July 31, 1968).  Franklin’s first appearance in the strip.

*p.&amp;nbsp;250 (August 4, 1968).  [[w:Muscle Beach|Muscle Beach]] is a beachfront area in the Los Angeles, California area, known for demonstrations by weightlifters and acrobats.

*p.&amp;nbsp;251 (August 6, 1968).  &quot;[[w:Chloe (song)|Chloe]]&quot; is a Jazz standard from 1927 with music by Neil Moret and lyrics by Gus Kahn.

*p.&amp;nbsp;266 (September 10, 1968).  [[w:Tiny Tim (musician)|Tiny Tim]] was the stage name of Herbert Khaury, a popular novelty musician of the time.

*p.&amp;nbsp;268 (September 15, 1968).  [[w:Love beads|Love beads]] were a frequent fashion accessory of the time worn by both male and female [[w:Hippie|hippies]].

*p.&amp;nbsp;273 (September 28, 1968).  A [[w:Holding (aviation)|holding pattern]] is a circling manoeuvre used by aircraft that are waiting to land at an overcrowded airport.

*p.&amp;nbsp;279 (October 11, 1968).  Snoopy is acknowledging some of the best hockey players of the era:  Stan ([[w:Stan Mikita|Mikita]]), Bobby ([[w:Bobby Hull|Hull]] or [[w:Bobby Orr|Orr]]) , and Maurice ([[w:Maurice Richard|‘Rocket’ Richard)]]. 

*p.&amp;nbsp;289 (September 28, 1968).  [[w:Minnesota Fats|Minnesota Fats]] is the nickname of fictional pool hustler George Hegerman, created  by author [[w:Walter Tevis|Walter Tevis]] in the novels ''[[w:The Hustler (novel)|The Hustler]]'' and ''[[w:The Color of Money|The Color of Money]]''.

*p.&amp;nbsp;305 (December 11, 1968).  [[w:Jack Nicklaus|Jack Nicklaus]] was one of the finest professional golfers of all time.

*p.&amp;nbsp;308 (December 18, 1968).  Rosebud is a reference to the film ''[[w:Citizen Kane|Citizen Kane]]'' by Orson Welles.

*p.&amp;nbsp;310 (December 22, 1968).  Linus is taking Lucy’s dictation with [[w:Shorthand|shorthand]], an abbreviated form of writing that was more commonly used before the wide availability of voice recording equipment.  In this era, secretaries were almost inevitably female, and a female with a male secretary would have been considered most unusual.

{{:Annotations of The Complete Peanuts/PeanutsNavLine}}</text>
      <sha1>gvzmk1eogt65ae6l2t8zsq69o9osvgt</sha1>
    </revision>
    <revision>
      <id>4671260</id>
      <parentid>4671259</parentid>
      <timestamp>2026-09-20T02:33:33Z</timestamp>
      <contributor>
        <username>EmetMen</username>
        <id>3624038</id>
      </contributor>
      <minor />
      <origin>4671260</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="6119" sha1="kpqwu4q2zv9efa9t3974o66udf08ecp" xml:space="preserve">&lt;includeonly&gt;==1967&amp;ndash;1968==&lt;/includeonly&gt;
Annotations to '''''The Complete Peanuts: 1967 to 1968''''' by Charles M. Schulz (Fantagraphics Books, 2008. {{ISBN|1560978260}}

*p.&amp;nbsp;8 (January 18, 1967).  The [[w:Fokker D.VII|Fokker D7]] (actually Fokker D.VII) was an advanced German biplane that came into service at the end of [[w:World War I|World War I]], while [[w:Nieuport|Nieuports]] were French-built biplanes widely flown by the Allies.  The [[w:Unter Den Linden|Unter Den Linden]] is a grand boulevard in Berlin, and is here being used as a German substitution for Broadway in the famous song. 

*p.&amp;nbsp;14 (February 1, 1967).  [[w:Barnstorming|Barnstorming]] was an ancestor of the modern Airshow during the 1920s, where First World War pilots flying military surplus aircraft demonstrated aerobatics and were paid to take passengers on brief flights.

*p.&amp;nbsp;23 (February 22, 1967). Charlie Brown invokes the name of [[w:George Washington|George Washington]] on Washington's birthday, to make Sally feel guilty about lying, as Washington was noted for youthful honesty in the apocryphal story of his childhood behavior of, after chopping down a cherry tree, telling his father, &quot;I cannot tell a lie.&quot;

*p.&amp;nbsp;46 (April 16, 1967).  [[w:Sandy Koufax|Sandy Koufax]] was a well known pitcher for the Brooklyn/Los Angeles Dodgers, who had retired in 1966.

*p.&amp;nbsp;68 (June 5, 1967). [[wikipedia:Twiggy|Twiggy]] is an English model who became internationally known in 1966. Her look was very polarizing owing to her skinny figure, short hair, and long eyelashes; all of which contribute to an appearance that some&lt;ref&gt;{{Cite book |last=Nicholson |first=Virginia |title=How was it for you? women, sex, love and power in the 1960s |date=2019 |publisher=Viking, an imprint of Penguin Books |isbn=978-0-241-24237-7 |location=London, UK}}&lt;/ref&gt;&lt;ref&gt;{{Cite book |last=Woodspring |first=Naomi |title=Baby boomers, age, and beauty |date=2018 |publisher=Emerald Publishing Limited |isbn=978-1-78743-824-8 |pages=7}}&lt;/ref&gt; have described as &quot;boyish&quot; 

*p.&amp;nbsp;69 (June 8, 1967). [[w:John J. Pershing|General Pershing]] was the commander of the United States Army in Europe during the First World War.

*p.&amp;nbsp;121 (October 8, 1967).  [[w:Bobby Hull|Bobby Hull]] was one of the finest hockey players of all time, and at the time was playing Left Wing for the Chicago Black Hawks.

*p.&amp;nbsp;141 (November 25, 1967).  At the time of this strip, the [[w:New York Mets|New York Mets]] were a recent expansion Baseball club with a terrible win-loss record, which is what Linus is referring to here.

*p.&amp;nbsp;146 (December 4, 1967).  [[w:Sonja Henie|Sonja Henie]] was a three-time gold medal winning Olympic figure skater from Norway, who later became a professional figure skater and film star.

*p.&amp;nbsp;200 (April 9, 1968).  “Arnold and Winnie” refers to golfer [[w:Arnold Palmer|Arnold Palmer]], one of the best known golfers of the era, and his wife Winifred.

*p.&amp;nbsp;200 (April 10, 1968).  The golfers being referred to here are [[w:Arnold Palmer|Arnold Palmer]], [[w:Sam Snead|Sam Snead]], and [[w:Ben Hogan|Ben Hogan]]. 

*p.&amp;nbsp;201 (April 9, 1968).  “Snoopy‘s Squad” presumably refers to the many fans of Arnold Palmer, who were collectively known as “Arnie’s Army”.

*p.&amp;nbsp;206 (April 22, 1968).  [[w:Petaluma, California|Petaluma, Ca.]], has held the world wrist wrestling championships from 1952 to 2003.

*p.&amp;nbsp;226 (June 9, 1968).  Schroeder is playing the first movement of Beethoven's piano sonata No. 8 in c minor, op. 13, the &quot;Pathethique&quot;.

*p.&amp;nbsp;227 (June 10, 1968).  The phrase in the final frame is a spoof on the then current television spy show ''[[w:Mission: Impossible|Mission: Impossible]]'', in which the leader of the Impossible Mission Force is delivered a mission at the beginning of each show in the form of a tape recording.  After describing the mission, the recording then warns that it will “self-destruct in five seconds” before it disintegrates in a puff of smoke.

*p.&amp;nbsp;248 (July 31, 1968).  Franklin’s first appearance in the strip.

*p.&amp;nbsp;250 (August 4, 1968).  [[w:Muscle Beach|Muscle Beach]] is a beachfront area in the Los Angeles, California area, known for demonstrations by weightlifters and acrobats.

*p.&amp;nbsp;251 (August 6, 1968).  &quot;[[w:Chloe (song)|Chloe]]&quot; is a Jazz standard from 1927 with music by Neil Moret and lyrics by Gus Kahn.

*p.&amp;nbsp;266 (September 10, 1968).  [[w:Tiny Tim (musician)|Tiny Tim]] was the stage name of Herbert Khaury, a popular novelty musician of the time.

*p.&amp;nbsp;268 (September 15, 1968).  [[w:Love beads|Love beads]] were a frequent fashion accessory of the time worn by both male and female [[w:Hippie|hippies]].

*p.&amp;nbsp;273 (September 28, 1968).  A [[w:Holding (aviation)|holding pattern]] is a circling manoeuvre used by aircraft that are waiting to land at an overcrowded airport.

*p.&amp;nbsp;279 (October 11, 1968).  Snoopy is acknowledging some of the best hockey players of the era:  Stan ([[w:Stan Mikita|Mikita]]), Bobby ([[w:Bobby Hull|Hull]] or [[w:Bobby Orr|Orr]]) , and Maurice ([[w:Maurice Richard|‘Rocket’ Richard)]]. 

*p.&amp;nbsp;289 (September 28, 1968).  [[w:Minnesota Fats|Minnesota Fats]] is the nickname of fictional pool hustler George Hegerman, created  by author [[w:Walter Tevis|Walter Tevis]] in the novels ''[[w:The Hustler (novel)|The Hustler]]'' and ''[[w:The Color of Money|The Color of Money]]''.

*p.&amp;nbsp;305 (December 11, 1968).  [[w:Jack Nicklaus|Jack Nicklaus]] was one of the finest professional golfers of all time.

*p.&amp;nbsp;308 (December 18, 1968).  Rosebud is a reference to the film ''[[w:Citizen Kane|Citizen Kane]]'' by Orson Welles.

*p.&amp;nbsp;310 (December 22, 1968).  Linus is taking Lucy’s dictation with [[w:Shorthand|shorthand]], an abbreviated form of writing that was more commonly used before the wide availability of voice recording equipment.  In this era, secretaries were almost inevitably female, and a female with a male secretary would have been considered most unusual.

{{:Annotations of The Complete Peanuts/PeanutsNavLine}}</text>
      <sha1>kpqwu4q2zv9efa9t3974o66udf08ecp</sha1>
    </revision>
  </page>
  <page>
    <title>Aros/User/Applications</title>
    <ns>0</ns>
    <id>237399</id>
    <revision>
      <id>4671162</id>
      <parentid>4671137</parentid>
      <timestamp>2026-09-19T13:49:48Z</timestamp>
      <contributor>
        <username>Jeff1138</username>
        <id>301139</id>
      </contributor>
      <minor />
      <origin>4671162</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="241666" sha1="otrkhrcv137glgysue148weiiqnzp3m" xml:space="preserve">
==Introduction==


[[#Graphical Image Editing Art]]
[[#Office Application]]
[[#Audio]]

[[#Misc Application]]
[[#Games &amp; Emulation]]

[[#Application Guides]]

[[#top|...to the top]]


[[#top|...to the top]]

Most apps can be opened on the Workbench (aka publicscreen pubscreen) which is the default display option but can offer a custom one set to your configurations (aka custom screen mode promotion). These custom ones tend to stack so the possible use of A-M/A-N method of switching between full screens and the ability to pull down screens as well 

If you are interested in creating or porting new software, see [http://en.wikibooks.org/wiki/Aros/Developer/Docs here]

{|  class=&quot;wikitable sortable&quot; 
|- 
!width:30%;|Internet Applications 
!width:10%;|AROS(x86)
!width:10%;|Commodore-Amiga OS 3.1 (68k)
!width:10%;|Hyperion OS4(PPC)
!width:10%;|MorphOS(PPC)
|-
|&lt;!--Sub Menu--&gt;Web Online Browser [], 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser Amelinium], Odyssey 2.0, [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=1175&amp;highlight=odyssey&amp;rowstart=100 Odyssey 3.0], [], 
|&lt;!--Amiga OS--&gt;[https://juen.in/ Amelinium], [https://blog.alb42.de/programs/amifox/ amifox] with [https://github.com/alb42/wrp wrp server], IBrowse*, [https://github.com/zapek/Voyager Voyager], [https://github.com/amigazen/aweb3/ AWeb 3.6 src], [https://github.com/matjam/aweb AWeb Src], [http://aminet.net/package/comm/www/NetSurf-m68k-sources Netsurf], [], 
|&lt;!--AmigaOS4--&gt;[ Odyssey OWB], [ Timberwolf (Firefox port 2011)], [http://amigaworld.net/modules/newbb/viewtopic.php?forum=32&amp;topic_id=32847 OWB-mui], [http://strohmayer.org/owb/ OWB-Reaction], IBrowse*, [http://os4depot.net/index.php?function=showfile&amp;file=network/browser/aweb.lha AWeb], Voyager, [http://www.os4depot.net/index.php?function=browse&amp;cat=network/browser Netsurf], 
|&lt;!--MorphOS--&gt;Wayfarer, [http://fabportnawak.free.fr/owb/ Odyssey OWB], [ Netsurf], IBrowse*, AWeb, [], 
|-
|&lt;!--Sub Menu--&gt;YouTube, Dailymotion website downloading videos audio [https://github.com/yt-dlp/yt-dlp yt-dlp], [https://clipgrab.org/ clipgrab],  
|&lt;!--AROS--&gt;[], [https://blog.alb42.de/amitube/ Amitube], 
|&lt;!--Amiga OS--&gt;[https://blog.alb42.de/amitube/ Amitube], [ smtube], 
|&lt;!--AmigaOS4--&gt;[https://blog.alb42.de/amitube/ Amitube], getVideo, Tubexx, [https://github.com/walkero-gr/aiostreams aiostreams], 
|&lt;!--MorphOS--&gt;[ ytsearch], [https://blog.alb42.de/amitube/ Amitube], [http://morphos.lukysoft.cz/en/vypis.php?kat=5 getVideo], Tubexx 
|-
|&lt;!--Sub Menu--&gt;Old style E-mailing SMTP POP3 IMAP based 
|&lt;!--AROS--&gt;Emailinium, [http://archives.arosworld.org/index.php?function=browse&amp;cat=network/email SimpleMail], [http://sourceforge.net/projects/simplemail/files/ src], [https://github.com/jens-maus/yam YAM] 
|&lt;!--Amiga OS--&gt;Emailinium, [http://sourceforge.net/projects/simplemail/files/ SimpleMail], [https://github.com/jens-maus/yam YAM]
|&lt;!--AmigaOS4--&gt;SimpleMail, YAM, 
|&lt;!--MorphOS--&gt; SimpleMail, YAM
|-
|&lt;!--Sub Menu--&gt;IRC, ICB, 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/chat WookieChat], [https://sourceforge.net/projects/wookiechat/ Wookiechat src], [http://archives.arosworld.org/index.php?function=browse&amp;cat=network/chat AiRcOS], Jabberwocky, 
|&lt;!--Amiga OS--&gt;[https://github.com/charabaruk/WookieChat Wookiechat], AmIRC 
|&lt;!--AmigaOS4--&gt;Wookiechat 
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=5 Wookiechat], [http://morphos.lukysoft.cz/en/vypis.php?kat=5 AmIRC], 
|-
|&lt;!--Sub Menu--&gt;Instant Messaging IM like [https://github.com/BlitterStudio/amidon Hollywood lang based Mastodon client], BlueSky AT protocol, Facebook(TM), Twitter X (TM), Bitlbee IRC Gateway and others 
|&lt;!--AROS--&gt;[https://github.com/kaffeine1/telegram-amiga telegram-amiga], [http://archives.arosworld.org/index.php?function=browse&amp;cat=network/chat jabberwocky], 
|&lt;!--Amiga OS--&gt;[http://amitwitter.sourceforge.net/ AmiTwitter], CLIMM, SabreMSN, [https://sourceforge.net/projects/ajabberwocky/ jabberwocky], 
|&lt;!--AmigaOS4--&gt;[http://amitwitter.sourceforge.net/ AmiTwitter], SabreMSN,
|&lt;!--MorphOS--&gt;[http://amitwitter.sourceforge.net/ AmiTwitter], [http://morphos.lukysoft.cz/en/vypis.php?kat=5 PolyglotNG], SabreMSN,
|-
|&lt;!--Sub Menu--&gt;Torrents 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/p2p ArTorr], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;CTorrent, Transmission 
|&lt;!--MorphOS--&gt;MLDonkey, Beehive, [http://morphos.lukysoft.cz/en/vypis.php?kat=5 Transmission], CTorrent, 
|-
|&lt;!--Sub Menu--&gt;FTP 
|&lt;!--AROS--&gt;[https://github.com/BlitterStudio/dopus5 Dopus5 Magellan], MarranoFTP, [https://aminet.net/package/comm/tcp/wput-0.3.4c.i386-aros wput i386 c src]
|&lt;!--Amiga OS--&gt;[https://github.com/BlitterStudio/dopus5 Dopus5 Magellan], [http://aminet.net/package/comm/tcp/AmiFTP AmiFTP], AmiTradeCenter, ncFTP, [https://aminet.net/package/comm/tcp/sana2-tftpclient sana2 tftpclient c src]
|&lt;!--AmigaOS4--&gt;[https://github.com/BlitterStudio/dopus5 Dopus5 Magellan], 
|&lt;!--MorphOS--&gt;[https://github.com/BlitterStudio/dopus5 Dopus5 Magellan], [http://morphos.lukysoft.cz/en/vypis.php?kat=5 Pftp], [http://aminet.net/package/comm/tcp/AmiFTP-1.935-OS4 AmiFTP], 
|-
|&lt;!--Sub Menu--&gt;WYSIWYG Web Site Editor
|&lt;!--AROS--&gt; 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Internet Radio Streaming Audio [http://www.gnu.org/software/gnump3d/ gnump3d], [http://www.icecast.org/ Icecast2] Server (Broadcast) and Client (Listen), [ mpd], [http://darkice.sourceforge.net/ DarkIce], [http://www.dyne.org/software/muse/ Muse], 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=audio/misc], Mplayer (Icecast Client only), 
|&lt;!--Amiga OS--&gt;[https://github.com/sandlbn/TuneFinder TuneFinder C Src], [https://github.com/sandlbn/TuneFinderMUI TuneFinderMUI], [http://amigazeux.net/anr/ AmiNetRadio], [https://github.com/boingball/MintAMP MintAMP], [], 
|&lt;!--AmigaOS4--&gt;[http://www.tunenet.co.uk/ Tunenet], 
|&lt;!--MorphOS--&gt;Mplayer, AmiNetRadio, 
|-
|&lt;!--Sub Menu--&gt;VoIP (Voice over IP) with SIP Client (Session Initiation Protocol) or Asterisk IAX2 Clients Softphone (skype like) 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;AmiPhone with Speak Freely, 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Weather Forecast 
|&lt;!--AROS--&gt;[http://sourceforge.net/projects/zunetools/files/ WeatherBar], [http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/workbench AWeather], []
|&lt;!--Amiga OS--&gt;[http://amigazeux.net/wetter/ Wetter], [https://github.com/emartisoft/AmiWeatherForecasts AmiWeatherForecasts src], 
|&lt;!--AmigaOS4--&gt;[http://os4depot.net/?function=showfile&amp;file=utility/workbench/flipclock.lha FlipClock], 
|&lt;!--MorphOS--&gt;[http://amigazeux.net/wetter/ Wetter], 
|-
|&lt;!--Sub Menu--&gt;Street Road Maps Route Planning GPS Tracking  
|&lt;!--AROS--&gt;[https://blog.alb42.de/programs/muimapparium/ MuiMapparium] [https://build.alb42.de/ Build of MuiMapp versions], 
|&lt;!--Amiga OS--&gt;AmiAtlas*, UKRoutePlus*, [http://blog.alb42.de/ AmOSM], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;[http://blog.alb42.de/programs/mapparium/ Mapparium], 
|-
|&lt;!--Sub Menu--&gt;Clock and Date setting from the internet (either ntp or websites) [https://www.timeanddate.com/worldclock/ World Clock], [http://www.time.gov/ NIST], [], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/misc ntpsync],  
|&lt;!--Amiga OS--&gt;ntpsync 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Newsgroups
|&lt;!--AROS--&gt; 
|&lt;!--Amiga OS--&gt;[http://newscoaster.sourceforge.net/ Newscoaster], [https://github.com/jens-maus/newsrog NewsRog], [ WorldNews], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;RSS 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;[https://github.com/Team-Boingo/AmiRSS AmiRSS src]
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;AI
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;[https://github.com/murinsel/AmigaAI Claude], [https://github.com/geekychris/amiga_mcp AI on host machine], [], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;BBS
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt; 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt; 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|}

&lt;nowiki&gt;*&lt;/nowiki&gt; Commercial product.


==Graphical Image Editing Art==
{|  class=&quot;wikitable sortable&quot; 
|- 
!width:30%;|Image Editing
!width:10%;|AROS(x86)
!width:10%;|Commodore-Amiga OS 3.1(68k)
!width:10%;|Hyperion OS4(PPC)
!width:10%;|MorphOS(PPC)
|-
|&lt;!--Sub Menu--&gt;Pixel Raster Artwork [https://github.com/LibreSprite/LibreSprite LibreSprite based on GPL aseprite], [https://github.com/abetusk/hsvhero hsvhero], [], 
|&lt;!--AROS--&gt;[https://sourceforge.net/projects/zunetools/files/ZunePaint/ ZunePaint], [http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/edit LunaPaint], [http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/edit GrafX2], [ LodePaint needs OpenGL], 
|&lt;!--Amiga OS--&gt;[http://www.amigaforever.com/classic/download.html PPaint], GrafX2, [https://github.com/grovdata/Amiga_Sources/blob/master/software.md DeluxePaint], [http://www.amiforce.de/perfectpaint/perfectpaint.php PerfectPaint], Zoetrope, Brilliance2*, 
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=graphics/edit LodePaint], GrafX2, 
|&lt;!--MorphOS--&gt;Sketch, Pixel*, GrafX2, [http://morphos.lukysoft.cz/en/vypis.php?kat=3 LunaPaint]
|-
|&lt;!--Sub Menu--&gt;Image viewing 
|&lt;!--AROS--&gt;[http://sourceforge.net/projects/zunetools/files/ ZuneView], [http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/viewer LookHere], [http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/viewer LoView], [http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/viewer PicShow] , [http://amigaworld.net/modules/newbb/viewtopic.php?mode=viewtopic&amp;topic_id=31400&amp;forum=32&amp;start=80&amp;viewmode=flat&amp;order=0#583458 Picture Album], 
|&lt;!--Amiga OS--&gt;PicShow, PicView, Photoalbum,
|&lt;!--AmigaOS4--&gt;WarpView, PicShow, flPhoto, Thumbs, [http://amigaworld.net/modules/newbb/viewtopic.php?mode=viewtopic&amp;topic_id=31400&amp;forum=32&amp;start=80&amp;viewmode=flat&amp;order=0#583458 Picture Album], 
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=3 ShowGirls], [http://amigaworld.net/modules/newbb/viewtopic.php?mode=viewtopic&amp;topic_id=31400&amp;forum=32&amp;start=80&amp;viewmode=flat&amp;order=0#583458 Picture Album]
|-
|&lt;!--Sub Menu--&gt;Photography retouching / Image Manipulation like Photoshop(tm)  
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/edit RNOEffects], 
|&lt;!--Amiga OS--&gt;[ Tecsoft Video Paint aka TVPaint], Photogenics*, ArtEffect*, ImageFX*, XiPaint, fxPaint, ImageMasterRT, Opalpaint, 
|&lt;!--AmigaOS4--&gt;WarpView, flPhoto, [http://www.os4depot.net/index.php?function=browse&amp;cat=graphics/edit Photocrop]
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=3 ShowGirls], ImageFX*, 
|-
|&lt;!--Sub Menu--&gt;Manage RAW picture folder galleries like Darktable, RAWtherapy, etc 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Graphic Format Converter - ICC profile support sRGB, Adobe RGB, XYZ and linear RGB 
|&lt;!--AROS--&gt; 
|&lt;!--Amiga OS--&gt;GraphicsConverter, ImageStudio, [http://www.coplabs.org/artpro.html ArtPro]
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Thumbnail Generator [], 
|&lt;!--AROS--&gt;[http://sourceforge.net/projects/zunetools/files/ ZuneView], [http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/shell Thumbnail Generator]
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Icon Editor
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/iconedit Archives], [http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/workbench Icon Toolbox], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=graphics/iconedit IconEditor]
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;2D Pixel Art Animation 
|&lt;!--AROS--&gt;Lunapaint
|&lt;!--Amiga OS--&gt;PPaint, AnimatED, Scala*, GoldDisk MovieSetter*, Walt Disney's Animation Studio*, ProDAD*, [https://github.com/historicalsource/DeluxePaint DeluxePaint src], Brilliance
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=3 Titler] 
|-
|&lt;!--Sub Menu--&gt;2D SVG based MovieSetter type 
|&lt;!--AROS--&gt; 
|&lt;!--Amiga OS--&gt;MovieSetter*, Fantavision*
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Morphing 
|&lt;!--AROS--&gt;[ GLMorph]
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;2D Cad (qcad-&gt;LibreCAD, etc.) 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;Xcad, MaxonCAD
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;3D Cad like FreeCad, BRL-CAD, OpenSCAD, AvoCADo, etc. using dxf, obj (vertices), blend, 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;XCad3d*, DynaCADD*, [https://aminet.net/package/gfx/3d/Cycas178_EN Cycas]*, 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;3D Model Rendering of glft (json) gbl (png jpg), usdz (USD files with materials, textures, and animations), FBX Filmbox is a proprietary Autodesk format, 
|&lt;!--AROS--&gt;POV-Ray
|&lt;!--Amiga OS--&gt;[http://www.discreetfx.com./amigaproducts.html CINEMA 4D]*, POV-Ray, Lightwave3D*, Real3D*, Caligari24*, Reflections/Monzoom*, [https://github.com/privatosan/RayStorm Raystorm src], Tornado 3D, [https://github.com/AlphaPixel/Eric-Graham-1987-Juggler-Raytracer-1.0 Eric-Graham-1987-Juggler-Raytracer-1.0]
|&lt;!--AmigaOS4--&gt;Blender, POV-Ray, Yafray
|&lt;!--MorphOS--&gt;Blender, POV-Ray, Yafray
|-
|&lt;!--Sub Menu--&gt;3D Format Converter [], [], 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/?function=showfile&amp;file=graphics/convert/ 3doc.i386-aros], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=showfile&amp;file=graphics/convert/ivcon.lha IVCon]
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Screen grabbing display 
|&lt;!--AROS--&gt;[ Screengrabber], [http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/misc snapit], [http://archives.arosworld.org/index.php?function=browse&amp;cat=video/record screen recorder], []
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Grab graphics music from apps [https://github.com/Malvineous/ripper6 ripper6], [],
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt; 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt; 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|}

&lt;nowiki&gt;*&lt;/nowiki&gt; Commercial product.

[[#top|...to the top]]

==Office Application==
{|  class=&quot;wikitable sortable&quot; 
|- 
!width:30%;|Office
!width:10%;|AROS (x86)
!width:10%;|[http://en.wikipedia.org/wiki/Amiga_software Commodore-Amiga OS 3.1] (68k)
!width:10%;|[http://en.wikipedia.org/wiki/AmigaOS_4 Hyperion OS4] (PPC)
!width:10%;|[http://en.wikipedia.org/wiki/MorphOS MorphOS] (PPC)
|-
|&lt;!--Sub Menu--&gt;Office Suite 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;[ Softwood Final Office], [ Wordworth Office], [ Digita Office],  [ The Works!], [ Europress Mini Office], [], [ Papyrus Office Demo], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;[ Papyrus Office], 
|-
|&lt;!--Sub Menu--&gt;Word-processing 
|&lt;!--AROS--&gt;[https://finalwriter.godaddysites.com/ Final Writer 7*], [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=1995&amp;rowstart=20&amp;pid=12668#post_12668 Slovo], [https://github.com/sodero/MUI-Vim/releases MUI-Vim], [https://archives.arosworld.org/index.php?function=browse&amp;cat=office/wordprocessing Cinnamon Writer], [], 
|&lt;!--AmigaOS--&gt;[ Softwood FinalCopy II*], Haage AmigaWriter*, Digita WordWorth*, Softwood FinalWriter*, Micro-Systems Excellence 3*, Arnor Protext, Rashumon, [ InterWord], [ KindWords], [WordPerfect], [ New Horizons Flow], [ CygnusEd Pro], [ Micro-systems Scribble], 
|&lt;!--AmigaOS4--&gt;AbiWord, [ CinnamonWriter], 
|&lt;!--MorphOS--&gt;[ Cinnamon Writer], [http://www.meta-morphos.org/viewtopic.php?topic=1246&amp;forum=53 scriba], [http://morphos.lukysoft.cz/en/index.php Papyrus Office], 
|-
|&lt;!--Sub Menu--&gt;Spreadsheets 
|&lt;!--AROS--&gt;[https://blog.alb42.de/programs/leu/ Leu], [https://archives.arosworld.org/index.php?function=browse&amp;cat=office/spreadsheet ], 
|&lt;!--AmigaOS--&gt;[https://aminet.net/package/biz/spread/ignition-src Ignition Src 1.3], [MaxiPlan 500 Plus], [OXXI Plan/IT v2.0 Speadsheet], [ Superplan], [ Creative Developments TurboCalc], [ ProCalc], [ InterSpread], [Digita DGCalc], [ Gold Disk Advantage], [ Micro-systems Analyze!]
|&lt;!--AmigaOS4--&gt;Gnumeric, [https://ignition-amiga.sourceforge.net/ Ignition], 
|&lt;!--MorphOS--&gt;[ ignition], [http://morphos.lukysoft.cz/en/vypis.php Papyrus Office], 
|-
|&lt;!--Sub Menu--&gt;Presentations
|&lt;!--AROS--&gt;[http://www.hollywoood-mal.com/ Hollywood]*, 
|&lt;!--Amiga OS--&gt;[http://www.hollywoood-mal.com/ Hollywood]*, [https://github.com/evaneykelen/mediapoint-amiga MediaPoint C and asm], PointRider, Scala*, 
|&lt;!--Amiga OS4--&gt;[http://www.hollywoood-mal.com/ Hollywood]*, PointRider 
|&lt;!--MorphOS--&gt;[http://www.hollywoood-mal.com/ Hollywood]*, PointRider
|-
|&lt;!--Sub Menu--&gt;Databases 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=office/database BeeBase], 
|&lt;!--Amiga OS--&gt;Precision Superbase 4 Pro*, Arnor Prodata*, [https://sourceforge.net/projects/beebase/ BeeBase], Datastore, FinalData*, AmigaBase, Fiasco, Twist2*, [Digita DGBase], [], 
|&lt;!--AmigaOS4--&gt;BeeBase, SQLite, 
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=6 BeeBase], 
|-
|&lt;!--Sub Menu--&gt;PDF Viewing and editing digital signatures 
|&lt;!--AROS--&gt;[http://sourceforge.net/projects/arospdf/ ArosPDF via splash], [https://github.com/wattoc/AROS-vpdf vpdf wip], 
|&lt;!--Amiga OS--&gt;APDF 
|&lt;!--AmigaOS4--&gt;AmiPDF 
|&lt;!--MorphOS--&gt;APDF, vPDF, 
|-
|&lt;!--Sub Menu--&gt;Note Taking markdown support like Obsidian like, joplin, OneNote, EverNotes, xournalpp, etc 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Study and analyse, collect, organize, annotate, cite, and share
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;PIM Personal Information Manager - Day Diary Planner Calendar App 
|&lt;!--AROS--&gt;[ ], [ ], [ ], 
|&lt;!--Amiga OS--&gt;Digita Organiser*, On The Ball, Everyday Organiser, [ Contact Manager], 
|&lt;!--AmigaOS4--&gt;AOrganiser, 
|&lt;!--MorphOS--&gt;[http://polymere.free.fr/orga_en.html PolyOrga], 
|-
|&lt;!--Sub Menu--&gt;Accounting
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=office/misc ETB], LoanCalc, [ ], [ ], [ ], 
|[ Digita Home Accounts2], Accountant, Small Business Accounts, Account Master, [ Amigabok], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Project Management Research 
|&lt;!--AROS--&gt; 
|&lt;!--Amiga OS--&gt;SuperGantt, SuperPlan, 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Desktop 
|&lt;!--AROS--&gt;Wanderer, Scalos, Workbook, DOpus5, 
|&lt;!--Amiga OS--&gt; 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;[https://github.com/zapek/Ambient Ambient Src]
|-
|&lt;!--Sub Menu--&gt;System Wide Search 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=utility/filetool Finder], [], [], 
|&lt;!--Amiga OS--&gt; 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;System Wide Dictionary - multilingual [http://sourceforge.net/projects/babiloo/ Babiloo], [http://code.google.com/p/stardict-3/ StarDict], 
|&lt;!--AROS--&gt;[ ],  
|&lt;!--AmigaOS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;System wide Thesaurus - multi lingual
|&lt;!--AROS--&gt;[ ], 
|Kuma K-Roget*, 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Sticky Desktop Notes (post it type) 
|&lt;!--AROS--&gt;[http://aminet.net/package/util/wb/amimemos.i386-aros AmiMemos], [https://aminet.net/package/util/wb/amimemos.src-aros AmiMemos Src], [], 
|&lt;!--Amiga OS--&gt;[http://aminet.net/package/util/wb/StickIt-2.00 StickIt v2], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;DTP Desktop Publishing 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/edit RNOPublisher], 
|&lt;!--Amiga OS--&gt;[http://pagestream.org/ Pagestream]*, Professional Pro Page*, Saxon Publisher, Pagesetter, PenPal, 
|&lt;!--AmigaOS4--&gt;[http://pagestream.org/ Pagestream]* 
|&lt;!--MorphOS--&gt;[http://pagestream.org/ Pagestream]* 
|-
|&lt;!--Sub Menu--&gt;Printing 
|&lt;!--AROS--&gt;Postscript 3 laser printers, [https://github.com/bohunamiga/MintPRINT MintPRINT AirPrint IPP], [ Ghostscript], [], 
|&lt;!--Amiga OS--&gt;[https://github.com/boingball/MintPRINT MintPRINT IPP], [https://github.com/Andiweli/AmiAirprint AmiAirprint], [http://www.irseesoft.de/tp_what.htm TurboPrint]*, [ GutenPrint], [https://aminet.net/package/comm/tcp/NetPrinter NetPrinter LPR], [], [], 
|&lt;!--AmigaOS4--&gt;(some native drivers), 
|&lt;!--MorphOS--&gt;early TurboPrint included, [https://aminet.net/package/comm/tcp/NetPrinter NetPrinter LPR], 
|-
|&lt;!--Sub Menu--&gt;Scanning 
|&lt;!--AROS--&gt;[ SCANdal], [], 
|&lt;!--Amiga OS--&gt;FxScan*, ScanQuix*, [https://github.com/boingball/MintSCAN MintSCAN], 
|&lt;!--AmigaOS4--&gt;SCANdal (Sane)
|&lt;!--MorphOS--&gt;SCANdal
|-
|&lt;!--Sub Menu--&gt;OCR
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/convert gOCR] 
|&lt;!--AmigaOS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;[http://morphos-files.net/categories/office/text Tesseract] 
|-
|&lt;!--Sub Menu--&gt;Text Editing
|&lt;!--AROS--&gt;Jano Editor (already installed as Editor), [http://archives.arosworld.org/index.php?function=browse&amp;cat=development/edit EdiSyn], [http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/text/edit Annotate], [https://archives.arosworld.org/index.php?function=browse&amp;cat=development/edit Vim], [http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/text/edit FrexxEd] [https://github.com/vidarh/FrexxEd src], [ NoWinEd], 
|&lt;!--Amiga OS--&gt;[https://aminet.net/package/text/edit/TurboText20 TurboText20 ttx], Annotate, MicroGoldED/CubicIDE*, CygnusED*, Protext*, NoWinED, 
|&lt;!--AmigaOS4--&gt;Notepad, Annotate, CygnusED*, NoWinED, 
|&lt;!--MorphOS--&gt;MorphOS ED, NoWinED, GoldED/CubicIDE*, CygnusED*, Annotate, 
|-
|&lt;!--Sub Menu--&gt;Office Fonts [http://sourceforge.net/projects/fontforge/files/fontforge-source/ Font Designer] 
|&lt;!--AROS--&gt;[ ], [ ], 
|&lt;!--Amiga OS--&gt;TypeSmith*, SaxonScript (GetFont Adobe Type 1), 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Drawing Vector
|&lt;!--AROS--&gt;[http://sourceforge.net/projects/amifig/ ZuneFIG previously AmiFIG], [https://github.com/serk118/designworks-aros designworks aros 64bit]
|&lt;!--Amiga OS--&gt;Drawstudio*, ProVector*, ArtExpression*, Professional Draw*, AmiFIG, MetaView, [https://gitlab.com/amigasourcecodepreservation/designworks Design Works Src], [], 
|&lt;!--AmigaOS4--&gt;MindSpace, [http://www.os4depot.net/index.php?function=browse&amp;cat=graphics/edit amifig], 
|&lt;!--MorphOS--&gt;SteamDraw, [http://aminet.net/package/gfx/edit/amifig amiFIG], 
|-
|&lt;!--Sub Menu--&gt;video conferencing (jitsi) 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;source code hosting
|&lt;!--AROS--&gt;Gitlab, 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Remote Desktop (server)
|&lt;!--AROS--&gt;[http://sourceforge.net/projects/zunetools/files/VNC_Server ArosVNCServer], 
|&lt;!--Amiga OS--&gt;[http://s.guillard.free.fr/AmiVNC/AmiVNC.htm AmiVNC], [http://dspach.free.fr/amiga/avnc/index.html AVNC]
|&lt;!--AmigaOS4--&gt;[http://s.guillard.free.fr/AmiVNC/AmiVNC.htm AmiVNC] 
|MorphVNC, vncserver
|-
|&lt;!--Sub Menu--&gt;Remote Desktop (client) login and connect to another machine 
|&lt;!--AROS--&gt;[https://sourceforge.net/projects/zunetools/files/VNC_Client/ ArosVNC], [http://archives.arosworld.org/index.php?function=browse&amp;cat=network/misc rdesktop], 
|&lt;!--Amiga OS--&gt;[http://twinvnc.free.fr/index.php?menu=01&amp;lang=eng TwinVNC], [http://dspach.free.fr/amiga/vva/index.html VVA], [http://www.hd-zone.com/ RDesktop]
|&lt;!--AmigaOS4--&gt;[http://twinvnc.free.fr/index.php?menu=01&amp;lang=eng TwinVNC], [http://www.hd-zone.com/ RDesktop]
|[http://twinvnc.free.fr/index.php?menu=01&amp;lang=eng TwinVNC], [http://www.hd-zone.com/ RDesktop]
|-
|&lt;!--Sub Menu--&gt;notifications 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;Ranchero 
|&lt;!--AmigaOS4--&gt;Ringhio 
|&lt;!--MorphOS--&gt;MagicBeacon 
|-
|&lt;!--Sub Menu--&gt;Biometric facial logins and fingerprint security features 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt; 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|}

&lt;nowiki&gt;*&lt;/nowiki&gt; Commercial product.

[[#top|...to the top]]

==Audio==
{|  class=&quot;wikitable sortable&quot; 
|- 
!width:30%;|Audio
!width:10%;|AROS(x86)
!width:10%;|Commodore-Amiga OS 3.1(68k)
!width:10%;|Hyperion OS4(PPC)
!width:10%;|MorphOS(PPC)
|-
|&lt;!--Sub Menu--&gt;Playing playback Audio like MP3, [https://github.com/chrg127/gmplayer NSF], [https://github.com/kode54/lazyusf miniusf .usflib] [https://gitlab.com/kode54/psflib with pfslib], [], [], etc 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=video/play Mplayer], [ HarmonyPlayer hp], [http://www.a500.org/downloads/audio/index.xhtml playcdda] CDs, [ WildMidi Player], [https://bszili.morphos.me/ UADE mod player], [], [ RNOTunes], [ mp3Player], [], 
|&lt;!--Amiga OS--&gt;AmiNetRadio, AmigaAmp, playOGG, [https://codeberg.org/tygre/amimodradio amimodradio]
|&lt;!--AmigaOS4--&gt;TuneNet, SimplePlay, AmigaAmp, TKPlayer
|AmiNetRadio, Mplayer, Kaya, AmigaAmp
|-
|&lt;!--Sub Menu--&gt;Editing Audio 
|&lt;!--AROS--&gt;[ Audio Evolution 4] 
|&lt;!--Amiga OS--&gt;[https://sourceforge.net/projects/hd-rec/ HD-Rec Src], [http://www.sonicpulse.de/eng/news.html SoundFX], [ Samplitude], 
|&lt;!--AmigaOS4--&gt;[https://sourceforge.net/projects/hd-rec/ HD-Rec], AmiSoundED, [http://os4depot.net/?function=showfile&amp;file=audio/record/audioevolution4.lha Audio Evolution 4] 
|[http://www.hd-rec.de/HD-Rec/index.php?site=home HD-Rec], 
|-
|&lt;!--Sub Menu--&gt;Editing Tracker Music
|&lt;!--AROS--&gt;[https://github.com/hitchhikr/protrekkr Protrekkr], [ Schism Tracker], [http://archives.arosworld.org/index.php?function=browse&amp;cat=audio/tracker MilkyTracker], [http://www.hivelytracker.com/ HivelyTracker], [ Radium in AROS already],  [http://www.a500.org/downloads/development/index.xhtml libMikMod], 
|&lt;!--Amiga OS--&gt;MilkyTracker, HivelyTracker, DigiBooster, Octamed SoundStudio, [https://github.com/elindstrom/soundtracker soundtracker], 
|&lt;!--AmigaOS4--&gt;MilkyTracker, HivelyTracker, GoatTracker
|MilkyTracker, GoatTracker, DigiBooster, 
|-
|&lt;!--Sub Menu--&gt;Editing Music [], [https://github.com/kmatheussen/camd CAMD] and/or staves and musical notes on manuscript 
|&lt;!--AROS--&gt;[http://bnp.hansfaust.de/ Bars and Pipes], [], [], 
|&lt;!--Amiga OS--&gt;[http://bnp.hansfaust.de/ Bars'n'Pipes], MusicX* David &quot;Talin&quot; Joiner &amp; Craig Weeks (for Notator-X), Deluxe Music Construction Set DMCS2*, [https://github.com/timoinutilis/midi-sequencer-amigaos Horny c Src] [https://github.com/kas1e/midi-sequencer-amigaos/tree/master/HornyGCC HornyGCC OS4 src] [https://github.com/capehill/midi-sequencer-amigaos Horny OS4 fork src] [https://www.amigans.net/modules/newbb/viewtopic.php?start=0&amp;topic_id=8143&amp;order=ASC&amp;status=&amp;mode=0 OS4 thread], HD-Rec, [https://aminet.net/package/mus/midi/dominatorV1_51 Dominator], [https://github.com/royaltm/Amiga-midiIn Amiga-midiIn], [ Aegis Sonix 2.0]
|&lt;!--AmigaOS4--&gt;[https://sourceforge.net/p/hd-rec/code/HEAD/tree/ HD-Rec Src], Rockbeat, [http://bnp.hansfaust.de/download.html Bars'n'Pipes], [https://github.com/gooofy/freeaction Horny OS4 src fork], Audio Evolution 4, 
|&lt;!--MorphOS--&gt;Bars'n'Pipes, 
|-
|&lt;!--Sub Menu--&gt;Sound Sampling 
|&lt;!--AROS--&gt;[ Advanced AHI Recorder all], [https://archives.arosworld.org/index.php?function=browse&amp;cat=audio/record Audio Evolution 4], [http://www.imica.net/SitePortalPage.aspx?siteid=1&amp;did=162 Quick Record], [https://archives.arosworld.org/index.php?function=browse&amp;cat=audio/misc SOX to get AIFF 16bit files], [https://github.com/aros-development-team/AROS/tree/master/workbench/tools/AHIRecord AHIRecord], 
|&lt;!--Amiga OS--&gt;[https://aminet.net/package/mus/edit/AudioEvolution3_src Audio Evolution 3 c src], [ Samplitude]*, Audiomaster IV*, 
|&lt;!--AmigaOS4--&gt;[https://github.com/timoinutilis/phonolith-amigaos phonolith c src], HD-Rec, Audio Evolution 4,
|&lt;!--MorphOS--&gt;[https://sourceforge.net/p/hd-rec/code/HEAD/tree/ HD-Rec Src], Audio Evolution 4,
|-
|&lt;!--Sub Menu--&gt;Audio Processing like easyeffects so having limiter, compressor, convolver, equalizer and auto volume and many other plugins 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Live Looping or Audio Misc - Groovebox like
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;CD/DVD burn
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=utility IsoTools], [https://code.google.com/p/amiga-fryingpan/ FryingPan], 
|&lt;!--Amiga OS--&gt;FryingPan, [ MakeCD], 
|&lt;!--AmigaOS4--&gt;FryingPan, AmiDVD, 
|&lt;!--MorphOS--&gt;[http://www.amiga.org/forums/printthread.php?t=58736 FryingPan], Jalopeano, 
|-
|&lt;!--Sub Menu--&gt;CD/DVD audio rip
|&lt;!--AROS--&gt;Lame, [http://www.imica.net/SitePortalPage.aspx?siteid=1&amp;cfid=0&amp;did=167 Quick CDrip],
|&lt;!--Amiga OS--&gt;Lame,  
|&lt;!--AmigaOS4--&gt;Lame, 
|&lt;!--MorphOS--&gt;Lame,  
|-
|&lt;!--Sub Menu--&gt;MP3 v1 and v2 Tagger
|&lt;!--AROS--&gt;id3ren (v1), [http://archives.arosworld.org/index.php?function=browse&amp;cat=audio/edit mp3info], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|
|-
|&lt;!--Sub Menu--&gt;Audio Convert
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=audio/misc Sox], [], 
|&lt;!--Amiga OS--&gt;[http://aminet.net/package/mus/misc/SoundBox SoundBox], [http://aminet.net/package/mus/misc/SoundBoxKey SoundBox Key], [http://aminet.net/package/mus/edit/SampleE SampleE], sox 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;DJ mixing jamming 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;[https://github.com/djh0ffman/PT1210 Hoffman PT1210 DJ tracker], [], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Radio Automation Software [http://www.rivendellaudio.org/ Rivendell], [http://code.campware.org/projects/livesupport/report/3 Campware LiveSupport], [http://www.sourcefabric.org/en/airtime/ SourceFabric AirTime], [http://www.ohloh.net/p/mediabox404 MediaBox404], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Speakers Audio Sonos Mains AC networked wired controlled 
*2005 ZP100 with ZP80 
*2008 Zoneplayer ZP120 (multi-room wireless amp)  ZP90 receiver only with CR100 controller, 
*2009 ZonePlayer S5, 
*2010 BR100 wireless Bridge (no support),   
*2011 Play:3
*2013 Bridge (no support), Play:1,  
*2016 Arc,   Play:1,   
*Beam (Gen 2),   Playbar,  Ray,   Era 100,   Era 300,   Roam,   Move 2,   
*Sub (Gen 3),   Sub Mini,  Five,  Amp  S2 
|&lt;!--AROS--&gt;SonosController 
|&lt;!--Amiga OS--&gt;SonosController
|&lt;!--AmigaOS4--&gt;SonosController
|&lt;!--MorphOS--&gt;SonosController
|-
|&lt;!--Sub Menu--&gt;Smart Speakers 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt; 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|}

&lt;nowiki&gt;*&lt;/nowiki&gt; Commercial product.

[[#top|...to the top]]

==Video Creativity and Production==
{|  class=&quot;wikitable sortable&quot; 
|- 
!width:30%;|Video
!width:10%;|AROS(x86)
!width:10%;|Commodore-Amiga OS 3.1(68k)
!width:10%;|Hyperion OS4(PPC)
!width:10%;|MorphOS(PPC)
|-
|&lt;!--Sub Menu--&gt;Playing Video 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=video/play Mplayer], [ VAMP], [http://www.a500.org/downloads/video/index.xhtml CDXL player], [http://www.a500.org/downloads/video/index.xhtml IffAnimPlay], [], 
|&lt;!--Amiga OS--&gt;Frogger*, AMP2, MPlayer, RiVA*, MooViD*, 
|&lt;!--AmigaOS4--&gt;DvPlayer, MPlayer 
|&lt;!--MorphOS--&gt;MPlayer, Frogger, AMP2, VLC 
|-
|&lt;!--Sub Menu--&gt;Streaming Video and game streaming like OBS studio, Parsec, [https://github.com/lizardbyte/sunshine sunshine], [https://github.com/moonlight-stream/moonlight-qt moonlight], etc 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Playing DVD 
|&lt;!--AROS--&gt;[http://a-mc.biz/ AMC]*, Mplayer 
|&lt;!--Amiga OS--&gt;AMP2, Frogger 
|&lt;!--AmigaOS4--&gt;[http://a-mc.biz/ AMC]*, DvPlayer*, AMP2,  
|&lt;!--MorphOS--&gt;Mplayer 
|-
|&lt;!--Sub Menu--&gt;Screen Recording
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=video/record Screenrecorder], [ ], [ ], [ ], [ ], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;Screenrecorder, 
|-
|&lt;!--Sub Menu--&gt;Create Edit Individual Video - Amiga like OSs have no pro NLE 
|&lt;!--AROS--&gt;[ Mencoder], [ Quick Videos], [http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/edit AVIbuild], [http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/misc FrameBuild], FFMPEG, 
|&lt;!--Amiga OS--&gt;[ MainConcept Mainactor Broadcast*], [http://en.wikipedia.org/wiki/Video_Toaster Video Toaster*] with [https://discreetfx.com/openvideotoaster.html some c src], MacroSystem MovieShop 4.3*, proDAD Adorage*, [ IOSpirit VHI studio]*, [Gold Disk ShowMaker], [], 
|&lt;!--AmigaOS4--&gt;FFMpeg/GUI 
|&lt;!--MorphOS--&gt;Blender, Mencoder, FFmpeg
|-
|&lt;!--Sub Menu--&gt;Subtitle editor 
|&lt;!--AROS--&gt;[https://aminet.net/package/text/edit/Slarti_Arosx86ABIv0 Slarti_Arosx86ABIv0], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;IP-based video production workflows with High Dynamic Range (HDR), 10-bit color collaborative NDI, 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Blogging like Lemmy or kbin
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;VR face recognition for Vtubers 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;VR chatting Live2D models with Cubism type editor or [https://github.com/AyagamiDev/ayagami ayagami] like with zipped moc3 with model metadata (model3, cdi3) 
&lt;pre&gt;
Model data (cmo3)
Basic motions (can3)
Background image (png)
Set of files for embedding (runtime folder)
• Model data (moc3)
• Motion data (motion3.json)
• Model settings file (model3.json)
• Physics settings file (physics3.json)
• Display auxiliary file (cdi3.json)
&lt;/pre&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;VR chatting chatters .VRML models - standardized 3D file format for VR avatars 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;V-tubers V-tubing like Vseeface with Openseeface tracker or Vpuppr (virtual puppet project) for online live 2d / 3d art models rigging rigged LIV 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt; 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|}

&lt;nowiki&gt;*&lt;/nowiki&gt; Commercial product.

[[#top|...to the top]]


==Misc Application==
{|  class=&quot;wikitable sortable&quot; 
|- 
!width:30%;|Misc Application
!width:10%;|AROS(x86)
!width:10%;|Commodore-Amiga OS 3.1 (68k)
!width:10%;|Hyperion OS4(PPC)
!width:10%;|MorphOS(PPC)
|-
|&lt;!--Sub Menu--&gt;File Management 
|&lt;!--AROS--&gt;DOpus4, [https://github.com/BlitterStudio/dopus5 DOpus Magellan aka DOpus 5], [ Scalos], [ ], 
|&lt;!--Amiga OS--&gt;DOpus2, DOpus 4, [https://github.com/BlitterStudio/dopus5 Dopus5 Magellan], ClassAction, FileMaster, [http://www.amiga.org/forums/showthread.php?t=4897 DirWork 2]*, [https://github.com/RudolphRiedel/DiskMaster2 DiskMaster2 src], 
|&lt;!--AmigaOS4--&gt;DOpus4, [https://github.com/BlitterStudio/dopus5 Dopus5 Magellan], Filer, AmiDisk 
|&lt;!--MorphOS--&gt;DOpus4, [https://github.com/BlitterStudio/dopus5 Dopus5 Magellan], 
|-
|&lt;!--Sub Menu--&gt;File Verification / Repair 
|&lt;!--AROS--&gt;[https://arosarchives.os4depot.net/index.php?function=browse&amp;cat=utility md5sum], [https://arosarchives.os4depot.net/index.php?function=browse&amp;cat=utility/filetool asum], [http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/filetool workpar2] (PAR2),  [http://zakalwe.fi/~shd/foss/cksfv/files/ compile cksfv from website], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;Par2, 
|-
|Application Installer 
|&lt;!--AROS--&gt;[], [ InstallerNG], 
|&lt;!--Amiga OS--&gt;InstallerNG, Grunch, 
|&lt;!--AmigaOS4--&gt;Jack
|&lt;!--MorphOS--&gt;Jack 
|-
|&lt;!--Sub Menu--&gt;Compression archiver [https://github.com/FS-make-simple/paq9a paq9a], [], 
|&lt;!--AROS--&gt;XAD system is a toolkit designed for handling various file and disk archiver
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[https://aminet.net/package/util/pack/decrunchmania_os4 Crunchmania CrM2 depacker], 
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Binary Hexadecimal Editor 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=development/edit Zaphod], [],
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Filesystem Partition Editor formatter Disk Management
|&lt;!--AROS--&gt;[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=1440&amp;highlight=partition&amp;pid=8821#post_8821 QuickPart], [ HDToolBox]
|&lt;!--Amiga OS--&gt;[https://github.com/stefanskotte/hdpart hdpart], [https://github.com/ChuckyGang/AmiPart AmiPart], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Filesystem Repair and backups 
|&lt;!--AROS--&gt;ArSFSDoctor, 
|&lt;!--Amiga OS--&gt;[https://aminet.net/package/disk/bakup/quarterback_src Quarterback Tools C and asm src], [ ], [ ], [ ], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;System Disk check, integrity and history [https://github.com/smartmontools/smartmontools smart tools], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;[], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Multiple File renaming
|&lt;!--AROS--&gt;DOpus 4 or 5, 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Anti Virus
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;VChecker, 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Random Wallpaper Desktop changer [ DOpus5], [ Scalos],  
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Alarm Clock, Timer, Stopwatch, Countdown 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/workbench DClock], [http://aminet.net/util/time/AlarmClockAROS.lha AlarmClock], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|}


==Misc Application 2==
{|  class=&quot;wikitable sortable&quot; 
|- 
!width:30%;|Misc Application
!width:10%;|AROS(x86)
!width:10%;|Commodore-Amiga OS 3.1(68k)
!width:10%;|Hyperion OS4(PPC)
!width:10%;|MorphOS(PPC)
|-
|&lt;!--Sub Menu--&gt;C/C++ IDE Integrated Development 
|&lt;!--AROS--&gt;[https://sourceforge.net/projects/aidea/ AIDEa], [ Murks], [],  
|&lt;!--Amiga OS--&gt;[http://devplex.awardspace.biz/cubic/index.html Cubic IDE]*, [ StormC], [https://github.com/jens-maus/amide amide], [], 
|&lt;!--AmigaOS4--&gt;CodeBench , [https://gitlab.com/boemann/codecraft CodeCraft], 
|&lt;!--MorphOS--&gt;[http://devplex.awardspace.biz/cubic/index.html Cubic IDE]*, 
|-
|&lt;!--Sub Menu--&gt;C/C++ Text Editors 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/text/edit FrexxEd], [https://github.com/vidarh/FrexxEd FrexxEd src], [http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/text/edit Annotate] with [https://www.onyxsoft.se/files/annotate_src.lha src], 
|&lt;!--Amiga OS--&gt;[ Protext], [ CED], [], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;[https://www.onyxsoft.se/annotate.html Annotate], 
|-
|&lt;!--Sub Menu--&gt;Repository
|&lt;!--AROS--&gt;[ Git]
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;Git
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;BASIC Computer Language 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=development/language Basic4SDL], [ Ace Basic], [ X-AMOS], [SDLBasic], [ Alvyn], 
|&lt;!--Amiga OS--&gt;[http://www.amiforce.de/main.php Amiblitz 3] with [https://github.com/AmiBlitz/AmiBlitz3 Asm src], [http://amos.condor.serverpro3.com/AmosProManual/contents/c1.html Amos Pro] with [https://github.com/AmiDARK/AmosProfessionalUnity-Official-Releases Asm src], [http://aminet.net/package/dev/basic/ace24dist ACE Basic], [https://github.com/gooofy/aqb aqb], [], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;sdlBasic
|-
|&lt;!--Sub Menu--&gt;Computer Languages Translation [https://tetracorp.github.io/guide/reverse-engineering-amiga.html], [https://amigasourcecodepreservation.gitlab.io/amiga-assembler-insider-guide/], [https://github.com/kermitfrog/Amiga-Re-Engineering Rust, Ghidra and FS-UAE], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;[https://bitbucket.org/rhinoid/convert68000toc/src/main/ convert m68k seka asm-one to c], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Gui Creators
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=development/guitool MuiBuilder], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;[ MuiBuilder],  
|-
|&lt;!--Sub Menu--&gt;Catalog .cd .ct Custom App Language Editors 
|&lt;!--AROS--&gt;FlexCat, [https://archives.arosworld.org/index.php?function=browse&amp;cat=utility Flexcat GUI], [], 
|&lt;!--Amiga OS--&gt;[http://www.geit.de/deu_simplecat.html SimpleCat], FlexCat
|&lt;!--AmigaOS4--&gt;[http://aminet.net/package/dev/misc/simplecat SimpleCat], FlexCat
|&lt;!--MorphOS--&gt;[http://www.geit.de/deu_simplecat.html SimpleCat], FlexCat
|-
|&lt;!--Sub Menu--&gt;Cross Development 
|&lt;!--AROS--&gt;[], [], 
|&lt;!--Amiga OS--&gt;[https://github.com/geekychris/amiga_mcp amiga_mcp], [https://github.com/mbergmann-sh/AmigaED4-IDE AmigaED4-IDE], [https://lemonspawn.com/turbo-rascal-syntax-error-expected-but-begin/ Turbo Rascal], [], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|}

&lt;nowiki&gt;*&lt;/nowiki&gt; Commercial product.


==Misc Application 3==
{|  class=&quot;wikitable sortable&quot; 
|- 
!width:30%;|Misc Application
!width:10%;|AROS(x86)
!width:10%;|Commodore-Amiga OS 3.1(68k)
!width:10%;|Hyperion OS4(PPC)
!width:10%;|MorphOS(PPC)
|-
|&lt;!--Sub Menu--&gt;System 
|&lt;!--AROS--&gt;[ SysExplorer], [ SysMon], [ Scout], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Terminals Shells CLIs 
|&lt;!--AROS--&gt;[https://tomaszstaniak.com/aros-term/ aros-term], [], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;OSK On Screen Keyboard
|&lt;!--AROS--&gt;[], 
|&lt;!--Amiga OS--&gt;[https://aminet.net/util/wb/OSK.lha OSK]
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Screen Magnifier Magnifying Glass Magnification 
|&lt;!--AROS--&gt;[http://www.onyxsoft.se/files/zoomit.lha ZoomIT], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Comic Book CBR CBZ format reader viewer 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/viewer comics], [http://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/viewer comicon], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Ebook Reader 
|&lt;!--AROS--&gt;[https://blog.alb42.de/programs/#legadon Legadon EPUB],[]
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Ebook Converter 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Text to Speech tts [https://github.com/JonathanFly/bark-installer Bark], [], 
|&lt;!--AROS--&gt;[ Echo &quot; &quot; &gt;SPEAK:A1 inbuilt], [http://archives.arosworld.org/index.php?function=browse&amp;cat=audio/misc flite], 
|&lt;!--Amiga OS--&gt;[http://www.text2speech.com translator], [https://github.com/sidick/narrator.wyoming narrator.wyoming], [], 
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=search&amp;tool=simple FLite]
|&lt;!--MorphOS--&gt;[http://se.aminet.net/pub/aminet/mus/misc/ FLite]
|-
|&lt;!--Sub Menu--&gt;Speech Voice Recognition Dictation - [http://sourceforge.net/projects/cmusphinx/files/ CMU Sphinx], [http://julius.sourceforge.jp/en_index.php?q=en/index.html Julius], [http://www.isip.piconepress.com/projects/speech/index.html ISIP], 
|&lt;!--AROS--&gt; 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Speech Voice Changer [], [], [], [], 
|&lt;!--AROS--&gt; 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Screen Display Blanker screensaver 
|&lt;!--AROS--&gt;Blanker Commodity (built in), [https://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/screenblanker GarshneBlanker], [http://sourceforge.net/projects/gblanker/ GBlanker Src], [], 
|&lt;!--Amiga OS--&gt;MultiCX, 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;ModernArt Blanker, 
|-
|&lt;!--Sub Menu--&gt;Fortune Cookie Quotes Sayings 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/misc AFortune], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|}


==Misc Application 4==
{|  class=&quot;wikitable sortable&quot; 
|- 
!width:30%;|Misc Application
!width:10%;|AROS(x86)
!width:10%;|Commodore-Amiga OS 3.1(68k)
!width:10%;|Hyperion OS4(PPC)
!width:10%;|MorphOS(PPC)
|-
|&lt;!--Sub Menu--&gt;Fractals mandelbrot, etc 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/misc], 
|&lt;!--Amiga OS--&gt;ZoneXplorer, 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Landscape Rendering 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=graphics/raytrace WCS World Construction Set], 
|&lt;!--Amiga OS--&gt;[ Vista Pro], [http://en.wikipedia.org/wiki/World_Construction_Set World Construction Set]
|&lt;!--AmigaOS4--&gt;[ WCS World Construction Set],
|&lt;!--MorphOS--&gt;[ WCS World Construction Set],
|-
|&lt;!--Sub Menu--&gt;Astronomy [https://sourceforge.net/projects/skychart/ skychart freepascal], [], [], 
|&lt;!--AROS--&gt;[ Digital Almanac (ABIv0 only)], 
|&lt;!--Amiga OS--&gt;[http://aminet.net/search?query=planetarium Aminet search], [http://aminet.net/misc/sci/DA3V56ISO.zip Digital Almanac], [https://aminet.net/package/misc/sci/da3sourceV58 Src c V58], [ Galileo renamed to Distant Suns]*, [], 
|&lt;!--AmigaOS4--&gt;[http://sourceforge.net/projects/digital-almanac/ Digital Almanac], Distant Suns*, [http://www.digitaluniverse.org.uk/ Digital Universe]*,
|&lt;!--MorphOS--&gt;[http://www.aminet.net/misc/sci/da3.lha Digital Almanac], [http://www.aminet.net/package/misc/sci/da3-mos-src Src c V56], 
|-
|&lt;!--Sub Menu--&gt;Astrology [https://sourceforge.net/projects/skylendar/ skylendar], [https://github.com/CruiserOne/Astrolog Astrolog], [https://www.astrolog.org/astrolog/astfile.htm Astrology alt site], [https://saravali.github.io/download.html Maitreya], [https://github.com/alamahant/Asteria Asteria], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Genealogy History Family Tree Ancestry Records (FreeBMD, FreeREG, and FreeCEN file formats or GEDCOM GenTree)
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt; [ Origins], [ Your Family Tree], [ ], [ ], [ ], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Languages 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;Fun School, 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;https://github.com/evil4dmin/ami2ha
|-
|&lt;!--Sub Menu--&gt;Mathematics ([http://www-fourier.ujf-grenoble.fr/~parisse/install_en.html Xcas], etc.), 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/scientific mathX] 
|&lt;!--Amiga OS--&gt;Maple V, mathX, Fun School, GCSE Maths, [ ], [ ], [ ], 
|&lt;!--AmigaOS4--&gt;Yacas 
|&lt;!--MorphOS--&gt;Yacas 
|-
|&lt;!--Sub Menu--&gt;Maths Graph Function Plotting
|&lt;!--AROS--&gt;[https://blog.alb42.de/programs/#MUIPlot MUIPlot], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;App Utility Launcher Dock toolbar  
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=utility/docky BoingBar], [], 
|&lt;!--Amiga OS--&gt;[https://github.com/adkennan/DockBot Dockbot],
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;3D Printer [https://github.com/OrcaSlicer/OrcaSlicer OrcaSlicer]
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;PCB design
|&lt;!--AROS--&gt; 
|&lt;!--Amiga OS--&gt;[ ], [ ], [ ], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Digital Signage
|&lt;!--AROS--&gt;Hollywood, Hollywood Designer 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;HAM radio, amateur radio, packet radio,  [], [], [], [https://cemaxecuter.com/ Dragon OS], [https://github.com/km4ack/73Linux with 73 link update], [https://www.youtube.com/watch?v=YAL5KNePRSg video for], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;[https://github.com/punktniklas/NiKom NiKom], [https://www.amigarealm.com/amiga/amicomms/comm4.htm Comm4], [https://www.amigarealm.com/archives/comms/aarug/ TNC Terminal Node Controller with packets over serial connections on Yaesu or Woxum handheld], [https://aminet.net/comm/misc AmiCom], [ with 7Plus file encoder/decoder], [ mksstv], [ RTTYam], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;modern smart home network like Home Assistant Automation Yellow, Green, Mosquitto, EMQX,  
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;[https://github.com/evil4dmin/ami2ha HA], [https://github.com/sidick/midge mtqq.lib], [https://aminet.net/package/comm/tcp/AmiHomeassist-0.7 AmiHomeassist], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Teaching classroom learning training [https://github.com/moodle/moodle moodle], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|}

&lt;nowiki&gt;*&lt;/nowiki&gt; Commercial product.


==Games &amp; Emulation==

Some emulators/games require OpenGL to function and to adjust ahi prefs channels, frequency and unit0 and unit1 and 
[http://aros.sourceforge.net/documentation/users/shell/changetaskpri.php changetaskpri -1]

Rom patching  https://www.marcrobledo.com/RomPatcher.js/ https://www.romhacking.net/patch/ (ips, ups, bps, etc) and this other site supports the latter formats https://hack64.net/tools/patcher.php 

Free public domain roms for use with emulators can be found [http://www.pdroms.de/ here] as most of the rest are covered by copyright rules. If you like to read about old games see [http://retrogamingtimes.com/ here] and [http://www.armchairarcade.com/neo/ here] and a [http://www.vintagecomputing.com/ blog] about old computers. Possibly some of the [http://www.answers.com/topic/list-of-best-selling-computer-and-video-games best selling] of all time. [http://en.wikipedia.org/wiki/List_of_computer_system_emulators Wiki] with emulated systems list.

[https://archive.gamehistory.org/ Archive of VGHF], [https://library.gamehistory.org/ Video Game History Foundation Library search]


{|  class=&quot;wikitable sortable&quot; 
|- 
!width:10%;|Games [http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer Emulation]
!width:10%;|AROS(x86)
!width:10%;|AmigaOS3(68k)
!width:10%;|AmigaOS4(PPC)
!width:10%;|MorphOS(PPC)
|-
|&lt;!--Sub Menu--&gt;Games Emulation Amstrad CPC 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer], [ Caprice32 (OpenGL &amp; pure SDL)], [ Arnold], [https://retroshowcase.gr/cpcbox-master/], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[http://os4depot.net/index.php?function=browse&amp;cat=emulation/computer]
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=2], 
|-
|&lt;!--Sub Menu--&gt;Games Emulation Apple2 and 2GS
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Arcade 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem Mame], [ SI Emu (ABIv0 only)], 
|&lt;!--Amiga OS--&gt;Mame, 
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem xmame], amiarcadia, 
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=2 Mame], 
|-
|&lt;!--Sub Menu--&gt;Games Emulation Atari 2600 [], [], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem Stella], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Atari 5200 [https://github.com/wavemotion-dave/A5200DS A5200DS], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Atari 7800
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Atari 400 800 130XL [https://github.com/wavemotion-dave/A8DS A8DS], [], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer Atari800], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Atari Lynx
|&lt;!--AROS--&gt;[http://myfreefilehosting.com/f/6366e11bdf_1.93MB Handy (ABIv0 only)], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Atari Jaguar
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Bandai Wonderswan 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation BBC Micro and Acorn Electron [http://beehttps://bem-unix.bbcmicro.com/download.html BeebEm], [http://b-em.bbcmicro.com/ B-Em], [http://elkulator.acornelectron.co.uk/ Elkulator], [http://electrem.emuunlim.com/ ElectrEm], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Dragon 32 and Tandy CoCo [http://www.6809.org.uk/xroar/ xroar], [], 
|&lt;!--AROS--&gt;[], [], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Commodore C16 Plus4
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Commodore C64
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer Vice (ABIv0 only)], [], 
|&lt;!--Amiga OS--&gt;Frodo, 
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem viceplus], 
|&lt;!--MorphOS--&gt;Vice, 
|-
|&lt;!--Sub Menu--&gt;Games Emulation Commodore Amiga
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer Janus UAE], Emumiga, 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[http://os4depot.net/index.php?function=browse&amp;cat=emulation/computer UAE], 
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=2 UAE], 
|-
|&lt;!--Sub Menu--&gt;Games Emulation Japanese MSX MSX2 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Mattel Intelivision
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Mattel Colecovision and Adam
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Milton Bradley (MB) Vectrex [ Vectrex OpenGL], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation PICO8 Pico-8 fantasy video game console [https://github.com/egordorichev/pemsa-sdl/ pemsa-sdl], [https://github.com/jtothebell/fake-08 fake-08], [https://github.com/Epicpkmn11/fake-08/tree/wip fake-08 fork], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Nintendo Gameboy
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem vba no sound], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem vba]
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Nintendo NES
|&lt;!--AROS--&gt;[ EmiNES], [http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem Fceu], [https://github.com/takahirox/nes-js?tab=readme-ov-file nes-js], [https://github.com/bfirsh/jsnes jsnes], [https://github.com/angelo-wf/NesJs NesJs], 
|&lt;!--Amiga OS--&gt;AmiNES, [http://www.dridus.com/~nyef/darcnes/ darcNES], 
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem amines]
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Nintendo SNES
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem Zsnes], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem warpsnes]
|&lt;!--MorphOS--&gt;[http://fabportnawak.free.fr/snes/ Snes9x], 
|-
|&lt;!--Sub Menu--&gt;Games Emulation Nintendo N64 
*HLE and plugins [ mupen64], [https://github.com/ares-emulator/ares ares], [https://github.com/N64Recomp/N64Recomp N64Recomp], [https://github.com/rt64/rt64 rt64], [https://github.com/simple64/simple64 Simple64], 
*LLE [], 
|&lt;!--AROS--&gt;[http://code.google.com/p/mupen64plus/ Mupen64+],
|&lt;!--Amiga OS--&gt;[http://code.google.com/p/mupen64plus/ Mupen64+], [http://aminet.net/package/misc/emu/tr-981125_src TR64], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;[ Nintendo Gamecube Wii]
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;[ Nintendo Wii U]
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;[https://github.com/yuzu-emu Nintendo Switch]
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation NEC PC Engine 
|&lt;!--AROS--&gt;[], [], [https://github.com/yhzmr442/jspce js-pce], 
|[http://www.hugo.fr.fm/ Hugo], [http://mednafen.sourceforge.net/ Mednafen], 
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem tgemu]
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Sega Master System (SMS)
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem Dega], [http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem sms], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem osmose]
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Sega Genesis/Megadrive
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem gp no sound], [http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem DGen], 
|&lt;!--Amiga OS--&gt;[http://code.google.com/p/genplus-gx/ Genplus], 
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem genesisplus]
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Sega Saturn 
*HLE [https://mednafen.github.io/ mednafen], [http://yabause.org/ yabause], [], 
*LLE [], [], 
|&lt;!--AROS--&gt;?
|&lt;!--Amiga OS--&gt;[http://yabause.org/ Yabause], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Sega Dreamcast 
*HLE [https://github.com/flyinghead/flycast  flycast], [https://code.google.com/archive/p/nulldc/downloads NullDC], 
*LLE [], [], 
|&lt;!--AROS--&gt;?
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Sinclair ZX80 and ZX81 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer], [], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Sinclair Spectrum 
|[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer Fuse (crackly sound)], [http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer SimCoupe], [ FBZX slow], [https://jsspeccy.zxdemo.org/ jsspeccy], [http://torinak.com/qaop/games qaop], 
|&lt;!--Amiga OS--&gt;[http://www.lasernet.plus.com/ Asp], [http://www.zophar.net/sinclair.html Speculator], [http://www.worldofspectrum.org/x128/index.html X128], 
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/computer]
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Sinclair QL
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer], [], 
|&lt;!--Amiga OS--&gt;[http://aminet.net/package/misc/emu/QDOS4amiga1 QDOS4amiga]
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation SNK NeoGeo Pocket
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem gngeo], NeoPop, 
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation Sony PlayStation
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/gamesystem FPSE], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem FPSE]
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;[ Sony PS2]
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;[ Sony PS3]
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;[https://vita3k.org/ Sony Vita]
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;[https://github.com/shadps4-emu/shadPS4 PS4]
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation [http://en.wikipedia.org/wiki/Tangerine_Computer_Systems Tangerine] Oric and Atmos 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer Oricutron]
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;[http://www.os4depot.net/index.php?function=browse&amp;cat=emulation/gamesystem Oricutron]
|&lt;!--MorphOS--&gt;[http://aminet.net/package/misc/emu/oricutron Oricutron]
|-
|&lt;!--Sub Menu--&gt;Games Emulation TI 99/4 99/4A [https://github.com/wavemotion-dave/DS994a DS994a], [], [https://js99er.net/#/ js99er], [], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=emulation/computer], 
|&lt;!--Amiga OS--&gt;[http://aminet.net/package/misc/emu/TI4Amiga TI4Amiga], [http://aminet.net/package/misc/emu/TI4Amiga_src TI4Amiga src in c], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation HP 38G 40GS 48 49G/50G Graphing Calculators
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Emulation TI 58 83 84 85 86 - 89 92 Graphing Calculators
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|}

{|  class=&quot;wikitable sortable&quot; 
|- 
!width:10%;|Games [https://www.rockpapershotgun.com/ General]
!width:10%;|AROS(x86)
!width:10%;|AmigaOS3(68k)
!width:10%;|AmigaOS4(PPC)
!width:10%;|MorphOS(PPC)
|- style=&quot;background:lightgrey;{{text default color}}; text-align:center; font-weight:bold;&quot;
| Games [https://www.trackawesomelist.com/michelpereira/awesome-open-source-games/ Open Source and others] || AROS || Amiga OS || Amiga OS4 || Morphos 
|-
|&lt;!--Sub Menu--&gt;Games Action like [https://github.com/opentomb/OpenTomb opentomb], [https://github.com/LostArtefacts/TRX TRX formerly Tomb1Main], [https://github.com/TombEngine TombEngine], [http://archives.arosworld.org/index.php?function=browse&amp;cat=game/action Thrust], [https://github.com/fragglet/sdl-sopwith sdl sopwith], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=game/action], [https://archives.arosworld.org/index.php?function=browse&amp;cat=game/action BOH], [], 
|&lt;!--Amiga OS--&gt;[https://github.com/BSzili/OpenLara/tree/amiga/src source of openlara SDL2], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Adventure like [http://dotg.sourceforge.net/ DMJ], [https://github.com/kromenak/gengine Gabriel Knight 3], [http://www.sarien.net/ Sierra Sarien], [https://github.com/klembot/twinejs twine js], [https://github.com/QSPFoundation/qspgui Quest Soft Player QSP], [], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=game/adventure dmagnetic], [https://archives.arosworld.org/?function=browse&amp;cat=emulation/misc ScummVM], [https://archives.arosworld.org/index.php?function=browse&amp;cat=game/roleplaying frotz infocom], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Board like [https://github.com/aperture-software/colditz-escape escape from colditz], [], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=game/board], [http://amigan.1emu.net/releases Africa]
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Cards 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=game/card], [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=1443&amp;rowstart=180&amp;pid=12934#post_12934 Balatro], 
|&lt;!--AmigaOS--&gt;[http://home.arcor.de/amigasolitaire/e/welcome.html Reko], [https://github.com/samskivert/beschei-en beschei Src], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Misc [https://github.com/michelpereira/awesome-open-source-games Awesome open], [https://github.com/bobeff/open-source-games General Open Source], [https://github.com/SAT-R/sa2 Sonic Advance 2], [https://github.com/velorek1/cwordle Wordle type], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=game/misc], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games FPS like [https://aminet.net/package/game/shoot/D1X_Rebirth_AGA Descent D1X src], [https://github.com/DescentDevelopers/Descent3 Descent 3], [https://github.com/Fewnity/Counter-Strike-Nintendo-DS Counter-Strike-Nintendo-DS], [https://github.com/Aleph-One-Marathon/alephone Bungie Marathon 1994], [https://zdoom.org/downloads UzDoom opengl 3.3], [https://github.com/ZDoom/gzdoom gzdoom opengl 3+], [https://zdoom.org/downloads LZDoom opengl 2.1], 
|&lt;!--AROS--&gt;Doom, Quake, [http://archives.arosworld.org/index.php?function=browse&amp;cat=game/fps Quake 3 Arena (OpenGL)], [http://archives.arosworld.org/index.php?function=browse&amp;cat=game/fps Cube (OpenGL)], [http://archives.arosworld.org/index.php?function=browse&amp;cat=game/fps Assault Cube (OpenGL)], [http://archives.arosworld.org/index.php?function=browse&amp;cat=game/fps Cube 2 Sauerbraten (OpenGL)], [http://fodquake.net/test/ FodQuake QuakeWorld], [https://archives.arosworld.org/index.php?function=browse&amp;cat=game/fps Duke Nukem 3D], [https://archives.arosworld.org/index.php?function=browse&amp;cat=game/fps Darkplaces Nexuiz Xonotic], [http://archives.arosworld.org/index.php?function=browse&amp;cat=game/fps Doom 3 SDL (OpenGL)], [http://archives.arosworld.org/index.php?function=browse&amp;cat=game/fps Hexenworld and Hexen 2], [https://archives.arosworld.org/index.php?function=browse&amp;cat=game/fps Aliens vs Predator Gold 2000 avp (openGL)], [https://archives.arosworld.org/index.php?function=browse&amp;cat=game/fps Odamex (openGL doom)], [https://archives.arosworld.org/?function=showfile&amp;file=game/fps/ zgloom], [], [https://archives.arosworld.org/?function=showfile&amp;file=game/fps/ ab3dhd], [], 
|&lt;!--Amiga OS--&gt;Doom, Quake, AB3D, Fears, Breathless, Gloom, 
|&lt;!--AmigaOS4--&gt;Doom, Quake, 
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=12 Doom], Quake, Quake 3 Arena, [https://github.com/OpenXRay/xray-16 S.T.A.L.K.E.R Xray]
|-
|&lt;!--Sub Menu--&gt;Games MMORG like 
|&lt;!--AROS--&gt;[ Eternal Lands (OpenGL)],
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Platform like 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=game/platform], [ Maze of Galious], [ Gish]*(openGL), [ Mega Mario], [https://archives.arosworld.org/?function=showfile&amp;file=game/platform/ thextech SMBX], [http://www.gianas-return.de/ Giana's Return], [http://www.sqrxz.de/ Sqrxz], [www.sqrxz2.de/ Sqrxz 2], [http://www.sqrxz.de/sqrxz-3/ Sqrxz 3], [http://www.sqrxz.de/sqrxz-4/ Sqrxz 4], [http://archives.arosworld.org/index.php?function=browse&amp;cat=game/platform Cave Story], [https://bszili.morphos.me/ Frogatto], [https://bszili.morphos.me/ OpenJazz], [https://archives.arosworld.org/?function=showfile&amp;file=game/platform/ pekkakana2], [ Aquaria], [https://archives.arosworld.org/?function=showfile&amp;file=game/platform/ sonic CD], [], 
|&lt;!--Amiga OS--&gt;[ Giana Sisters], [], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Puzzle [https://github.com/mariopartyrd/marioparty4/tree/port Party], [https://github.com/mdodis/OpenSolomonsKey OpenSolomonsKey], [], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=game/puzzle], [ Cubosphere (OpenGL)], [http://archives.arosworld.org/index.php?function=browse&amp;cat=game/puzzle Candy Crisis], [http://bszili.morphos.me/ TailTale], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Racing [ Trigger Rally], [ VDrift], [http://www.ultimatestunts.nl/index.php?page=2&amp;lang=en Ultimate Stunts], [http://maniadrive.raydium.org/ Mania Drive], [https://github.com/plowteam/donut Simpsons Hit and Run], [], 
|&lt;!--AROS--&gt;[ Super Tux Kart (OpenGL)], [http://www.dusabledanslherbe.eu/AROSPage/F1Spirit.30.html F1 Spirit (OpenGL)], [http://bszili.morphos.me/index.html MultiRacer], [https://bszili.morphos.me/ Speed Dreams], [https://archives.arosworld.org/?function=showfile&amp;file=game/driving/dethrace-0.10.1.x86_64-aros-v11.zip Carmageddon dethrace 64bit], [], 
|&lt;!--AmigaOS--&gt;
|&lt;!--AmigaOS4--&gt;[http://bszili.morphos.me/index.html Speed Dreams], 
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=12], [http://bszili.morphos.me/index.html TORCS], 
|-
|&lt;!--Sub Menu--&gt;Games 1st first person DRPG [https://wiki.rpg.net/index.php/Open_Game_Systems Misc], [https://github.com/OpenEnroth/OpenEnroth OpenEnroth MM], []
|&lt;!--AROS--&gt;[https://github.com/BSzili/aros-stuff Arx Libertatis], [http://www.playfuljs.com/a-first-person-engine-in-265-lines/ js raycaster], [https://github.com/Dorthu/es6-crpg webgl], [https://github.com/sonountaleban/AmiShockolate System Shock], [], [], 
|&lt;!--AmigaOS--&gt;Phantasie, Faery Tale, Dungeon Master, 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games 3rd third person action CRPG  [https://sourceforge.net/projects/sumwars/ Summoning Wars], [https://www.solarus-games.org/ Solarus], [https://wiki.rpg.net/index.php/Open_Game_Systems Misc], [https://github.com/alexbatalov/fallout1-ce fallout ce], [https://github.com/rwengine/openrw gta3], [https://github.com/gta-reversed/gta-reversed gta3 sa], [https://github.com/mrxenginner/reVC gta3 vc revc], [https://github.com/jakobharder/burntime/tree/main Burntime], 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/?function=showfile&amp;file=game/strategy/ fheroes2 homm2], [https://archives.arosworld.org/?function=showfile&amp;file=game/roleplaying/ breakhack], [https://archives.arosworld.org/?function=showfile&amp;file=game/roleplaying/ devilutionx diablo 1 hellfire], [https://archives.arosworld.org/?function=showfile&amp;file=game/roleplaying/ fallout 1], [https://archives.arosworld.org/?function=showfile&amp;file=game/strategy/ stratagus], [https://archives.arosworld.org/?function=showfile&amp;file=game/strategy/ hostile-takeover], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games isometric RPG [https://sourceforge.net/projects/sumwars/ Summoning Wars], [https://www.solarus-games.org/ Solarus], [https://wiki.rpg.net/index.php/Open_Game_Systems Misc], [https://github.com/topics/dungeon?l=javascript Dungeon], [], [https://github.com/clintbellanger/heroine-dusk JS Dusk], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=game/roleplaying nethack], [https://archives.arosworld.org/index.php?function=browse&amp;cat=game/roleplaying GemRB], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games card based RPG [https://github.com/open-duelyst/duelyst Duelyst], [], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games turn based tactics RPG [], [], [], [], [], [], 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=game/strategy UFO AI], [http://play.freeciv.org/ FreeCiv], [], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Strategy [http://rtsgus.org/ RTSgus], [http://stargus.sourceforge.net/ Stargus], [https://github.com/KD-lab-Open-Source/Perimeter Perimeter], [https://matty77.itch.io/conflict-3049 conflict-3049], [], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=game/strategy MegaGlest (OpenGL)], [https://archives.arosworld.org/?function=showfile&amp;file=game/strategy/ signus], [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=1443&amp;rowstart=140&amp;pid=12446#post_12446 Wargus warcraft 2 setup], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=12]
|-
|&lt;!--Sub Menu--&gt;Games Rhythm, Beat, Step [], [], [https://clonehero.net/ clonehero], [https://github.com/MatteoGodzilla/Dj-Engine Dj-Engine], 
|&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=game/misc Frets on Fire], [], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Shoot Em Ups [http://www.mhgames.org/oldies/formido/ Formido], [http://code.google.com/p/violetland/ Violetland], 
||&lt;!--AROS--&gt;[https://archives.arosworld.org/index.php?function=browse&amp;cat=game/action Open Tyrian], [http://www.parallelrealities.co.uk/projects/starfighter.php Starfighter], [ Alien Blaster], [https://github.com/OpenFodder/openfodder OpenFodder], [https://archives.arosworld.org/?function=showfile&amp;file=game/action/ tbftss The Battle for the Solar System: the Pandora War]
|&lt;!--AmigaOS--&gt;
|&lt;!--AmigaOS4--&gt;[http://www.parallelrealities.co.uk/projects/starfighter.php Starfighter], [ The Battle for the Solar System: the Pandora War]
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Simulations [http://scp.indiegames.us/ Freespace 2], [http://www.heptargon.de/gl-117/gl-117.html GL117], [http://code.google.com/p/corsix-th/ Theme Hospital], [http://code.google.com/p/freerct/ Rollercoaster Tycoon], [http://hedgewars.org/ Hedgewars], [https://github.com/raceintospace/raceintospace raceintospace], [https://github.com/Return-To-The-Roots RTTR Settlers 2], [https://github.com/OoliteProject/oolite oolite elite], [https://github.com/fesh0r/newkind newkind elite], [https://github.com/bohemiainteractive/cwr Arma Cold War Src], [], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;SimCity, SimAnt, Sim Hospital, Theme Park, [https://github.com/angree/openttd_amiga_68k openttd amiga_68k], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;[http://morphos.lukysoft.cz/en/vypis.php?kat=12]
|-
|&lt;!--Sub Menu--&gt;Games Life Sim [https://github.com/ACreTeam/forest Animal Crossing], [ ], [], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Horror [https://github.com/Mikompilation/MikuPan Fatal Frame], [ ], [], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Sandbox Voxel Open World Exploration [https://github.com/ClassiCube/ Classicube],[http://www.michaelfogleman.com/craft/ Craft], [https://github.com/tothpaul/DelphiCraft DelphiCraft],[https://www.minetest.net/ Luanti formerly Minetest], [ infiniminer], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Battle Royale [https://bruh.io/ Play.Bruh.io], [https://www.coolmathgames.com/0-copter Copter Royale], [https://surviv.io/ Surviv.io], [https://nuggetroyale.io/#Ketchup Nugget Royale], [https://miniroyale2.io/ Miniroyale2.io], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Tower Defense [https://chriscourses.github.io/tower-defense/ HTML5], [https://github.com/SBardak/Tower-Defense-Game TD C++], [https://github.com/bdoms/love_defense LUA and LOVE], [https://github.com/HyOsori/Osori-WebGame HTML5], [https://github.com/PascalCorpsman/ConfigTD ConfigTD Pascal], [https://github.com/GloriousEggroll/wine-ge-custom Wine], []
|&lt;!--AROS--&gt;[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=1443&amp;rowstart=180&amp;pid=12871#post_12871 Plants vs Zombies PvZ], 
|&lt;!--Amiga OS--&gt;[https://github.com/boingball/miggy-tower-defense miggy-tower-defense], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Visual Novel Engines [https://github.com/diane1f0cd/VisualNovelTemplate Visual Novel Template], [https://github.com/Kirilllive/tuesday-js Tuesday JS], [https://github.com/tejasnayak25/vnsutra vnsutra], [https://github.com/weetabix-su/renpsp-dev RenPSP], [https://github.com/Galladite27/ONScripter-EN ONScripter-EN], [https://github.com/NathanGuilhot/VNES-Raylib https://github.com/NathanGuilhot/VNES VNES in Raylib], [https://www.renpy.org/latest.html renpy ren'py python based], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Virtual Reality VR [https://gitlab.com/madsbuvi/openmw openmw vr], [https://github.com/Team-Beef-Studios/BeefRaiderXR BeefRaiderXR], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Virtual Table Top VTT [ Roll20], [https://www.owlbear.rodeo/ owlbear rodeo], [], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Computer assisted TableTop TTRPG OSR [https://www.rpgsolo.com/play.php RPGSolo], [https://github.com/fpsvogel/solo-ttrpgs Solo TTRPG], [], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games 2D 3D Engines [https://github.com/fegennari/3DWorld 3DWorld], [https://github.com/GarageGames/Torque3D Torque3D], [https://github.com/gameplay3d/GamePlay GamePlay 3D],  [https://www.babylonjs.com/ BabylonJS ], [ Godot], [ Ogre], [ Crystal Space], [https://github.com/JacobHess03/ Dragon-Quest like], [https://github.com/bjornbytes/lovr Lua LOVE for 2D LOVR for 3D], [], 
|&lt;!--AROS--&gt;[https://www.arkhamdev.net/wiki.htm?id=agx Arkham Development antiryadgx 8.9 lts with register], [], 
|&lt;!--Amiga OS--&gt;[https://github.com/alpyre/Sevgi_Engine Sevgi Engine], [], [], 
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games C based game frameworks [https://github.com/orangeduck/Corange Corange], [https://github.com/scottcgi/Mojoc Mojoc], [https://orx-project.org/ Orx], [https://github.com/ioquake/ioq3 Quake 3], [https://www.mapeditor.org/ Tiled], [https://www.raylib.com/ 2d Raylib], [https://github.com/Rabios/awesome-raylib other raylib], [https://github.com/MrFrenik/gunslinger Gunslinger], [https://o3de.org/ o3d], [http://archives.aros-exec.org/index.php?function=browse&amp;cat=development/library GLFW], [], 
|&lt;!--AROS--&gt;[http://archives.arosworld.org/index.php?function=browse&amp;cat=development/library Raylib 5], 
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games RPGMaker MV/MZ-compatible projects [https://github.com/Psychronic-Games/RPGReactor RPGReactor js],
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games Virtual Pinball [https://github.com/vpinball/vpinball vpinball], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|-
|&lt;!--Sub Menu--&gt;Games unpack unarc [], [], 
|&lt;!--AROS--&gt;
|&lt;!--Amiga OS--&gt;
|&lt;!--AmigaOS4--&gt;
|&lt;!--MorphOS--&gt;
|}


==Application Guides==

[[#top|...to the top]]

===Web Browser===

OWB is now at version 2.0 (which got an engine refresh, from July 2015 to February 2019) and 3.0.

This latest version has a good support for many/most web sites, even YouTube web page now works. [https://www.bilibili.tv/en/search untested] 

This improved compatibility comes at the expense of higher RAM usage (now 1GB RAM is the absolute minimum). 

Also, keep in mind that the lack of a JIT (Just-In-Time) JS compiler on the 32 bit version, makes the web surfing a bit slow. 

Only the 64 bit version of OWB 2.0 will have JIT enabled, thus benefitting of more speed. There are tooltypes that can be added to the icon to provide further features JIT, MSE etc 


Certificates from [https://curl.se/docs/caextract.html ca certs], 


DNS tracking blocking with [https://easylist.to/easylist/easylist.txt easylist.txt] in PROGDIR:Conf before starting browser with enabled AdBlock [https://github.com/easylist/easylist/tree/master easylist], [https://gitlab.com/eyeo anti abp], [https://firebog.net/ big blocklist], [https://github.com/StevenBlack/hosts Steves], [], [], 

This can be enabled with OWB Odyssey with Windows -&gt; Content Blocking and Windows -&gt; Messages and enter 

 https://www.youtube.com/api/stats/ads*
 https://www.youtube.com/pagead/adview*
 https://www.youtube.com#@##player-ads*

into your custom filters 


Element blocker browser extension might be needed for [https://github.com/easylist/easylist/wiki/Youtube-Issues youtube], [ mid roll], [ pre roll], [ ],  


OWB speed is much better when running from RAM Disk, the best way is to add the below into your S:User-Startup which copies OWB drawer from Extras:Internet/OWB to RAM Disk: 

So add this :
&lt;pre&gt;
copy Extras:Internet/OWB Ram:OWB/ ALL CLONE &gt;NIL:
copy Extras:Internet/OWB.info Ram: &gt;NIL:
&lt;/pre&gt;
Open RAM Disk and open OWB drawer and double click on OWB icon so that the above icon tooltypes are activated 

Problems are that the copy time is long (around 20 seconds added in the background), but we can make it faster if we delete useless files from the OWB drawer (docs, …)
If you don’t copy the drawer back onto the HD, you won’t save your cache, cookies, passwords… So you need a script for it.

 copy Extras:Internet/Amelinium/#? Ram:Amelinium/ ALL CLONE &gt;NIL: 

Error messages 

SSL error &quot;cant verify with ca-certificates&quot;, check bios clock time date is correct 

Error 6, try checking networking prefs settings and Save / Use preferences again or a '''few times''' otherwise the network chipset may not be compatible with Aros 


[https://www.google.com/search?q=%s&amp;udm=14 Google search without AI overview] 
[ DuckDuckGo]
[ Ecosia]
[ Qwant]
[ Swisscows]
[ Mojeek]
[ Brave Search]
[ PreSearch]
[ Startpage] 


===E-mail===

 Emailinium is now available for IMAP and POP3 based accounts 

YAM does not support SSL and most mail providers now switched to encrypted SMTP/POP3 connections


====SimpleMail====

SimpleMail supports IMAP and appears to work with GMail, but it's never been reliable enough, it can crash with large mailboxes.

Please read more on this [http://www.freelists.org/list/simplemail-usr User list]


 GMail

Be sure to activate the pop3 usage in your gmail account setup / configuration first.

pop3: 
pop.gmail.com
Use SSL: Yes
Port: 995

smtp:
smtp.gmail.com (with authentication)
Use Authentication: Yes
Use SSL: Yes
Port: 465 or 587


 Hotmail/MSN/outlook/Microsoft Mail mid-2017, all outlook.com accounts will be migrated to Office 365 / Exchange

Most users are currently on POP which does not allow showing folders and many other features (technical limitations of POP3). With Microsoft IMAP you will get folders, sync read/unread, and show flags. You still won't get push though, as Microsoft has not turned on the IMAP Idle command as at Sept 2013.

If you want to try it, you need to first remove (you can't edit) your pop account (long-press the account on the accounts screen, delete account). Then set it up this way:

1. Email/Password
2. Manual
3. IMAP
4.

* Incoming: imap-mail.outlook.com, port 993, SSL/TLS should be checked
* Outgoing: smtp-mail.outlook.com, port 587, SSL/TLS should be checked
* POP server name pop-mail.outlook.com, port 995, POP encryption method SSL

 Yahoo  Mail

On April 24, 2002 Yahoo ceased to offer POP access to its free mail service. Introducing instead a yearly payment feature, allowing users POP3 and IMAP server support, along with such benefits as larger file attachment sizes and no adverts.

Sorry to see Yahoo leaving its users to cough up for the privilege of accessing their mail. Understandable, when competing against rivals such as Gmail and Hotmail who hold a large majority of users and were hacked in 2014 as well.


Incoming Mail (IMAP) Server

* Server - imap.mail.yahoo.com
* Port - 993
* Requires SSL - Yes

Outgoing Mail (SMTP) Server

* Server - smtp.mail.yahoo.com
* Port - 465 or 587
* Requires SSL - Yes
* Requires authentication - Yes

Your login info

* Email address - Your full email address (name@domain.com)
* Password - Your account's password
* Requires authentication - Yes


Note that you need to enable “Web &amp; POP Access” in your Yahoo Mail account to send and receive Yahoo Mail messages through any other email program.

You will have to enable “Allow your Yahoo Mail to be POPed” under “POP and Forwarding”, to send and receive Yahoo mails through any other email client.

Cannot be done since 2002 unless the customer pays Yahoo a subscription subs fee to have access to SMTP and POP3

* Set the POP server for incoming mails as pop.mail.yahoo.com. You will have to enable “SSL” and use 995 for Port.
* “Account Name or Login Name” – Your Yahoo Mail ID i.e. your email address without the domain “@yahoo.com”.
* “Email Address” – Your Yahoo Mail address i.e. your email address including the domain “@yahoo.com”. E.g. myname@yahoo.com
* “Password” – Your Yahoo Mail password.

Yahoo! Mail Plus users may have to set POP server as plus.pop.mail.yahoo.com and SMTP server as plus.smtp.mail.yahoo.com.

* Set the SMTP server for outgoing mails as smtp.mail.yahoo.com. You will also have to make sure that “SSL” is enabled and use 465 for port. you must also enable “authentication” for this to work.


====YAM Yet Another Mailer====

 YAM does not support SSL and most mail providers have now switched to encrypted SMTP/POP3 connections

This email client is POP3 only if the SSL library is available [http://www.freelists.org/list/yam YAM Freelists]

One of the downsides of using a POP3 mailer unfortunately - you have to set an option not to delete the mail if you want it left on the server. IMAP keeps all the emails on the server.

Possible issues

Sending mail issues is probably a matter of using your ISP's SMTP server, though it could also be an SSL issue.


getting a &quot;Couldn't initialise TLSv1 / SSL error

Use of on-line e-mail accounts with this email client is not possible as it lacks the OpenSSL AmiSSl v3 compatible library

 GMail 
Incoming Mail (POP3) Server - requires SSL: pop.gmail.com
Use SSL: Yes
Port: 995

Outgoing Mail (SMTP) Server - requires TLS: smtp.gmail.com (use authentication)
Use Authentication: Yes
Use STARTTLS: Yes (some clients call this SSL)
Port: 465 or 587

Account Name: your Gmail username (including '@gmail.com')
Email Address: your full Gmail email address (username@gmail.com)
Password: your Gmail password

Anyway, the SMTP is pop.gmail.com port 465 and it uses SSLLv3 Authentication. The POP3 settings are for the same server (pop.gmail.com), only on port 995 instead.


 Outlook.com access

&lt;pre &gt;
Outlook.com SMTP server address: smtp.live.com
Outlook.com SMTP user name: Your full Outlook.com email address (not an alias)
Outlook.com SMTP password: Your Outlook.com password
Outlook.com SMTP port: 587
Outlook.com SMTP TLS/SSL encryption required: yes 
&lt;/pre &gt;


 Yahoo  Mail

&lt;pre &gt;
“POP3 Server” – Set the POP server for incoming mails as pop.mail.yahoo.com. You will have to enable “SSL” and use 995 for Port.
“SMTP Server” – Set the SMTP server for outgoing mails as smtp.mail.yahoo.com. You will also have to make sure that “SSL” is enabled and use 465 for port. you must also enable “authentication” for this to work.
“Account Name or Login Name” – Your Yahoo Mail ID i.e. your email address without the domain “@yahoo.com”.
“Email Address” – Your Yahoo Mail address i.e. your email address including the domain “@yahoo.com”. E.g. myname@yahoo.com
“Password” – Your Yahoo Mail password.
&lt;/pre &gt;

Yahoo! Mail Plus users may have to set POP server as plus.pop.mail.yahoo.com and SMTP server as plus.smtp.mail.yahoo.com.

Note that you need to enable “Web &amp; POP Access” in your Yahoo Mail account to send and receive Yahoo Mail messages through any other email program.

You will have to enable “Allow your Yahoo Mail to be POPed” under “POP and Forwarding”, to send and receive Yahoo mails through any other email client.

Cannot be done since 2002 unless the customer pays Yahoo a monthly fee to have access to SMTP and POP3


 Microsoft Outlook Express Mail 

1. Get the files to your PC.
By whatever method get the files off your Amiga onto your PC. In the YAM folder you have a number of different folders, one for each of your folders in YAM. Inside that is a file usually some numbers such as 332423.283. YAM created a new file for every single email you received.

2. Open up a brand new Outlook Express. Just configure the account to use 127.0.0.1 as mail servers. It doesn't really matter. You will need to manually create any subfolders you used in YAM.

3. You will need to do a mass rename on all your email files from YAM. Just add a .eml to the end of it. Amazing how PCs still rely mostly on the file name so it knows what sort of file it is rather than just looking at it! There are a number of multiple renamers online to download and free too.

4. Go into each of your folders, inbox, sent items etc. And do a select all then drag the files into Outlook Express (to the relevant folder obviously) Amazingly the file format that YAM used is very compatible with .eml standard and viola your emails appear. With correct dates and working attachments.

5. If you want your email into Microsoft Outlook. Open that up and create a new profile and a new blank PST file. Then go into File Import and choose to import from Outlook Express. And the mail will go into there. And viola.. you have your old email from your Amiga in a more modern day format.


===FTP===

Magellan has a great FTP module. It allows transferring files from/to a FTP server over the Internet or the local network and, even if FTP is perceived as a &quot;thing of the past&quot;, its usability is all inside the client. The FTP thing has a nice side effect too, since every Icaros machine can be a FTP server as well, and our files can be easily transferred from an Icaros machine to another with a little configuration effort.

First of all, we need to know the 'server' IP address. Server is the Icaros machine with the file we are about to download on another Icaros machine, that we're going to call 'client'. To do that, move on the server machine and 1) run Prefs/Services to be sure &quot;FTP file transfer&quot; is enabled (if not, enable it and restart Icaros); 2) run a shell and enter this command:

ifconfig -a

Make a note of the IP address for the network interface used by the local area network. For cabled devices, it usually is net0:. Now go on the client machine and run Magellan:

Perform these actions: 1) click on FTP; 2) click on ADDRESS BOOK; 3) click on &quot;New&quot;. 
You can now add a new entry for your Icaros server machine:

1) Choose a name for your server, in order to spot it immediately in the address book. Enter the IP address you got before.

2) click on Custom Options:


1) go to Miscellaneous in the left menu;

2) Ensure &quot;Passive Transfers&quot; is NOT selected;

3) click on Use. We need to deactivate Passive Transfers because YAFS, the FTP server included in Icaros, only allows active transfers at the current stage. Now, we can finally connect to our new file source:


1) Look into the address book for the newly introduced server, be sure that name and IP address are right, and

2) click on Connect. A new lister with server's &quot;MyWorkspace&quot; contents will appear. You can now transfer files over the network choosing a destination among your local (client's) volumes.

Can be adapted to any FTP client on any platform of your choice, just be sure your client allows Active Transfers as well.


===IRC Internet Relay Chat===

Jabberwocky is ideal for one-to-one social media communication, use IRC if you require one to many. 

Just type a message in ''lowercase''' letters and it will be posted to all in the [ AROS irc channel]. Please do not use UPPER CASE as it is a sign of SHOUTING which is annoying.

Other things to type in - replace &lt;message&gt; with a line of text and &lt;nick&gt; with a person's name

&lt;pre&gt;
/help

/list

/who
/whois &lt;nick&gt;

/msg &lt;nick&gt; &lt;message&gt;

/query &lt;nick&gt; 
&lt;message&gt;s
/query

/away &lt;message&gt;
/away

/quit &lt;going away message&gt; 
&lt;/pre&gt;


[http://irchelp.org/irchelp/new2irc.html#smiley Intro guide here]. IRC Primer can be found here in [http://www.irchelp.org/irchelp/ircprimer.html html], [http://www.irchelp.org/irchelp/text/ircprimer.txt TXT], [http://www.kei.com/irc/IRCprimer1.1.ps PostScript].


Issue the command /me &lt;text&gt; where &lt;text&gt; is the text that should follow your nickname.
Example: /me slaps ajk around a bit with a large trout

/nick &lt;newNick&gt;

/nickserv register &lt;password&gt; &lt;email address&gt;

/ns instead of /nickserv, while others might need /msg nickserv

/nickserv identify &lt;password&gt;

Alternatives:
/ns identify &lt;password&gt;
/msg nickserv identify &lt;password&gt;


==== IRC WookieChat ====

WookieChat is the most complete internet client for communication across the IRC Network. WookieChat allows you to swap ideas and communicate in real-time, you can also exchange Files, Documents, Images and everything else using the application's DCC capabilities.


add smilies drawer/directory

 run wookiechat from the shell and set stack to 1000000 e.g. wookiechat stack 1000000

select a server / server window

* nickname 
* user name 
* real name - optional

Once you configure the client with your preferred screen name, you'll want to find a channel to talk in.


servers

* New Server - click on this to add / add extra - change details in section below this click box 
* New Group
* Delete Entry
* Connect to server
* connect in new tab
* perform on connect

Change details

* Servername - change text in this box to one of the below Server: 
* Port number - no need to change
* Server password
* Channel - add #channel from below 
* auto join - can click this 
* nick registration password,

Click Connect to server button above


&lt;pre&gt;
Server: irc.freenode.net
Channel: #aros
&lt;/pre&gt;

irc://irc.freenode.net/aros

&lt;pre&gt;
Server: chat.amigaworld.net 
Channel: #amigaworld or #amigans 
&lt;/pre&gt;

&lt;pre&gt;
On Sunday evenings USA time usually starting around 3PM EDT (1900 UTC)
Server:irc.superhosts.net
Channel #team*amiga  
&lt;/pre&gt;

&lt;pre&gt;
BitlBee and Minbif are IRCd-like gateways to multiple IM networks
Server: im.bitlbee.org 
Port 6667 
Seems to be most useful on WookieChat as you can be connected to several servers at once. One for Bitlbee and any messages that might come through that. One for your normal IRC chat server. 
&lt;/pre&gt;

[http://www.bitlbee.org/main.php/servers.html Other servers],

&lt;pre&gt;
#Amiga.org - irc.synirc.net eu.synirc.net dissonance.nl.eu.synirc.net (IPv6: 2002:5511:1356:0:216:17ff:fe84:68a) 
twilight.de.eu.synirc.net zero.dk.eu.synirc.net us.synirc.net avarice.az.us.synirc.net envy.il.us.synirc.net harpy.mi.us.synirc.net 
liberty.nj.us.synirc.net snowball.mo.us.synirc.net - Ports 6660-6669 7001 (SSL)
&lt;/pre&gt;

&lt;pre&gt;
Multiple server support
&quot;Perform on connect&quot; scripts and channel auto-joins
Automatic Nickserv login
Tabs for channels and private conversations
CTCP PING, TIME, VERSION, SOUND
Incoming and Outgoing DCC SEND file transfers
Colours for different events
Logging and automatic reloading of logs
mIRC colour code filters
Configurable timestamps
GUI for changing channel modes easily
Configurable highlight keywords
URL Grabber window
Optional outgoing swear word filter
Event sounds for tabs opening, highlighted words, and private messages
DCC CHAT support
Doubleclickable URL's
Support for multiple languages using LOCALE
Clone detection
Auto reconnection to Servers upon disconnection
Command aliases
Chat display can be toggled between AmIRC and mIRC style
Counter for Unread messages
Graphical nicklist and graphical smileys with a popup chooser
&lt;/pre&gt;


====IRC Aircos ====

Double click on Aircos icon in Extras:Networking/Apps/Aircos. It has been set up with a guest account for trial purposes. Though ideally, choose a nickname and password for frequent use of irc. 


====IRC and XMPP Jabberwocky====
 Servers are setup and close down at random 
You sign up to a server that someone else has setup and access chat services through them. 

The two ways to access chat from jabberwocky
&lt;pre &gt;
Jabberwocky -&gt; Server -&gt; XMPP -&gt; open and ad-free 
Jabberwocky -&gt; Server -&gt; Transports (Gateways) -&gt; Proprietary closed systems 
&lt;/pre &gt;

The Jabber.org service connects with all IM services that use XMPP, the open standard for instant messaging and presence over the Internet. The services we connect with include Google Talk (closed), Live Journal Talk, Nimbuzz, Ovi, and thousands more. However, you can not connect from Jabber.org to proprietary services like AIM, ICQ, MSN, Skype, or Yahoo because they don’t yet use XMPP components (XEP-0114) '''but''' you can use Jabber.com's servers and IM gateways (MSN, ICQ, Yahoo etc.) instead.

The best way to use jabberwocky is in conjunction with a public jabber server with '''transports''' to your favorite services, like gtalk, Facebook, yahoo, ICQ, AIM, etc.


You have to register with one of the servers, [https://list.jabber.at/ this list] or [http://www.jabberes.org/servers/ another list], [http://xmpp.net/ this security XMPP list],

Unfortunately jabberwocky can only connect to one server at a time so it is best to check what services each server offers. If you set it up with separate Facebook and google talk accounts, for example, sometimes you'll only get one or the other.

Jabberwocky open a window where the Jabber server part is typed in as well as your Nickname and Password.

Jabber ID (JID) identifies you to the server and other users.

Once registered the next step is to goto Jabberwocky's &quot;Windows&quot; menu and select the &quot;Agents&quot; option. The &quot;Agents List&quot; window will open.

Roster (contacts list)

[http://search.wensley.org.uk/ Chatrooms] (MUC) are available

File Transfer - can send and receive files through the Jabber service but not with other services like IRC, ICQ, AIM or Yahoo. All you need is an installed webbrowser and OpenURL.

Clickable URLs - The message window uses Mailtext.mcc and you can set a URL action in the MUI mailtext prefs like SYS:Utils/OpenURL %s NEWWIN.

There is no consistent Skype like (H.323 VoIP) video conferencing available over Jabber. The move from xmpp to Jingle should help but no support on any amiga-like systems at the moment. [http://aminet.net/package/dev/src/AmiPhoneSrc192 AmiPhone] and [http://www.lysator.liu.se/%28frame,faq,nobg,useframes%29/ahi/v4-site/ Speak Freely] was an early attempt voice only contact. SIP and Asterisk are other PBX options.


 Facebook

If you're using the XMPP transport provided by Facebook themselves, chat.facebook.com, it looks like they're now requiring SSL transport. This means jabberwocky method below will no longer work. The best thing to do is to create an ID on a public jabber server which has a Facebook gateway.

&lt;pre &gt;
1. launch jabberwocky
2. if the login window doesn't appear on launch, select 'account' from the jabberwocky menu
3. your jabber ID will be user@chat.facebook.com where user is your user ID
4. your password is your normal facebook password
5. to save this for next time, click the popup gadget next to the ID field

6. click the 'add' button
7. click the 'close' button
8. click the 'connect' button
&lt;/pre &gt;

you're done. you can also click the 'save as default account' button if you want. jabberwocky configured to auto-connect when launching the program, but you can configure as you like. there is amigaguide documentation included with jabberwocky.

[http://amigaworld.net/modules/newbb/viewtopic.php?topic_id=37085&amp;forum=32 Read more here]

for Facebook users, you can log-in directly to Facebook with jabberwocky. just sign in as @chat.facebook.com with your Facebook password as the password


 Twitter

For a few years, there has been added a twitter transport. Servers include [http://jabber.hot-chilli.net/ jabber.hot-chili.net],  and .

An [http://jabber.hot-chilli.net/tag/how-tos/ How-to]

:Read [http://jabber.hot-chilli.net/2010/05/09/twitter-transport-working/ more]

 Instagram 

no support at the moment best to use a web browser based client

 ICQ

The new version (beta) of StriCQ uses a newer ICQ protocol. Most of the ICQ Jabber Transports still use an older ICQ protocol. You can only talk one-way to StriCQ using the older Transports. Only the newer ICQv7 Transport lets you talk both ways to StriCQ. Look at the server lists in the first section to check.

Register on a Jabber server, e.g. this one works: http://www.jabber.de/
Then login into Jabberwocky with the following login data e.g. xxx@jabber.de / Password: xxx Now add your ICQ account under the window-&gt;Agents-&gt;&quot;Register&quot;. Now Jabberwocky connects via the Jabber.de server with your ICQ account.

 Yahoo Messenger

although yahoo! does not use xmpp protocol, you should be able to use the transport methods to gain access and post your replies

 MSN

early months of 2013 Microsoft will ditch MSN Messenger client and force everyone to use Skype...but MSN protocol and servers will keep working as usual for quite a long time....

Occasionally the Messenger servers have been experiencing problems signing in.  You may need to sign in at www.outlook.com and then try again.  It may also take multiple tries to sign in.  (This also affects you if you’re using Skype.)

You have to check each servers' Agents List to see what transports (MSN protocol, ICQ protocol, etc.) are supported or use the list address' provided in the section above. Then register with each transport (IRC, MSN, ICQ, etc.) to which you need access. After registering you can Connect to start chatting.

msn.jabber.com/registered should appear in the window.

From this [http://tech.dir.groups.yahoo.com/group/amiga-jabberwocky/message/1378 JW group] guide which  helps with this process in a clear, step by step procedure.

1. Sign up on MSN's site for a passport account. This typically involves getting a Hotmail address.

2. Log on to the Jabber server of your choice and do the following:

* Select the &quot;Windows/Agents&quot; menu option in Jabberwocky.
* Select the MSN Agent from the list presented by the server.
* Click the Register button to open a new window asking for:
**Username = passort account email address, typically your hotmail address.
**Nick = Screen name to be shown to anyone you add to your buddy list.
**Password = Password for your passport account/hotmail address.
* Click the Register button at the bottom of the new window.

3. If all goes well, you will see the MSN Gateway added to your buddy list. If not, repeat part 2 on another server. Some servers may show MSN in their list of available agents, but have not updated their software for the latest protocols used by MSN.

4. Once you are registered, you can now add people to your buddy list. Note that you need to include the '''msn.''' ahead of the servername so that it knows what gateway agent to use. Some servers may use a slight variation and require '''msg.gate.''' before the server name, so try both to see what works.

If my friend's msn was amiga@hotmail.co.uk and my jabber server was @jabber.meta.net.nz..
then amiga'''%'''hotmail.com@'''msn.'''jabber.meta.net.nz

or another the trick to import MSN contacts is that you don't type the hotmail URL but the passport URL... e.g. Instead of: goodvibe%hotmail.com@msn.jabber.com  You type: goodvibe%passport.com@msn.jabber.com 
And the thing about importing contacts I'm afraid you'll have to do it by hand, one at the time...

 Google Talk

any XMPP server will work, but you have to add your contacts manually. a google talk user is typically either @gmail.com or @talk.google.com. a true gtalk transport is nice because it brings your contacts to you and (can) also support file transfers to/from google talk users.

implement Jingle a set of extensions to the IETF's Extensible Messaging and Presence Protocol (XMPP)

support ended early 2014 as Google moved to Google+ Hangouts which uses it own proprietary format


===Video Player MPlayer===

Many of the menu features (such as doubling) do not work with the current version of mplayer but using

4:3
 mplayer -vf scale=800:600 file.avi

16:9
 mplayer -vf scale=854:480 file.avi

if you want gui use;
 mplayer -gui 1 &lt;other params&gt; file.avi

&lt;pre &gt;
stack 1000000

; using AspireOS 1.xx 
; copy FROM SYS:Extras/Multimedia/MPlayer/ TO RAM:MPlayer ALL CLONE &gt; Nil:

; using Icaros Desktop 1.x 
; copy FROM SYS:Tools/MPlayer/ TO RAM:MPlayer ALL CLONE &gt; Nil:

; using Icaros Desktop 2.x 
; copy FROM SYS:Utilities/MPlayer/ TO RAM:MPlayer ALL CLONE &gt; Nil:

cd RAM:MPlayer
run MPlayer -gui &gt; Nil:
;run MPlayer -gui -ao ahi_dev -playlist http://www.radio-paralax.de/listen.pls &gt; Nil: 
&lt;/pre &gt;

$ mplayer rtsp://127.0.0.1:554/sample_300kbit.mp4


MPlayer supports multicast streaming, and rtp/rtsp protocols (it might require [http://www.live555.com/openRTSP/ live555 library] to work with some streams). But you might have to build it where it's disabled. Also, multicast won't work with some AmiTCP-likes. MIAMI supported it, though.

AROS supports IPv4 (old but works) and this includes the needed address space for RTP.

If you mean multicast via RTP - mplayer handles it. You can even force UDP over TCP

-rtsp-stream-over-tcp

If the rtsp Real Time Streaming Protocol  server needs authentification:

-user -passwd


MPlayer - Menu - Open Playlist and load already downloaded .pls or .m3u file - auto starts around 4 percent cache

MPlayer - Menu - Open Stream and copy one of the .pls lines below into space allowed, press OK and press play button on main gui interface


Old 8bit 16bit remixes chip tune game music 
 
http://www.radio-paralax.de/listen.pls 

http://scenesat.com/

http://www.shoutcast.com/radio/Amiga

http://www.theoldcomputer.com/retro_radio/RetroRadio_Main.htm

http://www.kohina.com/

http://www.remix64.com/

http://retrogamer.net/forum/

http://retroasylum.podomatic.com/rss2.xml

http://retrogamesquad.com/

http://www.retronauts.com/

http://monsterfeet.com/noquarter/

http://www.retrogamingradio.com/

http://www.radiofeeds.co.uk/mp3.asp


[[#top|...to the top]]

====ZunePaint==== 

simplified typical workflow

* importing and organizing and photo management
* making global and regional local correction(s) - recalculation is necessary after each adjustment as it is not in real-time 
* exporting your images in the best format available with the preservation of metadata


Whilst achieving 80% of a great photo with just a filter, the remaining 20% comes from a manual fine-tuning of specific image attributes.


For photojournalism, documentary, and event coverage, minimal touching is recommended. Stick to Camera Raw for such shots, and limit changes to level adjustment, sharpness, noise reduction, and white balance correction.

For fashion or portrait shoots, a large amount of adjustment is allowed and usually ends up far from the original. Skin smoothing, blemish removal, eye touch-ups, etc. are common.  Might alter the background a bit to emphasize the subject.

Product photography usually requires a lot of sharpening, spot removal, and focus stacking.

For landscape shots, best results are achieved by doing the maximum amount of preparation before/while taking the shot. No amount of processing can match timing, proper lighting, correct gear, optimal settings, etc. Excessive post-processing might give you a dramatic shot but best avoided in the long term.


* White Balance - Left Amiga or F12 and K and under &quot;Misc color effects&quot; tab with a pull down for White Balance - color temperature also known as AKA tint (movies) or tones (painting) - warm temp raise red reduce green blue - cool raise blue lower red green 
* Exposure - exposure compensation, highlight/shadow recovery
* Noise Reduction - during RAW development or using external software
* Lens Corrections - distortion, vignetting, chromatic aberrations
* Detail - capture sharpening and local contrast enhancement
* Contrast - black point, levels (sliders) and curves tools (F12 and K) 
* Framing - straighten () and crop (F12 and F) 
* Refinements - color adjustments and selective enhancements - Left Amiga or F12 and K for RGB and YUV histogram tabs - 
* Resizing - enlarge for a print or downsize for the web or email (F12 and D) 
* Output Sharpening - customized for your subject matter and print/screen size


White Balance - F12 and K

scan your image for a shade which was meant to be white (neutral with each RGB value being equal) like paper or plastic which is in the same light as the subject of the picture. Use the dropper tool to select this color, similar colours will shift and you will have selected the perfect white balance for your part of the image - for the whole picture make sure RAZ or CLR button at the bottom is pressed before applying to the image above.


Exposure correction

F12 and K - YUV Y luminosity - RGB extra red tint - move red curve slightly down and move blue green curves slightly up

Workflows in practice

* Undo - Right AROS key or F12 and Z 
* Redo - Right AROS key or F12 and R

First flatten your image (if necessary) and then do a rotation until the picture looks level. 
* Crop the picture. Click the selection button and drag a box over the area of the picture you want to keep. Press the crop button and the rest of the photo will be gone. 
* Adjust your saturation, exposure, hue levels, etc., (right AROS Key and K for color correction) until you are happy with the photo. Make sure you zoom in all of the way to 100% and look the photo over, zoom back out and move around. Look for obvious problems with the picture. 
* After coloring and exposure do a sharpen (Right AROS key and E for Convolution and select drop down option needed), e.g. set the matrix to 5x5 (roughly equivalent Amount to 60%) and set the Radius to 1.0. Click OK.


And save your picture


Implemented or would like to see for simplification and ease of use

basic filters (presets) like black and white, monochrome, edge detection (sobel), motion/gaussian blur, 
* negative, sepiatone, retro vintage, night vision, colour tint, color gradient, color temperature, glows, fire, lightning, lens flare, emboss, filmic, pixelate mezzotint, antialias, etc.

adjust / cosmetic tools such as crop, 
* reshaping tools, straighten, smear, smooth, perspective, liquify, bloat, pucker, push pixels in any direction, dispersion, transform like warp, blending with soft light, page-curl, whirl, ripple, fisheye, neon,  etc. 
* red eye fixing, blemish remover, skin smoothing, teeth whitener, make eyes look brighter, desaturate,

effects like oil paint, cartoon, pencil sketch, charcoal, noise/matrix like sharpen/unsharpen, (right AROS key with A for Artistic effects) 
* blend two image, gradient blend, masking blend, explode, implode, custom collage, surreal painting, comic book style, needlepoint, stained glass, watercolor, mosaic, stencil/outline, crayon, chalk, etc.

borders such as 
* dropshadow, rounded, blurred, color tint, picture frame, film strip polaroid, bevelled edge, etc.

brushes e.g.
* frost, smoke, etc.

and manual control of

fix lens issues including vignetting (darkening), color fringing and barrel distortion, and chromatic and geometric aberration -  lens and body profiles

perspective correction

levels - directly modify the levels of the tone-values of an image, by using sliders for highlights, midtones and shadows

curves -  Color Adjustment and Brightness/Contrast

color balance

one single color transparent (alpha channel (color information/selections) for masking and/or blending ) for backgrounds, etc.

Threshold indicates how much other colors will be considered mixture of the removed color and non-removed colors

decompose layer into a set of layers with each holding a different type of pattern that is visible within the image

any selection using any selecting tools like lasso tool, marquee tool etc. the selection will temporarily be save to alpha 
If you create your image without transparency then the Alpha channel is not present, but you can add later.

File formats like .psd (Photoshop file has layers, masks etc.  contains edited sensor data. The original sensor data is no longer available) .xcf .raw .hdr

Image Picture Formats
* low dynamic range (JPEG, PNG, TIFF 8-bit), 16-bit (PPM, TIFF), typically as a 16-bit TIFF in either ProPhoto or AdobeRGB colorspace -  TIFF files are also fairly universal – although, if they contain proprietary data, such as Photoshop Adjustment Layers or Smart Filters, then they can only be opened by Photoshop making them proprietary.
* linear high dynamic range (HDR) images (PFM, [http://www.openexr.com/ ILM .EXR], jpg, [http://aminet.net/util/dtype cr2] (canon tiff based), hdr, NEF, CRW, ARW, MRW, ORF, RAF (Fuji), PEF, DCR, SRF, ERF, DNG files are RAW converted to an Adobe proprietary format - a container that can embed the raw file as well as the information needed to open it) 
An old version of [http://archives.aros-exec.org/index.php?function=browse&amp;cat=graphics/convert dcraw]

There is no single RAW file format. Each camera manufacturer has one or more unique RAW formats. RAW files contain the brightness levels data captured by the camera sensor. This data cannot be modified. A second smaller file, separate XML file, or within a database with instructions for the RAW processor to change exposure, saturation etc. The extra data can be changed but the original sensor data is still there. RAW is technically least compatible.

A raw file is high-bit (usually 12 or 14 bits of information) but a camera-generated TIFF file will be usually converted by the camera (compressed, downsampled) to 8 bits. The raw file has no embedded color balance or color space, but the TIFF has both. These three things (smaller bit depth, embedded color balance, and embedded color space) make it so that the TIFF will lose quality more quickly with image adjustments than the raw file. The camera-generated TIFF image is much more like a camera processed JPEG than a raw file. A strong advantage goes to the raw file. The power of RAW files, such as the ability to set any color temperature non-destructively and will contain more tonal values.

The principle of preserving the maximum amount of information to as late as possible in the process. The final conversion - which will always effectively represent a &quot;downsampling&quot; - should prevent as much loss as possible.

Once you save it as TIFF, you throw away some of that data irretrievably. When saving in the lossy JPEG format, you get tremendous file size savings, but you've irreversibly thrown away a lot of image data. As long as you have the RAW file, original or otherwise, you have access to all of the image data as captured.

Keyboard equivalence with Photoshop(tm) would help 

File
PHOTOSHOP	SHORTCUT	GIMP
New	Ctrl+n	New
Open	Ctrl+o	Open
Close	Ctrl+w	Close
Save	Ctrl+s	Save
Save as	Shift+Ctrl+s	Save as
Revert	F12	Revert
Print	Ctrl+p	Print
Exit	Ctrl+q	Quit
 
Edit
PHOTOSHOP	SHORTCUT	GIMP
Undo/Redo (1 level)	Ctrl+z	Undo (Redo is Shift+Ctrl+z)
Cut	Ctrl+x	Cut
Copy	Ctrl+c	Copy
Paste	Ctrl+v	Paste
Paste Into	Shift+Ctrl+v	Paste Into
Fill with FG color	Alt+Backspace	Fill with FG color
Fill with BG color	Control+Backspace	Fill with BG color
 
Image/Colors
PHOTOSHOP	SHORTCUT	GIMP
Levels	Ctrl+l	Levels
Auto Contrast	Shift+Ctrl+Alt+l	Stretch Contrast (same?)
Curves	Ctrl+m	Curves
Color Balance	Ctrl+b	Color Balance
Hue/Saturation	Ctrl+u	Hue-Saturation
Desaturate	Shift+Ctrl+u	Desaturate
Invert	Ctrl+i	Invert
Default Colors	d	Default Colors
Switch Colors	x	Switch Colors
 
Layer
PHOTOSHOP	SHORTCUT	GIMP
New Layer	Shift+Ctrl+n	New Layer
Layer via Copy	Ctrl+j	Duplicate Layer
Bring (layer) to Front	Shift+Ctrl+]	Layer to Top
Send (layer) to Back	Shift+Ctrl+[	Layer to Bottom
Bring (layer) Forward	Ctrl+]	Raise Layer
Send (layer) Backward	Ctrl+[	Lower Layer
Select Top Layer	Shift+Alt+]	Select Top Layer
Select Bottom Layer	Shift+Alt+[	Select Bottom Layer
Select One Layer Forward	Alt+]	Select Previous Layer
Select One Layer Backward	Alt+[	Select Next Layer
Merge Down	Ctrl+e	Merge Down
Merge Visible	Shift+Ctrl+e	Merge Visible
Preserve Transparency	/	Keep Transparency
Cycle Modes Forwards	Shift+=	Next Layer Mode
Cycle Modes Backwards	Shift+-	Previous Layer Mode
 
Select
PHOTOSHOP	SHORTCUT	GIMP
Select All	Ctrl+a	Select All
Deselect	Ctrl+d	Select None
Inverse	Shift+Ctrl+i	Invert
Feather	Ctrl+Alt+d	Feather
 
View
PHOTOSHOP	SHORTCUT	GIMP
Zoom In	Ctrl+=	Zoom In
Zoom Out	Ctrl+-	Zoom Out
Fit on Screen	Ctrl+0	Zoom to Fit Window
Actual Pixels	Ctrl+Alt+0	Zoom 1:1
Show/Hide Extras	Ctrl+h	Toggle Show Selection (close enough?)
Show/Hide Guides	Ctrl+'	Toggle Show Guides
Show/Hide Grid	Ctrl+Alt+'	Toggle Show Grid
Show/Hide Rulers	Ctrl+r	Toggle Show Rulers
Snap	Ctrl+;	Snap to Guides
Scroll View Up	Page Up	Scroll Page Up
Scroll View Down	Page Down	Scroll Page Down
Scroll View Left	Ctrl+Page Up	Scroll Page Left
Scroll View Right	Ctrl+Page Down	Scroll Page Right
 
Window/Dialogs
PHOTOSHOP	SHORTCUT	GIMP
?	F5	Tools Dialog
Color Tab	F6	Colors Dialog
Layers Tab	F7	Layers Dialog
Info Tab	F8	Image Information
 
Tools
PHOTOSHOP	SHORTCUT	GIMP
Rectangular Marquee Tool	m	Rect Select Tool
Elliptical Marquee Tool	Shift+m	Ellipse Select Tool
 	*This is a toggle between 'Elliptical Marquee Tool' and 'Rectangular Marquee Tool' in Photoshop	 
Move Tool	v	Move Tool
Lasso Tool	l	Free Select Tool
Magic Wand Tool	w	Fuzzy Select Tool
Crop Tool	c	Crop &amp; Resize Tool
Airbrush Tool	j	Airbrush Tool
Paintbrush Tool	b	Paintbrush Tool
Clone Stamp Tool	s	Clone Stamp Tool
Eraser Tool	e	Eraser Tool
Gradient Tool	g	Blend Tool
Paint Bucket Tool	Shift+g	Bucket Fill Tool
 	*This is a toggle between 'Paint Bucket Tool' and 'Gradient Tool' in Photoshop	 
Blur Tool	r	Convolve Tool
Dodge Tool	o	DodgeBurn Tool
Type Tool	t	Text Tool
Pen Tool	p	Bezier Select Tool
Eye Dropper Tool	i	Color Picker Tool
Zoom Tool	z	Magnify Tool
Previous Brush	,	Previous Brush
Next Brush	.	Next Brush
First Brush	Shift+&lt;	First Brush
Last Brush	Shift+&gt;	Last Brush
Decrease Brush Size	[	Decrease Brush Size
Increase Brush Size	]	Increase Brush Size
Decrease Brush Hardness	{	Decrease Brush Hardness
Increase Brush Hardness	}	Increase Brush Hardness
 
Help
PHOTOSHOP	SHORTCUT	GIMP
Help	F1	Help
Context Help	Shift+F1	Context Help
 
Misc.
PHOTOSHOP	SHORTCUT	GIMP
Last Filter	Ctrl+f	Repeat Last Filter
?	Shift+Ctrl+f	Reshow Last Filter
Preferences	Ctrl+k	Preferences
Liquify	Shift+Ctrl+x	IWarp (close enough?)
Toggle Quick Mask	q	Toggle Quick Mask


Spotlights - triangle of white opaque shape

Cutting out and/or replacing unwanted background or features - select large areas with the selection option like the Magic Wand tool (aka Color Range) or the Lasso (quick and fast) with feather 2 to soften edge or the pen tool which adds points/lines/Bézier curves (better control but slower), hold down the shift button as you click to add extra points/areas of the subject matter to remove. Increase the tolerance to cover more areas. To subtract from your selection hold down alt as you're clicking. 
* Layer masks are a better way of working than Erase they clip (black hides/hidden white visible/reveal). Clone Stamp can be simulated by   and brushes for other areas. 
* Leave the fine details like hair, fur, etc. to later with lasso and the shift key to draw a line all the way around your subject. Gradient Mapping - Inverse - Mask. i.e. Refine your selected image with edge detection and using the radius and edge options / adjuster (increase/decrease contrast) so that you will capture more fine detail from the background allowing easier removal. 
Remove fringe/halo

saving image as png rather than jpg/jpeg to keep transparency background intact.


Implemented [http://colorizer.org/ colour model representations] [http://paulbourke.net/texture_colour/colourspace/ Mathematical approach] - Photo stills are spatially 2d (h and w), but are colorimetrically 3d (r g and b, or H L S, or Y U V etc.) as well. 
* RGB - split cubed mapped color model for photos and computer graphics hardware using the light spectrum (adding and subtracting) 
* YUV - Y-Lightness U-blue/yellow V-red/cyan (similar to YPbPr and YCbCr) used in the PAL, NTSC, and SECAM composite digital TV color [http://crewofone.com/2012/chroma-subsampling-and-transcoding/#comment-7299 video]


Histograms

White balanced (neutral) if the spike happens in the same place in each channel of the RGB graphs. If not, you're not balanced. 
If you have sky you'll see the blue channel further off to the right.

RGB is best one to change colours. These elements RGB is a 3-channel format containing data for Red, Green, and Blue in your photo scale between 0 and 255. The area in a picture that appears to be brighter/whiter contains more red color as compared to the area which is relatively darker. Similarly in the green channel the area that appears to be darker contains less amount of green color as compared to the area that appears to be brighter.  Similarly in the blue channel the area appears to be darker contains less amount of blue color as compared to the area that appears to be brighter. Brightness luminance histogram also matches the green histogram more than any other color - human eye interprets green better e.g. RGB rough ratio 15/55/30%

RGBA (RGB+A, A means alpha channel) .  The alpha channel is used for &quot;alpha compositing&quot;, which can mostly be associated as &quot;opacity&quot;.  AROS deals in RGB with two digits for every color (red, green, blue), in ARGB you have two additional hex digits for the alpha channel.

The shadows are represented by the left third of the graph.  The highlights are represented by the right third.  And the midtones are, of course, in the middle.  The higher the black peaks in the graph, the more pixels are concentrated in that tonal range (total black area). 
By moving the black endpoint, which identifies the shadows (darkness) and a white light endpoint (brightness) up and down either sides of the graph, colors are adjusted based on these points. 
By dragging the central one, can increased the midtones and control the contrast, raise shadows levels, clip or softly eliminate unsafe levels, alter gamma, etc... in a way that is much more precise and creative .


RGB Curves

* Move left endpoint (black point) up or right endpoint (white point) up brightens 
* Move left endpoint down or right endpoint down darkens

Color Curves

* Dragging up on the Red Curve increases the intensity of the reds in the image but 
* Dragging down on the Red Curve decreases the intensity of the reds and thus increases the apparent intensity of its complimentary color, cyan. Green’s complimentary color is magenta, and blue’s is yellow.
&lt;pre&gt;
 Red &lt;-&gt; Cyan
 Green &lt;-&gt;Magenta
 Blue &lt;-&gt;Yellow 
&lt;/pre&gt;

YUV Best option to analyse and pull out statistical elements of any picture (i.e.  separate luminance data from color data). The line in Y luma tone box represents the brightness of the image with the point in the bottom left been black, and the point in the top right as white.  A low-contrast image has a concentrated clump of values nearer to the center of the graph. By comparison, a high-contrast image has a wider distribution of values across the entire width of the Histogram.   A histogram that is skewed to the right would indicate a picture that is a bit overexposed because most of the color data is on the lighter side (increase exposure with higher value F), while a histogram with the curve on the left shows a picture that is underexposed. This is good information to have when using post-processing software because it shows you not only where the color data exists for a given picture, but also where any data has been clipped (extremes on edges of either side): that is, it does not exist and, therefore, cannot be edited.  By dragging the endpoints of the line and as well as the central one, can increased the dark/shadows, midtones and light/bright parts and control the contrast, raise shadows levels, clip or softly eliminate unsafe levels, alter gamma, etc... in a way that is much more precise and creative .

The U and V chroma parts show color difference components of the image. It’s useful for checking whether or not the overall chroma is too high, and also whether it’s being limited too much
Can be used to create a negative image but also 
With U (Cb), the higher value you are, the more you're on the blue primary color. If you go to the low values then you're on blue complementary color, i.e. yellow.
With V (Cr), this is the same principle but with Red and Cyan.
e.g. If you push U full blue and V full red, you get magenta. If you push U full yellow and V full Cyan then you get green.

YUV simultaneously adds to one side of the color equation while subtracting from the other.  
using YUV to do color correction can be very problematic because each curve alters the result of each other: the mutual influence between U and V often makes things tricky. You may also be careful in what you do to avoid the raise of noise (which happens very easily). Best results are obtained with little adjustments

sunset that looks uninspiring and needs some color pop especially for the rays over the hill, a subtle contrast raise while setting luma values back to the legal range without hard clipping.


====Lunapaint====

Pixel based drawing app with onion-skin animation function

 Blocking, Shading, Coloring, adding detail 

&lt;pre&gt;
b BRUSH
e ERASER

alt eyedropper 
v layer tool 

z ZOOM / MAGNIFY &lt; &gt; n 
spc panning 
m  marque 
q lasso 
w same color selection / region 
&lt;/pre&gt;

&lt;pre&gt;
, LM RM
v 
V
f  filter 
F 
.  size 

p 
,  pick color 
[] last / next color 
&lt;/pre&gt;


There is not much missing in Lunapaint to be as good as FlipBook and then you have to take into account that Flipbook is considered to be amongst the best and easiest to use animation software out there. Ok to be honest Flipbook has some nice features that require more heavy work but those aren't so much needed right away, things like camera effects, sound, smart fill, export to different movie file formats etc.

Tried Flipbook with my tablet and compared it to Luna. The feeling is the same when sketching. LunaPaint is very responsive/fluent to draw with. Just as Flipbook is, and that responsiveness is something its users have mentioned as one of the positive sides of said software.

 author was learning MUI. Some parts just have to be rewritten with proper MUI classes before new features can be added.

* add [Frame Add] / [Frame Del]
* whole animation feature is impossible to use. If you draw 2 color maybe but if you start coloring your cells then you get in trouble
* pickup the entire image as a brush, not just a selection ? And consequently remove the brush from memory when one doesn't need it anymore. can pick up a brush and put it onto a new image but cropping isn't possible, nor to load/save brushes.
* Undo is something I longed for ages in Lunapaint.
* to import into the current layer, other types of images (e.g. JPEG) besides RAW64.
* implement graphic tablet features support


**GENERAL DRAWING**

Miss it very much:
UNDO
ERASER
COLORPICKER - has to show on palette too which color got picked.
BACKGROUND COLOR -Possibility to select from &quot;New project screen&quot;

Miss it somewhat:
ICON for UNDO
ICON for ERASER
ICON for CLEAR SCREEN ( What can I say? I start over from scratch very often )
BRUSH - possibility to cut out as brush not just copy off image to brush

**ANIMATING**

Miss it very much:
NUMBER OF CELLS - Possibity to change total no. of cells during project
ANIM BRUSH - Possibility to pick up a selected part of cells into an animbrush

Miss it somewhat:
ADD/REMOVE FRAMES: Add/remove single frame

In general LunaPaint is really well done and it feels like a new DeluxePaint version. It works with my tablet. Sure there's much missing of course but things can always be added over time. So there is great potential in LunaPaint that's for sure. Animations could be made in it and maybe put together in QuickVideo, saving in .gif or .mng etc some day.


LAYERS
-Layers names don't get saved globally in animation frames
-Layers order don't change globally in an animation (perhaps as default?).

EXPORTING IMAGES
-Exporting frames to JPG/PNG gives problems with colors. (wrong colors. See my animatiopn --&gt; My robot was blue now it's &quot;gold&quot; ) I think this only happens if you have layers.
-Trying to flatten the layers before export doesn't work if you have animation frames only the one you have visible will flatten properly all other frames are destroyed. (Only one of the layers are visible on them)
-Exporting images filenames should be for example e.g. file0001, file0002...file0010 instead as of now file1, file2...file10

LOAD/SAVE (Preferences)
-Make a setting for the default &quot;Work&quot; folder.

* Destroyed colors if exported image/frame has layers 
* mystic color cycling of the selected color while stepping frames back/forth (annoying)

&lt;pre&gt;
Deluxe Paint II enhanced key shortcuts 
    NOTE: @ denotes the ALT key

    [Technique]

    F1  - Paint
    F2  - Single Colour
    F3  - Replace
    F4  - Smear
    F5  - Shade
    F6  - Cycle
    F7  - Smooth
     M  - Colour Cycle

    [Brush]

     B  - Restore
     O  - Outline
     h  - Halve brush size
     H  - Double brush size
     x  - Flip brush on X axis
     X  - Double brush size on X axis only
     y  - Flip on Y 
     Y  - Double on Y
     z  - Rotate brush 90 degrees
     Z  - Stretch

    [Stencil]

     `  - Stencil On

    [Miscellaneous]

    F9  - Info Bar
    F10 - Selection Bar
    @o  - Co-Ordinates
    @a  - Anti-alias
    @r  - Colourise
    @t  - Translucent
    TAB - Colour Cycle

    [Picture]

     L  - Load
     S  - Save
     j  - Page to Spare(Flip)
     J  - Page to Spare(Copy)
     V  - View Page
     Q  - Quit

    [General Keys]

     m  - Magnify
     &lt;  - Zoom In
     &gt;  - Zoom Out
     [  - Palette Colour Up
     ]  - Palette Colour Down
     (  - Palette Colour Left
     )  - Palette Colour Right
     ,  - Eye Dropper
     .  - Pixel / Brush Toggle
     /  - Symmetry
     |  - Co-Ordinates
    INS - Perspective Control
    +/- - Brush Size (Fine Control)
     w  - Unfilled Polygon
     W  - Filled Polygon
     e  - Unfilled Ellipse
     E  - Filled Ellipse
     r  - Unfilled Rectangle
     R  - Filled Rectangle
     t  - Type/text tool
     a  - Select Font
    u/U - Undo
     d  - Brush
     D  - Filled Non-Uniform Polygon
    f/F - Fill Options
    g/G - Grid
    h/H - Brush Size (Coarse Control)
     K  - Clear
     c  - Unfilled Circle
     C  - Filled Circle
     v  - Line
     b  - Scissor Select and Toggle
     B  - Brush
    {,} - Toggle between two background colours
&lt;/pre&gt;

====Lodepaint====

Pixel based painting artwork app

====Grafx2====

Pixel based painting artwork app aesprite like 

[https://www.youtube.com/watch?v=59Y6OTzNrhk aesprite workflow keys and tablet use], [], 


====Vector Graphics ZuneFIG====

Vector Image Editing of files .svg .ps .eps


*Objects - raise lower rotate flip aligning snapping 
*Path - unify subtract intersect exclude divide 
*Colour - fill stroke 
*Stroke - size 
*Brushes - 
*Layers - 
*Effects - gaussian bevels glows shadows 
*Text    - 
*Transform - 


 AmiFIG ([http://epb.lbl.gov/xfig/frm_introduction.html xfig manual]) 

[[File:MyScreen.png|thumb|left|alt=Showing all Windows open in AmiFIG.|All windows available to AmiFIG.]]

for drawing simple to intermediate vector graphic images for scientific and technical uses and for illustration purposes for those with talent

;Menu options
* Load - fig format but import(s) SVG
* Save - fig format but export(s) eps, ps, pdf, svg and png
* PAN = Ctrl + Arrow keys 
* Deselect all points

There is no selected object until you apply the tool, and the selected object is not highlighted.

;Metrics - to set up page and styles - first window to open on new drawings

;Tools - Drawing Primitives - set Attributes window first before clicking any Tools button(s) 
* Shapes - circles, ellipses, arcs, splines, boxes,  polygon 
* Lines - polylines
* Text &quot;T&quot; button 
* Photos - bitmaps
* Compound - Glue, Break, Scale 
* POINTs - Move, Add, Remove 
* Objects - Move, Copy, Delete, Mirror, Rotate, Paste 
use right mouse button to stop extra lines, shapes being formed and the left mouse to select/deselect tools button(s)
* Rotate - moves in 90 degree turns centered on clicked POINT of a polygon or square

;Attributes which provide change(s) to the above primitives 
* Color
* Line Width
* Line Style
* arrowheads

;Modes 
Choose from freehand, charts, figures, magnet, etc.

;Library - allows .fig clip-art to be stored 
* compound tools to add .fig(s) together

;FIG 3.2 [http://epb.lbl.gov/xfig/fig-format.html Format] as produced by xfig version 3.2.5 
&lt;pre&gt;
Landscape
Center
Inches
Letter 
100.00
Single
-2
1200 2
4 0 0 50 -1 0 12 0.0000 4 135 1050 1050 2475 This is a test.01
&lt;/pre&gt;

# change the text alignment within the textbox. I can choose left, center, or right aligned by either changing the integer in the second column from 0 (left) to 1 or 2 (center, or right). 
# The third integer in the row specifies fontcolor. For instance, 0 is black, but blue is 1 and Green3 is 13.
# The sixth integer in the bottom row specifies fontface. 0 is Times-Roman, but 16 is Helvetica (a MATLAB default).
# The seventh number is fontsize. 12 represents a 12pt fontsize. Changing the fontsize of an item really is as easy as changing that number to 20.
# The next number is the counter-clockwise angle of the text. Notice that I have changed the angle to .7854 (pi/4 rounded to four digits=45 degrees).
# twelfth number is the position according to the standard “x-axis” in Xfig units from the left. Note that 1200 Xfig units is equivalent to once inch.
# thirteenth number is the “y-position” from the top using the same unit convention as before.

* The nested text string is what you entered into the textbox.
* The “01″ present at the end of that line in the .fig file is the closing tag. For instance, a change to \100 appends a @ symbol at the end of the period of that sentence.

; Just to note there are no layers, no 3d functions, no shading, no transparency, no animation


[[#top|...to the top]]

===Audio===


# AHI uses linear panning/balance, which means that in the center, you will get -6dB. If an app uses panning, this is what you will get. Note that apps like Audio Evolution need panning, so they will have this problem.

# When using AHI Hifi modes, mixing is done in 32-bit and sent as 32-bit data to the driver. The Envy24HT driver uses that to output at 24-bit (always).

# For the Envy24/Envy24HT, I've made 16-bit and 24-bit inputs (called Line-in 16-bit, Line-in 24-bit etc.). There is unfortunately no app that can handle 24-bit recording.


====Music Mods====

Digital module (mods) trackers are music creation software using samples and sometimes soundfonts, audio plugins (VST, AU or RTAS), MIDI.

Generally, MODs are similar to MIDI in that they contain note on/off and other sequence messages that control the mod player. Unlike (most) midi files, however, they also contain sound samples that the sequence information actually plays. MOD files can have many channels (classic amiga mods have 4, corresponding to the inbuilt sound channels), but unlike MIDI, each channel can typically play only one note at once. However, since that note might be a sample of a chord, a drumloop or other complex sound, this is not as limiting as it sounds.

Like MIDI, notes will play indefinitely if they're not instructed to end. Most trackers record this information automatically if you play your music in live. If you're using manual note entry, you can enter a note-off command with a keyboard shortcut - usually Caps Lock.

In fact when considering file size MOD is not always the best option. Even a dummy song wastes few kilobytes for nothing when a simple SID tune could be few hundreds bytes and not bigger than 64kB. AHX is another small format, AHX tunes are never larger than 64kB excluding comments.

[https://www.youtube.com/watch?v=rXXsZfwgil Protrekkr] (previously aka [w:Juan_Antonio_Arguelles_Rius|NoiseTrekkr])

If Protrekkr does not start, please check if the Unit 0 has been setup in the AHI prefs and still not, go to the directory utilities/protrekkr and double click on the Protrekkr icon

*Sample
*Note - Effect 
*Track (column) - Pattern - Order

It all starts with the Sample which is used to create Note(s) in a Track (column of a tracker) 
The Note can be changed with an Effect.  A Track of Note(s) can be collected into a Pattern (section of a song) and these can be given Order to create the whole song.

Patience (notes have to be entered one at a time) or playing the bassline on a midi controller (faster - see midi section above).  Best approach is to wait until a melody popped into your head.

*Up-tempo means the track should be reasonably fast, but not super-fast. 
*Groovy and funky imply the track should have some sort of &quot;swing&quot; feel, with plenty of syncopation or off beat emphasis and a recognizable, melodic bass line. 
*Sweet and happy mean upbeat melodies, a major key and avoiding harsh sounds.
*Moody - minor key

First, create a quick bass sound, which is basically a sine wave, but can be hand drawn for a little more variance. It could also work for the melody part, too.

This is usually a bass guitar or some kind of synthesizer bass. The bass line is often forgotten by inexperienced composers, but it plays an important role in a musical piece. Together with the rhythm section the bass line forms the groove of a song. It's the glue between the rhythm section and the melodic layer of a song.

The drums are just pink noise samples, played at different frequencies to get a slightly different sound for the kick, snare, and hihats.

Instruments that fall into the rhythm category are bass drums, snares, hi-hats, toms, cymbals, congas, tambourines, shakers, etc. Any percussive instrument can be used to form part of the rhythm section.

The lead is the instrument that plays the main melody, on top of the chords. There are many instruments that can play a lead section, like a guitar, a piano, a saxophone or a flute. The list is almost endless. There is a lot of overlap with instruments that play chords. Often in one piece an instrument serves both roles. The lead melody is often played at a higher pitch than the chords.

Listened back to what was produced so far, and a counter-melody can be imagined, which can be added with a triangle wave.

To give the ends of phrases some life, you can add a solo part with a crunchy synth. By hitting random notes in the key of G, then edited a few of them.

For the climax of the song, filled out the texture with a gentle high-pitch pad… …and a grungy bass synth.


The arrow at A points at the pattern order list. As you see, the patterns don't have to be in numerical order. This song starts with pattern &quot;00&quot;, then pattern &quot;02&quot;, then &quot;03&quot;, then &quot;01&quot;, etcetera. Patterns may be repeated throughout a song.

The B arrow points at the song title. Below it are the global BPM and speed parameters. These determine the tempo of the song, unless the tempo is altered through effect commands during the song.

The C arrow points at the list of instruments. An instrument may consist of multiple samples. Which sample will be played depends on the note. This can be set in the Instrument Editing screen. Most instruments will consist of just one sample, though. The sample list for the selected instrument can be found under arrow D.

Here's a part of the main editing screen. This is where you put in actual notes. Up to 32 channels can be used, meaning 32 sounds can play simultaneously. The first six channels of pattern &quot;03&quot; at order &quot;02&quot; are shown here. The arrow at A points at the row number. The B arrow points at the note to play, in this case a C4. The column pointed at by the C arrow tells us which instrument is associated with that note, in this case instrument #1 &quot;Kick&quot;.

The column at D is used (mainly) for volume commands. In this case it is left empty which means the instrument should play at its default volume. You can see the volume column being used in channel #6.

The E column tells us which effect to use and any parameters for that effect. In this case it holds the &quot;F&quot; effect, which is a tempo command. The &quot;04&quot; means it should play at tempo 4 (a smaller number means faster).

Base pattern

When I create a new track I start with what I call the base pattern. It is worthwhile to spend some time polishing it as a lot of the ideas in the base pattern will be copied and used in other patterns. At least, that's how I work. Every musician will have his own way of working. In &quot;Wild Bunnies&quot; the base pattern is pattern &quot;03&quot; at order &quot;02&quot;.

In the section about selecting samples I talked about the four different categories of instruments: drums, bass, chords and leads. That's also how I usually go about making the base pattern. I start by making a drum pattern, then add a bass line, place some chords and top it off with a lead. This forms the base pattern from which the rest of the song will grow.


Drums

Here's a screenshot of the first four rows of the base pattern. I usually reserve the first four channels or so for the drum instruments. Right away there are a couple of tricks shown here. In the first channel the kick, or bass drum, plays some notes. Note the alternating F04 and F02 commands. The &quot;F&quot; command alters the tempo of the song and by quickly alternating the tempo; the song will get some kind of &quot;swing&quot; feel.

In the second channel the closed hi-hat plays a fairly simple pattern. Further down in the channel, not shown here, some open hi-hat notes are added for a bit of variation.

In the third and fourth channel the snare sample plays. The &quot;8&quot; command is for panning. One note is panned hard to the left and the other hard to the right. One sample is played a semitone lower than the other. This results in a cool flanging effect. It makes the snare stand out a little more in the mix.


Bass line

There are two different instruments used for the bass line. Instrument #6 is a pretty standard synthesized bass sound. Instrument #A sounds a bit like a slap bass when used with a quick fade out. By using two different instruments the bass line sounds a bit more ”human”. The volume command is used to cut off the notes. However, it is never set to zero. Setting the volume to a very small value will result in a reverb-like effect. This makes the song sound more &quot;live&quot;.

The bass line hints at the chords that will be played and the key the song will be in. In this case the key of the song is D-major, a positive and happy key.


Chords

The D major chords that are being played here are chords stabs; short sounds with a quick decay (fade out). Two different instruments (#8 and #9) are used to form the chords. These instruments are quite similar, but have a slightly different sound, panning and volume decay. Again, the reason for this is to make the sound more human. The volume command is used on some chords to simulate a delay, to achieve more of a live feel. The chords are placed off-beat making for a funky rhythm.


Lead

Finally the lead melody is added. The other instruments are invaluable in holding the track together, but the lead melody is usually what catches people's attention.

A lot of notes and commands are used here, but it looks more complex than it is. A stepwise ascending melody plays in channel 13. Channel 14 and 15 copy this melody, but play it a few rows later at a lower volume. This creates an echo effect. A bit of panning is used on the notes to create some stereo depth. Like with the bass line, instead of cutting off notes the volume is set to low values for a reverb effect. The &quot;461&quot; effect adds a little vibrato to the note, which sounds nice on sustained notes.

Those paying close attention may notice the instrument used here for the lead melody is the same as the one used for the bass line (#6 &quot;Square&quot;), except played two or three octaves higher. This instrument is a looped square wave sample. Each type of wave has its own quirks, but the square wave (shown below) is a really versatile wave form.

Song structure

Good, catchy songs are often carefully structured into sections, some of which are repeated throughout the song with small variations.

A typical pop-song structure is: Intro - Verse - Chorus - Verse - Chorus - Bridge - Chorus.

Other single sectional song structures are

&lt;pre&gt;
Strophic or AAA Song Form - oldest story telling with refrain (often title of the song) repeated in every verse section melody 
AABA Song Form - early popular, jazz and gospel fading during the 1960s 
AB or Verse/Chorus Song Form - songwriting format of choice for modern popular music since the 1960s 
Verse/Chorus/Bridge Song Form
ABAB Song Form
ABAC Song Form
ABCD Song Form
AAB 12-Bar Song Form - three four-bar lines or sub-sections 
8-Bar Song Form
16-Bar Song Form
Hybrid / Compound Song Forms
&lt;/pre&gt;

The most common building blocks are:

#INTRODUCTION(INTRO)
#VERSE
#REFRAIN
#PRE-CHORUS / RISE / CLIMB
#CHORUS
#BRIDGE
#MIDDLE EIGHT
#SOLO / INSTRUMENTAL BREAK
#COLLISION
#CODA / OUTRO
#AD LIB (OFTEN IN CODA / OUTRO)

The chorus usually has more energy than the verse and often has a memorable melody line. As the chorus is repeated the most often during the song, it will be the part that people will remember.

The bridge often marks a change of direction in the song. It is not uncommon to change keys in the bridge, or at least to use a different chord sequence. The bridge is used to build up tension towards the big finale, the last repetition of chorus.


 Playing

RCTRL:                           Play song from row 0.

LSHIFT + RCTRL:                  Play song from current row.

RALT:                            Play pattern from row 0.

LSHIFT + RALT:                   Play pattern from current row.

Left mouse on '&gt;':               Play song from row 0.

Right mouse on '&gt;':              Play song from current row.

Left mouse on '|&gt;':              Play pattern from row 0.

Right mouse on '|&gt;':             Play pattern from current row.

Left mouse on 'Edit/Record':     Edit mode on/off.

Right mouse on 'Edit/Record':    Record mode on/off.


 Editing 


LSHIFT + ESCAPE:                 Switch large patterns view on/off

TAB:                    Go to next track

LSHIFT + TAB:                    Go to prev. track

LCTRL + TAB:                    Go to next note in track

LCTRL + LSHIFT + TAB:           Go to prev. note in track

SPACE:                           Toggle Edit mode On &amp; Off

(Also stop if the song is being played)

SHIFT SPACE:                     Toggle Record mode On &amp; Off

(Wait for a key note to be pressed

or a midi in message to be received)

DOWN ARROW:                      1 Line down

UP ARROW:                        1 Line up

LEFT ARROW:                      1 Row left

RIGHT ARROW:                     1 Row right

PREV. PAGE:                      16 Arrows Up

NEXT PAGE:                       16 Arrows Down

HOME / END:                      Top left / Bottom right of pattern

LCTRL + HOME / END:              First / last track

F5, F6, F7, F8, F9:              Jump to 0, 1/4, 2/4, 3/4, 4/4 lines of the patterns

+ - (Numeric keypad):           Next / Previous pattern

LCTRL + LEFT / RIGHT:           Next / Previous pattern

LCTRL + LALT + LEFT / RIGHT:    Next / Previous position

LALT + LEFT / RIGHT:           Next / Previous instrument

LSHIFT + M:                      Toggle mute state of the current channel

LCTRL + LSHIFT + M:             Solo the current track / Unmute all

LSHIFT + F1 to F11:              Select a tab/panel

LCTRL + 1 to 4:                 Select a copy buffer


 Tracking 

1st and 2nd keys rows:           Upper octave row

3rd and 4th keys rows:           Lower octave row

RSHIFT:                          Insert a note off

/ and * (Numeric keypad)

or F1 F2:                        -1 or +1 octave

INSERT / BACKSPACE:              Insert or Delete a line in current track

or current selected block.

LSHIFT + INSERT / BACKSPACE:     Insert or Delete a line in current pattern

DELETE (NOT BACKSPACE):          Empty a column or a selected block.


 Blocks

(Blocks can also be selected with the mouse by holding the right button and scrolling the pattern with the mouse wheel).


LCTRL + A:          Select entire current track

LCTRL + LSHIFT + A: Select entire current pattern

LALT + A:          Select entire column note in a track

LALT + LSHIFT + A: Select all notes of a track

LCTRL + X:          Cut the selected block and copy it into the block-buffer

LCTRL + C:          Copy the selected block into the block-buffer

LCTRL + V:          Paste the data from the block buffer into the pattern

LCTRL + I:          Interpolate selected data from the first to the last row of a selection

LSHIFT + ARROWS

PREV. PAGE

NEXT PAGE: Select a block

LCTRL + R:          Randomize the select columns of a selection, works similar to CTRL + I (interpolating them)

LCTRL + U:          Transpose the note of a selection to 1 seminote higher

LCTRL + D:          Transpose the note of a selection to 1 seminote lower

LCTRL + LSHIFT + U: Transpose the note of a selection to 1 seminote higher (only for the current instrument)

LCTRL + LSHIFT + D: Transpose the note of a selection to 1 seminote lower  (only for the current instrument)

LCTRL + H:          Transpose the note of a selection to 1 octave higher

LCTRL + L:          Transpose the note of a selection to 1 octave lower

LCTRL + LSHIFT + H: Transpose the note of a selection to 1 octave higher (only for the current instrument)

LCTRL + LSHIFT + L: Transpose the note of a selection to 1 octave lower (only for the current instrument)

LCTRL + W:          Save the current selection into a file


 Misc 


LALT + ENTER:     Switch between full screen / windowed mode

LALT + F4:        Exit program (Windows only)

LCTRL + S:         Save current module

LSHIFT + S:         Switch top right panel to synths list

LSHIFT + I:         Switch top right panel to instruments list


&lt;pre&gt;
C-x   xh xx xx hhhh             Volume 
B-x   xh xx xx hhhh             Jump to 
A#x  xh xx xx hhhh hhhh   Slide 
F-x    xh xx xx hhhh            Tempo 
D-x   xh xx xx hhhh             Pattern Break 
G#x  xh xx xx hhhh
&lt;/pre&gt;

h Hex 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13

d Dec 01 02 03 04 05 06 07 08 09 10  11 12 13 14 15 16 17 18 19

The Set Volume command: C. Input a note, then move the cursor to the effects command column and type a C. Play the pattern, and you shouldn't be able to hear the note you placed the C by. This is because the effect parameters are 00. Change the two zeros to a 40(Hex)/64(Dec), depending on what your tracker uses. Play back the pattern again, and the note should come in at full volume.

The Position Jump command next. This is just a B followed by the position in the playing list that you want to jump to. One thing to remember is that the playing list always starts at 0, not 1. This command is usually in Hex.

Onto the volume slide command: A. This is slightly more complex (much more if you're using a newer tracker, if you want to achieve the results here, then set slides to Amiga, not linear), due to the fact it depends on the secondary tempo. For now set a secondary tempo of 06 (you can play around later), load a long or looped sample and input a note or two. A few rows after a note type in the effect command A. For the parameters use 0F. Play back the pattern, and you should notice that when the effect kicks in, the sample drops to a very low volume very quickly. Change the effect parameters to F0, and use a low volume command on the note. Play back the pattern, and when the slide kicks in the volume of the note should increase very quickly.
This because each part of the effect parameters for command A does a different thing. The first number slides the volume up, and the second slides it down. It's not recommended that you use both a volume up and volume down at the same time, due to the fact the tracker only looks for the first number that isn't set to 0. If you specify parameters of 8F, the tracker will see the 8, ignore the F, and slide the volume up. Using a slide up and down at same time just makes you look stupid. Don't do it...

The Set Tempo command: F, is pretty easy to understand. You simply specify the BPM (in Hex) that you want to change to. One important thing to note is that values of lower than 20 (Hex) sets the secondary tempo rather than the primary.

Another useful command is the Pattern Break: D. This will stop the playing of the current pattern and skip to the next one in the playing list. By using parameters of more than 00 you can also specify which line to begin playing from.

Command 3 is Portamento to Note. This slides the currently playing note to another note, at a specified speed. The slide then stops when it reaches the desired note. 
&lt;pre&gt;
   C-2 1 000 - Starts the note playing
   ---      000
   C-3    330 - Starts the slide to C-3 at a speed of 30.
   ---     300 - Continues the slide
   ---     300 - Continues the slide
&lt;/pre&gt;
Once the parameters have been set, the command can be input again without any parameters, and it'll still perform the same function unless you change the parameters. This memory function allows certain commands to function correctly, such as command 5, which is the Portamento to Note and Volume Slide command. Once command 3 has been set up command 5 will simply take the parameters from that and perform a Portamento to Note. Any parameters set up for command 5 itself simply perform a Volume Slide identical to command A at the same time as the Portamento to Note.

This memory function will only operate in the same channel where the original parameters were set up.
There are various other commands which perform two functions at once. They will be described as we come across them.

C-3  04  ..  ..  09  00 ---&gt; C-3  04  ..  ..  09  00

C-3  04  ..  ..  09  00 ---&gt; C-3  04  ..  ..  09  02

C-3  04  ..  ..  09  00 ---&gt; C-3  04  ..  ..  09  05

C-3  04  ..  ..  09  00 ---&gt; C-3  04  ..  ..  09  08

C-3  04  ..  ..  09  00 ---&gt; C-3  04  ..  ..  09  0A

C-3  04  ..  ..  09  00 ---&gt; C-3  04  ..  ..  09  0D

C-3  04  ..  ..  09  10 ---&gt; C-3  04  ..  ..  09  10

(You can also switch on the Slider Rec to On, and perform parameter-live-recording, such as cutoff transitions, resonance or panning tweaking, etc..)  Note: this command only works for volume/panning and fx datas columns.


The next command we'll look at is the Portamento up/down: 1 and 2. Command 1 slides the pitch up at a specified speed, and 2 slides it down. This command works in a similar way to the volume slide, in that it is dependent on the secondary tempo. Both these commands have a memory dependent on each other, if you set the slide to a speed of 3 with the 1 command, a 2 command with no parameters will use the speed of 3 from the 1 command, and vice versa.

Command 4 is Vibrato. Vibrato is basically rapid changes in pitch, just try it, and you'll see what I mean. Parameters are in the format of xy, where x is the speed of the slide, and y is the depth of the slide. One important point to remember is to keep your vibratos subtle and natural so a depth of 3 or less and a reasonably fast speed, around 8, is usually used. Setting the depth too high can make the part sound out of tune from the rest.
Following on from command 4 is command 6. This is the Vibrato and Volume Slide command, and it has a memory like command 5, which you already know how to use.

Command 7 is Tremolo. This is similar to vibrato. Rather than changing the pitch it slides the volume. The effect parameters are in exactly the same format.   vibrato effect (0x1dxy) x = speed y = depth (can't be used if arpeggio (0x1b) is turned on) 

&lt;pre&gt;
 C-7 00 .. .. 1B37 &lt;-  Turn Arpeggio effect on
  --- .. .. .. 0000
  --- .. .. .. 0000
  --- .. .. .. 0000
  --- .. .. .. 1B38 &lt;- Change datas
  --- .. .. .. 0000
  --- .. .. .. 0000
  --- .. .. .. 0000
  --- .. .. .. 1B00 &lt;- Turn it off
&lt;/pre&gt;

Command 9 is Sample Offset. This starts the playback of the sample from a different place than the start. The effect parameters specify the sample offset, but only very roughly. Say you have a sample which is 8765(Hex) bytes long, and you wanted it to play from position 4321(Hex). The effect parameter could only be as accurate as the 43 part, and it would ignore the 21.

Command B is the Playing List/Order Jump command. The parameters specify the position in the Playing List/Order to jump to. When used in conjunction with command D you can specify the position and the line to play from.

Command E is pretty complex, as it is used for a lot of different things, depending on what the first parameter is. Let's take a trip through each effect in order.
Command E0 controls the hardware filter on an Amiga, which, as a low pass filter, cuts off the highest frequencies being played back. There are very few players and trackers on other system that simulate this function, not that you should need to use it. The second parameter, if set to 1, turns on the filter. If set to 0, the filter gets turned off.

Commands E1/E2 are Fine Portamento Up/Down. Exactly the same functions as commands 1/2, except that they only slide the pitch by a very small amount. These commands have a memory the same as 1/2 as well.

Command E3 sets the Glissando control. If parameters are set to 1 then when using command 3, any sliding will only use the notes in between the original note and the note being slid to. This produces a somewhat jumpier slide than usual. The best way to understand is to try it out for yourself. Produce a slow slide with command 3, listen to it, and then try using E31.

Command E4 is the Set Vibrato Waveform control. This command controls how the vibrato command slides the pitch. Parameters are 0 - Sine, 1 - Ramp Down (Saw), 2 - Square. By adding 4 to the parameters, the waveform will not be restarted when a new note is played e.g. 5 - Sine without restart.

Command E5 sets the Fine Tune of the instrument being played, but only for the particular note being played. It will override the default Fine Tune for the instrument. The parameters range from 0 to F, with 0 being -8 and F being +8 Fine Tune. A parameter of 8 gives no Fine Tune. If you're using a newer tracker that supports more than -8 to +8 e.g. -128 to +128, these parameters will give a rough Fine Tune, accurate to the nearest 16.

Command E6 is the Jump Loop command. You mark the beginning of the part of a pattern that you want to loop with E60, and then specify with E6x the end of the loop, where x is the number of times you want it to loop.

Command E7 is the Set Tremolo Waveform control. This has exactly the same parameters as command E4, except that it works for Tremolo rather than Vibrato.

Command E9 is for Retriggering the note quickly. The parameter specifies the interval between the retrigs. Use a value of less than the current secondary tempo, or else the note will not get retrigged.

Command EA/B are for Fine Volume Slide Up/Down. Much the same as the normal Volume Slides, except that these are easier to control since they don't depend on the secondary tempo. The parameters specify the amount to slide by e.g. if you have a sample playing at a volume of 08 (Hex) then the effect EA1 will slide this volume to 09 (Hex). A subsequent effect of EB4 would slide this volume down to 05 (Hex).

Command EC is the Note Cut. This sets the volume of the currently playing note to 0 at a specified tick. The parameters should be lower than the secondary tempo or else the effect won't work.

Command ED is the Note Delay. This should be used at the same time as a note is to be played, and the parameters will specify the number of ticks to delay playing the note. Again, keep the parameters lower than the secondary tempo, or the note won't get played!

Command EE is the Pattern Delay. This delays the pattern for the amount of time it would take to play a certain number of rows. The parameters specify how many rows to delay for.

Command EF is the Funk Repeat command. Set the sample loop to 0-1000. When EFx is used, the loop will be moved to 1000- 2000, then to 2000-3000 etc. After 9000-10000 the loop is set back to 0- 1000. The speed of the loop &quot;movement&quot; is defined by x. E is two times as slow as F, D is three times as slow as F etc. EF0 will turn the Funk Repeat off and reset the loop (to 0-1000).

effects 0x41 and 0x42 to control the volumes of the 2 303 units

There is a dedicated panel for synth parameter editing with coherent sections (osc, filter modulation, routing, so on) the interface is much nicer, much better to navigate with customizable colors, the reverb is now customizable (10 delay lines), It accepts newer types of Waves (higher bit rates, at least 24). Has a replay routine.

It's pretty much your basic VA synth. The problem isn't with the sampler being to high it's the synth is tuned two octaves too low, but if you want your samples tuned down just set the base note down 2 octaves (in the instrument panel).

so the synth is basically divided into 3 sections from left to right: oscillators/envelopes, then filter and LFO's, and in the right column you have mod routings and global settings.

for the oscillator section you have two normal oscillators (sine, saw, square, noise), the second of which is tunable, the first one tunes with the key pressed. Attached to OSC 1 is a sub-oscillator, which is a sawtooth wave tuned one octave down. The phase modulation controls the point in the duty cycle at which the oscillator starts. The ADSR envelope sliders (grouped with oscs) are for modulation envelope 1 and 2 respectively. you can use the synth as a sampler by choosing the instrument at the top.

In the filter column, the filter settings are: 1 = lowpass, 2 = highpass, 3 = off. cutoff and resonance. For the LFOs they are LFO 1 and LFO 2, the ADSR sliders in those are for the LFO itself.

For the modulation routings you have ENV 1, LFO 1 for the first slider and ENV 2, LFO 2 for the second, you can cycle through the individual routings there, and you can route each modulation source to multiple destinations of course, which is another big plus for this synth. Finally the glide time is for portamento and master volume, well, the master volume... it can go quite loud.

The sequencer is changed too, It's more like the one in AXS if you've used that, where you can mute tracks to re-use patterns with variation.


&lt;pre&gt;
Support for the following modules formats:
669 (Composer 669, Unis 669), 
AMF (DSMI Advanced Module Format), 
AMF (ASYLUM Music Format V1.0), 
APUN (APlayer), DSM (DSIK internal format), 
FAR (Farandole Composer), 
GDM (General DigiMusic), 
IT (Impulse Tracker), 
IMF (Imago Orpheus), 
MOD (15 and 31 instruments), 
MED (OctaMED), 
MTM (MultiTracker Module editor), 
OKT (Amiga Oktalyzer), 
S3M (Scream Tracker 3), 
STM (Scream Tracker), 
STX (Scream Tracker Music Interface Kit), 
ULT (UltraTracker), 
UNI (MikMod), 
XM (FastTracker 2),
Mid (midi format via timidity)
&lt;/pre&gt;


Possible plugin options include [http://lv2plug.in/ LV2],


====Midi - Musical Instrument Digital Interface====

A midi file typically contains music that plays on up to 16 channels (as per the midi standard), but many notes can simultaneously play on each channel (depending on the limit of the midi hardware playing it).

'''Timidity'''

Although usually already installed, you can uncompress the [http://www.libsdl.org/projects/SDL_mixer/ timidity.tar.gz (14MB)] into a suitable drawer like below's SYS:Extras/Audio/ 
 assign timidity: SYS:Extras/Audio/timidity
added to SYSːs/User-Startup

'''WildMidi playback'''


'''Audio Evolution 4 (2003) 4.0.23 (from 2012)'''


*Sync Menu    - CAMD Receive, Send checked 
*Options Menu - MIDI Machine Control - Midi Bar Display - Select CAMD MIDI in / out - Midi Remote Setup 


MCB Master Control Bus 
*Sending a MIDI start-command and a Song Position Pointer, you can synchronize audio with an external MIDI sequencer (like B&amp;P). 
*B&amp;P Receive, start AE, add AudioEvolution.ptool in Bars&amp;Pipes track, press play / record in AE then press play in Pipes 
*CAMD Receive, receive MIDI start or continue commands via camd.library sync to AE 


*MIDI Machine Control
*Midi Bar Display 
*Select CAMD MIDI in / out
*Midi Remote Setup - open requester for external MIDI controllers to control app mixer and transport controls cc remotely 
 Channel   - mixer(vol, pan, mute, solo), eq, aux, fx, 
 Subgroup  - Volume, Mute, Solo 
 Transport - Start, End, Play, Stop, Record, Rewind, Forward 
 Misc      - Master vol., Bank Down, Bank up 


&lt;pre&gt;
q        - quit 

First 3 already opened when AE started 
F1       - timeline window
F2       - mixer 
F3       - control 
F4       - subgroups 
F5       - aux returns 
F6       - sample list 

i        - Load sample to use 

space    - start/stop play 
b        - reset time 0:00


s        - split mode 
r        - open recording window 
a        - automation edit mode with p panning, m mute and v volume 


[ / ]    - zoom in / out 
:        - previous track
*        - next track 

x c v f  - cut copy paste cross-fade 
g        - snap grid 


&lt;/pre&gt;


 '''[http://bnp.hansfaust.de/ Bars n Pipes sequencer]'''

 BarsnPipes debug ... in shell 

Menu (right mouse)  
*Song        - Songs load and save in .song format but option here to load/save Midi_Files .mid in FORMAT0 or FORMAT1 
*Track       - 
*Edit        -
*Tool        - 
*Timing      - SMTPE Synchronizing 
*Windows     - 
*Preferences - Multiple MIDI-in option 

Windows (some of these are usually already opened when Bars n Pipes starts up for the first time) 
*Workflow -&gt; Tracks, .... Song Construction, Time-line Scoring, Media Madness, Mix Maestro, 
*Control  -&gt; Transport (or mini one), Windows (which collects all the Windows icons together-shortcut), .... Toolbox, Accessories, Metronome, 

Once you have your windows placed on the screen that suits your workflow, Song -&gt; Save as Default will save the positions, colors, icons, etc as you'd like them 

If you need a particular setup of Tracks, Tools, Tempos etc, you save them all as a new song you can load each time 

Right mouse menu -&gt; Preferences -&gt; Environment... -&gt; ScreenMode  - Linkages for Synch (to Slave) usbmidi.out.0 and Send (Master) usbmidi.in.0 - Clock MTC 


'''Tracks'''

#Double-click on B&amp;P's icon. B&amp;P will then open with an empty Song. You can also double-click on a song icon to open a song in B&amp;P.
#Choose a track. The B&amp;P screen will contain a Tracks Window with a number of tracks shown as pipelines (Track 1, Track 2, etc...). To choose a track, simply click on the gray box to show an arrow-icon to highlight it. This icon show whether a track is chosen or not. To the right of the arrow-icon, you can see the icon for the midi-input. If you double-click on this icon you can change the MIDI-in setup.
#Choose Record for the track. To the right of the MIDI-input channel icon you can see a pipe. This leads to another clickable icon with that shows either P, R or M. This stands for Play, Record or Merge. To change the icon, simply click on it. If you choose P, this track can only play the track (you can't record anything). If you choose R, you can record what you play and it overwrites old stuff in the track. If you choose M, you merge new records with old stuff in the track. Choose R now to be able to make a record.
#Chose MIDI-channel. On the most right part of the track you can see an icon with a number in it. This is the MIDI-channel selector. Here you must choose a MIDI-channel that is available on your synthesizer/keyboard. If you choose General MIDI channel 10, most synthesizer will play drum sounds. To the left of this icon is the MIDI-output icon. Double-click on this icon to change the MIDI-output configuration.
#Start recording. The next step is to start recording. You must then find the control buttons (they look like buttons on a CD-player). To be able to make a record. you must click on the R icon. You can simply now press the play button (after you have pressed the R button) and play something on you keyboard. To playback your composition, press the Play button on the control panel.
#Edit track. To edit a track, you simply double click in the middle part of a track. You will then get a new window containing the track, where you can change what you have recorded using tools provided. Take also a look in the drop-down menus for more features.


Videos to help understand [https://www.youtube.com/watch?v=A6gVTX-9900 small intro], [https://www.youtube.com/watch?v=abq_rUTiSA4&amp;t=3s Overview], [https://www.youtube.com/watch?v=ixOVutKsYQo Workplace Setup CC PC Sysex], [https://www.youtube.com/watch?v=dDnJLYPaZTs Import Song], [https://www.youtube.com/watch?v=BC3kkzPLkv4 Tempo Mapping], [https://www.youtube.com/watch?v=sd23kqMYPDs ptool Arpeggi-8], [https://www.youtube.com/watch?v=LDJq-YxgwQg  PlayMidi Song], [https://www.youtube.com/watch?v=DY9Pu5P9TaU Amiga Midi], [https://www.youtube.com/watch?v=abq_rUTiSA4 Learning Amiga bars and Pipes], 

Groups like [https://groups.io/g/barsnpipes/topics this] could help 


'''Tracks window'''

* blue &quot;1 2 3 4 5 6 7 8 Group&quot; and transport tape deck VCR-type controls
* Flags 
* [http://theproblem.alco-rhythm.com/org/bp.html Track 1, Track2, to Track 16, on each Track there are many options that can be activated] 

Each Track has a 

*Left LHS  - Click in grey box to select what Track to work on, Midi-In ptool icon should be here (5pin plug icon), and many more from the Toolbox on the Input Pipeline 
*Middle    - (P, R, M) Play, Record, Merge/Multi before the sequencer line and a blue/red/yellow (Thru Mute Play) Tap 
*Right RHS - Output pipeline, can have icons placed uopn it with the final ptool icon(s) being the 5pin icon symbol for Midi-OUT 

Clogged pipelines may need Esc pressed several times 


'''Toolbox (tools affect the chosen pipeline)'''

After opening the Toolbox window you can add extra Tools (.ptool) for the pipelines like keyboard(virtual), midimonitor, quick patch, transpose, triad, (un)quantize, feedback in/out, velocity etc
 right mouse -&gt; Toolbox menu option -&gt; Install Tool... and navigate to Tool drawer (folder) and select requried .ptool 

Accompany B tool to get some sort of rythmic accompaniment, Rythm Section and Groove Quantize are examples of other tools that make use of rythms
[https://aminet.net/search?query=bars Bars &amp; Pipes pattern format .ptrn] for drawer (folder). Load from the Menu as Track or Group 


'''Accessories (affect the whole app)''' 

Accessories -&gt; Install... and goto the Accessories drawer for .paccess like adding ARexx scripting support 


'''Song Construction'''
&lt;pre&gt;
F1  Pencil
F2  Magic Wand
F3  Hand 
F4  Duplicator 
F5  Eraser 
F6  Toolpad 
F7  Bounding box 
F8  Lock to A-B-A 

A-B-A strip, section, edit flags, white boxes, 

&lt;/pre&gt;


Bars&amp;Pipes Professional offers three track formats; basic song tracks, linear tracks — which don't loop — and finally real‑time tracks. The difference between them is that both song and linear tracks respond to tempo changes, while real‑time tracks use absolute timing, always trigger at the same instant regardless of tempo alterations 

'''Tempo Map'''

F1  Pencil
F2  Magic Wand
F3  Hand 
F4  Eraser 
F5  Curve 
F6  Toolpad 


Compositions

Lyrics, Key, Rhythm, Time Signature 

'''Master Parameters'''

Key, Scale/Mode

'''Track Parameters'''

Dynamics 


'''Time-line Scoring'''


'''Media Madness'''


'''Mix Maestro'''


*ACCESSORIES         Allows the importation of other packages and additional modules 
*CLIPBOARD           Full cut, copy and paste operations, enabling user‑definable clips to be shared between tracks.
*INFORMATION         A complete rundown on the state of the current production and your machine.
*MASTER PARAMETERS   Enables global definition of time signatures, lyrics, scales, chords, dynamics and rhythm changes.
*MEDIA MADNESS       A complete multimedia sequencer which allows samples, stills, animation, etc 
*METRONOME           Tempo feedback via MIDI, internal Amiga audio and colour cycling — all three can be mixed and matched as required.
*MIX MAESTRO         Completely automated mixdown with control for both volume and pan. All fader alterations are memorised by the software 
*RECORD ACTIVATION   Complete specification of the data to be recorded/merged. Allows overdubbing of pitch‑bend, program changes, modulation etc
*SET FLAGS           Numeric positioning of location and edit flags in either SMPTE or musical time 
*SONG CONSTRUCTION   Large‑scale cut and paste of individual measures, verses or chorus, by means of bounding box and drag‑n‑drop mouse selections
*TEMPO MAP           Tempo change using a variety of linear and non‑linear transition curves 
*TEMPO PALETTE       Instant tempo changes courtesy of four user‑definable settings.
*TIMELINE SCORING    Sequencing of a selection of songs over a defined period — ideal for planning an entire set for a live performance.
*TOOLBOX             Selection screen for the hundreds of signal‑processing tools available 
*TRACKS              Opens the main track window to enable recording, editing and the use of tools.
*TRANSPORT           Main playback control window, which also provides access to user‑ defined flags, loop and punch‑in record modes.


Bars and Pipes Pro 2.5 is using internal 4-Byte IDs, to check which kind of data are currently processed.
Especially in all its files the IDs play an important role. The IDs are stored into the file in the same order they are laid out in the memory.

In a Bars 'N' Pipes file (no matter which kind) the ID &quot;NAME&quot; (saved as its ANSI-values) is stored on a big endian system (68k-computer) as &quot;NAME&quot;. On a little endian system (x86 PC computer) as &quot;EMAN&quot;.  The target is to make the AROS-BnP compatible to songs, which were stored on a 68k computer (AMIGA).

If possible, setting MIDI channels for Local Control for your keyboard 

http://www.fromwithin.com/liquidmidi/archive.shtml


MIDI files are essentially a stream of event data. An event can be many things, but typically &quot;note on&quot;, &quot;note off&quot;, &quot;program change&quot;, &quot;controller change&quot;, or messages that instruct a MIDI compatible synth how to play a given bit of music.

* Channel     - 1 to 16 -
* Messages    - PC presets, CC effects like delays, reverbs,  etc 
* Sequencing  - MIDI instruments, Drums, Sound design, 
* Recording   - 
* GUI         - Piano roll or Tracker, Staves and Notes 

MIDI events/messages like step entry e.g. Note On, Note Off 

MIDI events/messages like PB, PC, CC, Mono and Poly After-Touch, Sysex, etc 

MIDI sync - Midi Clocks (SPS Measures), Midi Time Code (h, m, s and frames) SMPTE 

Individual track editing with audition edits so easier to test any changes. Possible to stop track playback, mix clips from the right edit flag and scroll the display using arrow keys. 

Step entry, to extend a selected note hit the space bar and the note grows accordingly. Ability to cancel mouse‑driven edits by simply clicking the right mouse button — at which point everything snaps back into its original form. Lyrics can now be put in with syllable dividers, even across an entire measure or section. Autoranging when you open a edit window, the notes are automatically displayed — working from the lowest upwards. 

Flag editing, shift‑click on a flag immediately open the bounds window, ready for numeric input. Ability to cancel edits using the right‑hand mouse button, plus much improved Bounding Box operations.

Icons other than the BarsnPipes icon -&gt; PUBSCREEN=BarsnPipes (cannot choose modes higher than 8bit 256 colors)

Preferences -&gt; Menu in Tracks window - Send MIDI defaults OFF 

Prefs -&gt; Environment -&gt; screenmode (saved to BarsnPipes.prefs binary file) 

Customization -&gt; pics in gui drawer (folder) - 


Can save as .song files and .mid General Midi 

SMF is a “Standard Midi File”  ([http://www.music.mcgill.ca/~ich/classes/mumt306/StandardMIDIfileformat.html SMF0, SMF1 and SMF2]), [https://github.com/stump/libsmf libsmf], [https://github.com/markc/midicomp MIDIcomp], [https://github.com/MajicDesigns/MD_MIDIFile C++ src], [], [https://github.com/newdigate/midi-smf-reader Midi player], 

* SMF0        All MIDI data is stored in one track only, separated exclusively by the MIDI channel.
* SMF1        The MIDI data is stored in separate tracks/channels.
* SMF2 (rarely used) The MIDI data is stored in separate tracks, which are additionally wrapped in containers, so it's possible to have e.g. several tracks using the same MIDI channels.


Would it be possible to enrich Bars N’Pipes with software synth and sample support along with audio recording and mastering tools like in the named MAC or PC music sequencers?
On the classic AMIGA-OS this is not possible because of missing CPU-power. The hardware of the classic AMIGA is not further developed. So we must say (unfortunately) that those dreams can’t become reality

BarsnPipes is best used with external MIDI-equipment. This can be a keyboard or synthesizer with MIDI-connectors. 

&lt;pre&gt;
MIDI can control 16 channels 
There are USB-MIDI-Interfaces on the market with 16 independent MIDI-lines (multi-port), which can handle 16 MIDI devices independently – 16×16 = 256 independent MIDI-channels or instruments 
handle up to 16 different USB-MIDI-Interfaces (multi-device). That is: 16X16X16 = 4096 independent MIDI-channels – theoretically 
&lt;/pre&gt;

&lt;pre&gt;
Librarian MIDI SYStem EXplorer (sysex) - PatchEditor and used to be supplied as a separate program like PatchMeister but currently not at present 
It should support MIDI.library (PD), BlueRibbon.library (B&amp;P), TriplePlayPlus, and CAMD.library (DeluxeMusic) and 
MIDI information from a device's user manual and configure a custom interface to access parameters for all MIDI products connected to the system 
Supports ALL MIDI events and the Patch/Librarian data is stored in MIDI standard format 
Annette M.Crowling, Missing Link Software, Inc.
&lt;/pre&gt;


Composers
&lt;pre&gt;
[https://x.com/hirasawa/status/1403686519899054086 Susumu Hirasawa] 

&lt;/pre&gt;


&lt;pre&gt;
1988 Todor Fay and his wife Melissa Jordan Gray, who founded the Blue Ribbon Inc
1992 Bars&amp;Pipes Pro published 
November 2000, Todor Fay announcement to release the sourcecode of Bars&amp;Pipes Pro 2.5c beta
end of May 2001, the source of the main program and the sources of some tools and accessories were in a complete and compileable state 
end of October 2009 stop further development of BarsnPipes New for now on all supported systems and made freeware 
2013 Alfred Faust diagnosed with incureable illness, called „Myastenia gravis“ (weak muscles) 
&lt;/pre&gt;


 Protrekkr

How to use Midi In/Out in Protrekkr ?

First of all, midi in &amp; out capabilities of this program are rather limited.

# Go to Misc. Setup section and select a midi in or out device to use (ptk only supports one device at a time).
# Go to instrument section, and select a MIDI PRG (the default is N/A, which means no midi program selected).
# Go to track section and here you can assign a midi channel to each track of ptk.
# Play notes :]. Note off works. F'x' note cut command also works too, and note-volume command (speed) is supported.

Also, you can change midicontrollers in the tracker, using '90' in the panning row:

&lt;pre&gt;
    C-3 02 .. .. 0000....


    --- .. .. 90 xxyy.... &lt;&lt; This will set the value 
    --- .. .. .. 0000....    of the controller n.'xx' to 'yy' (both in hex)
    --- .. .. .. 0000....
&lt;/pre&gt;

So &quot;--- .. .. 90 2040....&quot; will set the controller number $20(32) to $40(64).

You will need the midi implementation table of your gear to know what you can change with midi controller messages.

 N.B. Not all MIDI devices are created equal!

Although the MIDI specification defines a large range of MIDI messages of various kinds, not every MIDI device is required to work in exactly the same way and respond to all the available messages and ways of working. For example, we don't expect a wind synthesiser to work in the same way as a home keyboard.

Some devices, the older ones perhaps, are only able to respond to a single channel. With some of those devices that channel can be altered from the default of 1 (probably) to another channel of the 16 possible.

Other devices, for instance monophonic synthesisers, are capable of producing just one note at a time, on one MIDI channel. Others can produce many notes spread across many channels.

Further devices can respond to, and transmit, &quot;breath controller&quot; data (MIDI controller number 2 (CC#2)) others may respond to the reception of CC#2 but not be able to create and to send it.

A controller keyboard may be capable of sending &quot;expression pedal&quot; data, but another device may not be capable of responding to that message.

Some devices just have the basic GM sound set. The &quot;voice&quot; or &quot;instrument&quot; is selected using a &quot;Program Change&quot; message on its own.

Other devices have a greater selection of voices, usually arranged in &quot;banks&quot;, and the choice of instrument is made by responding to &quot;Bank Select MSB&quot; (MIDI controller 0 (CC#0)), others use &quot;Bank Select LSB&quot; (MIDI controller number 32 (CC#32)), yet others use both MSB and LSB sent one after the other, all followed by the Program Change message. The detailed information about all the different voices will usually be available in a published MIDI Data List.


 MIDI Implementation Chart

But in the User Manual there is sometimes a summary of how the device works, in terms of MIDI, in the chart at the back of the manual, the MIDI Implementation Chart.

If you require two devices to work together you can compare the two implementation charts to see if they are &quot;compatible&quot;. In order to do this we will need to interpret that chart.

The chart is divided into four columns headed &quot;Function&quot;, &quot;Transmitted&quot; (or &quot;Tx&quot;), &quot;Received&quot; (or &quot;Rx&quot;), or more correctly &quot;Recognised&quot;, and finally, &quot;Remarks&quot;.

&lt;pre&gt;
The left hand column defines which MIDI functions are being described.
The 2nd column defines what the device in question is capable of transmitting to another device.
The 3rd column defines what the device is capable of responding to.
The 4th column is for explanations of the values contained within these previous two columns.
&lt;/pre&gt;

There should then be twelve sections, with possibly a thirteenth containing extra &quot;Notes&quot;. Finally there should be an explanation of the four MIDI &quot;modes&quot; and what the &quot;X&quot; and the &quot;O&quot; mean.
&lt;pre&gt;
Mode 1: Omni On, Poly; 
Mode 2: Omni On, Mono; 
Mode 3: Omni Off, Poly; 
Mode 4: Omni Off, Mono.
&lt;/pre&gt;
O means &quot;yes&quot; (implemented), X means &quot;no&quot; (not implemented).

Sometimes you will find a row of asterisks &quot;**************&quot;, these seem to indicate that the data is not applicable in this case. Seen in the transmitted field only (unless you've seen otherwise).

Lastly you may find against some entries an asterisk followed by a number e.g. *1, these will refer you to further information, often on a following page, giving more detail.

Basic Channel
But the very first set of boxes will tell us the &quot;Basic Channel(s)&quot; that the device sends or receives on. 
&quot;Default&quot; is what happens when the device is first turned on, &quot;changed&quot; is what a switch of some kind may allow the device to be set to. 
For many devices e.g. a GM sound module or a home keyboard, this would be 1-16 for both. That is it can handle sending and receiving on all MIDI channels.

On other devices, for example a synthesiser, it may by default only work on channel 1. But the keyboard could be &quot;split&quot; with the lower notes e.g. on channel 2. If the synth has an arppegiator, this may be able to be set to transmit and or receive on yet another channel.
So we might see the default as &quot;1&quot; but the changed as &quot;1-16&quot;.

Modes.
We need to understand Omni On and Off, and Mono and Poly, then we can decipher the four modes.

But first we need to understand that any of these four Mode messages can be sent to any MIDI channel. They don't necessarily apply to the whole device.

If we send an &quot;Omni On&quot; message (CC#125) to a MIDI channel of a device, we are, in effect, asking it to respond to e.g. a Note On / Off message pair, received on any of the sixteen channels. Sound strange? Read it again. Still strange? It certainly is. We normally want a MIDI channel to respond only to Note On / Off messages sent on that channel, not any other. In other words, &quot;Omni Off&quot;.

So &quot;Omni Off&quot; (CC#124) tells a channel of our MIDI device to respond only to messages sent on that MIDI channel.

&quot;Poly&quot; (CC#127) is for e.g. a channel of a polyphonic sound module, or a home keyboard, to be able to respond to many simultaneous Note On / Off message pairs at once and produce musical chords.

&quot;Mono&quot; (CC#126) allows us to set a channel to respond as if it were e.g. a flute or a trumpet, playing just one note at a time. If the device is capable of it, then the overlapping of notes will produce legato playing, that is the attack portion of the second note of two overlapping notes will be removed resulting in a &quot;smoother&quot; transition.

So a channel with a piano voice assigned to it will have Omni Off, Poly On (Mode 3), a channel with a saxophone voice assigned could be Omni Off, Mono On (Mode 4).

We call these combinations the four modes, 1 to 4, as defined above. 
Most modern devices will have their channels set to Mode 3 (Omni Off, Poly) but be switchable, on a per channel basis, to Mode 4 (Omni Off, Mono).

This second section of data will include first its default value i.e. upon device switch on. Then what Mode messages are acceptable, or X if none.

Finally, in the &quot;Altered&quot; field, how a Mode message that can't be implemented will be interpreted. Usually there will just be a row of asterisks effectively meaning nothing will be done if you try to switch to an unimplemented mode.

Note Number
&lt;pre&gt;
The next row will tell us which MIDI notes the device can send or receive, normally 0-127.
The second line, &quot;True Voice&quot; has the following in the MIDI specification: 
&quot;Range of received note numbers falling within the range of true notes produced by the instrument.&quot;
My interpretation is that, for instance, a MIDI piano may be capable of sending all MIDI notes (0 to 127) by transposition, but only responding to the 88 notes (21 to 108) of a real piano. 
&lt;/pre&gt;

Velocity
This will tell us whether the device we're looking at will handle note velocity, and what range from 1-127, or maybe just 64, it transmits or will recognise. So usually &quot;O&quot; plus a range or &quot;X&quot; for not implemented.

After touch
This may have one or two lines two it.
If a one liner the either &quot;O&quot; or &quot;X&quot;, yes or no.
If a two liner then it may include &quot;Keys&quot; or &quot;Poly&quot; and &quot;Channel&quot;.
This will show whether the device will respond to Polyphonic after touch or channel after touch or neither.

Pitch Bend
Again &quot;O&quot; for implemented, &quot;X&quot; for not implemented.
(Many stage pianos will have no pitch bend capability.)
It may also, in the notes section, state whether it will respond to the full 14 bits, or not, as usually encoded by the pitch bend wheel.

Control Change
This is likely to be the largest section of the chart.
It will list all those controllers, starting from CC#0, Bank Select MSB, which the device is capable of sending, and those that it will respond to using &quot;O&quot; or &quot;X&quot; respectively.
You will, almost certainly, get some further explanation of functionality in the remarks column, or in more detail elsewhere in the documentation.

Of course you will need to know what all the various controller numbers do. Lots of the official technical specifications can be found at the [www.midi.org/techspecs/ MMA], with the table of messages and control change [www.midi.org/techspecs/midimessages.php message numbers]

Program Change
Again &quot;O&quot; or &quot;X&quot; in the Transmitted or Recognised column to indicate whether or not the feature is implemented. In addition a range of numbers is shown, typically 0-127, to show what is available.
True # (number): &quot;The range of the program change numbers which correspond to the actual number of patches selected.&quot;

System Exclusive
Used to indicate whether or not the device can send or recognise System Exclusive messages. A short description is often given in the Remarks field followed by a detailed explanation elsewhere in the documentation.

System Common - These include the following:
&lt;pre&gt;
MIDI Time Code Quarter Frame messages (device synchronisation).
Song Position Pointer
Song Select
Tune Request
&lt;/pre&gt;
The section will indicate whether or not the device can send or respond to any of these messages.

System Real Time
These include the following:
&lt;pre&gt;
Timing Clock - often just written as &quot;Clock&quot;
Start
Stop
Continue
&lt;/pre&gt;
These three are usually just referred to as &quot;Commands&quot; and listed.
Again the section will indicate which, if any, of these messages the device can send or respond to.
&lt;pre&gt;
Aux. Messages
Again &quot;O&quot; or &quot;X&quot; for implemented or not.
Aux. = Auxiliary.
Active Sense = Active Sensing.
&lt;/pre&gt;
Often with an explanation of the action of the device.

Notes
The &quot;Notes&quot; section can contain any additional comments to clarify the particular implementation.

Some of the explanations have been drawn directly from the MMA MIDI 1.0 Detailed Specification.
And the detailed explanation of some of the functions will be found there, or in the General MIDI System Level 1 or General MIDI System Level 2 documents also published by the MMA.


 OFFICIAL MIDI SPECIFICATIONS

SUMMARY OF MIDI MESSAGES
Table 1 - Summary of MIDI Messages

The following table lists the major MIDI messages in numerical (binary) order (adapted from &quot;MIDI by the Numbers&quot; by D. Valenti, Electronic Musician 2/88, and updated by the MIDI Manufacturers Association.). This table is intended as an overview of MIDI, and is by no means complete.

WARNING! Details about implementing these messages can dramatically impact compatibility with other products. We strongly recommend consulting the official MIDI Specifications for additional information.

MIDI 1.0 Specification

Message Summary Channel Voice Messages [nnnn = 0-15 (MIDI Channel Number 1-16)]

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot;  |Status D7----D0 
! width=&quot;10%&quot;  |Data Byte(s) D7----D0 
! width=&quot;20%&quot;  |Description
|-
|&lt;!--Status--&gt;1000nnnn || &lt;!--Data--&gt;0kkkkkkk 0vvvvvvv || &lt;!--Description--&gt;Note Off event. 
This message is sent when a note is released (ended). (kkkkkkk) is the key (note) number. (vvvvvvv) is the velocity.
|-
|&lt;!--Status--&gt;1001nnnn || &lt;!--Data--&gt;0kkkkkkk 0vvvvvvv || &lt;!--Description--&gt;Note On event. 
This message is sent when a note is depressed (start). (kkkkkkk) is the key (note) number. (vvvvvvv) is the velocity.
|-
|&lt;!--Status--&gt;1010nnnn || &lt;!--Data--&gt;0kkkkkkk 0vvvvvvv || &lt;!--Description--&gt;Polyphonic Key Pressure (Aftertouch). 
This message is most often sent by pressing down on the key after it &quot;bottoms out&quot;. (kkkkkkk) is the key (note) number. (vvvvvvv) is the pressure value.
|-
|&lt;!--Status--&gt;1011nnnn || &lt;!--Data--&gt;0ccccccc 0vvvvvvv || &lt;!--Description--&gt;Control Change. 
This message is sent when a controller value changes. Controllers include devices such as pedals and levers. Controller numbers 120-127 are reserved as &quot;Channel Mode Messages&quot; (below). (ccccccc) is the controller number (0-119). (vvvvvvv) is the controller value (0-127).
|-
|&lt;!--Status--&gt;1100nnnn || &lt;!--Data--&gt;0ppppppp || &lt;!--Description--&gt;Program Change. This message sent when the patch number changes. (ppppppp) is the new program number.
|-
|&lt;!--Status--&gt;1101nnnn || &lt;!--Data--&gt;0vvvvvvv || &lt;!--Description--&gt;Channel Pressure (After-touch). This message is most often sent by pressing down on the key after it &quot;bottoms out&quot;. This message is different from polyphonic after-touch. Use this message to send the single greatest pressure value (of all the current depressed keys). (vvvvvvv) is the pressure value.
|-
|&lt;!--Status--&gt;1110nnnn || &lt;!--Data--&gt;0lllllll 0mmmmmmm || &lt;!--Description--&gt;Pitch Bend Change. This message is sent to indicate a change in the pitch bender (wheel or lever, typically). The pitch bender is measured by a fourteen bit value. Center (no pitch change) is 2000H. Sensitivity is a function of the receiver, but may be set using RPN 0. (lllllll) are the least significant 7 bits. (mmmmmmm) are the most significant 7 bits.
|}

Channel Mode Messages (See also Control Change, above)

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot;  |Status D7----D0 
! width=&quot;10%&quot;  |Data Byte(s) D7----D0 
! width=&quot;20%&quot;  |Description
|-
|&lt;!--Status--&gt;1011nnnn || &lt;!--Data--&gt;0ccccccc 0vvvvvvv || &lt;!--Description--&gt;Channel Mode Messages. 
This the same code as the Control Change (above), but implements Mode control and special message by using reserved controller numbers 120-127. The commands are:
*All Sound Off. When All Sound Off is received all oscillators will turn off, and their volume envelopes are set to zero as soon as possible c = 120, v = 0: All Sound Off
*Reset All Controllers. When Reset All Controllers is received, all controller values are reset to their default values. (See specific Recommended Practices for defaults) c = 121, v = x: Value must only be zero unless otherwise allowed in a specific Recommended Practice.
*Local Control. When Local Control is Off, all devices on a given channel will respond only to data received over MIDI. Played data, etc. will be ignored. Local Control On restores the functions of the normal controllers. 
c = 122, v = 0: Local Control Off
c = 122, v = 127: Local Control On
* All Notes Off. When an All Notes Off is received, all oscillators will turn off. 
c = 123, v = 0: All Notes Off (See text for description of actual mode commands.)
c = 124, v = 0: Omni Mode Off 
c = 125, v = 0: Omni Mode On 
c = 126, v = M: Mono Mode On (Poly Off) where M is the number of channels (Omni Off) or 0 (Omni On) 
c = 127, v = 0: Poly Mode On (Mono Off) (Note: These four messages also cause All Notes Off)
|}

System Common Messages

System Messages (0xF0)

The final status nybble is a “catch all” for data that doesn’t fit the other statuses. They all use the most significant nybble (4bits) of 0xF, with the least significant nybble indicating the specific category.

The messages are denoted when the MSB of the second nybble is 1. When that bit is a 0, the messages fall into two other subcategories.

System Common

If the MSB of the second second nybble (4 bits) is not set, this indicates a System Common message. Most of these are messages that include some additional data bytes.

System Common Messages
Type Status Byte   Number of Data Bytes      Usage 
&lt;pre&gt;
Time Code Quarter Frame	0xF1	1	Indicates timing using absolute time code, primarily for synthronization with video playback systems. A single location requires eight messages to send the location in an encoded hours:minutes:seconds:frames format*.
Song Position	0xF2	2	Instructs a sequencer to jump to a new position in the song. The data bytes form a 14-bit value that expresses the location as the number of sixteenth notes from the start of the song.
Song Select	0xF3	1	Instructs a sequencer to select a new song. The data byte indicates the song.
Undefined	0xF4	0	
Undefined	0xF5	0	
Tune Request	0xF6	0	Requests that the receiver retunes itself**.
&lt;/pre&gt;
*MIDI Time Code (MTC) is significantly complex. Please see the MIDI Specification
**While modern digital instruments are good at staying in tune, older analog synthesizers were prone to tuning drift. Some analog synthesizers had an automatic tuning operation that could be initiated with this command.


System Exclusive

If you’ve been keeping track, you’ll notice there are two status bytes not yet defined: 0xf0 and 0xf7. These are used by the System Exclusive message, often abbreviated at SysEx. SysEx provides a path to send arbitrary data over a MIDI connection. There is a group of predefined messages for complex data, like fine grained control of MIDI Time code machinery. SysEx is also used to send manufacturer defined data, such as patches, or even firmware updates.

System Exclusive messages are longer than other MIDI messages, and can be any length. The messages are of the following format:

0xF0, 0xID, 0xdd, ...... 0xF7
The message is bookended with distinct bytes.

It opens with the Start Of Exclusive (SOX) data byte, 0xF0.
The next one to three bytes after the start are an identifier.
Values from 0x01 to 0x7C are one-byte vendor IDs, assigned to manufacturers who were involved with MIDI at the beginning.
If the ID is 0x00, it’s a three-byte vendor ID - the next two bytes of the message are the value.
&lt;pre&gt;
ID 0x7D is a placeholder for non-commercial entities.
ID 0x7E indicates a predefined Non-realtime SysEx message.
ID 0x7F indicates a predefined Realtime SysEx message.
&lt;/pre&gt;
After the ID is the data payload, sent as a stream of bytes.
The transfer concludes with the End of Exclusive (EOX) byte, 0xF7.
The payload data must follow the guidelines for MIDI data bytes – the MSB must not be set, so only 7 bits per byte are actually usable. If the MSB is set, it falls into three possible scenarios.

An End of Exclusive byte marks the ordinary termination of the SysEx transfer.
System Real Time messages may occur within the transfer without interrupting it. The recipient should handle them independently of the SysEx transfer.
Other status bytes implicitly terminate the SysEx transfer and signal the start of new messages.
 Some inexpensive USB-to-MIDI interfaces aren’t capable of handling messages longer than four bytes.

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot;  |Status D7----D0 
! width=&quot;10%&quot;  |Data Byte(s) D7----D0 
! width=&quot;20%&quot;  |Description
|-
|&lt;!--Status--&gt;11110000 || &lt;!--Data--&gt;0iiiiiii [0iiiiiii 0iiiiiii]  0ddddddd  --- --- 0ddddddd 11110111 || &lt;!--Description--&gt;System Exclusive. 
This message type allows manufacturers to create their own messages (such as bulk dumps, patch parameters, and other non-spec data) and provides a mechanism for creating additional MIDI Specification messages. The Manufacturer's ID code (assigned by MMA or AMEI) is either 1 byte (0iiiiiii) or 3 bytes (0iiiiiii 0iiiiiii 0iiiiiii). Two of the 1 Byte IDs are reserved for extensions called Universal Exclusive Messages, which are not manufacturer-specific. If a device recognizes the ID code as its own (or as a supported Universal message) it will listen to the rest of the message (0ddddddd). Otherwise, the message will be ignored. (Note: Only Real-Time messages may be interleaved with a System Exclusive.)
|-
|&lt;!--Status--&gt;11110001 || &lt;!--Data--&gt;0nnndddd || &lt;!--Description--&gt;MIDI Time Code Quarter Frame.
nnn = Message Type
dddd = Values
|-
|&lt;!--Status--&gt;11110010 || &lt;!--Data--&gt;0lllllll 0mmmmmmm || &lt;!--Description--&gt;Song Position Pointer. 
This is an internal 14 bit register that holds the number of MIDI beats (1 beat= six MIDI clocks) since the start of the song. l is the LSB, m the MSB.
|-
|&lt;!--Status--&gt;11110011 || &lt;!--Data--&gt;0sssssss || &lt;!--Description--&gt;Song Select. 
The Song Select specifies which sequence or song is to be played.
|-
|&lt;!--Status--&gt;11110100 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Undefined. (Reserved)
|-
|&lt;!--Status--&gt;11110101 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Undefined. (Reserved)
|-
|&lt;!--Status--&gt;11110110 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Tune Request. Upon receiving a Tune Request, all analog synthesizers should tune their oscillators.
|-
|&lt;!--Status--&gt;11110111 || &lt;!--Data--&gt; || &lt;!--Description--&gt;End of Exclusive. Used to terminate a System Exclusive dump. 
|}


System Real-Time Messages

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot;  |Status D7----D0 
! width=&quot;10%&quot;  |Data Byte(s) D7----D0 
! width=&quot;20%&quot;  |Description
|-
|&lt;!--Status--&gt;11111000 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Timing Clock. Sent 24 times per quarter note when synchronization is required.
|-
|&lt;!--Status--&gt;11111001 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Undefined. (Reserved)
|-
|&lt;!--Status--&gt;11111010 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Start. Start the current sequence playing. (This message will be followed with Timing Clocks).
|-
|&lt;!--Status--&gt;11111011 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Continue. Continue at the point the sequence was Stopped.
|-
|&lt;!--Status--&gt;11111100 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Stop. Stop the current sequence.
|-
|&lt;!--Status--&gt;11111101 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Undefined. (Reserved)
|-
|&lt;!--Status--&gt;11111110 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Active Sensing. This message is intended to be sent repeatedly to tell the receiver that a connection is alive. Use of this message is optional. When initially received, the receiver will expect to receive another Active Sensing message each 300ms (max), and if it does not then it will assume that the connection has been terminated. At termination, the receiver will turn off all voices and return to normal (non- active sensing) operation. 
|-
|&lt;!--Status--&gt;11111111 || &lt;!--Data--&gt; || &lt;!--Description--&gt;Reset. Reset all receivers in the system to power-up status. This should be used sparingly, preferably under manual control. In particular, it should not be sent on power-up.
|}


Advanced Messages

Polyphonic Pressure (0xA0) and Channel Pressure (0xD0)

Some MIDI controllers include a feature known as Aftertouch. While a key is being held down, the player can press harder on the key. The controller measures this, and converts it into MIDI messages.

Aftertouch comes in two flavors, with two different status messages.

The first flavor is polyphonic aftertouch, where every key on the controller is capable of sending its own independent pressure information. The messages are of the following format:
&lt;pre&gt;
0xnc, 0xkk, 0xpp
n is the status (0xA)
c is the channel nybble
kk is the key number (0 to 127)
pp is the pressure value (0 to 127)
&lt;/pre&gt;
Polyphonic aftertouch is an uncommon feature, usually found on premium quality instruments, because every key requires a separate pressure sensor, plus the circuitry to read them all.

Much more commonly found is channel aftertouch. Instead of needing a discrete sensor per key, it uses a single, larger sensor to measure pressure on all of the keys as a group. The messages omit the key number, leaving a two-byte format
&lt;pre&gt;
0xnc, 0xpp
n is the status (0xD)
c is the channel number
pp is the pressure value (0 to 127)
&lt;/pre&gt;

Pitch Bend (0xE0)

Many keyboards have a wheel or lever towards the left of the keys for pitch bend control. This control is usually spring-loaded, so it snaps back to the center of its range when released. This allows for both upward and downward bends.

Pitch Bend Wheel

The wheel sends pitch bend messages, of the format
&lt;pre&gt;
0xnc, 0xLL, 0xMM
n is the status (0xE)
c is the channel number
LL is the 7 least-significant bits of the value
MM is the 7 most-significant bits of the value
&lt;/pre&gt;
You’ll notice that the bender data is actually 14 bits long, transmitted as two 7-bit data bytes. This means that the recipient needs to reassemble those bytes using binary manipulation. 14 bits results in an overall range of 214, or 0 to 16,383. Because it defaults to the center of the range, the default value for the bender is halfway through that range, at 8192 (0x2000).

Control Change (0xB0)

In addition to pitch bend, MIDI has provisions for a wider range of expressive controls, sometimes known as continuous controllers, often abbreviated CC. These are transmitted by the remaining knobs and sliders on the keyboard controller shown below.


Continuous Controllers

These controls send the following message format:
&lt;pre&gt;
0xnc, 0xcc, 0xvv
n is the status (0xB)
c is the MIDI channel
cc is the controller number (0-127)
vv is the controller value (0-127)
&lt;/pre&gt;

Typically, the wheel next to the bender sends controller number one, assigned to modulation (or vibrato) depth. It is implemented by most instruments.

The remaining controller number assignments are another point of confusion. The MIDI specification was revised in version 2.0 to assign uses for many of the controllers. However, this implementation is not universal, and there are ranges of unassigned controllers.

On many modern MIDI devices, the controllers are assignable. On the controller keyboard shown in the photos, the various controls can be configured to transmit different controller numbers. Controller numbers can be mapped to particular parameters. Virtual synthesizers frequently allow the user to assign CCs to the on-screen controls. This is very flexible, but it might require configuration on both ends of the link and completely bypasses the assignments in the standard.


Program Change (0xC0)

Most synthesizers have patch storage memory, and can be told to change patches using the following command:
&lt;pre&gt;
0xnc, 0xpp
n is the status (0xc)
c is the channel
pp is the patch number (0-127)
&lt;/pre&gt;
This allows for 128 sounds to be selected, but modern instruments contain many more than 128 patches. Controller #0 is used as an additional layer of addressing, interpreted as a “bank select” command. Selecting a sound on such an instrument might involve two messages: a bank select controller message, then a program change.

Audio &amp; Midi are not synchronized, what I can do ?
Buy a commercial software package but there is a nasty trick to synchronize both. It's a bit hardcore but works for me:

 Simply put one line down to all midi notes on your pattern (use Insert key)
 and go to 'Misc. Setup', adjust the latency and just search a value
 that will make sound sync both audio/midi.

The stock Sin/Saw/Pulse and Rnd waveforms are too simple/common, is there a way to use something more complex/rich ?
You have to ability to redirect the waveforms of the instruments through the synth pipe by selecting the &quot;wav&quot; option for the oscillator you're using for this synth instrument, samples can be used as wavetables to replace the stock signals.


Sound banks like soundfont (sf2) or Kontakt2 are not supported at the moment


====DAW Audio Evolution 4====

Audio Evolution 4 gives you unsurpassed power for digital audio recording and editing on the Amiga. The latest release focusses on time-saving non-linear and non-destructive editing, as seen on other platforms. Besides editing, Audio Evolution 4 offers a wide range of realtime effects, including compression, noise gate, delays, reverb, chorus and 3-band EQ.

Whether you put them as inserts on a channel or use them as auxillaries, the effect parameters are realtime adjustable and can be fully automated. Together with all other mixing parameters, they can even be controlled remotely, using more ergonomic MIDI hardware.

Non-linear editing on the time line, including cut, copy, paste, move, split, trim and crossfade actions

The number of tracks per project(s) is unlimited .... AHI limits you to recording only two at a time. i.e. not on 8 track sound cards like the Juli@ or Phase 88.

sample file import is limited to 16bit AIFF (not AIFC, important distinction as some files from other sources can be AIFC with aiff file extension). and 16bit WAV (pcm only)


Most apps use the Music Unit only but a few apps also use Unit (0-3) instead or as well. 
* Set up AHI prefs so that microphone is available. (Input option near the bottom)


stereo++ allows the audio piece to be placed anywhere and the left-right adjusted to sound positionally right

hifi best for music playback if driver supports this option


Load 16bit .aif .aiff only sample(s) to use not AIFC which can have the same ending. AIFF stands for Audio Interchange File Format 

 sox recital.wav recital.aiff

 sox recital.wav −b 16 recital.aiff channels 1 rate 16k fade 3 norm
 sox input.wav        output.aiff bass −b 16 rate 48k

performs the same format translation, but also applies four effects (down-mix to one channel, sample rate change, fade-in, nomalize), and stores the result at a bit-depth of 16.

 rec −c 2 radio.aiff trim 0 30:00

records half an hour of stereo audio 

 play existing-file.wav


24bit PCM WAV or AIFF do not work 

*No stream format handling. So no way to pass on an AC3 encoded stream unmodified to the digital outputs through AHI.
*No master volume handling. Each application has to set its own volume. So each driver implements its own custom driver-mixer interface for handling master volumes, mute and preamps.
*Only one output stream. So all input gets mixed into one output.
*No automatic handling of output direction based on connected cables.
*No monitor input selection. Only monitor volume control. 


select the correct input (Don't mistake enabled sound for the correct input.)
The monitor will feedback audio to the lineout and hp out no matter if you have selected the correct input to the ADC. The monitor will provide sound for any valid input. This will result in free mixing when recording from the monitor input instead of mic/line because the monitor itself will provide the hardware mixing for you. Be aware that MIC inputs will give two channel mono. Only Linein will give real stereo.

Now for the not working part. Attempt to record from linein in the AE4 record window, the right channel is noise and the left channel is distorted. Even with the recommended HIFI 16bit Stereo++ mode at 48kHz.


Channels

Monitor

Gain

Inout

Output

Advanced settings - Debugging via serial port


* Options -&gt; Soundcard In/Out
* Options -&gt; SampleRate
* Options -&gt; Preferences

F6 for Sample File List

Setting a grid is easy as is measuring the BPM by marking a section of the sample. Is your kick drum track &quot;not in time&quot; ? If so, you're stumped in AE4 as it has no fancy variable time signatures and definitely no 'track this dodgy rhythm' function like software of the nature of Logic has. So if your drum beat is freeform you will need to work in freeform mode. (Real music is free form anyway).

If the drum *is* accurate and you are just having trouble measuring the time, I usually measure over a range of bars and set the number of beats in range to say 16 as this is more accurate, Then you will need to shift the drum track to match your grid *before* applying the grid. (probably an iterative process as when the grid is active samples snap to it, and when inactive you cannot see it).

AE4 does have ARexx but the functions are more for adding samples at set offsets and starting playback / recording.


These are the usual features found in DAWs...

* Recording digital audio, midi sequencer and mixer 
* virtual VST instruments and plug-ins 
* automation, group channels, MIDI channels, FX sends and returns, audio and MIDI editors and music notation editor


* different track views 
* mixer and track layout (but not the same as below) 
* traditional two windows (track and mixer)


Mixing - mixdown

Could not figure out how to select what part I wanted to send to the aux, set it to echo and return. Pretty much the whole echo effect. Or any effect.

Take look at page17 of the manual.

When you open the EQ / Aux send popup window you will see 4 sends. Now from the menu choose the windows menu.

Menus-&gt;Windows-&gt; Aux Returns Window

or press F5

You will see a small window with 4 volume controls and an effects button for each. Click a button and add an effects to that aux channel, then set it up as desired (note the reverb effect has a special AUX setting that improves its use with the aux channel, not compulsory but highly useful). You set the amount of 'return' on the main mix in the Aux Return window, and the amount sent from each main mixer channel in the popup for that channel. Again the aux sends are &quot;prefade&quot; so the volume faders on each channel do not affect them.


Tracking


Effects - fade in

To add some echoes to some vocals, tried to add an effect on a track but did not come out. This is made more complicated as I wanted to mute a vocal but then make it echo at the muting point. Want to have one word of a vocal heard and then echoed off. But when the track is mute the echo is cancelled out.

To correctly understand what is happening here you need to study the figure at the bottom of page 15 on the manual. You will see from that that the effects are applied 'prefade' So the automation you applied will naturally mute the entire signal.

There would be a number of ways to achieve the goal,

You have three real time effects slots, one for smoothing like so

Sample -&gt; Amplify -&gt; Delay

Then automate the gain of the amplify block so that it effectively mutes the sample just before the delay at the appropriate moment, the echo effect should then be heard.

Getting the effects in the right order will require experimentation as they can only be added top down and it's not obvious which order they are applied to the signal, but there only two possibilities, so it wont take long to find out.

Using MUTE can cause clicks to the Amplify can be used to mute more smoothly so that's a secondary advantage.

Signal Processing -


Overdub

[[#top|...to the top]]

===Office===

====Spreadsheet Leu====

Support for some xlsx, and ods functions 


====Spreadsheet Ignition====

; Needs ABIv1 to be completed before more can be done

File formats supported 
* ascii #?.txt and #?.csv (single sheets with data only). 
* igs and TurboCalc(WIP) #?.tc for all sheets with data, formats and formulas.

There is '''no''' support for xls, xlsx, ods or uos ([http://en.wikipedia.org/wiki/Uniform_Office_Format Uniform Unified Office Format]) at the moment.

* Always use Esc key after editing Spreadsheet cells.
* copy/paste seems to copy the first instance only so go to Edit -&gt; Clipboard to manage the list of remembered actions. 
* Right mouse click on row (1 or 2 or 3) or column header (a or b or c)  to access optimal height or width of the row or column respectively 
* Edit -&gt; Insert -&gt; Row  seems to clear the spreadsheet or clears the rows after the inserted row until undo restores as it should be...

Change Sheet name by  Object -&gt; Sheet -&gt; Properties

Click in the cell which will contain the result, and click '''down arrow button''' to the right of the formula box at the bottom of the spreadsheet and choose the function required from the list provided. Then click on the start cell and click on the bottom right corner, a '''very''' small blob, which allows stretching a bounding box (thick grey outlines) across many cells This grey bounding box can be used to '''copy a formula''' to other cells.

Object -&gt; Cell -&gt; Properties to change cell format - Currency only covers DM and not $, Euro, Renminbi, Yen or Pound etc. 
Shift key and arrow keys selects a range of cells, so that '''formatting can be done to all highlighted cells'''. 
View -&gt; Overview then select ALL with one click (in empty cell in the top left hand corner of the sheet).

Default mode is relative cell referencing e.g. a1+a2 but absolute e.g. $a$1+$a$2 can be entered.

* #sheet-name to '''absolute''' reference another sheet-name cell unless reference() function used.

;Graphs

use shift key and arrow keys to select a bunch of cells to be graph'ed making sure that x axes represents and y axes represents

* value() - 0 value, 1 percent, 2 date, 3 time, 4 unit ...


;Dates 
* Excel starts a running count from the 1st Jan 1900 and Ignition starts from 1st Jan 1AD '''(maybe this needs to change)'''
Set formatting Object -&gt; Cell -&gt; Properties and put date in days


;Time 
Set formatting Object -&gt; Cell -&gt; Properties and put time in seconds taken


;Database (to be done by someone else)

type - standard, reference (bezug), search criterion (suchkriterium), 
* select a bunch of cells and Object -&gt; Database -&gt; Define to set Datenbank (database) and Felder (fields not sure how?) 
* Neu (new) or loschen (delete) to add/remove database headings e.g. Personal, Start Date, Finish Date (one per row?)
* Object -&gt; Database -&gt; Index to add fields (felder) like Surname, First Name, Employee ID, etc. to ?

Filtering done with dbfilter(), dbproduct() and dbposition().

Activities with dbsum(), dbaverage(), dbmin() and dbmax().

Table sorting -


;Scripts (Arexx)

;Excel(TM) to Ignition - commas ''',''' replaced by semi-colons ''';''' to separate values within functions 
*SUM(), 
*AVERAGE(), MAX(), MIN(), INT(), PRODUCT(), MEDIAN(), VAR() becomes Variance(), Percentile(),
*IF(), AND, OR, NOT 
*LEFT(), RIGHT(), MID() becomes MIDDLE(), LEN() becomes LENGTH(), 
*LOWER() becomes LOWERCASE(), UPPER() becomes UPPERCASE(),
* DATE(yyyy,mm,dd) becomes COMPUTEDATE(dd;mm;yyyy), 
*TODAY(), DAY(),WEEK(), MONTH(),=YEAR(TODAY()), 
*EOMONTH() becomes MONTHLENGTH(), 
*NOW() should be date and time becomes time only, SECOND(), MINUTE(), HOUR(),
*DBSUM() becomes DSUM(),


;Missing and possibly useful features/functions needed for ignition to have better support of Excel files 
There is no Merge and Join Text over many cells, no protect and/or freeze row or columns or books but can LOCK sheets, no define bunch of cells as a name, Macros (Arexx?), conditional formatting, no Solver, no Goal Seek, no Format Painter, no AutoFill, no AutoSum function button, no pivot tables, (30 argument limit applies to Excel)

*HLOOKUP(), VLOOKUP(), [http://production-scheduling.com/excel-index-function-most-useful/ INDEX(), MATCH()], CHOOSE(), TEXT(), 
*TRIM(), FIND(), SUBSTITUTE(), CONCATENATE() or &amp;, PROPER(), REPT(), 
*[https://acingexcel.com/excel-sumproduct-function/ SUMPRODUCT()], ROUND(), ROUNDUP(), *ROUNDDOWN(), COUNT(), COUNTA(), SUMIF(), COUNTIF(), COUNTBLANK(), TRUNC(), 
*PMT(), PV(), FV(), POWER(), SQRT(), MODE(), TRUE, FALSE, 
*MODE(), LARGE(), SMALL(), RANK(), STDEV(), 
*DCOUNT(), DCOUNTA(), WEEKDAY(),


;Excel Keyboard [http://dmcritchie.mvps.org/excel/shortx2k.htm shortcuts needed to aid usability in Ignition] 
&lt;pre&gt;
Ctrl Z - Undo

Ctrl D - Fill Down
Ctrl R - Fill right

Ctrl F - Find
Ctrl H - Replace

Ctrl 1 - Formatting of Cells
CTRL SHIFT ~ Apply General Formatting ie a number 
Ctrl ; - Todays Date 

F2 - Edit cell
F4 - toggle cell absolute / relative cell references

&lt;/pre&gt;


====Document Scanning - Scandal====

Scanner usually needs to be connected via a USB port and not via a hub or extension lead.

Check in Trident Prefs -&gt; Devices that the USB Scanner is not bound to anything (e.g. Bindings None)
If not found then reboot the computer and recheck.

Start Scandal, choose Settings from Menu strip at top of screen and in Scanner Driver choose the ?#.device of the scanner (e.g. epson2.device).

The next two boxes - leave empty as they are for morphos SCSI use only
 or put ata.device (use the selection option in bigger box below) and Unit as 0 this is needed for gt68xx

* gt68xx - no editing needed in s/gt68xx.conf but needs a firmware file that corresponds to the scanner [http://www.meier-geinitz.de/sane/gt68xx-backend/ gt68xx firmwares] in sys:s/gt68xx.
* epson2 - Need to edit the file epson2.conf in sys/s that corresponds to the scanner being used

'''Save''' the settings but do not press the Use button (aros freezes)

Back to the Picture Scan window and the right-hand sections.

Click on the '''Information''' tab and press Connect button and the scanner should now be detected.

Go next to the '''Scanner''' tab next to Information Tab should have Color, Black and White, etc. and dpi settings now. Selecting an option Color, B/W etc. can cause dpi settings corruption (especially if the settings are in one line) so set '''dpi first'''. Make sure if Preview is set or not.

In the '''Scan''' Tab, press Scan and the scanner will do its duty. 
Be aware that nothing is saved to disk yet.

In the Save tab, change format JPEG, PNG or IFF DEEP. Tick incremental and base filename if necessary and then click the Save button. The image will now be saved to permanent storage.


The driver ignores a device if it is already bond to another USB class, rejects it from being usable. However, open Trident prefs, select your device and use the right mouse button to open. Select &quot;NONE&quot; to prevent poseidon from touching the device. Now save settings. It should always work now.

[[#top|...to the top]]

===Emulators===

==== Amiberry ====


==== Amiga Emu - Janus UAE ====

With Amibridge, AROS attempts to make the UAE emulator seem embedded within but it still is acting as an app 

There is no dynarec m68k for each hardware that Aros supports or direct patching of motorola calls to AROS hardware accelerated ones unless the emulator has that included 

Try starting Janus with a priority of -1 like this little script:
&lt;pre&gt;
cd sys:system/AmiBridge/emulator
changetaskpri -1
run janus-uae -f my_uaerc.config &gt;nil:
cd sys:prefs
endcli
&lt;/pre&gt;
This stops Janus hogging all the CPU time.


===Miscellaneous===

====Screensaver Blanker====

Most blankers on the amiga (i.e. aros) run as commodities (they are in the tools/commodities drawer). Double click on blanker.

Control is with an app called Exchange, which you need to run first (double click on app) or  run QUIET sys:tools/commodities/Exchange &gt;NIL: but subsequently can use (Cntrl Alt h).

Icon tool types (may be broken) or command line options 
&lt;pre&gt;
seconds=number 
&lt;/pre&gt;

Once the timing is right then add the following to s:icaros-sequence or s:user-startup

e.g. for 5 minutes

 run QUIET sys:tools/commodities/Blanker seconds=300 &gt;NIL:


*[http://archives.aros-exec.org/index.php?function=showfile&amp;file=graphics/screenblanker/gblanker.i386-aros.zip Garshneblanker] can make Aros unstable or slow. Certain blankers crashes in Icaros 2.0.x like Dragon, Executor.


*[ Acuario AROS version], the aquarium screen saver.

Startup: extras:acuariofv-aros/acuario

Kill: c:break name=extras:acuariofv-aros/acuario

Managed to start Acuario by the Executor blanker.

&lt;pre&gt;
cx_priority=
cx_popkey=    ie CX_POPKEY=&quot;Shift F1&quot; 
cx_popup=Yes or No

&lt;/pre&gt;


&lt;pre&gt;
 Qualifier String    Input Event Class
   ----------------    -----------------
    &quot;lshift&quot;           IEQUALIFIER_LSHIFT
    &quot;rshift&quot;           IEQUALIFIER_RSHIFT
    &quot;capslock&quot;         IEQUALIFIER_CAPSLOCK
    &quot;control&quot;          IEQUALIFIER_CONTROL
    &quot;lalt&quot;             IEQUALIFIER_LALT
    &quot;ralt&quot;             IEQUALIFIER_RALT
    &quot;lcommand&quot;         IEQUALIFIER_LCOMMAND
    &quot;rcommand&quot;         IEQUALIFIER_RCOMMAND
    &quot;numericpad&quot;       IEQUALIFIER_NUMERICPAD
    &quot;repeat&quot;           IEQUALIFIER_REPEAT
    &quot;midbutton&quot;        IEQUALIFIER_MIDBUTTON
    &quot;rbutton&quot;          IEQUALIFIER_RBUTTON
    &quot;leftbutton&quot;       IEQUALIFIER_LEFTBUTTON
    &quot;relativemouse&quot;    IEQUALIFIER_RELATIVEMOUSE
&lt;/pre&gt;


&lt;pre&gt;
    Synonym     Synonym
    String     Identifier
    -------    ----------
    &quot;shift&quot;    IXSYM_SHIFT    /* look for either shift key */
    &quot;caps&quot;     IXSYM_CAPS     /* look for either shift key or capslock */
    &quot;alt&quot;      IXSYM_ALT      /* look for either alt key */

Highmap is one of the following strings:
    &quot;space&quot;, &quot;backspace&quot;, &quot;tab&quot;, &quot;enter&quot;, &quot;return&quot;, &quot;esc&quot;, &quot;del&quot;,
    &quot;up&quot;, &quot;down&quot;, &quot;right&quot;, &quot;left&quot;, &quot;f1&quot;, &quot;f2&quot;, &quot;f3&quot;, &quot;f4&quot;, &quot;f5&quot;,
    &quot;f6&quot;, &quot;f7&quot;, &quot;f8&quot;, &quot;f9&quot;, &quot;f10&quot;, &quot;help&quot;.


&lt;/pre&gt;


[[#top|...to the top]]

==== World Construction Set WCS (Version 2.031) ====

WCS is a fractal landscape software such as Scenery Animator, Vista Pro and Panorama. Open sourced February 2022, World Construction Set [https://3dnature.com/downloads/legacy-software/ legally and for free] and [https://github.com/AlphaPixel/3DNature c source]. 

Announced August 1994 this version dates from April 1996 developed by Gary R. Huber and Chris &quot;Xenon&quot; Hanson&quot; from Questar 

&lt;pre&gt;
Assign &quot;WCSProjects:&quot; &quot;Volume:Dir/Dir/WCSProjects&quot; 
Assign &quot;WCSFrames:&quot;   &quot;Volume:Dir/Dir/WCSFrames&quot; 
&lt;/pre&gt;

&lt;pre&gt;
Load projects .proj by accessing pull down menu Project -&gt; Open then click on CanyonSunset.proj
OK to changing .par file and enlarge Status Log window to show what is happening 
Render by pull down menu Modules -&gt; Render with End equal 1 not 300 then click bottom middle button Render 
&lt;/pre&gt;

[https://www.youtube.com/watch?v=CxQDmf1ZWG0 Youtube walkthrough of above], [], [], 

Also try working with the already built file ColoDemo - Then open with the drop-down menu: Project/Open, then WCSProject:ColoDemo.proj
Which allows you to use altimetric DEM files already included and Loading scene parameters from ColoDemo.par
Once this is done, save everything with a new name to start working exclusively on your project. 
Then drop-down menu and select Save As (&quot;NewName&quot;.proj name), then drop-down menu to open parameter and select Save All ( .par name)


After launching the software, there is a the Module Control Panel composed of five icons. 
It is a dock type shortcut of the first few functions of the drop-down menu 

*Database   - Load (#?.proj), Append, Create, Edit, Save, Dir List (of WCSProject drawer), 
*Data Ops   - Extract / Convert Interp DEM, Import DLG, DXF, WDB and export LW map 3d formats  
*Map View   - Database file Loader leading to Map View Control with option to the Database Editor 
*Parameters - Editor for Motion, Color, Ecosystem, Clouds, Waves, management of altimeter files DEM, sclock settings etc 
*Render     - rendering terrain 

These are more in the pull down menu but not in the dock 
*Motion Editor
*Color Editor
*Ecosys Editor 


Simple minimal workflow 
*Load database (1st icon - 1st)
*Set parameters and save .par file (4th icon)
*Render scene (5th icon) 

[https://www.youtube.com/watch?v=ZbTwwR2qcc4 Youtube], [], 

&lt;pre&gt;
.proj new project name which creates a drawer of additional files 

.binary array, ascii array .xyz , z buffer, DTED .dt0, vista 1990s dem, iff  conversion 
.Obj with .elev, .frd with .hdr maps, - digital elevation model (DEM) is a 3D representation of elevation data in various formats 
USGS 7.5MinDEM, 

.par 


&lt;/pre&gt;


Since for the time being no project is loaded, a query window indicates a procedural error when clicking on the rendering icon (right end of the bar). The menu is quite traditional; it varies according to the activity of the windows. To display any altimetric file in the &quot;Mapview&quot; (third icon of the panel), There are three possibilities:

* Loading of a demonstration project.
* The import of a DEM file, followed by texturing and packaging from the &quot;Database-Editor&quot; and the &quot;Color-Editor&quot;.
* The creation of an altimetric file in WCS format, then texturing.


The altimeter file editing (display in the menu) is only made possible if the &quot;Mapview&quot; window is active.

The software is made up of many windows and won't be able to describe them all. Know that &quot;Color-Editor&quot; and the &quot;Data-Editor&quot; comprise sufficient functions for obtaining an almost real rendering quality. You have the possibility of inserting vector objects in the &quot;Data-Editor&quot; (creation of roads, railways, etc.) 


The Map View (MapView) window

*Database - Objects and Topos
*View     - Align, Center, Zoom, Pan, Move 
*Draw     - Maps and distance 
*Object   - Find, highlight, add points, conform topo, duplicate 
*Motion   - Camera, Focus, path, elevation 
*Windows  - DEM designer, Cloud (.cld) and wave (.wve) editor, 


You will notice that by selecting this window and simply moving the pointer to various points on the map you will see latitude and longitude values ​​change, along with the height.
Drop-down menu and Modules, then select MapView and change the width of the window with the map to arrange it in the best way on the screen. With the Auto button the center. Window that then displays the contents of my DEM file, in this case the Grand Canyon. MapView allows you to observe the shape of the landscape from above
 

ZOOM button

Press the Zoom button and then with the pointer position on a point on the map, press the left mouse button and then move to the opposite corner to circumscribe the chosen area and press the left mouse button again, then we will see the enlarged area selected on the map.
Would add that there is a box next to the Zoom button that allows the direct insertion of a value which, the larger it is, the smaller the magnification and the smaller the value, the stronger the magnification. At each numerical change you will need to press the DRAW button to update the view.

PAN button

Under Zoom you will find the PAN button which allows you to move the map at will in all directions by the amount you want. This is done by drawing a line in one direction, then press PAN and point to an area on the map with the pointer and press the left mouse button. At this point, leave it and move the pointer in one direction by drawing a line and press the left mouse button again to trigger the movement of the map on the screen (origin and end points). Do some experiments and then use the Auto button immediately below to recenter everything.
There are parameters such as TOPO, VEC to be left checked and immediately below one that allows different views of the map with the Style command (Single, Multi, Surface, Emboss, Slope, Contour), each with its own particularities to highlight different details.

Now you have the first basics to manage your project visually on the map. Close the MapView window and go further...


Let's start working on ECOSYSTEMS
If we select Emboss from the MapView Style command we will have a clear idea of ​​how the landscape appears, realizing that it is a predominantly desert region of our planet. Therefore we will begin to act on any vegetation present and the appearance of the landscape.
With WCS we will begin to break down the elements of the landscape by assigning defined characteristics. It will be necessary to determine the classes of the ecosystem (Class) with parameters of Elevation Line (maximum altitude), Relative Elevation (arrangement on basins or convexities with respectively positive or negative parameters), Min Slope and Max Slope (slope). WCS offers the possibility of making ecosystems coexist on the same terrain with the UnderEco function, by setting a Density value.


Ecosys Ecosystem Editor

Let's open it from Modules, then Ecosys Editor. In the left pane you will find the list of ecosystems referring to the files present in our project. It will be necessary to clean up that box to leave only the Water and Snow landscapes and a few other predefined ones. We can do this by selecting the items and pressing the Remove button (be careful not for all elements the button is activated, therefore they cannot all be eliminated).
Once this is done we can start adding new ecosystems. Scroll through the various Unused and as soon as the Name item at the top is activated allowing you to write, type the name of your ecosystem, adding the necessary parameters.
&lt;pre&gt;
Ecosystem1: Name: RockBase Class: Rock Density: 80 MinSlope: 15 UnderEco: Terrain
Ecosystem2: Name: RockIncl Clss: Rock Density: 80 MinSlope: 30 UnderEco: Terrain
Ecosystem3: Name: Grass Class Low Veg Density: 50 Height: 1 Elev Line : 1500 Rel El Eff: 5
Max Slope: 10 – Min Slope: 0 UnderEco: Terrain
Ecosistema4: Name: Shrubs Class: Low Veg Density: 40 Height: 8 Elev Line: 3000
Rel El Eff: -2 Max Slope: 20 Min Slope : 5 UnderEco: Terrain
Ecosistema5: Name: Terrain Class: Ground Density: 100 UnderEco: Terrain
&lt;/pre&gt;

Now we need to identify an intermediate ecosystem that guarantees a smooth transition between all, therefore we select as Understory Ecosystem the one called Terrain in all ecosystems, except Snow and Water .
Now we need to 'emerge' the Colorado River in the Canyon and we can do this by raising the sea level to 900 (Sea Level) in the Ecosystem called Water.
Please note that the order of the ecosystem list gives priority to those that come after. So our list must have the following order: Water, Snow, Shrubs, RockIncl, RockBase, Terrain. It is possible to carry out all movements with the Swap button at the bottom. To put order you can also press Short List. Press Keep to confirm all the work done so far with Ecosystem Editor.
Remember every now and then to save both the Project 'Modules/Save' and 'Parameter/Save All'

EcoModels are made up of .etp .fgp .iff8 for each model 


Color Editor

Now it's time to define the colors of our scene and we can do this by going to Modules and then Color Editor. In the list we focus on our ecosystems, created first.
Let's go to the bottom of the list and select the first white space, assigning the name 'empty1', with a color we like and then we will find this element again in other environments... It could serve as an example for other situations!
So we move to 'grass' which already exists and assign the following colors: R 60 G 70 B50
&lt;pre&gt;
'shrubs': R 60 G 80 B 30
'RockIncl' R 110 G 65 B 60
'RockBase' R 110 G 80 B 80
' Terrain' R 150 G 30 B 30
&lt;pre&gt;
Now we can work on pre-existing colors
&lt;pre&gt;
'SunLight' R 150 G 130 B 130
'Haze and Fog' R 190 G 170 B 170
'Horizon' R 209 G 185 B 190
'Zenith' R 140 G 150 B 200
'Water' R 90 G 125 B 170
&lt;/pre&gt;

Ambient R 0 G 0 B 0

So don't forget to close Color Editor by pressing Keep.
Go once again to Ecosystem Editor and assign the corresponding color to each environment by selecting it using the Ecosystem Color button. Press it several times until the correct one appears. Then save the project and parameters again, as done previously.


Motion Editor

Now it's time to take care of the framing, so let's go to Modules and then to Motion Editor. An extremely feature-rich window will open. Following is the list of parameters regarding the Camera, position and other characteristics:
&lt;pre&gt;
-Camera Altitude: 7.0
-Camera Latitude: 36.075
-Camera Longitude: 112.133
-Focus Attitude: -2.0
-Focus Latitude: 36.275
-Focus Longitude: 112.386
-Camera : 512 → rendering window
-Camera Y: 384 → rendering window
-View Arc: 80 → View width in degrees
-Sun Longitude: 172
-Sun Latitude: -0.9
-Haze Start: 3.8
-Haze Range: 78, 5
&lt;/pre&gt;
As soon as the values ​​shown in the relevant sliders have been modified, we will be ready to open the CamView window to observe the wireframe preview. Let's not consider all the controls that will appear.
Well from the Motion Editor if you have selected Camera Altitude and open the CamView panel, you can change the height of the camera by holding down the right mouse button and moving the mouse up and down. To update the view, press the Terrain button in the adjacent window. As soon as you are convinced of the position, confirm again with Keep. You can carry out the same work with the other functions of the camera, such as Focus Altitude...
Let's now see the next positioning step on the Camera map, but let's leave the CamView preview window open while we go to Modules to open the window at the same time MapView. We will thus be able to take advantage of the view from the other together with a subjective one.


From the MapView window, select with the left mouse button and while it is pressed, move the Camera as desired. To update the subjective preview, always click on Terrain.
While with the same procedure you can intervene on the direction of the camera lens, by selecting the cross and with the left button pressed you can choose the desired view. So with the pressure of Terrain I update the Preview. Possibly can enlarge or reduce the Map View using the Zoom button, for greater precision.
Also write that the circle around the cameras indicates the beginning of the haze, there are two types (haze and fog) linked to the altitude. Would also add that the camera height is editable through the Motion Editor panel.


The sun

Let's see that changing the position of the sun from the Motion Editor. Press the SUN button at the bottom right and set the time and the date. Longitude and latitude are automatically obtained by the program. Always open the View Arc command from the Motion Editor panel, an item present in the Parameter List box.

Once again confirm everything with Keep and then save again.


Animation

The animation part is not left-back and also occupies a window. The settings possibilities are enormous. A time line with dragging functions (&quot;slide&quot;, &quot;drag&quot;...) comparable to that of LightWave completes this window. 


A small window is available for positioning the stars as a function of a date, in order to vary the seasons and their various events (and yes...).

At the bottom of the &quot;Motion-Editor&quot;, a &quot;cam-view&quot; function will give you access to a control panel. Different preview modes are possible. The rendering is also accessible through a window. No less than nine pages compose it. At this level, you will be able to determine the backup name of your images (&quot;path&quot;), the type of texture to be calculated, the resolution of the images, activate or deactivate functions such as the depth buffer (&quot;zbuffer&quot;), the blur, the background image, etc.


Once all these parameters have been set, all you have to do is click on the &quot;Render&quot; button.

For rendering go to Modules and then Render. Select the resolution, then under IMA select the name of the image. Move to FRA and indicate the level of fractal detail which of 4 is quite good. Then Keep to confirm and then reopen the window, pressing Render you will see the result. The image will be opened with any viewing program.


Strengths:

* Multi-window.
* Quality of rendering.
* Accuracy.
* Opening, preview and rendering on CyberGraphX screen.
* Extract / Convert Interp DEM, Import DLG, DXF, WDB and export LW map 3d formats 
* The &quot;zbuffer&quot; function.

Weaknesses:

* No OpenGL management 
* Calculation time.
* No network computing tool.


====Writing CD / DVD - Frying Pan====

Can be backup DVDs (4GB ISO size limit due to use of FileInfoBlock), create audio cds from mp3's, and put .iso files on discs

If using for the first time - click Drive button and Device set to ata.device and unit to 0 (zero)

Click Tracks Button - Drive 1 - Create New Disc or Import Existing Disc Image (iso bin/cue etc.) - Session File open cue file

If you're making a data cd, with files and drawers from your hard drive, you should be using the ISO Builder.. which is the MUI page on the left. (&quot;Data/Audio Tracks&quot; is on the right).

You should use the &quot;Data/Audio tracks&quot; page if you want to create music cds with AIFF/WAV/MP3 files, or if you download an .iso file, and you want to put it on a cd.

Click WRITE Button - set write speed - click on long Write button

Examples

Easiest way would be to burn a DATA CD, simply go to &quot;Tracks&quot; page &quot;ISO Builder&quot; and &quot;ADD&quot; everything you need to burn.

On the &quot;Write&quot; page i have &quot;Masterize Disc (DAO)&quot;, &quot;Close Disc&quot; and &quot;Eject after Write&quot; set.

One must not &quot;Blank disc before write&quot; if one uses a CDR


AUDIO CD from MP3's are as easy but tricky to deal with. FP only understands one MP3 format, Layer II, everything else will just create empty tracks

Burning bootable CD's works only with .iso files. Go to &quot;Tracks&quot; page and &quot;Data/Audio Tracks&quot; and add the .iso


====odf====

Every ODF file is a collection of several subdocuments within a package (ZIP file), each of which stores part of the complete document.

* content.xml – Document content and automatic styles used in the content.
* styles.xml – Styles used in the document content and automatic styles used in the styles themselves.
* meta.xml – Document meta information, such as the author or the time of the last save action.
* settings.xml – Application-specific settings, such as the window size or printer information.


To read document follow these steps:

* Extracting .ods file.
* Getting content.xml file (which contains sheets data).
* Creating XmlDocument object from content.xml file.
* Creating DataSet (that represent Spreadsheet file).
* With XmlDocument select “table:table” elements, and then create adequate DataTables.
* Parse child’s of “table:table” element and fill DataTables with those data.
* At the end, return DataSet and show it in application’s interface.


To write document follow these steps:

* Extracting template.ods file (.ods file that we use as template).
* Getting content.xml file.
* Creating XmlDocument object from content.xml file.
* Erasing all “table:table” elements from the content.xml file.
* Reading data from our DataSet and composing adequate “table:table” elements.
* Adding “table:table” elements to content.xml file.
* Zipping that file as new .ods file.

XLS file format

The XLS file format contains streams, substreams, and records.

These sheet substreams include worksheets, macro sheets, chart sheets, dialog sheets, and VBA module sheets. 
All the records in an XLS document start with a 2-byte unsigned integer to specify Record Type (rt), and another for Count of Bytes (cb). A record cannot exceed 8224 bytes. If larger than the rest is stored in one or more continue records.

* Workbook stream 
**Globals substream
***BoundSheet8 record - info for Worksheet substream i.e. name, location, type, and visibility. (4bytes the lbPlyPos FilePointer, specifies the position in the Workbook stream where the sheet substream starts) 
**Worksheet substream (sheet) - Cell Table - Row record - Cells (2byte=row 2byte=column 2byte=XF format)
***Blank cell record
***RK cell record 32-bit number. 
***BoolErr cell record (2-byte Bes structure that may be either a Boolean value or an error code)
***Number cell record (64-bit floating-point number)
***LabelSst cell record (4-byte integer that specifies a string in the Shared Strings Table (SST). Specifically, the integer corresponds to the array index in the RGB field of the SST)
***Formula cell record (FormulaValue structure in the 8 bytes that follow the cell structure. The next 6 bytes can be ignored, and the rest of the record is a CellParsedFormula structure that contains the formula itself)
***MulBlank record (first 2 bytes give the row, and the next 2 bytes give the column that the series of blanks starts at. Next, a variable length array of cell structures follows to store formatting information, and the last 2 bytes show what column the series of blanks ends on)
***MulRK record 
***Shared String Table (SST) contains all of the string values in the workbook.

ACCRINT(), ACCRINTM(), AMORDEGRC(), AMORLINC(), 
COUPDAYBS(), COUPDAYS(), COUPDAYSNC(), COUPNCD(), COUPNUM(), COUPPCD(), 
CUMIPMT(), CUMPRINC(), 
DB(), DDB(), DISC(), 
DOLLARDE(), DOLLARFR(), 
DURATION(), EFFECT(), FV(), FVSCHEDULE(), 
INTRATE(), IPMT(), IRR(), ISPMT(), MDURATION(), MIRR(), NOMINAL(), NPER(), NPV(), 
ODDFPRICE(), ODDFYIELD(), ODDLPRICE(), ODDLYIELD(), 
PMT(), PPMT(), PRICE(), PRICEDISC(), PRICEMAT(), PV(), RATE(), 
RECEIVED(), SLN(), SYD(), TBILLEQ(), TBILLPRICE(), TBILLYIELD(), 
VDB(), XIRR(), XNPV(), YIELD(), YIELDDISC(), YIELDMAT(),


&lt;pre&gt;
&lt;/pre&gt;


&lt;pre&gt;
&lt;/pre&gt;

&lt;pre&gt;
&lt;/pre&gt;

{{BookCat}}</text>
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  <page>
    <title>R Programming/Packages</title>
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      <contributor>
        <username>R. Henrik Nilsson</username>
        <id>3395618</id>
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      <minor />
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      <text bytes="6919" sha1="7ezxi0mhfc4hqw1r0ss5xr9ka7gktbp" xml:space="preserve">&lt;noinclude&gt;{{R Programming/Navigation}}&lt;/noinclude&gt;

An R package includes a set of functions and datasets. Packages are often developed as supplementary material to books. For instance the '''MASS''' package was developed by Venables and Ripley for their book ''Modern Applied Statistics with S'' and the '''car''' package was developed by John Fox for his book ''An R and S plus Companion to Applied Regression''.

== Load a package ==

A package is loaded into the current R environment using the &lt;code&gt;library()&lt;/code&gt; function. A list of functions and datasets included in a package can be obtained by using the h or help argument of the library function.

&lt;syntaxhighlight lang=&quot;rsplus&quot;&gt;
library(&quot;stats4&quot;) # loads the package &quot;stats4&quot;
library(h=stats4) # gives help for all functions
data(package=&quot;stats4&quot;) # gives the list of all available datasets
&lt;/syntaxhighlight&gt;
A package can be detached from the current environment by using the &lt;code&gt;detach()&lt;/code&gt; function:

&lt;syntaxhighlight lang=&quot;rsplus&quot;&gt;
&gt; detach(&quot;package:prettyR&quot;)
&lt;/syntaxhighlight&gt;

Without any arguments the &lt;code&gt;library()&lt;/code&gt; function lists all of the packages currently available to the user.
&lt;code&gt;env()&lt;/code&gt; ('''gdata''') describe all loaded environments (ie packages). &lt;code&gt;search()&lt;/code&gt; gives the list of all loaded packages.

&lt;syntaxhighlight lang=&quot;rsplus&quot;&gt;
&gt; library() # returns the description of all the packages available on the computer
&gt; dir(.libPaths()) # returns the name of all the packages available on the computer (quicker than the previous one)
&gt; search()
&gt; env(unit=&quot;MB&quot;)
&lt;/syntaxhighlight&gt;

&lt;code&gt;current.packages()&lt;/code&gt; ('''Zelig''') show all the required and suggested packages.
&lt;syntaxhighlight lang=&quot;rsplus&quot;&gt;
&gt; current.packages(&quot;sem&quot;)
&lt;/syntaxhighlight&gt;

Where are my packages stored? 
* The &lt;code&gt;.libPaths()&lt;/code&gt; function without arguments prints the library directories
* The &lt;code&gt;.libPaths()&lt;/code&gt; function with a directory as argument defines a new directory where to store new libraries.

&lt;syntaxhighlight lang=&quot;rsplus&quot;&gt;
&gt; .libPaths()
[1] &quot;/Users/username/Library/R/library&quot;
[2] &quot;/Library/Frameworks/R.framework/Resources/library&quot;
&gt; .libPaths(&quot;W:/AppData/R/library&quot;)
&lt;/syntaxhighlight&gt;

== Install new packages ==

* Each major distribution of R includes a 'base' set of packages which support many basic statistical functions.
* Many R Users also choose to install additional 'Add-on' packages to provide simplified interfaces to R commands or to add specialist functionality i.e. the ggplot Grammar of Graphics package provides an advanced graphical output capability.
* The exhaustive list of all available packages is on the [http://cran.r-project.org/web/packages/ CRAN website].
* The R community has developed a vast resource of Add-on packages, some with unique functionality, some with overlapping functionality. It is therefore common to find multiple R packages capable of completing the same task i.e. reading and writing Excel spreadsheets. Ultimately which package to use is your choice.
* To install a new package, it is usually necessary to specify the name of the package as an argument of install.packages() function.
* Sometimes you need to specify more options. For instance, this is the case if you are not an administrator of your computer.
** &quot;lib&quot; specifies the directory where you want to store the package.
** &quot;repos&quot; specifies a list of repositories. Note that you can specify a vector of repositories.
** &quot;dep=T&quot; specifies that all the required packages are also downloaded and installed.

&lt;syntaxhighlight lang=&quot;rsplus&quot;&gt;
&gt; install.packages(&quot;faraway&quot;)
&gt; install.packages(&quot;rgrs&quot;, lib=&quot;W:/AppData/R/library&quot; , 
repos=c(&quot;http://r-forge.r-project.org&quot;,&quot;http://cran.fr.r-project.org/&quot;), 
dep=TRUE)
&lt;/syntaxhighlight&gt;

* Stay up to date.

If you want to be aware of the latest packages, type new.packages() in R or visit the [http://blog.revolution-computing.com/ Revolution Computing Blog] which gives each month a list of the new and the updated packages.

&lt;syntaxhighlight lang=&quot;rsplus&quot;&gt;
&gt; new.packages() # displays all the packages available in the repositories
&gt; update.packages() # updates all the packages installed with the newest version available in the repositories
&lt;/syntaxhighlight&gt;

We can also install bundles of packages using &lt;code&gt;install.views()&lt;/code&gt; or &lt;code&gt;update.views()&lt;/code&gt; ('''ctv''').
&lt;syntaxhighlight lang=&quot;rsplus&quot;&gt;
&gt; install.packages(&quot;ctv&quot;)
&gt; library(&quot;ctv&quot;)
&gt; install.views(&quot;Econometrics&quot;)
&gt; update.views(&quot;Econometrics&quot;)
&lt;/syntaxhighlight&gt;

We can also remove packages with &lt;code&gt;remove.packages()&lt;/code&gt;.

==Package Documentation and Help==

All R packages install with 'help' documentation, listing their functions and providing syntax and usage examples.

&lt;syntaxhighlight lang=&quot;rsplus&quot;&gt;
&gt; library(&quot;tidyr&quot;) # load the tidyr package
&gt; help(&quot;tidyr&quot;)    # view the tidyr package's help documentation
&lt;/syntaxhighlight&gt;

See the [[R Programming/Documentation|Obtaining Help]] Documentation section for more details on accessing package 'help' documentation.

== Package Dependencies ==

* Most R packages have dependencies or references to other R packages. You must have all of an R package's 'required' dependencies installed, before you can use the package.
* R package dependencies come in two types, required and suggested.
* Specialist R packages such as the '''ggplot''' Grammar of Graphics packages have large package dependency trees.
* The &lt;code&gt;install.packages()&lt;/code&gt; function will automatically download and install a package and its dependencies, on a computer with an Internet connection.
* The R CMD INSTALL utility will check preinstalled packages for dependencies, but not download missing packages.
* Users must follow separate package download and installation processes when working on a computer with no Internet connection. The '''miniCRAN''' package can be used to assist in the offline management of R package dependencies.

== Building R Packages ==

You can write down your own R packages. But, all packages submitted to CRAN (or Bioconductor) must follow specific guidelines, including the folder structure of the package and the other files like DESCRIPTION, NAMESPACE and so on.


* See Friedrich Leisch's introduction ([http://cran.r-project.org/doc/contrib/Leisch-CreatingPackages.pdf PDF] 20 pages)&lt;ref&gt; Friedrich Leisch ''Creating R Packages : A Tutorial'' http://cran.r-project.org/doc/contrib/Leisch-CreatingPackages.pdf&lt;/ref&gt;
* See also Duncan Murdoch's tools for building packages using Windows&lt;ref&gt;http://www.r-project.org/conferences/useR-2008/slides/Murdoch.pdf&lt;/ref&gt;
* See also Hadley Wickham and Jennifer Bryan's online book on current packaging practices ([https://r-pkgs.org/ R Packages]) &lt;ref&gt;Hadley Wickham and Jennifer Bryan ''R Packages : Organize, Test, Document and Share your code'' https://r-pkgs.org/&lt;/ref&gt;

== References ==

{{reflist|2}}

{{R Programming/Navbar|Settings|Documentation}}</text>
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    <title>High School Chemistry/Using Data</title>
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        <username>CommonsDelinker</username>
        <id>49843</id>
      </contributor>
      <comment>Replacing Katrina_Storm.jpg with [[File:Katrina_2005-08-28_1545Z_(oblique).jpg]] (by [[:c:User:CommonsDelinker|CommonsDelinker]] because: [[:c:COM:FR|File renamed]]: Criterion 4 - conforms to other similar files' formats for storm images).</comment>
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      <text bytes="28835" sha1="muu56at866cem7kjwjajop2dzla5468" xml:space="preserve">{{TOC right}}

Earlier, we learned about qualitative and quantitative observations, and that with quantitative observations, we need measurements. In science, measurements mean data. In this upcoming section, we will delve deeper with data to look at patterns and to graph data. Sometimes we can graph the data, make calculations, sketch the line, and calculate the slope. All of these quantitative observations help us to formulate a conclusion that will be based on evidence.

==Recognizing Patterns in the Data==
As stated earlier, data can provide enormous information to scientists for making interpretations and drawing conclusions. In order for scientists to do this, they have to be able to look at a set of data and recognize patterns. Data can be in the form of pictures, charts, or graphs. Take for example, the picture found in (Figure 3.1). This, although not particularly chemistry related, has much to do with the concept of pattern recognition and the data gathered from these patterns. What do you believe scientists determined when first viewing this image prior to August 28, 2005?

[[File:Katrina 2005-08-28 1545Z (oblique).jpg|500px|center|thumb|'''Figure 3.1''': Hurricane Katrina taken on Aug. 28, 2005, at 11:45 a.m. EDT by NOAA when the storm was a Category Five hurricane.]]

Now, let us look at a common chemistry example. We all know that metals are supposed to be chemically reactive. How do we know that? Well, that is a property of metals. But how reactive are they? How can you tell? What do you know about the periodic table that would help you determine this right now? Look at Table 3.5 and see if you can gather a little evidence that can solidify your conclusions about the '''chemical reactivity''' of metals and the periodic table.

{| class=&quot;wikitable&quot; style=&quot;width:500px; margin:5px auto;&quot;
|+ Table 3.5: Information about Metals and Reactivity
! scope=&quot;col&quot; | Metal
! scope=&quot;col&quot; | Chemical Reactivity in Atmosphere
|-
| style=&quot;text-align:center;&quot; | Sodium || Stored in toluene, extremely reactive
|-
| style=&quot;text-align:center;&quot; | Potassium || Burns in O&lt;sub&gt;2&lt;/sub&gt; in seconds
|-
| style=&quot;text-align:center;&quot; | Calcium || Slower to react with O&lt;sub&gt;2&lt;/sub&gt; than its neighbors to the right on the periodic table
|-
| style=&quot;text-align:center;&quot; | Titanium || Resists corrosion after forming an oxide barrier
|-
| style=&quot;text-align:center;&quot; | Aluminum || Resists corrosion after forming an oxide barrier
|-
| style=&quot;text-align:center;&quot; | Gold || Does not react with oxygen
|-
| style=&quot;text-align:center;&quot; | Platinum || Does not react with oxygen
|-
| style=&quot;text-align:center;&quot; | Copper || Does not react with H&lt;sub&gt;2&lt;/sub&gt;O; will react slowly with O&lt;sub&gt;2&lt;/sub&gt;
|-
| style=&quot;text-align:center;&quot; | Iron || Rusts in O&lt;sub&gt;2&lt;/sub&gt;
|}

[[File:Hotel vanc 2007.jpg|200px|thumb|Hotel Vancouver]]

What kinds of conclusions can you make from reading this table? Can you determine that the reactions between the metals and the oxygen in the air decrease going across a row on the periodic table? Did you notice that the '''alkali (group one) metals''' (sodium and potassium) are the most reactive of all the metals with oxygen and the '''alkaline earth (group two) metals''' (calcium) are the second most reactive? Yes, they are. Aluminum as well as titanium will actually become coated with an oxide of their metals, which acts like a protective shield against further reaction. Look at the figure below. The copper has turned green as a result of this protective coating that formed on the copper rooftop. Have you ever seen this before?

The current Hotel Vancouver took over a decade to build during the 1930s as the Great Depression put a temporary halt to construction. It was Vancouver's tallest building from 1939 to 1972.

What kind of observations are these? Are they quantitative? No, of course not because they have no measurements attached; they are qualitative observations.

What about other types of data that involve quantitative observations? Can we look at measurements and determine patterns? Yes we can. Statisticians, weather persons, stock market workers, sports analysts, and chemists (to name a few occupations) do this on a daily basis for their regular jobs. What if you were trying to identify an unknown substance based on a volume displacement experiment. You were given a series of known substances of known masses, and you then determined how much volume they displaced in a cylinder of water. Through your experiment, the following data was recorded (Table 3.6).

{| class=&quot;wikitable&quot; style=&quot;width:300px; margin:5px auto; text-align:center;&quot;
|+ Table 3.6: Volume Displacement Data
! scope=&quot;col&quot; | Substance
! scope=&quot;col&quot; | Mass
! scope=&quot;col&quot; | Volume of Water Displaced
|-
| Aluminum || 3.7 g || 1.0 mL
|-
| Iron || 7.86 g || 1.0 mL
|-
| Copper || 8.92 g || 1.0 mL
|-
| Silver || 10.5 g || 1.0 mL
|-
| Zinc || 7.14 g || 1.0 mL
|-
| Lead || 11.34 g || 1.0 mL
|}

First, which metal do you think is the densest, just looking at the data table? Do you think it would be lead or aluminum? How can you tell? Lead is the right answer because there is a heavier mass of lead displacing the same volume of water. Did you notice that copper is heavier than iron, and iron is heavier than zinc? Now what kind of data do you think this is? Is it qualitative or quantitative? Quantitative is the right answer because we are dealing with measurements.

An interesting note is that 19.3 g of gold would have displaced the same volume of water. Would it be the densest? Yes it would. It also means that this same amount of gold converts to approximately 212.5 lb/gal. Remember seeing in television or movies where the villain is running off with a bag full of gold bars? This would be rather difficult knowing the density of the metal from this table. Being able to read tables and data gives us the power to understand the world around us.

Another way to generalize trends in data and to make interpretations based on these trends is to plot a graph. '''Graphs''' are like numerical pictures that provide an image of the data collected in an experiment. Suppose you were asked to record the temperature of a mixture as it was slowly heated in a hot water bath. You record the following data as you watch your experiment (Table 3.7). You then plot the data on a graph to see what the numbers tell you.

{| style=&quot;width:600px; margin:5px auto;&quot;
|
{| class=&quot;wikitable&quot; style=&quot;width:200px; text-align:center;&quot;
|+ Table 3.7: Time vs. Temperature
! scope=&quot;col&quot; | Time (s)
! scope=&quot;col&quot; | Temperature °C
|-
| 0 || 23.5
|-
| 1 || 24
|-
| 2 || 25
|-
| 3 || 26
|-
| 4 || 27
|-
| 5 || 28
|-
| 6 || 29
|-
| 7 || 30
|-
| 8 || 31
|-
| 9 || 32
|}
|[[File:High School Chemistry Graph 1.svg|400px|thumb|'''Graph 1: Time vs. Temperature''']]
|}

Looking at the graph, what do you notice about the temperature of the mixture as it is heated in the hot water bath? It is constantly increasing. What does the initial point, or the '''''y''−intercept''' represent? It is the value of the initial temperature, most likely room temperature. Using a graph, it is clear to see that the y−axis, in this case temperature, is '''dependent''' on the ''x''−axis. For our example, the '''independent variable''' is time. What does this mean? It means that for a change to be made in temperature, time must pass.

Being able to plot tables of values and read the corresponding graphs is an important skill, not only for mathematics but also for science. Interpretations can be made by using either of these representations; one may be more visual and thus sometimes easier to interpret than the other. Now try one example where you have to plot a graph and make some interpretations.
{{High School Chemistry/Example|Sample Question: Mathematics Marks vs. Chemistry Marks}}
The following data represents the marks of 12 students in a mathematics test and in a chemistry test. All marks are out of 50.

{| class=&quot;wikitable&quot; style=&quot;width:450px; margin:5px auto; text-align:center;&quot;
! scope=&quot;row&quot; | Mathematics
| 17 || 38 || 40 || 17 || 28 || 30 || 45 ||24 || 48 || 42 || 32 || 36
|-
! scope=&quot;row&quot; | Chemistry
| 8 || 32 || 36 || 17 || 19 || 20 || 43 || 16 || 48 || 40 || 22 || 29
|}

a. Plot this data on an ''x'' − ''y'' axis, with mathematics marks on the ''x''-axis.

b. Draw the line of best fit. A '''line of best fit''' is drawn on a scatter plot so that it joins as many points as possible and shows the general direction of the data. When constructing the line of best fit, it is also important to keep, approximately, an equal number of points above and below the line.

c. Estimate the chemistry mark of a student who scored 32 on a mathematics test.

d. Estimate the mathematics mark of a student who scored 45 on a chemistry test.

e. Based on the trend found in the data, what can you say about the relationship between mathematics and chemistry marks?

----
'''Solution''':

(a and b)

[[File:High School Chemistry Graph 2.svg|500px|thumb|none|'''Graph 2: Mathematics Marks vs. Chemistry Marks''']]

c) The chemistry mark when a student makes 32 in math is approximately 25. We can see this by the blue line. By interpolating the data, we can draw a line up from the 32 mark on the ''x''−axis to where the line of best fit runs through the data points. Here, we cut across to the ''y''−axis to find the corresponding chemistry mark.

d) The math mark when a student makes 45 in chemistry is approximately 47. We can see this by the green line. By interpolating the data, we can draw a line across from the 45 mark on the ''y''−axis to where the line of best fit runs through the data points. Here, we draw a line down to the ''x''−axis to find the corresponding math mark.

e) The trend shows that as math marks increase, so do chemistry marks. The dependent variable in this graph is the chemistry mark.
{{Robox/Close}}

==Making Calculations With Data==
Being able to recognize patterns from tables, charts, pictures, and graphs is a worthy skill for any scientist and science student. By having charts, pictures, tables, and graphs, you can also perform a large variety of calculations depending on the independent and dependent variables. From here we can accomplish such things as making further predictions, drawing more conclusions, or identifying unknowns. Let’'s say, for example, in the density experiment from earlier, we were given an unknown for our experiment. Now, take the same chart but add a fourth column representing the density of the metal (Table 3.8). Recall the formula for density:

:&lt;math&gt;\text{Density} = \frac{\text{mass}}{\text{volume}}&lt;/math&gt;

Now, filling in the fourth column, using the density formula for our experimental data, we see the following information. Remember density = mass/volume or, in the table below, column 4 = column 2 ÷ column 3.


{| class=&quot;wikitable&quot; style=&quot;width:400px; margin:5px auto; text-align:center;&quot;
|+ Table 3.6: Volume Displacement Data
! scope=&quot;col&quot; | Substance
! scope=&quot;col&quot; | Mass
! scope=&quot;col&quot; | Volume of Water Displaced
! scope=&quot;col&quot; | Density
|-
| Aluminum || 3.7 g || 1.0 mL || 2.7 g/mL
|-
| Iron || 7.86 g || 1.0 mL || 7.86 g/mL
|-
| Copper || 8.92 g || 1.0 mL || 8.92 g/mL
|-
| Silver || 10.5 g || 1.0 mL || 10.5 g/mL
|-
| Zinc || 7.14 g || 1.0 mL || 7.14 g/mL
|-
| Lead || 11.34 g || 1.0 mL || 11.34 g/mL
|-
| Unknown || 1.78 g || 0.2 mL || 8.9 g/mL
|}

Just by doing this calculation, we can identify our unknown in the experiment? Sure, it is copper. Calculations are frequent in chemistry, as you will learn. Most times you will see we will use a variety of formulae to solve problems similar to those you would solve in any course. The relationship from comparing sets of answers give us the interesting parts of these types of calculations.
{{High School Chemistry/Example|Sample Question}}
How long does it take you to run 3.5 miles at 7 mph?
----
'''Solution'''

We know that:

&lt;math&gt;\text{speed} = \frac{\text{distance}}{\text{time}}&lt;/math&gt;

Therefore:

&lt;math&gt;\text{time} = \frac{\text{distance}}{\text{speed}}&lt;/math&gt;

&lt;math&gt;\text{time} = \frac{3.5\,\text{mi}}{7\,\text{mi/h}}&lt;/math&gt;

&lt;math&gt;\text{time} = 0.5\,\text{h}\,\!&lt;/math&gt;
{{Robox/Close}}

Another important skill with calculations is converting from one unit to another. Frequently in chemistry, data will appear in problems that require us to use '''conversion factors''' before completing the problem. Some conversion factors include 100 cm = 1 m, 1000 mL = 1 L, and 1 km = 1000 m.
{{High School Chemistry/Example|Sample Question}}
The speed of light is 3.00{{e|8}} m/s. The speed of sound is 1230 km/h. How much faster is the speed of light than the speed of sound.
----
'''Solution''':

&lt;math&gt;\text{speed of sound} = \frac{1230\,\text{km}}{\text{h}} \times \frac{1000\,\text{m}}{1\,\text{km}} \times \frac{1\,\text{h}}{60\,\text{min}} \times \frac{1\,\text{min}}{60\,\text{sec}}&lt;/math&gt;

&lt;math&gt;\text{speed of sound} = 342\,\text{m/s}\,\!&lt;/math&gt;

&lt;math&gt;\frac{\text{speed of light}}{\text{speed of sound}} = \frac{3.00 \times 10^8\,\text{m/s}}{342\,\text{m/s}}&lt;/math&gt;

&lt;math&gt;\frac{\text{speed of light}}{\text{speed of sound}} = 8.77 \times 10^5\,\!&lt;/math&gt;

In other words, the speed of light is almost 900, 000 times faster than the speed of sound. Amazing isn't it!
{{Robox/Close}}

==Preparing Graphs From Data==
Most times in the laboratory, we collect data of some sort and then carry it back to our desk to analyze. We want to determine the melting point of an unknown solid, so we take the melting points of various knowns and then that of our unknown; following this, we make a table, finally writing the data gathered from our experiment into the table. Some laboratory experiments that we, as scientists, do require us to draw graphs in order to interpret the results and make any conclusions. Drawing a graph that anyone can understand is a useful skill to any scientist. Graphs have to be properly labeled on the ''x''-axis (the horizontal) and the ''y''-axis (the vertical). The graphs should indicate a straight line or smooth curve indicating that the data is continuous. A straight line represents a '''linear relationship'''; a
curved line does not.
{{High School Chemistry/Example|Sample Question}}
Medical practitioners have been studying the heart for a long time. As a result, we can now calculate your heart rate based on a formula derived from your age.

Plot the table of values given below. Properly label the graph to include the independent and dependent variable. Draw the line all the way to the ''y''-axis so that you can find the ''y''-intercept. Finally, find your age on the ''x''-axis and then find your maximum heart rate by drawing a vertical line up to the graph.

{| class=&quot;wikitable&quot; style=&quot;width:350px; text-align:center;&quot;
! scope=&quot;col&quot; | Age in Years (''x'')
| 30 || 40 || 50 || 60
|-
! scope=&quot;col&quot; | Beats Per Minute (''y'') (maximum heart rate)
| 90 || 80 || 70 || 60
|}
----
'''Solution''':

At the age of 17, the maximum heart rate (beats per minute) read from the graph is 103.

[[File:Heart Rate vs Age.svg|500px|thumb|none|'''Heart Rate vs Age''']]
{{Robox/Close}}

==Reading Results From the Graph==
Many properties in chemistry lead to linear relationships when plotted. We saw this with the temperature/time relationship. Other properties in chemistry do not form this linear relationship. Take for example the relationship between concentration and temperature. Remember the last time you made a cup of instant coffee or hot chocolate? Why did you boil the water? What would have happened if you used warm tap water or even cold water from the refrigerator? Putting aside the anticipated taste difference, what would have happened to the solid you were trying to dissolve? The amount of instant coffee or hot chocolate powder in your cup that actually dissolves in warm or cold water would be small compared to when you use boiling water. This property is known as '''solubility'''. The solubility of a substance is the amount that can dissolve in a given amount of solution. Solubility is affected by the temperature but rarely linearly. Look at the data table below (Table 3.9). This data is for the solubility of KClO&lt;sub&gt;3&lt;/sub&gt; (potassium chlorate) in water.

{| class=&quot;wikitable&quot; style=&quot;width:250px; margin:5px auto; text-align:center;&quot;
|+ Table 3.9
! scope=&quot;col&quot; | Temperature (°C)
! scope=&quot;col&quot; | Solubility (g/100 mL H&lt;sub&gt;2&lt;/sub&gt;O
|-
| 0 || 3.3
|-
| 20 || 7.3
|-
| 40 || 13.9
|-
| 60 || 23.8
|-
| 80 || 37.5
|-
| 100 || 56.3
|}

Now graph the data and see what kind of curve we get.

[[File:Solubility of Potassium Chlorate.svg|600px|center|thumb|'''Solubility of Potassium Chlorate''']]

Notice how when the line is drawn, the relationship between grams of potassium chlorate that dissolve in 100 mL of water and temperature is not linear but curved. We can still interpret the data as we did earlier. For example, what is the solubility of KClO&lt;sub&gt;3&lt;/sub&gt; (how much KClO&lt;sub&gt;3&lt;/sub&gt;) when the temperature is 75 °C or at room temperature.

Using the same procedure, we draw a line up from 75 °C and then over to the ''y''−axis. It reads 34.5 g/100 mL. Therefore, 34.5 g of KClO&lt;sub&gt;3&lt;/sub&gt; can dissolve in 100 mL of H&lt;sub&gt;2&lt;/sub&gt;O at 75 °C.

[[File:Solubility of Potassium Chlorate 2.svg|600px|center|thumb|'''Solubility of Potassium Chlorate''']]

Now you try one:
{{High School Chemistry/Example|Sample Question}}
Ammonia, NH&lt;sub&gt;3&lt;/sub&gt;, and sodium chloride, NaCl, are known to have the following solubility data (Table 3.10).

{| class=&quot;wikitable&quot; style=&quot;width:300px; text-align:center;&quot;
|+ Table 3.10
! scope=&quot;col&quot; | Temperature (°C)
! scope=&quot;col&quot; | NH&lt;sub&gt;3&lt;/sub&gt; Solubility&lt;br /&gt;(g/100 mL H&lt;sub&gt;2&lt;/sub&gt;O)
! scope=&quot;col&quot; | NaCl Solubility&lt;br /&gt;(g/100 mL H&lt;sub&gt;2&lt;/sub&gt;O)
|-
| 0 || 88.5 || 35.7
|-
| 20 || 56.0 || 35.9
|-
| 40 || 34.0 || 36.4
|-
| 60 || 20.0 || 37.1
|-
| 80 || 11.0 || 38.0
|-
| 100 || 7.0 || 39.2
|}

a) Properly graph the data for each substance.

b) Are either of these linear? Explain.

c) What would be the solubility of each of the substances at 50 °C?
----
'''Solution''':
a) [[File:Solubility of Ammonia and Sodium Chloride.svg|600px|thumb|none|'''Solubility of NH&lt;sub&gt;3&lt;/sub&gt; and NaCl''']]

b) The Solubility data for NaCl represents a linear relationship when graphed. You can see this with the blue line in the graph above. The NH&lt;sub&gt;3&lt;/sub&gt; line (in red) is curved; therefore it is non-linear.

c) The solubility of NH&lt;sub&gt;3&lt;/sub&gt; at 50 °C is 27 g/100 mL H&lt;sub&gt;2&lt;/sub&gt;O. The solubility for NaCl at 50 °C is 37.5 g/100 mL H&lt;sub&gt;2&lt;/sub&gt;O. The graph below is marked to show the line traveling up from 50 °C
and over to the ''y''-axis (solubility) to find the answer for both of these parts.

[[File:Solubility of Ammonia and Sodium Chloride 2.svg|600px|thumb|none|'''Solubility of NH&lt;sub&gt;3&lt;/sub&gt; and NaCl''']]
{{Robox/Close}}

We can do more than just graph and read graphs of linear and non-linear data in order to make conclusions. For this, we use formulas like the '''slope''' of a line. Remember slope from math class? It is a formula used to find the rate at which one factor is affecting the other, either positively or negatively. Remember the formula for slope from math class?

:&lt;math&gt;\text{slope} = \frac{\text{rise}}{\text{run}}\ \ \text{or}\ \ m = \frac{y_2 - y_1}{x_2 - x_1}&lt;/math&gt;

[[File:2006 Ojiya balloon festival 011.jpg|200px|thumb|A modern hot air balloon.]]

Let's look at how the slope formula can be used on a graph to see how one factor is affecting another in an experiment.

In the 1800s, the use of the hot air balloons was extremely popular as a sport as well as an extracurricular activity for those who could afford the luxury. Up to this point, the study of the relationship of gases and the factors of temperature, pressure, and volume was limited to Robert Boyle's experiments with pressure and volume. Jacques Charles came along with his experiments on the relationship between volume and temperature. Here is some typical data from a volume/temperature experiment with gases (Table 3.11).

{| class=&quot;wikitable&quot; style=&quot;width:250px; margin:5px auto; text-align:center;&quot;
|+ Table 3.11
! scope=&quot;col&quot; | Temperature (°C)
! scope=&quot;col&quot; | Volume of Gas (cm&lt;sup&gt;3&lt;/sup&gt;)
|-
| 20 || 60
|-
| 40 || 65
|-
| 60 || 70
|-
| 80 || 75
|-
| 100 || 80
|-
| 120 || 85
|}

[[File:Volume of a Gas vs Temperature.svg|600px|thumb|center|'''Volume of a Gas vs. Temperature''']]

Now, find out what affect the temperature has on the volume of the gas. In other words, find the slope. Pick two points that are on the line and use the equation above to find the value of ''m''.

:&lt;math&gt;m = \frac{y_2 - y_1}{x_2 - x_1}&lt;/math&gt;

:&lt;math&gt;m = \frac{80 - 65}{100-40}&lt;/math&gt;

:&lt;math&gt;m = \frac{15}{60}&lt;/math&gt;

:&lt;math&gt;m = 0.25\,\text{cm}^3\text{/}^\circ\text{C}\,\!&lt;/math&gt;

What does this mean? It means that for each increase in temperature of 1 °C, the volume increased by 0.25 cm&lt;sup&gt;3&lt;/sup&gt; (or 0.25 mL). This translates to approximately 1 mL increase every 4 °C. This is a positive increase (notice the slope is increasing or going up). Now let's try another one.

Look at Table 3.12 for a set of data from an experiment performed between bromine and formic acid in a laboratory setting. The reaction was performed to see if the decrease in bromine concentration could cause the reaction to subsequently slow down. In other words, if they took some of the bromine out of the reaction, would the reaction start to slow down? Look at the data and see what happened.

{| class=&quot;wikitable&quot; style=&quot;width:200px; margin:5px auto;&quot;
|+ Table 3.12
! scope=&quot;col&quot; | Reading
! scope=&quot;col&quot; | Concentration of&lt;br /&gt;Bromine (mol/L)
! scope=&quot;col&quot; | Time
|-
| style=&quot;text-align:center;&quot; | 1 || 0.1 || 0
|-
| style=&quot;text-align:center;&quot; | 2 || 0.07 || 0.75
|-
| style=&quot;text-align:center;&quot; | 3 || 0.05 || 1.75
|-
| style=&quot;text-align:center;&quot; | 4 || 0.035 || 2.49
|-
| style=&quot;text-align:center;&quot; | 5 || 0.02 || 3.48
|-
| style=&quot;text-align:center;&quot; | 6 || 0.01 || 5
|-
| style=&quot;text-align:center;&quot; | 7 || 0.005 || 6.2
|-
| style=&quot;text-align:center;&quot; | 8 || 0.001 || 7.5
|-
| style=&quot;text-align:center;&quot; | 9 || 0.0 || 8.8
|-
| style=&quot;text-align:center;&quot; | 10 || 00 || 9
|}

Look at the data table, can you tell if an increase in bromine concentration had an effect on the rate of a reaction? Did it make it go faster or slower. Let's take a look. From T&lt;sub&gt;1&lt;/sub&gt; to T&lt;sub&gt;7&lt;/sub&gt; the bromine concentration decreased from 0.1 mol/L to 0.005 mol/L, a decrease of 0.095 mol/L. The time it took for this decrease was 6.2 seconds. What does this tell us about the rate? A preliminary conclusion would be that a decrease in bromine concentration causes the rate of the reaction to also decrease. A graph might make it a little easier to make conclusions based on the data.

[[File:Concentration of Bromine vs Time.svg|600px|center|thumb|'''Concentration of Bromine vs. Time''']]

Using slope to calculate the effect here is not as easy because we have a curve. We can easily see that as the concentration increases, so does the rate, but by how much? The slope would actually tell us that. In order to determine the slope of a curve, you need to draw in a '''tangent''' to the curve. A tangent is just a straight line drawn to the curve; from this you would calculate the slope. Look at the graph below, the tangents are drawn in using a red pen.

[[File:Concentration of Bromine vs Time 2.svg|600px|center|thumb|'''Concentration of Bromine vs. Time''']]

If we draw a tangent, look, we have a straight line. We can now find two points.

:&lt;math&gt;m = \frac{y_2 - y_1}{x_2 - x_1}&lt;/math&gt;

:&lt;math&gt;m = \frac{0.06 - 0.07}{1.1 - 0.75}&lt;/math&gt;

:&lt;math&gt;m = -0.028\,\text{mol/L}\cdot\text{s}\,\!&lt;/math&gt;

This means that as the concentration of bromine decreases, so does the rate of the reaction. Look at the units for the slope. The units are mol/L · s. These are the units for rate. This means, interestingly enough, that as the concentration goes down, the reaction slows down.

==Lesson Summary==
* Patterns can be found in data sets, pictures, charts, and graphs. From here scientists can make interpretations of the data and draw conclusions.
* When drawing graphs of tables of values, a straight line or a smooth curves can be drawn. Some data sets do require a line of best fit.
* A line of best fit is drawn on a scatter plot so that it joins as many points as possible and shows the general direction of the data. When constructing the line of best fit, it is also important to keep, approximately, an equal number of points above and below the line.
* Conversion factors are necessary for calculations where the units do not match. For example, km and m.
* Recall the slope formula: &lt;math&gt;m = \tfrac{y_2 - y_1}{x_2 - x_1}&lt;/math&gt;
* For curved lines, remember to draw the tangent first and then find the slope of the tangent line.

==Review Questions==
# Why is the slope of a graph so important to chemistry?
# What would you do to find the slope of a curved line?
# What is a conversion factor used for?
# Of the following professions, choose the one that uses data to find the identity of unknown fingerprints?
#: (a) analytical chemist
#: (b) archaeological chemist
#: (c) inorganic scientist
#: (d) forensic scientist
#: (e) quality control chemist
# Which speed is the slowest?
#: (a) 200 m/min (200 m/min × 1 km/1000 m = 0.2 km/min)
#: (b) 0.2 km/min
#: (c) 10 km/h (10 km/h × 1 h/6 min = 0.17 km/min)
#: (d) 1.0{{e|5}} mm/min (1.0{{e|5}} mm/min × 1 m/1000 mm × 1 km/1000 m = 0.1 km/min)
#: (e) 10 mi/h (10 mi/h × 1.603 km/mi × 1h/60 min = 0.267 km/min or 0.27 km/min)
# Andrew was completing his density lab for his chemistry lab exam. He collected the following data in his data table (Table 3.13).&lt;br /&gt;&lt;table class=&quot;wikitable&quot;&gt;&lt;caption&gt;Table 3.13&lt;/caption&gt;&lt;tr&gt;&lt;th scope=&quot;col&quot;&gt;Mass of Solid (g)&lt;/th&gt;&lt;th scope=&quot;col&quot;&gt;Volume of Solution (mL)&lt;/th&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;3.4&lt;/td&gt;&lt;td&gt;0.3&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;6.8&lt;/td&gt;&lt;td&gt;0.6&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;10.2&lt;/td&gt;&lt;td&gt;0.9&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;21.55&lt;/td&gt;&lt;td&gt;1.9&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;32.89&lt;/td&gt;&lt;td&gt;2.9&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;44.23&lt;/td&gt;&lt;td&gt;3.9&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;55.57&lt;/td&gt;&lt;td&gt;4.9&lt;/td&gt;&lt;/tr&gt;&lt;/table&gt;
#: (a) Draw a graph to represent the data.
#: (b) Calculate the slope.
#: (c) What does the slope of the line represent?
#: (d) Can you help Andrew determine what his unknown is by looking in a standards table?
# Donna is completing the last step in her experiment to find the effect of the concentration of ammonia on the reaction. She has collected the following data from her time trials and is ready for the analysis (Table 3.14). Donna is now required to graph the data, describe the relationship, find the slope and then discuss the meaning of the slope. Help Donna with the interpretation of her data.&lt;br /&gt;&lt;table class=&quot;wikitable&quot;&gt;&lt;caption&gt;Table 3.14&lt;/caption&gt;&lt;tr&gt;&lt;th scope=&quot;col&quot;&gt;Time (s)&lt;/th&gt;&lt;th scope=&quot;col&quot;&gt;Concentration (mol/L)&lt;/th&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;0.20&lt;/td&gt;&lt;td&gt;49.92&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;0.40&lt;/td&gt;&lt;td&gt;39.80&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;0.60&lt;/td&gt;&lt;td&gt;29.67&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;0.81&lt;/td&gt;&lt;td&gt;20.43&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;1.08&lt;/td&gt;&lt;td&gt;14.39&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;1.30&lt;/td&gt;&lt;td&gt;10.84&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;1.53&lt;/td&gt;&lt;td&gt;5.86&lt;/td&gt;&lt;/tr&gt;&lt;td&gt;2.00&lt;/td&gt;&lt;td&gt;1.95&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;2.21&lt;/td&gt;&lt;td&gt;1.07&lt;/td&gt;&lt;/tr&gt;&lt;td&gt;2.40&lt;/td&gt;&lt;td&gt;0.71&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td&gt;2.60&lt;/td&gt;&lt;td&gt;0.71&lt;/td&gt;&lt;/tr&gt;&lt;/table&gt;

==Vocabulary==
; alkali metals
: Group 1 metals of the periodic table (H, Li, Na, K, Rb, Cs, Fr).
; alkaline earth metals
: Group 2 metals of the periodic table (Be, Mg, Ca, Sr, Ba, Ra).
; chemical reactivity
: An observation of the behavior of the element of compound based on its position in a reactivity (or activity) series.
; conversion factor
: A ratio used to convert one unit to another.
; dependent variable
: The variable that changes depending on another variable (''y''-axis variable).
; graphs
: Pictorial representation of patterns using a coordinate system (''x'' − ''y'' axis).
; independent variable
: The variable that changes to cause another variable to change (''x''-axis variable).
; line of best fit
: A line drawn on a graph so that it joins as many points as possible and shows the general direction of the data. When constructing the line of best fit, it is also important to keep, approximately, an equal number of points above and below the line.
; linear relationship
: A relationship where the ''x''-values change proportionally with the ''y''-values leading to a straight line.
; non-linear relationship
: A relationship where the ''x''-values do not change proportionally with the ''y''-values leading to a curved line.
; slope
: A formula to find the rate at which one factor is affecting the other.
; solubility
: The amount of a substance that can dissolve in a given amount of solution.
; tangent
: A straight line drawn to the curve.
; ''y''-intercept
: Where the line crosses the ''y''-axis.


{{chapnav|Making Measurements|How Scientists Use Data}}
{{CK-12 Chemistry}}</text>
      <sha1>muu56at866cem7kjwjajop2dzla5468</sha1>
    </revision>
  </page>
  <page>
    <title>Koine Greek/1. Alphabet, Pronunciation, and Punctuation</title>
    <ns>0</ns>
    <id>266065</id>
    <revision>
      <id>4671231</id>
      <parentid>4284979</parentid>
      <timestamp>2026-09-20T00:22:33Z</timestamp>
      <contributor>
        <username>Doitshesprakhen</username>
        <id>3626361</id>
      </contributor>
      <minor />
      <comment>/* Alphabet */</comment>
      <origin>4671231</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="11338" sha1="tc1z5hhec67ltpzfj2d29c0t7vbwr1v" xml:space="preserve">Koine Greek is different than Classical Greek or Modern Greek pronunciations.

==Classical Pronunciation==
===Alphabet===
{| class=&quot;wikitable&quot; style=text-align:center
!rowspan=2| Greek Letter
!rowspan=2| Name
!rowspan=2| English Name
!colspan=2| IPA
!rowspan=2| English
|-
!Homeric
!Classical
|-
| Α α||ἄλφα||alpha
| [a]
| [ɑ]
|a&lt;sup&gt;1&lt;/sup&gt; (f''a''ther)
|-
| Β β||βῆτα||beta
|colspan=2| [b]
|b (''b''et)
|-
| Γ γ||γάμμα||gamma
|colspan=2| [g, ŋ]
|g (''g''et);&lt;br&gt;ng (ki''ng'') wherever it precedes γ, κ, ξ, or χ&lt;sup&gt;2&lt;/sup&gt;
|-
| Δ δ||δέλτα||delta
|colspan=2| [d]
|d (''d''og)
|-
| Ε ε||ἔ ψῑλόν||epsilon
| [e]
| [é]
|e (''e''dge)
|-
| Ζ ζ||ζῆτα||zeta
|[dʲ, gʲ]
|[zd]
|zd&lt;sup&gt;3&lt;/sup&gt; (wi''sd''om)
|-
| Η η||ἦτα||eta
| [ɑː]
| [εː]
|ě (f''ai''r)
|-
| Θ θ||θῆτα||theta
|colspan=2| [tʰ]
| t!&lt;sup&gt;4&lt;/sup&gt; (war''th''og)
|-
| Ι ι||ἰῶτα||iota
|colspan=2| [i, iː]
|ĭ&lt;sup&gt;1&lt;/sup&gt; (h''i''t), ee (s''ee''m)
|-
| Κ κ||κάππα||kappa
|colspan=2| [k]
|k (s''c''oop)
|-
| Λ λ||λάμβδα||lambda
|colspan=2| [l]
|l (''l''ame)
|-
| Μ μ||μῦ||mu
|colspan=2| [m]
|m (''m''ile)
|-
| Ν ν||νῦ||nu
|colspan=2| [n]
|n (''n''o)
|-
| Ξ ξ||ξῖ||xi
|colspan=2| [kʰs]
|x&lt;sup&gt;3&lt;/sup&gt; (sa''x''ophone)
|-
| Ο ο||ὂ μῑκρόν||omicron
|colspan=2| [o]
|ō (b''oa''t)
|-
| Π π||πῖ||pi
|colspan=2| [p]
|p (s''p''ot)
|-
| Ρ ρ||ῥῶ||rho
|colspan=2| [r]
|r ('Scottish' r)
|-
| Σ σ ς&lt;sup&gt;5&lt;/sup&gt;||σίγμα||sigma
|colspan=2| [s]
|s (''s''it)
|-
| Τ τ||ταῦ||tau
|colspan=2| [t]
|t (s''t''able)
|-
| Υ υ||ὒ ψῑλόν||upsilon
|[u]
|[y]
|u&lt;sup&gt;6&lt;/sup&gt; (''u''nicorn)
|-
| Φ φ||φῖ||phi
|colspan=2| [pʰ]
|p!&lt;sup&gt;4&lt;/sup&gt; (to''ph''at)
|-
| Χ χ||χῖ||chi
|colspan=2| [kʰ]
|c!&lt;sup&gt;4&lt;/sup&gt; (''c''oop)
|-
| Ψ ψ||ψῖ||psi
|colspan=2| [pʰs]
|ps&lt;sup&gt;3&lt;/sup&gt; (u''ps''ide-down)
|-
| Ω ω||ὦ μέγα||omega
| [oː]
| [ɔː]
|aw (l''aw'')
|}

{|
|-
|-
|-
| Notes:
|-
| 1. the letters ι, α, and υ  can represent short and long vowels.
|-
| 2. This is called a gamma nasal. (e.g. αγγελος)
|- 
| 3. the letters ξ, ζ, and ψ all represent double consonant sounds (ks, zd, ps).
|-
| 4. While many pronounce these characters according to the English sounds &quot;th&quot; (as in ''this'') and &quot;ph&quot; (as in ''photo''), scholars suggest that this is not the correct ancient pronunciation. This is due to a contraction that occurs in Coptic, a language closely related to Greek. Coptic, unlike Greek, has a letter that corresponds to the English letter &quot;H&quot;, which is ϩ or ''hori'' (Greek only has the rough breathing mark). When one word ends with either τ, π, or κ, and the word directly following begins with ϩ , the last letter of the first word will often contract with the first letter of the second word, resulting in θ, φ, and χ, respectively (e.g. πετ ϩοογ &gt;&gt; πε''θ''οογ). While this affected the spelling it did not affect pronunciation, resulting in two pronounced sounds (t-h, p-h, k-h). The following &quot;H&quot; sound is called aspiration, see the section on Aspirates below. 
|-
| 5. the letter σ is written ς at the end of words, e.g. βασις (but ΒΑΣΙΣ). In some texts, the letter is written like an English c (this form is called ''lunate''). 
|-
| 6. Like ''u'' in French or ''ü'' in German. Can be pronounced by pronouncing ee while pursing the lips as if for the oo in &quot;food.&quot;
|}

===Breathing Marks===
More important than accents are the breathing marks. Breathings normally occur only at the beginning of a word, though they will, at times, be present in the middle - where two words have been joined together. Greek has two types of breathing, the smooth breathing, ᾿, and the rough breathing, ῾. Unlike accents, these are quite important, and you should try to learn them. A word that begins with a rough breathing on a vowel should be pronounced with an 'h'. So the Greek word ὅρος, meaning 'boundary', should be read 'horos', while ὄρος, a mountain, should be read 'oros'. Be careful never to confuse breathings with quotation marks or accents; when you write or quote Greek, the breathings should look like half-rings to clearly distinguish them from other marks. When rho occurs at the beginning of a word, it too takes a rough breathing mark and is transliterated ''rh'', whereas when two rhos occur consecutively, the first takes a smooth breathing and the second a rough, although these breathing marks are not always indicated. Whenever upsilon occurs at the beginning of a word, it takes a rough breathing, except in the name of the letter itself. As with accent marks, breathing marks are written on the second of the two characters of a diphthong. Accents and breathings are often written to the left of capital letters: Ἇ for ἇ.

===Vowel length===
In Ancient Greek, vowels may be long or short. The vowels ε and ο are always short, whereas η and ω are always long. The vowels α, ι, and υ, on the other hand, may be either short or long. It is often taught in grade school that, ''e.g.'', the &quot;a&quot; in &quot;rat&quot; is short, whereas the &quot;a&quot; in &quot;rate&quot; is long. This is not at all like vowel length in Ancient Greek. In Ancient Greek, a long vowel is literally &quot;longer&quot; than a short vowel, that is, its sound lasts for twice as long as the sound of a short vowel. Originally, this was the only difference between short and long vowels, but as the language evolved, the short and long vowels began to differ not only in quantity (length) but also in quality (kind).

It is not always possible to tell whether an alpha, iota, or upsilon is short or long. In dictionaries and textbooks, as here, long alphas, iotas, and upsilons are marked with a macron (¯), whereas short vowels are usually unmarked, but occasionally marked with a breve (˘). If an alpha, iota, or upsilon takes a circumflex, one may conclude that it is definitely long (see the following section), so it is not marked with a macron. If an alpha, iota, or upsilon takes an acute or a grave and it is long, there are typographic difficulties and thus it might not carry a macron even though it is supposed to (although one might occasionally see an attempt, ''e.g.'', ἀγορᾱ́, which might not render correctly in your browser).

In practice, alpha, iota, and upsilon are usually short in the word stems of Classical Greek (although the same might not be true of all Ancient Greek dialects); most long alphas in Classical Greek occur in grammatical endings, which makes it easier for the learner to remember which vowels are short and which are long. Developing a habit of pronouncing Ancient Greek words, in reading and in memorization, with full attention to vowel length, will aid the learner in remembering vowel length as well.

===Diphthongs===
{| class=&quot;wikitable&quot; style=text-align:center
!rowspan=2| Greek&lt;br&gt;Diphthong
!colspan=2| IPA
!rowspan=2| English
|-
! Homeric
! Classical
|- 
| αι
|colspan=2| [ai]
|''eye''
|- 
| ᾳ||[a:i]||[ɑ:]||—
|- 
| ει||[ei]||[e:]||h''ay''
|- 
| ῃ||[a:i]||[ε:]||h''ay''/h''ai''r
|- 
| οι
|colspan=2| [οi]
|b''oy''
|- 
| ῳ||[o:i]||[ɔ:]||—
|- 
| αυ||[aʊ]||[ɑʊ]||l''ou''d
|- 
| ευ||[eʊ]||[ju:]||—''you''
|- 
| ηυ||[ɑ:ʊ]||[ε:ʊ]||—
|- 
| ου||[u:]||[ο:]||s''oo''n
|}
Notice the short line under the long vowels α, η, ω in three instances: this is the iota subscript. It indicates that there was originally an iota after the vowel, i.e. ῳ = ωι. Some texts simply print an iota after the vowel: this is known as an iota adscript, and some texts mix the two, using a subscript with lowercase letters, and an adscript for capitals (Ωιομην for ῳομην). By Classical times, these had become monophthongs (one vowel sound) equivalent to their non-iotized counterparts, and can simply be pronounced as such. Note that when alpha takes the iota subscript, one can infer that the alpha was originally long, whereas the diphthong αι is formed from short alpha.

=== Diaeresis ===
The diaeresis, ¨, is not strictly an accent, nor is it an umlaut, as used in German. It is mainly found on iotas to indicate that the letter should be pronounced separately from the vowel before it. For example, Verdi's opera Aïda is not pronounced 'eye-da', but 'a-yee-da'. Likewise, whereas αι is a diphthong, αϊ is two separate vowels.

=== Aspirates ===
The letters θ, φ, χ are not fricatives: they are not the same as the sounds th, f, ch in ''th''in, ''f''oot, and lo''ch'' (although these are the sounds they have become in Modern Greek). These letters have hard sounds, but are pronounced with an exhalation, like an ''h'' sound. Listen hard to your voice when you pronounce the examples above: you'll find that there is a difference between the ''p'' in ''pot'' and in ''spot''. Don't worry if you have too much difficulty making this distinction; many teachers and students prefer to use the fricative versions (''th, f, kh'') so that they are easier to distinguish for speakers and listeners.

*Much of the information provided in this section came from the article on pronunciation for Ancient (classical) Greek: http://en.wikibooks.org/wiki/Ancient_Greek/Alphabet#Pronunciation.

==Modern Greek Pronunciation==

The Modern Greek pronunciation is preferred within Greece and Cyprus and by the Orthodox Church.  It differs from the classical pronunciation in that 'γ' is like a 'y' preceding 'ε', 'η', 'ι'. 'ω' and 'ο' are pronounced the same, as are 'η' and 'ι',  'χ' is pronounced like 'ch' or similar to a Spanish 'jota' (hi'''j'''o), 'β' is pronounced [v], δ is pronounced like 'th' in the word 'this', π becomes 'b' following a nasal, with the nasal frequently not being pronounced (especially at the beginning of words).  The diphthongs 'ει' 'οι' and 'υι' are pronounced like 'i', and αι is pronounced like 'ε'. The 'υ' in the diphthongs αυ, ευ, ηυ is pronounced as [v] except before unvoiced consonants and at the end of the word, when it is pronounced [f].  In Modern Greek pronunciation, all accents are treated like acute accents (similar to how Katharevousa Greek was pronounced). Aspirates are not pronounced.

==Punctuation==
[[Image:modern_greek_alexandrinus.jpg|right|caption|thumbnail|300px|A section of the Codex Alexandrinus containing Luke 12:54–13:4.]]
The comma (,) and full-stop (.) are used as in English.  The colon or semicolon is a point above the line (·).  The Greek question mark (;) looks like the English semicolon.

Inverted commas are often used to denote speech.  Capital letters are used at the beginning of paragraphs, sentences (depending on publisher), proper names, and the beginning of quotations. 

In actual Greek texts from the era when Koine Greek was used as a day-to-day language, Greek was usually written with no punctuation.  The words ran together completely, with no spacing or markup.  Accents, breathing marks, spaces, and other punctuation are added at a much later time, making texts easier to read.

Many of the earliest partial manuscripts of the New Testament do have punctuation. Due to the high cost of the factors of input (ink, paper), punctuation was quickly excluded, to be re-included later by textual scholars (not unlike the adding of vowel-markers to the Biblical Hebrew and Aramaic texts by the Masoretes).

{{BookCat}}</text>
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  </page>
  <page>
    <title>User talk:Koavf</title>
    <ns>3</ns>
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    <revision>
      <id>4671286</id>
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      <contributor>
        <username>TechVindicator</username>
        <id>3626296</id>
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      <comment>/* Redirect of Wikibooks:Username */ new section</comment>
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      <text bytes="28937" sha1="nbbpklbqqm46gto937mq27u919do7bq" xml:space="preserve">&lt;div style=&quot;text-align:center; font-size:110%; font-weight:bold;&quot;&gt;[[Wikibooks:Welcome|Welcome]] to Wikibooks, Koavf!&lt;/div&gt;
&lt;!-- FIRST COLUMN --&gt;
&lt;div style=&quot;width:49.5%; float:left; margin:0em; padding:0em;&quot;&gt;
&lt;div style=&quot;margin:0.2em; border:1px solid #15304f; background-color:#f4eed7;&quot;&gt;
&lt;div style=&quot;border-bottom:1px solid #15304f; background-color:#89b5e7; padding:0.2em 0.5em; font-size:110%; font-weight:bold;&quot;&gt;[[File:Crystal Clear app kedit.png|20px|link=|alt=]] '''First steps tutorial'''&lt;/div&gt;
&lt;div style=&quot;padding:0.4em 1em 0.3em 1em;&quot;&gt;
'''Wikibooks is for [[WB:AGF|collaborative]] development of free&amp;nbsp;[[WB:WIW|textbooks]].'''

You do not need technical skills to [[Using Wikibooks|contribute]]. You can [[WB:BOLD|easily change most books]]. Please [[WB:CHAT|introduce yourself]], and let us know what [[WB:PROJECTS|interests you]].

If you already contribute at other Wikimedia projects, our [[Wikibooks:Wikibooks for Wikimedians|Wikimedia Orientation]] should quickly get you started.
&lt;/div&gt;
&lt;/div&gt;
&lt;div style=&quot;clear:both; padding-right:1em; text-align:right; font-size:smaller&quot;&gt;(Would you like to provide [[Template talk:Bigwelcome|feedback]] on this message?)&lt;/div&gt;
&lt;/div&gt;
&lt;!-- SECOND COLUMN --&gt;
&lt;div style=&quot;width:49.5%; float:left; margin:0em; padding:0em;&quot;&gt;
&lt;div class=&quot;collapsible&quot; style=&quot;margin:0.2em; border:1px solid #15304f; background-color:#f4eed7; text-align:left;&quot;&gt;
&lt;div class=&quot;title&quot; style=&quot;border-bottom:1px solid #15304f; background-color:#89b5e7; padding:0.2em 0.5em; font-size:110%; font-weight:bold;&quot;&gt;[[File:Icon apps query.svg|20px|link=|alt=]] '''Getting help'''&lt;/div&gt;
&lt;div class=&quot;NavContent&quot; style=&quot;padding:0.4em 1em 0.3em 1em;&quot;&gt;
* Read the [[Using Wikibooks]] book for a friendly introduction to the project, or our [[Help:Contents|help pages]] for more information.
* You can get friendly help from the community in the [[WB:HELP|user assistance room]] or our [[irc:wikibooks|IRC channel]].
* Upload freely licensed files to [[commons:Wikimedia Commons|Wikimedia Commons]]. You may [[WB:RFP|request permission]] to upload [[w:fair use|fair use]] files locally. Please include author and source {{tl|information}} and a {{nowrap|{{tl|non-free use rationale}}}} for [[WB:FU|non-free]] files.
&lt;/div&gt;
&lt;/div&gt;
&lt;div class=&quot;collapsible&quot; style=&quot;margin:0.2em; border:1px solid #14304f; background-color:#f4eed7; text-align:left;&quot;&gt;
&lt;div class=&quot;title&quot; style=&quot;border-bottom:1px solid #15304f; background-color:#89b5e7; padding:0.2em 0.5em; font-size:110%; font-weight:bold;&quot;&gt;[[File:Nuvola filesystems trashcan full.png|20px|link=|alt=]] '''Made a mistake?'''&lt;/div&gt;
&lt;div class=&quot;NavContent&quot; style=&quot;padding:0.4em 1em 0.3em 1em;&quot;&gt;
* You can [[WB:REVERT|restore]] a previously saved version.
* Pages should follow the [[WB:NP|&lt;code&gt;'''Book Title/Chapter Title'''&lt;/code&gt;]] naming convention.
* Need to rename a page? Use the ''move'' tab (is available once your account is 4 days old - until then, ask for [[WB:HELP|help]]).
* To request a page be deleted, add {{tlx|delete|''your reason''}} to the top of the page.
* Was a page you made deleted? Please read the [[WB:DP|deletion policy]], and check the [[Special:Log/delete|deletion log]] to find out why. Also check the [[WB:RFD|RFD]] archives if applicable. You can request undeletion at [[WB:RFU]], or ask the administrator who deleted the page.
&lt;/div&gt;
&lt;/div&gt;
&lt;div class=&quot;collapsible selected&quot; style=&quot;margin:0.2em; border:1px solid #15304f; background-color:#f4eed7; text-align:left;&quot;&gt;
&lt;div class=&quot;title&quot; style=&quot;border-bottom:1px solid #15304f; background-color:#89b5e7; padding:0.2em 0.5em; font-size:110%; font-weight:bold;&quot;&gt;[[File:Transmission icon.png|20px|link=|alt=]] '''Goodies, tips and tricks'''&lt;/div&gt;
&lt;div class=&quot;NavContent&quot; style=&quot;padding:0.4em 1em 0.3em 1em;&quot;&gt;
* Please fill in [[WB:ES|the edit summary]] and [[WB:PREVIEW|preview]] your edits before saving.
* Sign your name on [[WB:TALK|discussion pages]] by typing &amp;#126;&amp;#126;&amp;#126;&amp;#126;
* User scripts can make many tasks easier. Look at the ''Gadgets'' tab of [[Special:Preferences|''my preferences'']]; check off the boxes for the scripts you want, and hit ''save''!
&lt;/div&gt;
&lt;/div&gt;
&lt;div style=&quot;text-align:right; padding:0.2em 0.5em 0.2em 0.5em;&quot;&gt;Thanks. [[User:QuiteUnusual|&lt;span style=&quot;color:#E66C2C&quot;&gt;'''QU'''&lt;/span&gt;]] &lt;sup&gt;[[User talk:QuiteUnusual|&lt;span style=&quot;color:#306754&quot;&gt;TalkQu&lt;/span&gt;]]&lt;/sup&gt; 08:04, 19 April 2012 (UTC)&lt;/div&gt;
&lt;/div&gt;
&lt;div style=&quot;clear:both;&quot;&gt; &lt;/div&gt;

I see you've been editing for years but nobody has said Hi, so Hi! [[User:QuiteUnusual|&lt;span style=&quot;color:#E66C2C&quot;&gt;'''QU'''&lt;/span&gt;]] &lt;sup&gt;[[User talk:QuiteUnusual|&lt;span style=&quot;color:#306754&quot;&gt;TalkQu&lt;/span&gt;]]&lt;/sup&gt; 08:04, 19 April 2012 (UTC)

== Our confusing subject/category hierarchy ==

The way we've got things set up is less than ideal; it's grown up over the years as we've tried to make do with the wiki software we've been given.  I can try to fix up a Subject:Anarchism for you later today (anywhere from a few minutes to a few hours from now).  Here's an attempt to explain generally how it all works:
* Each book has a ''book category'', which contains all the pages in that book (and also any templates specific to that book).
* Each subject has a ''subject category'', which contains the main pages of all the books that explicitly name that subject.
* Each subject has an associated ''allbooks category'', which contains the main pages of all the books that explicitly name either that subject, or any of its subsections.
There are a series of pages that (unfortunately) have to be set up just right in order to make all that happen; it's a bit tricky.  We really ''should'' have a full-blown interactive wizard for managing it all, but while we're waiting for that (I'm working on tools for building wizards, over at [[n:Help:Dialog|English Wikinews]]), it can be confusing.
* '''''If''''' template {{tl|subjects}}, on the main page of a book,is given the name of a subject that has been set up just the way expected by our semi-automation, the template automatically lists the book under the named subject and all the ancestors of that subject.  For example, I've now set up a [[Subject:Christianity]], so putting {{tlx|subjects|Christianity}} on a book's main page will now cause it to be listed in that subject, and also in [[Subject:Abrahamic religions]], [[Subject:Religion]], and [[Subject:Humanities]].
* Creating a category for a topic, such as [[:Category:Anarchism]], doesn't automatically set up an associated subject.
* There ''is'' a way to get assistance with setting up a category, though it sure would be nice to have more assistance than it gives.  I used this assistance to set up [[Subject:Christianity]] a few minutes ago, and, as I say, I'll try to do [[Subject:Anarchism]] soon.  The trick is to edit the book's main page, add parameter &quot;{{!}}diagnose=true&quot; to the {{tl|subjects}} template, and preview the page; there's no need to save the page.  If there's a &quot;subject&quot; page there that hasn't been set up properly, the preview presents you with a bunch of buttons for setting up the needed infrastructure pages.
--[[User:Pi zero|Pi zero]] ([[User talk:Pi zero|discuss]] • [[Special:Contributions/Pi zero|contribs]]) 15:09, 12 September 2014 (UTC)
:{{Ping|Pi zero}} I figured out how ''some'' of that was working by tinkering myself. Thanks. My only concern was that there were existing categories which are more refined and better for navigation which you were emptying it out of. If you think a category is ''too'' refined and should be upmerged (and you may not think this), then discussion would be better. Thanks. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 15:12, 12 September 2014 (UTC)

:: Yeah, it can be awkward to decide when something is worth creating a child subject for, and when it's better to simply list it in the parent subject.  I suppose it depends on how well-defined the child subject is, and how naturally it fits into the existing hierarchy.  It ''usually'' wouldn't make sense, for instance, to create a subject just so that a single book could be put in it.

:: When a non-subject category is passed to {{tl|subjects}}, so that the template is unable to list the book in subjects as it's supposed to, the template puts out a call for help by adding the book to [[:Category:Attention needed (allbooks)]].  Every once in a while I remember to go look there, and fix all the problems it reports.  Usually this consists of changing parameters to the template, to put the book in subjects that have been set up rather than ones that haven't been set up.  However, sometimes the subject really ''should'' be set up.  As, for example, [[Subject:Christianity]].  I got partway into shifting listings to [[Subject:Abrahamic religions]] before my higher reasoning caught up with me and said, wait a minute, there are already child subjects for Islam and Judaism, why on Earth wouldn't there be one for Christianity?  (This is my laughing at myself.)  --[[User:Pi zero|Pi zero]] ([[User talk:Pi zero|discuss]] • [[Special:Contributions/Pi zero|contribs]]) 15:32, 12 September 2014 (UTC)
:::{{Ping|Pi zero}} Exactly: there is and will be enough material to warrant a division but maybe not for Rastafarianism (at least not now or soon). By the way, thanks for all the work you do wb and wn--they don't get enough attention as WMF projects. I can tell that you really want to improve them. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 15:34, 12 September 2014 (UTC)

== Fonts ==

@PeterEasthope: Can you show me the page that you are editing?
: Justin, the problem is now solved with module [[Oberon/A2/Oberon.MediaWiki.Mod]].  The module pages in Oberon are produced by that module.  Regards, ... [[User:PeterEasthope|PeterEasthope]] ([[User talk:PeterEasthope|discuss]] • [[Special:Contributions/PeterEasthope|contribs]]) 15:29, 15 January 2018 (UTC)

== Color gradient ==

Hi. What means square bracket in : &quot;[S]eparate the calculation phase from the colouring phase&quot;—Claude Heiland-Allen  ? --[[User:Adam majewski|Adam majewski]] ([[User talk:Adam majewski|discuss]] • [[Special:Contributions/Adam majewski|contribs]]) 16:13, 2 March 2020 (UTC)
:{{Ping|Adam majewski}} I don't know; I didn't add the quote. :/ It does seem unhelpful. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 16:14, 2 March 2020 (UTC)
:: Yes, but you have add bracket : &quot;Latest revision as of 18:04, 1 March 2020 (edit) (undo) (thank) Koavf (discuss | contribs)    rollback 1 edit&quot; --[[User:Adam majewski|Adam majewski]] ([[User talk:Adam majewski|discuss]] • [[Special:Contributions/Adam majewski|contribs]]) 16:50, 2 March 2020 (UTC)
:::{{Ping|Adam majewski}} Oh, you are just asking about the bracket? Sorry. I added that because in English, it is common to add brackets at the beginning of lines where you only have part of a quotation. The quotation here has no punctuation and doesn't seem to be a complete thought, so I just assumed that it's a quotation from mid-sentence. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 16:53, 2 March 2020 (UTC)

== Mathematics(about lines ,areas and volumes) ==

Let's start with the notion of a point that is considered as the most fundamental thing of Eucledian geometry .what is a point? You heard that point has position but it has no length ,neither breadth nor width.
Now let's discuss a little about unit(because it is must for further discussion).

Now, what is unit ? You heard that when we measure a physical quantity, we have to a convenient part of the same quantity as documentary and this part is called unit. When measuring the quantity we only concern with the number of unit and specify the unit as letters or another symbols(say, a length of 3cm ,here 3 is the number of unit presented in the measurement and cm is the particular part that we take as unit).Remember this passage as it is helpful for further discussion.

Now ,let's talk about lines . You heard that line is the combination of infinite points.But is this statement true?
Hitherto we discussed about units ,there we take a unit as a convenient part of the same quantity. So ,is the property of line and point same? 
If we take the definition of line ,we heard line has length ,neither breadth nor width but a point has nothing but a position.so from definition their properties  are not same ,the are different with their properties.
Then ,how can a line be made of points?
Now one can say,
&quot; One can find infinite points on line,then why shouldn't we take line as the combination of points?&quot;
It is also documentay.
But we should think that from definition the point has no lenth then how can we form a length by combining points ?as one point has no length then how a few points can form a length? 
You will understand better by an example, take the shadow of an object ,will this shadow be thicker if we place the shadow of another object on it? No!!
Then what is true ,a line is made of points or not?
And if the line is not made of points then what is the connection between line and point? As we can find infinite points on a line.

You should remember the whole discussion and relate this while compairing the line and area.in this also somebody say that area is made of infinite lines.This statement is controversial, too.As line has no breadth how lines make an area?
And same controversy for volumes.
You can think a point as a property of line at a position.And you should concern about this controversy.

Thank you, for reading!! [[User:Debdut Guha|Debdut Guha]] ([[User talk:Debdut Guha|discuss]] • [[Special:Contributions/Debdut Guha|contribs]]) 03:20, 15 July 2020 (UTC)
:Oh, okay. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 16:20, 15 July 2020 (UTC)

==A new proposal==
[[File:Internet-group-chat.svg|link=|alt=|left|48x48px]]Hi {{BASEPAGENAME}}, there is currently a proposal at [[: Wikibooks:Reading room/Proposals]] for non-admins to be given the ability of  &lt;code&gt; Suppress redirect&lt;/code&gt; and &lt;code&gt; Move subpages&lt;/code&gt;. Since you’ve been an active user on Wikibooks for the last thirty day, I thought you might join in by giving feedback/opinion or amendments. Thank you so much for your time [[User:Synoman Barris|Synoman Barris]] ([[User talk:Synoman Barris|discuss]] • [[Special:Contributions/Synoman Barris|contribs]]) 14:18, 14 September 2020 (UTC)

== You should become an en.wiki admin. ==

Just curious why you are not. [[User:Tgregtregretgtr|T. Gregtregretgtr]] ([[User talk:Tgregtregretgtr|discuss]] • [[Special:Contributions/Tgregtregretgtr|contribs]]) 23:28, 17 January 2022 (UTC)
:{{ping|Tgregtregretgtr}} I haven't been dedicated to this wiki in the past. No particular reason: it's a great idea and resource. There are just 24 hours in a day. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 23:42, 17 January 2022 (UTC)
:: Koavf,I meant the English Wikipedia. [[User:Tgregtregretgtr|T. Gregtregretgtr]] ([[User talk:Tgregtregretgtr|discuss]] • [[Special:Contributions/Tgregtregretgtr|contribs]]) 23:42, 17 January 2022 (UTC)
:::Oh, well I had been nominated by others but displayed incompetence in the nominations. I also am blocked there at present for edit-warring. I'm hoping the community sees the value in me contributing in the future, but that's predicated on me having a clear plan for constructive editing that builds trust in other editors that I will act appropriately. Edit-warring is unacceptable, so I will have to show that I won't engage in it on en.wp and I haven't proven that to a sufficient amount yet. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 23:51, 17 January 2022 (UTC)
:::: On April 1st,Wikipedia will not make vandalism allowed. OK? [[User:Tgregtregretgtr|T. Gregtregretgtr]] ([[User talk:Tgregtregretgtr|discuss]] • [[Special:Contributions/Tgregtregretgtr|contribs]]) 23:57, 25 January 2022 (UTC)
:::::It's never allowed. Were it allowed, it wouldn't be vandalism. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 00:06, 26 January 2022 (UTC)

== Welcoming users ==

Hi, I see you left the welcome message in my user page back when I joined this wikimedia project. I’m interested in welcoming new users here. How do I go along doing that? Thanks in advance, -[[User:Gifnk dlm 2020|Gifnk dlm 2020]] &lt;span style=&quot;color:purple;&quot;&gt;From Middle English Wikipedia&lt;/span&gt; 📜📖💻  ([[User talk:Gifnk dlm 2020|talk]]) 15:09, 18 January 2022 (UTC)
:{{Ping|Gifnk dlm 2020}} I have only ever welcomed users as I've happened to find them, e.g. if a new user edits a page on my watchlist. If you want to make it a point to welcome new users, you can check [[Special:RecentChanges]] with [https://en.wikibooks.org/wiki/Special:RecentChanges?userExpLevel=newcomer&amp;hidebots=1&amp;hideWikibase=1&amp;limit=1000&amp;days=30&amp;urlversion=2 these filters]. I generally only welcome someone who has actually made edits and not just anyone who creates an account, but you could do either. The {{tl|welcome}} template is helpful and particularly if you add some kind of personal message below substituting it. I'm glad you want to do outreach to others. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 18:18, 18 January 2022 (UTC)

::Thank you very much! I will start welcoming users. -[[User:Gifnk dlm 2020|Gifnk dlm 2020]] &lt;span style=&quot;color:purple;&quot;&gt;From Middle English Wikipedia&lt;/span&gt; 📜📖💻  ([[User talk:Gifnk dlm 2020|talk]]) 18:22, 18 January 2022 (UTC)

== Recipe style guidelines ==

Hello! Your feedback would be welcome and appreciated at [[Cookbook_talk:Policy/Recipe_template#Style_guidelines]]. Thanks! —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 15:20, 24 November 2022 (UTC)

== Hello ==

Hello to koavf.I read your comment and you suggested a few things.

These were:

&lt;nowiki&gt;*&lt;/nowiki&gt;Craigslist, Fiver, Upwork, etc.*

what are these [[User:Germany Poul Ah|Germany Poul Ah]] ([[User talk:Germany Poul Ah|discuss]] • [[Special:Contributions/Germany Poul Ah|contribs]]) 05:14, 2 September 2023 (UTC)

:These are websites where you can list [[:w:en:want ads|want ads]]. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 05:19, 2 September 2023 (UTC)
::How to do it? [[User:Germany Poul Ah|Germany Poul Ah]] ([[User talk:Germany Poul Ah|discuss]] • [[Special:Contributions/Germany Poul Ah|contribs]]) 04:40, 3 September 2023 (UTC)
:::The easiest to make a post on is https://craigslist.org/ I can't promise you will get any responses there either, but it's a little more likely than here at least. Good luck. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 04:44, 3 September 2023 (UTC)
::::Thank you,I really can't write my six books. [[User:Germany Poul Ah|Germany Poul Ah]] ([[User talk:Germany Poul Ah|discuss]] • [[Special:Contributions/Germany Poul Ah|contribs]]) 13:11, 3 September 2023 (UTC)

== [[Special:Diff/4322625]] ==

Hi @[[User:Koavf|Koavf]]! Sorry about that! I didn't realize that non-breaking spaces were important. I'm in the habit of removing odd/out of place characters. Cheers —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 01:37, 6 September 2023 (UTC)

:They're certainly helpful. Thanks for all you do, KC. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 04:50, 6 September 2023 (UTC)

== Help bring a book over from the French wikibooks ==

Hi {{PAGENAME}},

Since you contribute to many wmf-wikis as a functionary, I wonder if you can tell me what is the easiest way to bring the book [[The Wikimedia movement]] over here from the French wikibooks. This book was written by [[User:Lionel Scheepmans]] who 
: &quot;holds a doctorate in political and social sciences, is a free-culture activist and is a lecturer in anthropology at UCLouvain University. He holds several administrative positions within the Wikimedia movement, which he has been observing in a participatory way since 2011. Before writing his doctoral thesis on the Wikimedia movement, he was the author of a master's thesis entitled [[Wikiversity:Fr:Culture fr Wikipedia|Culture fr Wikipedia]], in which he describes the organization of the free encyclopedia in French.&quot;

Any help you can offer would be greatly appreciated. Thanks in advance,
Also @[[User:MathXplore|MathXplore]], @[[User:Kittycataclysm|Kittycataclysm]], @[[User:SHB2000|SHB2000]], @[[User:MarcGarver|MarcGarver]], @[[User:Leaderboard|Leaderboard]], @[[User:Xania|Xania]], @[[User:Atcovi|Atcovi]] [[User:Ottawahitech|Ottawahitech]] ([[User talk:Ottawahitech|discuss]] • [[Special:Contributions/Ottawahitech|contribs]]) 19:12, 12 March 2024 (UTC)

:Hi {{re|Ottawahitech}}, it needs to be imported and then translated. [[User:Leaderboard|Leaderboard]] ([[User talk:Leaderboard|discuss]] • [[Special:Contributions/Leaderboard|contribs]]) 20:19, 12 March 2024 (UTC)
:Mind if I take a look at it in a few days time? Sorry for the delay – uni exams rn are killing me. --[[User:SHB2000|SHB2000]] ([[User talk:SHB2000|discuss]] • [[Special:Contributions/SHB2000|contribs]]) 20:29, 12 March 2024 (UTC)
::It will need to be exported then imported using importupload (an XML file upload). It's not difficult, but you can find the session timing out if the file is particularly large. All admins have importupload rights here. [[User:MarcGarver|MarcGarver]] ([[User talk:MarcGarver|discuss]] • [[Special:Contributions/MarcGarver|contribs]]) 22:40, 12 March 2024 (UTC)
:Always happy to help, but I don't have advanced permissions here. :/ —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 01:05, 13 March 2024 (UTC)
: I guess others have answered the question. I would like to note that translation can also be done in userspace (By starting things at userspace or moving to there after import). Feel free to move to mainspace from userspace after translation is complete. Please also note that Wikibooks reviewers and admins can move pages without redirects (Please see [[special:UserGroupRights]] for details). [[User:MathXplore|MathXplore]] ([[User talk:MathXplore|discuss]] • [[Special:Contributions/MathXplore|contribs]]) 01:28, 13 March 2024 (UTC)
::Thanks to all for contributing here. I am still fuzzy about the procedure for bringing the book [[The Wikimedia movement]] over from the French wikibooks and translating it into English. 
::I looked up [[Wikibooks:Requests for import]], is this where non-admin users are supposed to request help from an Admin (I guess importers cannot import books that are not written in English)? According to [[Help:Importing]], pages are imported to the ''Transwiki namespace'', but I am not sure what happens then, and where the translation from French to English is supposed to take place before the translated text can get merged into the existing skeleton set up by [[User:Lionel Scheepmans]]. 
::Thanks in advance, [[User:Ottawahitech|Ottawahitech]] ([[User talk:Ottawahitech|discuss]] • [[Special:Contributions/Ottawahitech|contribs]]) 17:26, 16 March 2024 (UTC)
:::{{re|Ottawahitech}}, the process is as follows:
:::* An admin or importer imports the book from fr.wikibooks (this must be done using external import aka importupload); users can request at [[WB:RFI]] among other venues.
:::* the book now lives in the Transwiki namespace. This is an opportunity for the translation to take place.
:::* Once the translation has taken place, the book is simply moved to namespace (or wherever the book is to be moved).
:::[[User:Leaderboard|Leaderboard]] ([[User talk:Leaderboard|discuss]] • [[Special:Contributions/Leaderboard|contribs]]) 04:36, 17 March 2024 (UTC)

== Re:Cats ==

Hi @[[User:Koavf|Koavf]]! Just touching base re: [[Special:Diff/4480484]]—I didn't notice that you had just added that category when I removed it, so I hope it didn't come off as rude. The primary reason that page shouldn't have that category is because it's not a recipe page—it's an ingredient page. I'm also overhauling a bunch of cookbook categories in general to resolve several persistent issues that have cropped up over the years. Cheers! —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 23:35, 8 March 2025 (UTC)

:Not at all, KC. I saw that you were clearly removing entries from the category for deletion. I could never judge you. —[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''vf&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 23:37, 8 March 2025 (UTC)

== I have a little problem :Linear Algebra and the C Language ==

I have a small problem with my book, can you help me? Thank you.

https://en.wikibooks.org/wiki/Linear_Algebra_and_the_C_Language

[[User:Xhungab|Xhungab]] ([[User talk:Xhungab|discuss]] • [[Special:Contributions/Xhungab|contribs]]) 08:38, 18 October 2025 (UTC)

== Email ==

I sent you an email, feel free to take a look. Thank you. [[User:Codename Noreste|&lt;span style=&quot;color:#0024FF&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 02:34, 3 July 2026 (UTC)

== The Elements Wikijunior book ==

I closed a discussion that there is no consensus–there was one in favor and one against, but there is no clear consensus to feature The Elements on the main page. [[User:Codename Noreste|&lt;span style=&quot;color:#0024FF&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 18:20, 11 July 2026 (UTC)
: However, since you implemented the functions to feature the book, I wouldn't try to reverse or fight against it since it's done. [[User:Codename Noreste|&lt;span style=&quot;color:#0024FF&quot;&gt;Codename Noreste&lt;/span&gt;]] ([[User talk:Codename Noreste|discuss]] • [[Special:Contributions/Codename Noreste|contribs]]) 18:25, 11 July 2026 (UTC)
::Oh boy, yeesh. What a screw up. Let me fix that immediately. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 18:52, 11 July 2026 (UTC)
:::Yikes. This is what happens when I decide as soon as I wake up, &quot;I'll help!&quot;. Reading comprehension is important. Thanks/sorry. ―[[User:Koavf|Justin (&lt;span style=&quot;color:grey&quot;&gt;ko'''a'''&lt;span style=&quot;color:black&quot;&gt;v&lt;/span&gt;f&lt;/span&gt;)]]&lt;span style=&quot;color:red&quot;&gt;❤[[User talk:Koavf|T]]☮[[Special:Contributions/Koavf|C]]☺[[Special:Emailuser/Koavf|M]]☯&lt;/span&gt; 18:54, 11 July 2026 (UTC)

== Redirect of [[Wikibooks:Username]] ==
Hello Koavf,
Could you perhaps create a redirect of [[Wikibooks:Username|this page]] to [[Using Wikibooks/Setting Up A User Account#Choosing a Username|this page]]? I would create the redirect myself, however only sysops can make it. Is that alright?
Regards, [[User:TechVindicator|TechVindicator]] ([[User talk:TechVindicator|discuss]] • [[Special:Contributions/TechVindicator|contribs]]) 07:04, 20 September 2026 (UTC)</text>
      <sha1>nbbpklbqqm46gto937mq27u919do7bq</sha1>
    </revision>
  </page>
  <page>
    <title>Aros/Platforms/Arm Raspberry Pi support</title>
    <ns>0</ns>
    <id>286123</id>
    <revision>
      <id>4671160</id>
      <parentid>4671150</parentid>
      <timestamp>2026-09-19T13:09:41Z</timestamp>
      <contributor>
        <username>Jeff1138</username>
        <id>301139</id>
      </contributor>
      <minor />
      <origin>4671160</origin>
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      <text bytes="96265" sha1="ngwoi7a0xbf8lds8aavr5uc3nkzrjid" xml:space="preserve">{{ArosNav}}

[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb]. 

[[File:Wifi00.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi01.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi02.png|thumb|Setup wifi on Aros Pi3b]]

Wifi setup needs the network prefs with the TCP/IP tab click add interface -&gt; change Device to bwfm.device as net0:, IP Mode as DHCP and IPv4. Then switch to Wifi Prefs to enter Wireless tab gets your router settings. Press Save in network prefs.  


If it does not network does not start on bootup, settings need to be preserved. Instead, add this to the user-startup:
&lt;pre&gt;
execute sys:system/network/arostcp/s/startnet
run wirelessmanager device=bwfm.device &gt;nil:
&lt;/pre&gt;
Network will start automatically on boot. If you don't want the wirelessmanager icon on Wanderer desktop, just add 'nogui' to the wirelessmanager line


Lan ethernet port on 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  


Summary
*3b  ethernet not supported, usb ethernet not working but setup wifi using wifi prefs  
*3b+ work wifi but ethernet untested 
*4   untested 
*400 work wifi but ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb]. 

[[File:Wifi00.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi01.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi02.png|thumb|Setup wifi on Aros Pi3b]]

Wifi setup needs the network prefs with the TCP/IP tab click add interface -&gt; change Device to bwfm.device as net0:, IP Mode as DHCP and IPv4. Then switch to Wifi Prefs to enter Wireless tab gets your router settings. Press Save in network prefs.  


If it does not network does not start on bootup, settings need to be preserved. Instead, add this to the user-startup:
&lt;pre&gt;
execute sys:system/network/arostcp/s/startnet
run wirelessmanager device=bwfm.device &gt;nil:
&lt;/pre&gt;
Network will start automatically on boot. If you don't want the wirelessmanager icon on Wanderer desktop, just add 'nogui' to the wirelessmanager line


Lan ethernet port on 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  


Summary
*3b  ethernet not supported, usb ethernet not working but wifi setup and worked once using wifi prefs (interface still forgets some information when rebooted)  
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb]. 

[[File:Wifi00.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi01.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi02.png|thumb|Setup wifi on Aros Pi3b]]

Wifi setup needs the network prefs with the TCP/IP tab click add interface -&gt; change Device to bwfm.device as net0:, IP Mode as DHCP and IPv4. Then switch to Wifi Prefs to enter Wireless tab gets your router settings. Press Save in network prefs.  


If it does not network does not start on bootup, settings need to be preserved. Instead, add this to the user-startup:
&lt;pre&gt;
execute sys:system/network/arostcp/s/startnet
run wirelessmanager device=bwfm.device &gt;nil:
&lt;/pre&gt;
Network will start automatically on boot. If you don't want the wirelessmanager icon on Wanderer desktop, just add 'nogui' to the wirelessmanager line


Lan ethernet port on 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  


Summary
*3b  ethernet not supported, usb ethernet not working but wifi setup and worked once using wifi prefs (network prefs still forgets random information when rebooted)  
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb]. 

[[File:Wifi00.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi01.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi02.png|thumb|Setup wifi on Aros Pi3b]]

Wifi setup needs the network prefs with the TCP/IP tab click add interface -&gt; change Device to bwfm.device as net0:, IP Mode as DHCP and IPv4. Then switch to Wifi Prefs to enter Wireless tab gets your router settings. Press Save in network prefs.  


If it does not network does not start on bootup, settings need to be preserved. Instead, add this to the user-startup:
&lt;pre&gt;
execute sys:system/network/arostcp/s/startnet
run wirelessmanager device=bwfm.device &gt;nil:
&lt;/pre&gt;
Network will start automatically on boot. If you don't want the wirelessmanager icon on Wanderer desktop, just add 'nogui' to the wirelessmanager line


Lan ethernet port on 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  


Summary
*3b  ethernet not supported, usb ethernet not working but wifi prefs setup worked once (network prefs still forgets random information when rebooted)  
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb]. 

[[File:Wifi00.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi01.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi02.png|thumb|Setup wifi on Aros Pi3b]]

Wifi setup needs the network prefs with the TCP/IP tab click add interface -&gt; change Device to bwfm.device as net0:, IP Mode as DHCP and IPv4. Then switch to Wifi Prefs to enter Wireless tab gets your router settings. Press Save in network prefs.  


If it does not network does not start on bootup, settings need to be preserved. Instead, add this to the user-startup:
&lt;pre&gt;
execute sys:system/network/arostcp/s/startnet
run wirelessmanager device=bwfm.device &gt;nil:
&lt;/pre&gt;
Network will start automatically on boot. If you don't want the wirelessmanager icon on Wanderer desktop, just add 'nogui' to the wirelessmanager line


Lan ethernet port on 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  


Summary
*3b  ethernet not supported, usb ethernet not working but wifi prefs setup worked once (network prefs still forgets random information when rebooted)  
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [https://github.com/gmcn42/mt32-pi-control control of] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb] but not youtube. Press Cancel at screenmode selector to get windowed version 

[[File:Wifi00.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi01.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi02.png|thumb|Setup wifi on Aros Pi3b]]

Wifi setup needs the network prefs with the TCP/IP tab click add interface -&gt; change Device to bwfm.device as net0:, IP Mode as DHCP and IPv4. Then switch to Wifi Prefs to enter Wireless tab gets your router settings. Press Save in network prefs.  


If it does not network does not start on bootup, settings need to be preserved. Instead, add this to the user-startup:
&lt;pre&gt;
execute sys:system/network/arostcp/s/startnet
run wirelessmanager device=bwfm.device &gt;nil:
&lt;/pre&gt;
Network will start automatically on boot. If you don't want the wirelessmanager icon on Wanderer desktop, just add 'nogui' to the wirelessmanager line


Lan ethernet port on 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  


Summary
*3b  ethernet not supported, usb ethernet not working but wifi prefs setup worked once (network prefs still forgets random information when rebooted)  
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [https://github.com/gmcn42/mt32-pi-control control of] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb] but not youtube. Press Cancel at screenmode selector or -wb argument to get windowed version. You may have to delete the cache (in same folder) to fully retest newer versions. 

[[File:Wifi00.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi01.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi02.png|thumb|Setup wifi on Aros Pi3b]]

Wifi setup needs the network prefs with the TCP/IP tab click add interface -&gt; change Device to bwfm.device as net0:, IP Mode as DHCP and IPv4. Then switch to Wifi Prefs to enter Wireless tab gets your router settings. Press Save in network prefs.  


If it does not network does not start on bootup, settings need to be preserved. Instead, add this to the user-startup:
&lt;pre&gt;
execute sys:system/network/arostcp/s/startnet
run wirelessmanager device=bwfm.device &gt;nil:
&lt;/pre&gt;
Network will start automatically on boot. If you don't want the wirelessmanager icon on Wanderer desktop, just add 'nogui' to the wirelessmanager line


Lan ethernet port on 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  


Summary
*3b  ethernet not supported, usb ethernet not working but wifi prefs setup worked once (network prefs still forgets random information when rebooted)  
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [https://github.com/gmcn42/mt32-pi-control control of] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb] but not youtube. Press Cancel at screenmode selector or -wb argument to get windowed version. You may have to delete the cache (in same folder) to fully retest newer versions. You could use the Shift + Del shortcut or mouse wheel should work to delete all text at once. 

[[File:Wifi00.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi01.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi02.png|thumb|Setup wifi on Aros Pi3b]]

Wifi setup needs the network prefs with the TCP/IP tab click add interface -&gt; change Device to bwfm.device as net0:, IP Mode as DHCP and IPv4. Then switch to Wifi Prefs to enter Wireless tab gets your router settings. Press Save in network prefs.  


If it does not network does not start on bootup, settings need to be preserved. Instead, add this to the user-startup:
&lt;pre&gt;
execute sys:system/network/arostcp/s/startnet
run wirelessmanager device=bwfm.device &gt;nil:
&lt;/pre&gt;
Network will start automatically on boot. If you don't want the wirelessmanager icon on Wanderer desktop, just add 'nogui' to the wirelessmanager line


Lan ethernet port on 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  


Summary
*3b  ethernet not supported, usb ethernet not working but wifi prefs setup worked once (network prefs still forgets random information when rebooted)  
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [https://github.com/gmcn42/mt32-pi-control control of] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb] but not youtube. Press Cancel at screenmode selector or -wb argument to get windowed version. You may have to delete the cache (in same folder) to fully retest newer versions. You could use the Shift + Del shortcut or mouse wheel should work to delete all text at once. 

[[File:Wifi00.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi01.png|thumb|Setup wifi on Aros Pi3b]]
[[File:Wifi02.png|thumb|Setup wifi on Aros Pi3b]]

Wifi setup needs the network prefs with the TCP/IP tab click add interface -&gt; change Device to bwfm.device as net0:, IP Mode as DHCP and IPv4. Then switch to Wifi Prefs to enter Wireless tab gets your router settings. Press Save in network prefs.  


If it does not network does not start on bootup, settings need to be preserved. Instead, add this to the user-startup:
&lt;pre&gt;
execute sys:system/network/arostcp/s/startnet
run wirelessmanager device=bwfm.device &gt;nil:
&lt;/pre&gt;
Network will start automatically on boot. If you don't want the wirelessmanager icon on Wanderer desktop, just add 'nogui' to the wirelessmanager line


Lan ethernet port on 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  


Summary
*3b  ethernet not supported, usb ethernet not working but wifi prefs setup worked once only but now wireless info ok, network waiting on address (network prefs still forgets random information when rebooted) 
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [https://github.com/gmcn42/mt32-pi-control control of] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb] but not youtube. Press Cancel at screenmode selector or -wb argument to get windowed version. You may have to delete the cache (in same folder) to fully retest newer versions. You could use the Shift + Del shortcut or mouse wheel should work to delete all text at once. 


For wireless, please use the Wifi prefs and already selected device bwfw.device 


For lan ethernet port, please use Network prefs and the following hardware is 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  
 (network prefs still forgets random information when rebooted) 


Summary
*3b  ethernet not supported, usb ethernet not working but wifi prefs setup worked once only but now wireless info ok, network waiting on address 
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [https://github.com/gmcn42/mt32-pi-control control of] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb] but not youtube. Press Cancel at screenmode selector or -wb argument to get windowed version. You may have to delete the cache (in same folder) to fully retest newer versions. You could use the Shift + Del shortcut or mouse wheel should work to delete all text at once. To view wikibooks set Agent to Android (telefon) or iPhone setting in menus. 


For wireless, please use the Wifi prefs and already selected device bwfw.device 


For lan ethernet port, please use Network prefs and the following hardware is 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  
 (network prefs still forgets random information when rebooted) 


Summary
*3b  ethernet not supported, usb ethernet not working but wifi prefs setup worked once only but now wireless info ok, network waiting on address 
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [https://github.com/gmcn42/mt32-pi-control control of] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


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[[#Native]]

[[#Hosted]]

[[#Build]]

[[#Hardware]]

[[#References]]

[[#Future]]


==Introduction==


[[File:Scalos00.png|thumb|Scalos on Aros Pi3b]]

Aros aims to cover Pi 3 to 5 1Gb+ RAM ideally as you may have to switch to 256Mb gfx mode depending on the application running 


Options to boot from using a good power source to prevent the yellow lightning symbol. 
*With Pi3b+ the max you can get is 5.1V 2.5A with micro usb.
*With Pi4 5.1V 3A with usb-c 
*With Pi5 5.1V 5A, the amps went ever upwards, even to 5.1V 9A with usb-c 


Pi500+ keyboard wedge - 

Pi400 RPI-400 keyboard wedge - resolution changing and audio from micro hdmi0 (near 40pin) and micro hdmi1 (near usb-c psu) - Fn F10 0x5e power on and off works or held down for over 7 seconds auto shutdown - keyboard ok - wifi and lan ethernet testing - 


* Pi 5 - Quad A76 64bit ARMv8 and RP1 &quot;southbridge&quot; with VideoCore 7 Pre-D0 (Rev1.0) or D0 (rev1.1) 
* Pi 4 - Quad A72 64bit ARMv8 with VideoCore 6 
* Pi 3 - Quad A53 [https://www.raspberrypi.com/documentation/computers/processors.html 64 bit] ARMv8 with VideoCore 4 with heatsink/fan on 3b to prevent cpu 82C+ throttling 


* Pi 2 - Quad 32bit ARMv6 with VideoCore 4 - mostly not 64bit compatible 
* Pi Model B+ 32bit ARMv6 with VideoCore 4 - not 64bit compatible 
* Pi Model A and B 32bit ARMv6 with VideoCore 4 - not 64bit compatible 


===Native===

* 2013-03 Kalamatee starts work
* 2015-04 Work continues with mschulz on the kernel and Kalamatee (NicJA) on gpio and usb
* 2018 [https://www.patreon.com/posts/i-owe-you-some-20956961 mschulz resume adding BE big endian support], [https://www.patreon.com/michal_schulz/posts Big endian on Pi]  
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bsek latest commits for pi 3b, 4 and 5 64bit] 
* 2026 [https://github.com/aros-development-team/AROS/commits?author=metaneutrons latest commits for Pi5]
* 2026 [https://github.com/aros-development-team/AROS/commits?author=bitplane latest commits for ARM]


'''Download''' [https://aros.sourceforge.io/nightly1.html RaspberryPi 3, 3+, 4 and 5 64bit ArmV8 builds] [https://sourceforge.net/projects/aros/files/ Alternative site and nightly2] both raspi-aarch64-system and raspi-aarch64-contrib can be unbz2'd and copied to fat32 8GB+ microSD card (there will be folders - boot c Classes Demos Developer Devs Extras etc only showing). The SD can be plugged in to the Pi 

64bit build works well on a single core LE little endian. Multicore [https://github.com/aros-development-team/AROS/commit/1df0747c2bda3523a43029725a709b1f377d84ec may follow]. Any issues booting could be down to the SD card so please use another SD to see if it is resolved. Please report your experiences in the [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80 Aros Raspberry pi 3 64bit thread] and on the [https://forums.raspberrypi.com/viewtopic.php?p=2387984#p2387984 Raspberry Pi forum thread]. Any bugs or issues can be [https://github.com/aros-development-team/AROS/issues described here to fix] 

Boots with '''USB3''' port based sata3 ssd on Pi400 but untested on Pi4 (may need eeprom update from PiOS or Pi SD Imager) and Pi5 

Pi 3 B+ is pre-configured for USB sata3 boot - untested 

Pi 3 B may need [https://www.youtube.com/watch?v=ubnwvxF3Klc PiOS to set OTP to boot from usb - do so at your own risk] - if OTP set to usb, boot works but slower than SD card 

Speed write wise (top faster) 
&lt;pre&gt;
*NVME Pi5 untested    &gt;1000MB/sec  or faster if matched correctly 
*Sata3 ssd              500MB/sec
*SD        V90           90MB/sec  4K maybe 8K 
*SD        V60           60MB/sec  1080p 
*SD     U3 V30           30MB/sec  720p 
*SD C10 U1 V10 A1 A2     10MB/sec  minimum should be used now 
*SD C06                   6MB/sec  
*SD C04                   4MB/sec 
&lt;/pre&gt;


As a homage to the past, Aros shows a reduced number of icons but this can be changed by left mouse click in the window and then right click down to Window -&gt; View -&gt; All files

Windows can be manipulated by the top (moving) and the bottom right corner (resizing) only. 

Zune like MUI gui interface, has a unique quirk in that after changing a setting in a text box, you may sometimes need to press Enter/Return before clicking OK, Save, etc 


Like most amiga like OSs the audio and networking need to be setup manually 

Audio AHI prefs - Mode settings tab - needs both Music unit and Unit 0 set to RPiHDMI:16 bit stereo++  or RPiPWM:16 bit stereo++ at 44100Hz. Press '''Save or Use''' button after each choice 


Double left mouse click on most picture (Developer/Debug/Tests/Datatypes), audio and video files are supported, via datatypes, by the multiview application. 
Esc escape key usually closes open windows even the desktop 

In Prefs/Appearance some decorative theming elements need work. There is a few Mason icons in /Prefs/Presets/Icons/Mason/ and the ever present default Gorilla - Icon exchange in works 

For more intensive graphics applications, you may need to edit config.txt in the root folder and change 128M to 256M to adjust more memory to graphics usage 


[http://archives.arosworld.org/index.php?function=browse&amp;cat=network/browser amelinium web browser] is available with an [https://eab.abime.net/showthread.php?t=122494&amp;page=51 eab thread] reminiscent of [https://github.com/zapek/Voyager Voyager] and to a lesser extent [https://github.com/amigazen/aweb3/ Aweb] but not youtube. Press Cancel at screenmode selector or -wb argument to get windowed version. You may have to delete the cache (in same folder) to fully retest newer versions. You could use the Shift + Del shortcut or mouse wheel should work to delete all text at once. To view wikibooks set Agent to Android (telefon) or iPhone setting in menus. 


For wireless, please use the Wifi prefs and already selected device bwfw.device 


For lan ethernet port, please use Network prefs and the following hardware is 
*lan9514  Pi3b Pi2 no support at the moment 
*lan7515  Pi3b+ type into Device  usblan78xx.device as net0:  remove other device(s) 
*bcmgenet Pi4 Pi400 choose for Device bcmgenet.device  
 (network prefs still forgets random information when rebooted) 


Summary
*3b  ethernet not supported, usb ethernet not working but wifi prefs setup works 
*3b+ wifi working but ethernet untested 
*4   untested 
*400 wifi and ethernet untested 


There is normally no Bluetooth support for most amiga like OSs but Aros has one [https://github.com/aros-development-team/AROS/commit/6942cbfbf66426d21963a7fcd8aba6aff611a9e0 work in progress] [https://forums.raspberrypi.com/viewtopic.php?t=338466 firmware] 

*Bluetooth 4.1 BCM43430A1.hcd Pi3B, Pi3A, Zero 2W 
*Bluetooth 4.2 BCM4345C0.hcd  Pi3B+, Pi4 
*Bluetooth 5.0 BCM4345C5.hcd  Pi4B rev, CM4 and maybe Pi5 and CM5 

*bthid    keyboard mouse support 
*btserial serial 
*btpan    short range wireless connecting devices 


Only the Pi5 has a RTC real time clock, the other Pis will need to use Extras:Networking/utils/ntpsync/ or [https://archives.arosworld.org/index.php?function=browse&amp;cat=network PiNTP] to get the date and time from the internet 


It helps to have all usb devices already plugged in before power on to detect at the moment. Even then some usb devices will freeze the mouse cursor and the only resolution is to remove the offending usb device and reinsert. Sometimes, the reinsert leads to the mouse cursor vanishing, it is still there and responds to left and right clicks.  

USB classes support from Prefs/Trident is still work in process 
*usbaudio working on usb3 port (blue) on pi4, 400 but not working (no rt isochronous) on usb2otg (white or black) for pi3b, zero 2w 
*[https://aminet.net/package/mus/midi/camd camdusbmidi] detects midi devices without a preferences file (Prefs/Env-Archive/sys/midi.prefs) as [https://www.youtube.com/watch?v=RBxHkwy4Nrw auto setup now] possibly with [https://github.com/metaneutrons/mt32-pi metaneutrons mt32-pi] [https://github.com/rtzor/mt32-pi mt32-pi fork] [https://github.com/ahmadexp/mt32-pi fork] [https://github.com/gmcn42/mt32-pi-control control of] [https://github.com/dwhinham/mt32-pi mt32-pi pi3+] as well as need developer gcc tools to look at 64bit ports of [https://archives.arosworld.org/?function=showfile&amp;file=driver/audio/usbmidi.i386-aros.lha usbmidi], [https://aminet.net/package/mus/midi/CAMD_Toolkit CAMD_Toolkit], [https://aminet.net/package/mus/midi/camdtools camdtools], [https://github.com/cnvogelg/amiditools amiditools], [https://github.com/timoinutilis/midi-sequencer-amigaos horny src], [https://aminet.net/package/mus/midi/horny-base horny-base], [http://bnp.hansfaust.de/index.html BnP], [], 


Regarding 680x0 emulation, there are several options that could be considered 
*[https://github.com/aros-development-team/AROS/blob/6722a0ae9e03fe5d26e32703360bd2059e0864cc/rom/m68kemu/README.md?plain=1#L424 m68kemu.library] for some Amiga productivity where the cpu is emulated and the system calls are redirected to Aros ones
*[https://github.com/BlitterStudio/amiberry amiberry] (winuae) for everything else like games 
*[https://github.com/jonx/AROS/tree/aarch64-darwin-graft/arch/all-darwin/libs/emu68k emu68k] 
*[https://scriptedamigaemulator.net/ Scripted Amiga] with [https://github.com/naTmeg/ScriptedAmigaEmulator ScriptedAmigaEmulator] or older [https://github.com/gbraad-amiga/ScriptedAmigaEmulator2 ScriptedAmigaEmulator2] 


[https://pinout.xyz/ GPIO 40 pins] [https://learn.sparkfun.com/tutorials/raspberry-gpio/gpio-pinout pinout] 

Some exceptions:

*Physical pins 27, 28 (GPIO0, 1) are an internal I2C bus and should not be used
*The other I2C on pins 3, 5 (GPIO 2, 3) can be used generally, but be aware they have permanent pull-up resistors to 3.3V
*For MIDI use USB but there are dedicated UART pins 8, 10 (GPIO 14, 15).

With a HAT it's more awkward -- you need to know which pins are used by the HAT and avoid them. Hopefully this will be documented.

Remember all GPIOs are 3.3V (not 5V tolerant), floating/noisy inputs can cause odd behavior, and that shorting the power supplies can cause instant death of the Pi.

In the shell 

 GPIO PIN/A/N,SET/N,GET/S,MODE/K,PULL/K

Controls and queries hardware GPIO pins via gpio.resource which is stored in the rom or Devs/ '''please test''' 

*PIN   -- (Required) Target GPIO pin number (e.g. 12).
*SET   -- Set pin output value to 0 (LOW) or 1 (HIGH).
*GET   -- Read and print current digital input level (0 or 1).
*MODE  -- Configure pin mode: IN (Input), OUT (Output), ALT (Alternate).
*PULL  -- Configure pull resistor: NONE, UP, DOWN.

EXAMPLES
&lt;pre&gt;
GPIO 12 MODE OUT
GPIO 12 SET 1
GPIO 12 GET
GPIO 13 PULL UP
&lt;/pre&gt;


[https://gpiozero.readthedocs.io/en/stable/installing.html Current] [https://gpiozero.readthedocs.io/en/v1.2.0/api_boards.html old support for gpiozero is unknown at present] [https://energenie4u.co.uk/res/pdfs/ENER314%20UM.pdf and associated 433MHz equipment] [ USA X10 security and lights via USB] [ OpenHab with Shelly Smart Plug connected over Wi-Fi, controlled by MQTT or HTTP] 


Printing only with Postscript but [https://github.com/bohunamiga/MintPRINT one] of [https://github.com/boingball/MintPRINT two] [https://github.com/Andiweli/AmiAirPrint/tree/main AirPrint] IPP has been attempted with [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2061&amp;pid=13954#post_13954 discussion] 


Youtube 

[], [], [https://www.youtube.com/watch?v=X4fmWAIv7FE Aros native on Pi3b], 

[], [], [https://www.youtube.com/watch?v=TSxlYb1eQWU Installed on Pi3b+], 

[], [], [https://www.youtube.com/watch?v=NFF1H3jCoz8 testing Aros native on Pi400], 

[], [], [https://www.youtube.com/watch?v=nIVx7mh1E1Q&amp;pp=ygUHYXJvcyBwadIHCQkTDAGHKiGM7w%3D%3D Aros on Thumb 2 based 32bit-ish ARM STM32H743 board], 


[https://www.youtube.com/watch?v=zQM4CD64xDE&amp;t=612s&amp;pp=ugUEEgJlbg%3D%3D Performance under Linux] but on Aros... 

{| class=&quot;wikitable sortable&quot; width=&quot;90%&quot;
! width=&quot;10%&quot; |Pi
! width=&quot;10%&quot; |Single Core 2D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |Single Core 3D
! width=&quot;10%&quot; |SMP 2D
! width=&quot;10%&quot; |SMP 3D
! width=&quot;10%&quot; |SMP 3D 
! width=&quot;35%&quot; |Comments
|-
| &lt;!--Pi--&gt;Pi3 
| &lt;!--Single Core 2D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--Single Core 3D--&gt;
| &lt;!--SMP 2D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--SMP 3D--&gt;
| &lt;!--Comments--&gt;
|-
|}


The status of AROS native ARMv6 for 32bit RasPi was OK. System booting, USB working (although with some issues but plans to fix them). 32bit native [http://www.aros.org/nightly1.html ARMv6 32bit nightlys] raspi-armhf-system raspi-armhf-contrib unbz2'd to fat32 microSD 


===Hosted===


AArch64 CPU backend for AROS, a Cocoa/Metal display, clipboard / host-volume / CoreAudio / BSD-sockets bridges, GPU 2D via gpufx.library, a 68k→AArch64 JIT (run68k), and a full Rust std port. On [https://www.jkn.me/blog/macaros-aros-on-apple-silicon/ latest Apple Silicon] [https://github.com/jonx/Macaros early buggy alpha version of hosted Aros .dmg on MacOS12+]. Please use [https://github.com/jonx/Macaros/issues MACAros github] for issues, features etc and possibly [https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2030&amp;pid=13910#post_13910 here] 


[http://www.aros.org/snapshots1.html old linux and android hosted 32bit] 


===Good sites to visit===

*[https://github.com/raspberrypi/firmware/tree/master/ Raspberry Pi Firmware build] 
*[https://www.raspberrypi.com/documentation/computers/software-sources.html Documentation] 
*[https://rpilocator.com/ RPiLocator] 


Linux only
*[https://github.com/raspberrypi/linux Raspberry Pi Linux Build] 
*[https://www.raspberrypi.com/software/operating-systems/ PiOS Lite] and then [https://hstwb.firstrealize.com/ HST] 
*[https://dietpi.com/ DietPi] 
*[http://www.tinycorelinux.net/ports.html piCore]
*[https://wiki.alpinelinux.org/wiki/Raspberry_Pi Alpine Linux] 
*[https://github.com/armbian/build Armbian] 
*[ PiMiga] 

*[ FydeOS]
*[ TwisterOS based on ChromiumOS] 
*[https://note.com/jamesmondo/n/nc76e31402be8?hl=en BSD] 


Other alternative lighter smaller than Pi OS 
*[https://aros.sourceforge.io/nightly1.html Aros 64bit ARMV8 single core] 
*[https://www.riscosopen.org/wiki/documentation/show/Welcome%20to%20RISC%20OS%20Pi RiscOS on Pi3 and Pi4]
*[https://github.com/michalsc/Emu68 ARM based realtime JIT 68k for amiga computers] 
*[https://github.com/JJDSNT/bellatrix/releases/ Alternative use of Emu68 on Pi3b] 
*[https://github.com/stevereaver/uaos uaOS with Emu68k] 
*[https://github.com/aros-development-team/AROS/commit/f80a268607dfae81b2db94755ab4e4d31ccb72d6 m68kemu library reference] 
*[ HaikuOS]
*[https://github.com/raspberrypi/noobs NOOBS] os loader with successor [https://github.com/procount/pinn PINN] 
*[https://github.com/maxnet/berryboot berryboot]

*[https://github.com/brianwiddas/pi-baremetal Bare Metal Access on Pi 32bit] 


==== Hosted ====

=====64bit=====

[https://www.arosworld.org/infusions/forum/viewthread.php?thread_id=2019&amp;rowstart=80&amp;pid=13667#post_13667 Ubuntu Linux PC hosted Pi compiler build] 

[https://github.com/BlitterStudio/aros-compiler-docker Docker based cross compiler for various Aros systems], 


=====32bit=====

Ubuntu VM approach to compiling [http://lallafa.de/blog/2013/06/building-aros-hosted-for-raspbian/ Linux hosted AROS June 04, 2013]

 ../AROS/configure --target=linux-armhf  --enable-includes=/usr/arm-linux-gnueabihf/include --x-includes=/usr/arm-linux-gnueabihf/include --x-libraries=/usr/arm-linux-gnueabihf/lib

arm-elf- is symbol-linked to arm-linux-gnueabi- (arm-linux-gnueabi- is more correct in this case, because it's going to be compiling the ARM AROSBootstrap for ARM Linux)

*armel - many of the &quot;android&quot; machines require since the entire OS is made for soft float VFP. 
*armfp - Efika MX target, Raspberry PI, EfikaMX, Pandora and virtually everything (VFP)

Keep in mind it's possible to start hardfp AROS hosted on softfp system, though, as long as no calls between AROS and host require floating point parameters. NOTE: hardfloat objects *cannot* be linked with softfloat objects - they have a different ABI.

Just keep in mind the arm nightly build machine is quite complex beast. It needs the x86_64 host compiler to compile AROS tools. The arm version is built every night using gcc-4.6.2 crosscompiler (built together with AROS) and successfully builds armel and armhf linux hosted targets.

*needs an AROS code compiler for ARM target 
*as well as unix compiler for ARM linux host (would be best to have both softfp and armhf, we have softfp only now) with full set of libraries and includes.

with—disable-crosstools  $AROS_CC  is always a wrapper around $KERNEL_CC  ?  If  so,  this  is  wrong for some ports. This can break Darwin, Windows and Android port. 
Yes,  Android  port  will  build.  And  even  work. But it's not good because  the  port  will  not  be ABI-compatible with other ARM ports. Android's ABI is different from GNUEABI. For example:

&lt;pre&gt;
enum test {foo, bar};
enum test testvar;
&lt;/pre&gt;

sizeof(testvar)  will  be  equal  to sizeof(int) in GNUEABI (Linux and AROS)  and  sizeof(short)  on  Android. This affects linking objects from static linklibs, for example.

Previously everything worked because $AROS_CC was a wrapper on top of $HOST_CC. And a real crosscompiler was used on non-ELF hosts.

Android is the same. $KERNEL_CC is incompatible with AROS.

compiler=kernel  is  appropriate _ONLY FOR CODE WHICH RUNS ON HOST OS_ (or  barebone  hardware,  if  we  talk  about  native).  This includes bootstraps,  their  linklibs, and host-side dynamic libraries (Windows makes extensive use of them because of architectural considerations.

No single AROS object should be compiled with this setting. $KERNEL_CC is really compatible with AROS *ONLY IN LINUX-HOSTED* and no more. On other systems (Darwin, Windows,  Android) this is not true any more, and compiler=kernel is never going to work.

If  you  want  to  compile your AROS module against host OS includes, append  the  following  to  USER_INCLUDES  (or  USER_CFLAGS,  this  is effectively the same):

 -isystem $(GENINCDIR) $(KERNEL_INCLUDES)

$(KERNEL_INCLUDES) expands to:

 -isystem  &lt;your_os_includes&gt;  -isystem  &lt;host_OS_gcc_private_includes&gt;
 -nostdinc

This makes AROS compiler adhering to host OS APIs.

If you want some preprocessor symbols based on what your host OS actually is, add something like -DHOST_OS_$(AROS_HOST_ARCH).

Why is there $(GENINCDIR) at all? Because host OS has its own libc includes, which would conflict with AROS ones. And the host OS libc is not binary-compatible with AROS one.

Why doesn't Windows-hosted port use $(KERNEL_INCLUDES) ? Because WinAPI includes conflict with AROS ones in fundamental typedefs, like WORD, BYTE and BOOL. It's almost impossible to deal with this in any other way than rewriting WinAPI definitions using AROS types.

Building under centos 6.3 (i386) currently, and AROS creates the toolchain itself. haven't yet committed the necessary changes but &quot;./configure --target=raspi-armhf&quot; is enough to start, then &quot;make arosboot-raspi&quot; will generate arosraspi.img (containing the bootstrap, kernel.resource, and exec.library) as well as arosraspi.rom (containing all the other essentials components such as dos, graphics etc).  It will also copy over a config.txt file to make the raspi bootstrap code load the correct kernel, and a cmdline.txt that enables exec debug output.

*armel = typically Debian 6, Ubuntu Maverick, Android, 
*armhf = typically Debian 7, Debian 8, Ubuntu Precise,

Cross-compiling Ubuntu ARM softfp 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armel' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armel] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armel.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabi libx11-dev:armel libsdl-dev:armel
&lt;/pre&gt;

&lt;pre&gt;
 ./configure --target=linux-arm --x-includes=/usr/include \
             --enable-includes=/usr/arm-linux-gnueabi/include
&lt;/pre&gt;

Cross-compiling Ubuntu ARM hard-float 
&lt;pre&gt;
    sudo sh
    echo 'foreign-architecture armhf' &gt;&gt;/etc/dpkg/dpkg.cfg.d/multiarch
    echo 'deb [arch=armhf] http://ports.ubuntu.com/ precise main universe' &gt;/etc/apt/sources.list.d/armhf.list
    apt-get update
    apt-get install gcc-arm-linux-gnueabihf libx11-dev:armhf libsdl-dev:armhf
&lt;/pre&gt;

&lt;pre&gt;
    ./configure --target=linux-armhf --x-includes=/usr/include \
                --enable-includes=/usr/arm-linux-gnueabihf/include
&lt;/pre&gt;

Now, the AROS build is configured properly and all you need to do is:

 make


==Build==

===64bit===


===32bit===


# download/checkout the source someplace, e.g. /build/AROS-Src/
# make a directory to store external sources AROS downloads, e.g. /build/Ports
# make a build directory, e.g. /build/aros-raspi-armhf
# cd into the build dir, configure, and then run make -:

&lt;pre&gt;
&gt;cd /build/aros-raspi-armhf
&gt;/build/AROS-Src/configure --target=raspberrypi-armhf --with-serial-debug --enable-ccache --with-portssources=/build/Ports
&gt;make
&gt;make arosboot-raspi
&lt;/pre&gt;

then copy the files from /build/aros-raspi-armhf/bin/raspi-armhf/AROS/ onto an sdcard, and download/copy the Raspi firmware files onto it.

You should then be able to boot the sdcard on your RasPi.

The current W.I.P tree to svn. it can be built as follows ..
&lt;pre&gt;
./configure --target=raspi-armhf
make arosboot-raspi
&lt;/pre&gt;

That will generate arosraspi.img, arosraspi.rom and config.txt in bin/raspi-arm/AROS - so either copy just those files to a fat formatted SD card (with the firmware files on), or copy the whole contents of the AROS folder.

NB - if you have a Linux/other install, backup the existing config.txt first

arosraspi.img contains the bootstrap (which has very basic mailbox code, framebuffer/gpio init, and console &quot;emulation&quot; via code pinched from our libbootconsole), kernel.resource, and exec.library

arosraspi.rom contains all the other components needed to boot AROS.

The config.txt file will tell the RasPI bootstrap to load the arosraspi kernel and ramdisk (rom).

the bootstrap has minimal mailbox code, planning on adding either a resource or library that driver/app code will use to access it (likewise for GPIO)


Help building AROS hosted on Linux ARM

Was looking a way to use more my Handheld ARM based called Pyra (Dragonbox Pyra) an ARM (Omap5 cpu with 4GB ram) linux based machine (Debian Buster v10 with kernel 5.6.19 adapted) and have a try to compile the latest Aros sources by Deadwood directly on this device.
Compilation stops after build libpopupmenu.a and trying to build libatomic have this error:

&lt;pre&gt;
    Configuring build in bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic
    configure: WARNING: unrecognized options: --disable-nls, --without-x
    checking for --enable-version-specific-runtime-libs... no
    checking for --enable-generated-files-in-srcdir... no
    checking build system type... arm-unknown-linux-gnu
    checking host system type... arm-unknown-aros
    checking target system type... arm-unknown-aros
    checking for a BSD-compatible install... /usr/bin/install -c
    checking whether build environment is sane... yes
    checking for arm-aros-strip... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-strip
    checking for a thread-safe mkdir -p... /usr/bin/mkdir -p
    checking for gawk... no
    checking for mawk... mawk
    checking whether make sets $(MAKE)... yes
    checking whether make supports nested variables... yes
    checking for arm-aros-gcc... /media/farox/pyra2/arosbuilds/toolchain-core-armhf/arm-aros-gcc
    checking whether the C compiler works... no
    configure: error: in /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic':
    configure: error: C compiler cannot create executables
    See config.log' for more details
    make[2]: *** [mmakefile:4489: /media/farox/pyra2/arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic/.configured] Error 77
    [MMAKE] make --no-print-directory TOP=/media/farox/pyra2/arosbuilds/toolchain-core-armhf-build SRCDIR=/media/farox/pyra2/arosbuilds/AROS CURDIR=tools/crosstools/gnu TARGET=tools-crosstools-gcc-libatomic-configure -s --file=mmakefile tools-crosstools-gcc-libatomic-configure failed: 512
    [MMAKE] Error: Error while running make in tools/crosstools/gnu: No such file or directory
    make[1]: *** [Makefile:361: linklibs-libatomic] Error 10
    make: *** [Makefile:183: crosstools] Error 2
&lt;/pre&gt;


looking at config.log on arosbuilds/toolchain-core-armhf-build/bin/linux-arm/gen/host/tools/crosstools/gnu/gcc/arm-aros/libatomic

found that arosbuilds/toolchain-core-armhf/arm-aros-ld: cannot find -laeabi
so do make linklibs-aeabi-arm-quick
and the missing lib was built.

now the next stop is at
fatal error: bits/libc-header-start.h: No such file or directory
and
fatal error: sys/cdefs.h: No such file or directory
in many places so after checking that have this missing include files i have noted that my include path is a bit different, standard searching path is /usr/arm-linux-gnueabihf but in my system is /usr/include/arm-linux-gnueabihf
so if i add my path to some mmakefiles compilation goes on....but is a better way to add this path to avoid every mmakefiles to be changed?

fixed with adding
-I/usr/include/arm-linux-gnueabihf
to where is missing on mmakefiles like
USER_INCLUDES := -isystem $(GENINCDIR) -I/usr/include/arm-linux-gnueabihf $(KERNEL_INCLUDES)

P.s. I have changed many mmakefiles and have at least compiled (after many hours) the toolchain doing make every time in arosbuilds/toolchain-core-armhf-build (also have to disable making tests under cplusplus but don't remember the directory ...) but ask an help to have an automated way to correctly build without modify mmakefiles.


Last time built armhf target was around 2 years ago. At that point built is via cross-compilation from linux (ubuntu 22.04) using linux armhf crosscompiler (this can explain the path differences you are experiencing) as well as using AROS gcc cross-compiler in version 6.5.0 (build with option 21) in rebuild.sh). Since then AROS GCC has been updated to 10.5.0 and don't believe anyone tried to build the armhf target again.

My suggestion would be to downgrade GCC to 6.5.0 (via editing AROS/config/gcc_def file) and try to first build using cross-compilation from x86_64 linux. Once that works, you will have a &quot;template&quot; to compare to native compilation under arm linux.


Thanks for your suggestion...but think the toolchain with GCC 10.5.0 is compilable if i found a way to pass the path of my system to the script that build (option 21 on rebuild).
The other only changes are (but don't know where to modify...) is to add the build of libaeabi and disable the building of some tests under cplusplus that use exceptions and is not supported under ARM. try to crosscompile with my Linux amd64 PC.

For paths look into core-linux-armhf/bin/linux-armhf/gen/config/target.cfg. A number of build-wide variable is set there containing paths to local build system. These variables and the target.cfg file are generated by AROS ./configure script.

Thanks compilation now go forward...changed target.cfg under &quot;toolchain-core-armhf-build/bin/linux-arm/gen/config&quot; and do make on &quot;toolchain-core-armhf-build&quot; dir.

Need to find where to enable build libaeabi.a so can build the entire toolchain with option 21 of rebuild.sh


Found something that looks like libeabi in AROS/arm-all/arm-aeabi/mmakefile.src. Try adding a third line there:

#MM- linklibs-armhd : libklibs-aeabi-arm

Don't remember needing this library. Possibly the 6.5.0 GCC somehow does this while 10.5.0 is missing this.

Try adding this line (and the variant &quot;linklibs-armhf&quot; instead of hd) but it did not solve the automatic building of the missing lib. I must do &quot;linklibs-aeabi-arm-quick&quot;.
Anyway after have build the aeabi lib i succefully built the toolchain (after many hours...). Smile

To test I restarted from selecting option 21 (on rebuild.sh) but after many hours i get the same error of the kernel includes not found...maybe i need to modify the configure script for my case.

With the toolchain built i try to build the core-linux-armhf (DEBUG) (option 22) but after a while it stopped with
&quot;cannot find -laeabi &quot; so i made it built manually...and now i can continue compiling...i'll let you know if all goes ok.


== Hardware ==

===64bit===


====BCM2712====

With the Pi5 

Broadcom VideoCore 7 vc7 is an integrated GPU with 12 cores and up to 800 MHz clock. VideoCore VII is capable of OpenGL ES 3.1 and Vulkan 1.2. The driver support for the Raspberry Pi continues to build upon the [https://lore.kernel.org/dri-devel/20230928114532.167854-1-itoral@igalia.com/ open-source V3D driver] stack within [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450 Mesa] hopefully be merged for Mesa 23.3 

*Raspberry Pi M.2 HAT+ Expansion Board 
*Geekworm X1001 PCIe to M.2 Key-M NVMe
*Geekworm X1003 PCIe to M.2 HAT NVMe SSD PIP Board for Raspberry Pi 5 
*Pineboards Pi Hut HatDrive! M.2 HAT 2024/V4 
*Hat+ Gen2 Gen3 Nvme
*GeeekPi 52Pi N04 for Raspberry Pi 5 NVME M.2
*


*2024 RPI AI HAT    - Hailo  20TOPs  no LLMs 
*2026 RPI AI HAT+ 2 - Hailo  40TOPs  slightly better? 


[https://www.raspberrypi.com/documentation/accessories/camera.html Cameras for Pi]
*Raspberry Pi camera module, the V3 with Sony IMX708 back-illuminated CMOS 12 Megapixel sensor
*Raspberry Pi Camera Module V2 – 8MP Sony IMX219 Sensor
*Raspberry Pi camera Rev 1.3, 5MP 1080P OV5647 image/video module, 2592 x 1944 pixels


====BCM2711====

With the Pi4 an ARM a72 cpu is about x3 times the size of an a53 in the Pi3 

the 2711b line used more power when idle, compared to the 2711c 

*2018 Raspberry Pi PoE HAT Power Over Ethernet Hat - design issues 
*2020 Raspberry Pi PoE+ HAT Power Over Ethernet Hat Pi3b+ Pi4 only - better design 
*Waveshare PoE HAT (B) with cooling fan for Raspberry Pi 3B+/4B 802.3af PoE 

*[https://github.com/axizo-pi/V3DLib vc6 V3D 4.2] is derived from [https://docs.broadcom.com/doc/12358545 vc4], but it is significantly different 
The QPU pipeline stays mostly the same, you still have an add ALU and a multiply ALU and it can issue two ALU OPs per cycle. There is still 4 SIMD lanes, interleaved over 4 cycles.
The instruction encoding for the QPUs is different, but the core instructions are the same.

Instructions for packed 8 bit int math has been dropped, along with most of the pack modes.
Instructions for packed 16bit float math has been added (2 floats at in a single operation)
With vc5/vc6, you write two packed 16f value to the tilebuffer (or four writes of 32f, if you are using the rgba32f framebuffer). And there is a handy vfpack operation which allows you to pack two f32s into a single 32bit value in a single instruction. You can vfpack directly into the tile buffer register.

the multiply ALU can now fadd, so you can issue two fadds per instruction. the add ALU has gained a bunch of new instructions 

the A and B register files have been merged. You still only get an A read and a B read per instruction, but they read from one big register file (which means the underlying memory block has gone from two sets of &quot;one read port, one write port&quot; to one &quot;two read ports, one write port&quot; block)

The theoretical max FLOPs per QPU remains the same at two per cycle, other than the bump from 400mhz to 500mhx but it looks like a lot of effort has been put putting those theoretical FLOPs to better use. 
*vc4 could run one or two threads per QPU. When you ran in two thread mode, the available register file halfed to 32 registers.
*vc5 added a four thread per QPU mode, with 16 registers per thread.
*vc6 doubled the size of the register file. You could now use all 64 threads in two thread mode and 32 registers in for thread mode. Single thread mode was removed, you always have at least two threads.

With the threading improvements, the QPUs should spent much less time idle waiting NOPs for memory requests. Most of the design changes have gone to improving the fixed function hardware around the QPUs. A fixed function blend unit has been added, which should reduce load on the QPUs when doing alpha blending. hope software blending is still possible 

The tile buffer can now store upto 4 render targets (up to 128bits per pixel, so if you are using 4 32bit render targets, you can't have a depth buffer)

A MMU, allowing a much simpler/faster kernel driver.

Many more texture formats, framebuffer formats.

All the features needed for opengl es 3.0 

H.265 / HEVC decoder is a HEVCv2 Main 4:4:4 10 design supporting bitstreams up to profile 5.1
HEVC hardware decode supports 4kp60, 10-bit. Audio output is pretty much unchanged, but the HDMI audio channels now support 8x192kHz bitrates 

Each ALU typically have 2 floating point operators, and as you pointed out in a earlier post videocore 6 is no exception, with both a multiply and additive floating point operator. Thus theoretical GFLOPs are calculated with both operators in mind. That is what the 2 in my formula represents, and is common across any modern programmable shader, whether you calculate Nvidia, AMD, Intel, Boardcom or any other company's GPUs. Total ALUs * 2 * GHz clock = GFLOPs, In the case of Raspberry Pi 3, it's 24 ALUs * 2 operators * 0.4GHz = 19.2GFLOPs
If the Videocore 6 does indeed only have 16 ALUs (16 * 2 * 0.5GHz), you'd have only 16GFLOPs but they are better utilised 

Possible maximum performance 
&lt;pre&gt;
VideoCore IV @ 250MHz: 250 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 24 Gflop/s
VideoCore IV @ 300MHz: 300 [MHz] x 3 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 28.8 Gflop/s
VideoCore VI @ 500MHz: 500 [MHz] x 2 [slice] x 4 [qpu/slice] x 4 [processor] x 2 [op/clock] = 32 Gflop/s
&lt;/pre&gt;

Faster LPDDR4 memory.


====BCM2837==== 

With the Pi3 
* Broadcom BCM43438 chip provides 2.4&amp;nbsp;GHz 802.11n wireless LAN, Bluetooth Low Energy, and Bluetooth 4.1 Classic radio support, 3B+ [https://github.com/aros-development-team/AROS/commit/afa5bc0bb17d5dd06bcfdbac00853a3799ca8d76 LAN7515] 

The overclock ability has diminished with each chip version as the energy usage has increased. BCM2837 is one of the warmest yet and benefits from active fan cooling if all four cpu cores are in use for a short while. Video playback is not affected due to the custom support in the GPU. 5 V / 2.4 or 2.5 amp power supply recommended if all four cpu cores are running, else throttling (cpu slowdown) might occur. 

Dual VDP and scalable QPU in VC4 


ARMv8-A has [https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels privilege levels] where userspace typically runs at ‘EL0’, the kernel at ‘EL1’ or ‘EL2’ and the firmware at the highest level ‘EL3’. 


===32bit===

=== Core Kernel ===


====BCM2708(family)====
which includes the [http://elinux.org/RPi_Hardware BCM2835] (ARM1176JZF-S 700&amp;nbsp;MHz CPU + VideoCore IV GPU + up to 1GB RAM)

*Framebuffer (fb) using mailbox 
*IRQ scheduler, etc 
*Arasan based SD Card controller 
*Synopsis DesignWare USB 2.0 OTG controller [http://networkdirection.net/index.php?option=com_content&amp;view=article&amp;id=106:rasperry-pi-usb-controller&amp;catid=45:raspberry-pi&amp;Itemid=54 Unofficial DOCS pdf],  [dwc_otg.c FreeBSD], [], [https://www.riscosopen.org/viewer/view/mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver/ RiscOS USB Driver], [https://www.riscosopen.org/forum/forums/5/topics/878 RiscOS USB Discussion], [https://www.riscosopen.org/forum/forums/11/topics/1893 Other USB RiscOS], [http://plan9.bell-labs.com/plan9/index.html Plan9 Miller's usb] http://plan9.bell-labs.com/sources/contrib/miller/, [https://github.com/Chadderz121/csud CSUD driver], 
*[http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf SMSC 9512] USB LAN/Hub chip 
*CMOS RAM 
*VCHIQ port which sends messages to the GPU e.g. for mouse, keyboard, audio on HDMI, etc 
*Audio Driver 
*Serial Peripheral Interface Bus (SPI) 
*[http://www.susa.net/wordpress/2012/06/raspberry-pi-pcf8563-real-time-clock-rtc/ I2C registers]
*I2S 
*Universal Asynchronous Receiver Transmitter (UART) 
*[http://elinux.org/RPi_BCM2835_GPIOs GPIOs] and [http://www.adafruit.com/blog/2012/08/17/broadcom-bcm2835-peripheral-memory-map-and-gpio-alternate-use-chart-piday-raspberrypi-raspberry_pi/ Alternative view of GPIO]

BCM2836 
* For Pi B+, PI 2 and Pi 3 SMSC LAN9514 chip adding 10/100 Ethernet connectivity and four USB channels to the board

*[http://www.andrewscheller.co.uk/rpi_pcb_modules.html PCB], [http://elinux.org/RPi_Low-level_peripherals Low level features],


 Implemented so far... 

# Modify the configure system so that it correctly builds for the arm hardware float raspi target.
# Implemented the bootstrap to load the aros modules and prepare the arm to jump into them. Reworked the x86 console support so that parts can be stolen for raspi to use since t has no basic functionality to output to the display.
# Implemented a kernel.resource to prepare the raspi for running aros and provide the low level api calls to expose available resources and allow exec, etc function.
# Implemented serial debug support
# Implemented the exec (and kernel) functionality required to make multitasking work (and interrupts, exceptions, syscalls, etc)
# Implemented a timer.device to utilise the hardware timers.
# Implemented a very basic gfx driver to expose the hardware's framebuffer.
# Implemented an SD-Card driver for AROS which presently only supports the raspi's chipset but can easily be modified to support all sd-card hardware and media.
# Fixed the fat filesystem support in AROS so that it can boot on RasPi's normal SD-Card setup. The &quot;rom&quot; image files needed use a different filename than the default linux, etc images so can be easily installed without harming the existing files - you only need to change the loaded images in the config file to get aros to boot.
# Updated the build scripts to automatically download the necessary raspi firmware files and wrap it all up so that you can simply extract the archive to a fat formatted sdcard and boot it on the raspi without having to get anything else.
# fix everything in contrib and ports to build for raspi (needs proper testing/fixes but allows every component to actually compile at least, including owb) + numerous other fixes to get things working on arm/raspi ..


Improvements...

# Implement a USB chipset driver &quot;OR&quot; finish the existing one [https://github.com/aros-development-team/AROS/commit/c07d13c724f944674be5db54fc6a71ee72a01809 usb otg] - the current code is mostly a skeleton that should initialise the chipset and then needs relevant code to support the different transfer types. It also has the &quot;virtual&quot; hub code in place to represent the raspi's USB port (from poseidons p.o.v) 
# Implement a driver for the USB NIC (a few weeks - depends on USB above) 
# Write an [https://github.com/aros-development-team/AROS/commit/d55d0f74d20b769bbb8c8d386e5c1d7a9154f05a audio driver] (a few weeks - independent of USB) and [https://github.com/aros-development-team/AROS/commit/e93a4c245f27a87c9c4c1d39206694b39059998a HDMI]
# fix syscall bug in the current raspi kernel code
# Graphics depend on having a decent &quot;bcmdma.resource&quot; implemented as to use the cpu's dma engine. The sd card driver needs to use it for transfers to/from the controller - and the gfx system needs to use it for &quot;blitting&quot;. 
# [https://github.com/aros-development-team/AROS/commit/4019d84e4975d4dad987a12d57fe108f5ac048e6 Improve the gfx driver], [ vc4gfx HIDD] add [http://dri.freedesktop.org/wiki/VC4/ Gallium3D support] 
# [https://github.com/aros-development-team/AROS/commit/b13905b3e8e45b089f520b44692c81affddd066f Improve] the [https://github.com/aros-development-team/AROS/commit/3a876755c070f5c73c4f53c7f4d35b4f923088b9 sdcard] device driver  - which is also pretty basic but should work with most cards, rework it to also support pci, etc. sd card interfaces on x86 
# The current code using very rudimentary access to the gpio interface - so that should be implemented as some resource for other components to access, as-well as the i2c interface exposed over the gpio interface. that should have a hidd class implemented which uses the gpio resource to communicate.


 Boot up typical for most other OSs before the open sourcing of many binary blobs from 2017 onwards 

On power-up, the rpi [http://www.open.com.au/mikem/bcm2835/ BCM 2835] [https://github.com/hermanhermitage/videocoreiv VideoCore4] GPU, not the ARM CPU, is in control, and the SD card slot is the only peripheral device with power. The firmware burned into the BCM2835's VideoCoreIV GPU PROM requires a DOS-style partition table; a FAT-formatted first partition; and the freely redistributable but closed sourced Broadcom files “bootcode.bin” and “start.elf” in that partition.

The boot sequence carries out several pre-boot tasks

*On powering of the rpi, the GPU reads and executes bootcode.bin, which then loads start.elf 
*The GPU loads the “start.elf” file, eventually, into the L2 cache and then executes it
*configures the memory split for the CPU and GPU
*reads and parses “config.txt” from the same partition on the SD card and applies the settings (like a PC’s BIOS settings)
*loads the “kernel.img” file, again from the same partition
*activates the CPU to begin executing the loaded kernel image

The CPU/GPU memory split is hard-coded into start.elf, so Broadcom provides three start.elf images, to give 32M, 64M, or 128M to the GPU for multimedia performance, and the remainder to the CPU.

RPi uses [https://github.com/raspberrypi/firmware some closed source loaders] and at some point it loads a binary blob named &quot;kernel.img&quot; at 0x8000, at that point there would be a rudimentary Aros alive. If one wants to use the SD-card then there would have to be a driver for the interface and a fat filesystem handler (SD-card has to be formatted to fat filesystem)

Boot code and kernel are now linked together and made into that binary blob, just for starters. Raspberry Pi uses [http://kernelnomicon.org/?p=133 u-boot] and [http://kernelnomicon.org/?p=138 UBoot] as bootloader, there's already some code in the Efika MX port for that. UBoot is a native bootloader and not just for the raspberry pi, it loads after start.elf.

You can find Efika MX port from arch implementations, some hacking is needed for the mmakefile.src'es as iit dates back to before the Aros crosstool era or else you get some weird errors while building. You also need to code the bootstrap and serial handling.

At the moment it seems that a fastest route for the native build would be to make one binary blob without using the package system. Raspberry's memory layout is pretty simple and if the implemented u-boot doesn't support loading other modules 

&lt;pre&gt;
?          - alias for 'help'
mtest      - simple RAM test
autoscr    - run script from memory
base       - print or set address offset
bbm        - BBM sub-system
bdinfo     - print Board Info structure
boot       - boot default, i.e., run 'bootcmd'
bootd      - boot default, i.e., run 'bootcmd'
bootm      - boot application image from memory
bootp      - boot image via network using BootP/TFTP protocol
cmp        - memory compare
coninfo    - print console devices and information
cp         - memory copy
crc32      - checksum calculation
echo       - echo args to console
fatinfo    - print information about filesystem
fatload    - load binary file from a dos filesystem
fatls      - list files in a directory (default /)
go         - start application at address 'addr'
help       - print online help
iminfo     - print header information for application image
itest      - return true/false on integer compare
jade       -
loadb      - load binary file over serial line (kermit mode)
loads      - load S-Record file over serial line
loady      - load binary file over serial line (ymodem mode)
loop       - infinite loop on address range
md         - memory display
mm         - memory modify (auto-incrementing)
mtest      - simple RAM test
mw         - memory write (fill)
nfs        - boot image via network using NFS protocol
nm         - memory modify (constant address)
pci        - list and access PCI Configuration Space
ping       - send ICMP ECHO_REQUEST to network host
printenv   - print environment variables
rarpboot   - boot image via network using RARP/TFTP protocol
reset      - Perform RESET of the CPU
run        - run commands in an environment variable
saveenv    - save environment variables to persistent storage
saves      - save S-Record file over serial line
setenv     - set environment variables
sleep      - delay execution for some time
tftpboot   - boot image via network using TFTP protocol
USB        - USB sub-system
usbboot    - boot from USB device
version    - print monitor version
&lt;/pre&gt;


And there is one more thing about modular ports. In order to actually implement this, your bootstrapping environment should provide the ability to load several files. On PC this is provided by GRUB2. on CHRP you can read filesystem via OpenFirmware, and Sam's Parthenope relies on modified u-boot. If your bootstrap allows to load only a single file, then you stuck with monolithic kickstart. By the way...  u-boot allows not only to boot up a single uImage or zImage, it also allows to write client programs AFAIK. With this approach, you actually can write modular bootstrap for ARM AROS using unmodified u-boot.

Most used [http://www.compulab.co.il/workspace/mediawiki/index.php5/U-Boot_quick_reference uboot options] are fatls usb 0:1,

the reason behind INTB_KERNEL is to allow use of the standard Exec function AddIntServer() to add interrupt handlers for
hardware drivers etc. AmigaOS never used it for abstract hardware drivers. AmigaOS  routed  only  raw  hardware IRQs there. Their assignment was hardcoded. As well as number of them. Actually on AmigaOS every bus has its own interrupt subsystem. For example PCI bus. PCI interrupts on Amiga are routed to a single exec interrupt.  1:1 relationship between CPU  and hardware interrupts is present only on PC.

IMHO we miss things like AddInterrupt/RemInterrupt methods on our PCI subsystem's device class.  PCI bus class should map these methods to whatever is appropriate. This is how it is done on AmigaOS and friends. When these are implemented, raw kernel.resource API will be needed only for several PC-specific drivers with hardwired resources. Exec IRQs are real IRQs only on Amiga hardware. On other machines they can be emulated where appropriate (VBlank is a good example). kernel.resource is meant  to be different, its IRQs are hardware-agnostic, they are plain &quot;Hardware IRQ number X, whatever this means&quot;. They are low-level actually, and meaningful only in the context of a particular system.

Was that not the transition from irq.hidd to kernel.resource? No.  A long time ago there was another hacky bit named INTB_TIMERTICK. It was &quot;abstract timer interrupt&quot;, used by timer.device. It was the same as VBlank, but with larger frequency. I removed it, because kernel.resource API was a cleaner way to access this interrupt. Furthermore, there can be more than one timer in the system. Thinking about bringing back timer HIDD definitions again. hpet.resource is a bad idea.

Can someone please enlighten me a little on how the scheduler is meant to work?
 
Poseidon.library creates its &quot;Poseidon Event Task&quot; during RTF_COLDSTART -&gt; then calls Wait(), and ends up in limbo because wait disables interrupts (used for the scheduler heartbeat), and basically waits forever because the sigbit is never set, since krnSwitch doesn't switch the task unless TF_SWITCH is set, and no codepath run during this seems to set it?? TF_SWITCH does not disable/enable switching. This flag just enables to run user-supplied hook when the task is being switched away. It is completely safe to call Wait() in Disable()d state. Doing this actually temporarily breaks this state. IDNestCnt gets remembered in struct Task, then next task is selected, and its IDNestCnt is restored in sysbase (see kernel_scheduler.c). If there are no other tasks, then your cpu_Dispatch() should enable interrupts on the CPU and enter idle mode. See x86 implementation for good example.

You miss what happens next...
 1. KrnSwitch() saves context of your task, saves IDNestCnt (core_Switch() and cpu_Switch()), then drops into cpu_Dispatch().
 2. cpu_Dispatch() calls core_Dispatch. Then two cases are possible:
 2a. There is a READY task. It is picked up, its IDNestCnt is restored in SysBase, then cpu_Dispatch() needs to restore registers and exit. The next task is run.
 2b. There are no READY tasks. core_Dispatch() returns NULL. In this case your cpu_Dispatch() should enter idle loop. It should just enable interrupts on the CPU and put it on halt. This allows it to process hardware interrupts. Eventually some of your interrupt handlers wakes up your task and puts it into READY list.

My heartbeat interrupt has been slowed atm to help debugging - but it never actually gets a chance to fire because of the Wait() disabling interrupts. Perhaps you have forgotten to enable interrupts in your idle loop.

There is a change in the format of AROS executables. Until now we were using Elf RELocable files which are usually used as intermediate object files. We had them for various reasons, one of them was how AROS files were built in the past. That days we had no real aros cross compiler and the option to embed relocation data in unix executables (or in executable files in general) was rather new and not every linux/unix system had it. Therefore we have decided to use intermediate files. Although it was somehow working (and it is still working :-)), it has some drawbacks. Therefore decided to introduce real Elf EXEC types, in first turn implemented on ARM target with option to expand in future to all other AROS architectures.

The first patch was pretty easy and appeared to work somehow. It generated nice executables with embedded relocation info. Not only that, it also removed all global symbols adjusting relocation data to be relative to the beginning of the sections. That move reduced number of symbols in each executable significantly (depending on the file between 20 and 80% of all symbols could be removed). The only symbols that stayed in the file are local ones - due to the nature of the patch wasn't able to remove them since we have not seen them in the symbol hash table.

The patch didn't worked though. The files were relocated, AROS kernel loaded, but it crashed very early. What happened? Well, the nature of ARM relocations happened :)

Most of the relocation data on all machines is rather simple. Relocation can be absolute or pc-relative, sometimes the offset has to be bit shifted. On ARM v7 there is another one. There, when one wants to load an address of function/variable into register a combination of two instructions can be used: movw and movt. The first one loads immediate into lower 16 bits of a register while clearing upper 16 bits. The second one loads immediate into upper 16 bits without touching lower halfword. Loading of a pointer into a register looks like this:

        movw r0, #:lower16:label

        movt   r0, #:upper16:label

In this case there are two relocations - one for lower halfword and another for upper. If an overflow of lower 16 bits occurs during relocation process, the upper one should be updated as well. Unfortunately with current patch and with typical ARM executables there is not enough information to perform the calculations.

There are two options - the first one would be to give up and go back to &quot;fake&quot; executables, another one would be to change from REL to RELA relocation info. The latter contains an addend, extra data which can be used to perform all the relocation calculations I need.

Decided for the second option. The patch is already in the works. There is another function for the binutils' bfd backend to perform the final relocation. There can decide what to do with every reloc info, modify data and eventually strip some symbols. An advantage is - at this stage of the linking process have also full access to all local symbols so can change all relocations section relative and eventually strip all symbols from the files. 


 GPU 

VCore developed by Alphamosaic Ltd and now owned by Broadcom. Most of start.elf runs on the GPU.   Placing ALL the userland GPU code in the videocore.hidd isn't going to be a terribly big problem because the code they published is nothing more than a shim that sends data straight to the GPU to execute.

The good news about this is that we only need to write our HIDD using the OpenVG API.   The shim is relatively small codewise and lives in the ARM memory (the actual OpenVG code itself lives in the GPU RAM area and its loaded from start.elf).   That's also the bad news.  Our driver has to translate AROS video calls to OpenVG calls, for most tasks it should be easy, for some, not so much.  It's still probably less difficult and less work, than controlling the GPU directly.

The other good news is that anything done through OpenVG happens on the GPU, its truly accelerated.   It also has some nice font functions, meaning we can lead into an accelerated text mode later.

Basically, AROS resets or locks up when it tries to use AROS_ATOMIC_INC or DEC.  If I comment out the byte/word operations in the header files and use non-atomic operations, the code works as expected.
 
have read that the L1 cache needs to be enabled to use LDREX and co (which I also read is only meant to be used on multi processor systems with shared memory) - however I am certain this is correctly enabled.

If you are using LREX or STREX, you should have L1 cache enabled, at least on the ARM CPU I work with at work.

L1 cache is enabled by enabling the MMU *AND* setting the C and I bits in the CPU - the C bit is ignored, and the I bit only covers the 16 byte instruction pipeline if the MMU is not enabled.

Can you verify that your assembly is generating LDREX/STREX? From the behavior, it almost sounds like its generating the default Semaphore locked atomics.
 Impossible. There are no semaphore-locked atomics. There are Disable()/Enable()-based ones instead. And there's a special #define AROS_NO_ATOMIC_OPERATIONS in this case, which tweaks Disable()/Enable() implementations not to recurse forever.
 I have tested this on ARMv5 which does not have ldrex/strex, it works fine. On those ARMs there's no way to have real atomics. On other OSes (like Linux) this is done by introducing things like atomic_t, which appears to be a complex structure, holding the value together with accompanying spinlock (implemented using swp).

    #warning &quot;TODO: lookup optimal mmu table settings for raspi memory&quot;
        /* Set up an identity-mapping for all 4GB */
        for(x = 0; x &lt; 4096; x ++)
        {
            pagetable[x] = x&lt;&lt;20 | (0x40002|0x80000|0x010000|0x00C00|0x04);
        }

Shouldn't there be a second loop that sets the 'C' bit in the descriptor for the RAM pages?

Currently, you have TEX=0, C=0, B=1 for all pages (Shared Device).

You should have TEX=0, C=1, B=0 for RAM (Write-Through, Cached)

    So ..
     
     pagetable[x] = x&lt;&lt;20 | 2;

     
    should be enough?

No, for RAM you need to change the '| 0x40' to '| 0x80'

tell dosboot the correct defaults to use

Please don't do this. This bootconfig.c is a deprecated legacy thing. I wanted it to go away completely with time. Instead,  display  drivers  should auto-install themselves during own initialization phase. I. e. detect hardware=&gt;instantiate itself. This   should   make  things way simpler. With this approach you only need  to add the driver into KS image to get the device autobooted. No hardcoded stuff. 
Currently  VESA  and  VGA drivers do this, look there for examples. never rewrote ATI driver because i don't have any test system for it.

they defined a smaller AROSCPUContext than the ExceptionContext - yet reference it as ExceptionContext in other places, and since it hasn't allocated enough storage for ExceptionContext, are corrupting memory/the structure (since the elements that are there don't map 1 to 1 with the exception context).

AFAIK, AROS has been moving in a different direction to this in recent years. It is the job of graphics HIDDs to allocate bitmaps etc. so that they have the most suitable characteristics, including allocating them from GPU RAM where possible. The concept of chip RAM is only for legacy code, and most if not all non-68k platforms should have all system RAM
marked as chip.

BTW, is the video processing code you mention CPU code or GPU code?

Also, IIRC we have support for &quot;external memory allocators&quot;. Perhaps that's what we need for the allocation of GPU RAM through the mailbox.

All hosted and x86 native ports should use proper context formats.

trying to clarify if the vblank handler has to have run by this point to prevent this deadlock. Actually, no. Unless you have installed VBlank handler which should wake up at some point. Without VBlank there will be no quantum count. Consequently, there will be no forced preemption. But the rest will work, and multitasking will be cooperative (switch happens only when current task voluntarily gives up the CPU). Does it depend on the vblank having run before this point? and if yes what does that mean on systems where it might be able to run enough code (e.g. get to this point) before the vblank interrupt has triggered? What is it waiting for? It could wait for timer, in this case you need timer.device working. VBlank is currently needed for exec's quantum counter. In current native ports we have only a single timer, which is served by timer.device. VBlank is simulated by timer.device also. If your machine has two timers, then you can use one of them for VBlank, and another for timer.device, this will simplify things down. VBlank needs to be 50 Hz for historical reasons, many programs use it as cheap timer. I am periodically thinking about making some abstract mechanism to be able to change quantum source (and untie it from 50 Hz), but have no time to come up with something good. Additionally i started disliking timer.device hardcoded design when PC has got many timers (old 8253, APIC, HPET).
Currently i think there should be some low-level entity representing tick source. timer.device should just select the most appropriate source for its units.
The BCM2835 has 4 GPU based timer sources - 2 are used by the GPU, so im using Timer3 for our heartbeat and the remaining one will be free to the system. There is also the less capable ARM timer but that is dependent on the CPU frequency. Very good. You won't need any emulation. Set the heartbeat to 50 Hz and drive VBlank from it. Use other timer for MicroHZ.

Can you use the 'econsole.hook' I make for debugging the Sam460 via the serial port?
It provides a before-anything-else shell prompt on the serial port.  You can then do 'NewCLI' to test your graphics, or use any DOS command in shellcommands.resource.

You should just be able to add econsole.hook to your module list, and use 'econsole' in your bootargs.

So long as you have a working Exec/RawMayGetChar and Exec/RawPutChar, it should work.

Also make sure to add shell.resource and shellcommands.resource for this.

That should have done it.

If you set &quot;#define DEBUG 1&quot; in  arch/all-native/econsole/econsole.c, do you get any additional serial output?

have added it to the build and added econsole to the command line - and can see the bootloader picks up on the emergency bootconsole tag, but I still only get the insert bootable media display?

Im assuming it exposes a fake filesystem that tricks aros into booting?
The contents of which are: ECON:AROS.boot

Way to handle the scheduling code? The implementations I had been following were causing problems, due to cascading interrupts which I cant handle properly in the asm stubs just now (when they break disable etc.) - since it means detecting the interrupted codes cpu mode and getting the correct sp/lr for it, and that's just too tedious for arm.
 
To work around this ive added a system idle task which does nothing - and when the scheduling code has no task to run switches this in and lets it run, thereby allowing the interrupts etc to resume until something does need to happen.
 
Also, by adding accounting code to cpu_Switch() and cpu_Dispatch(), it should allow the system to log idle time correctly (as well as running tasks).
 
have thought of also adding an additional task that never runs, solely to record time spent in IRQ handlers, but I digress..

was under the impression that kernel.resource should *never* be used outside of exec.library. This is a wrong impression.
Michal started designing it because portable nature of AROS does not fit well into exec's API with all its assumptions. So, he started the new, hardware-agnostic kernel API from scratch. Yes, exec sits on top of it in places. But kernel always meant to be open thing. Otherwise it would not exist. 
it wasn't meant to be just used willy nilly by user code - but by lower system components (e.g. exec) so that they could be implemented in a more generic fashion, and the kernel resource itself hide the systems quirks.

Adding new things there perfectly keeps up with our decision to minimize AROS-specific intervention into APIs which can clash with MorphOS or Amiga OS4 extensions. We want at least source-level compatibility there. Binary compatibility on PPC would be extremely cool, but at the other hand we have no maintainer for this, as well as their ABIs splintering. 
It depends on what exactly is being implemented - there's no reason we should have everything crammed into kernel.resource if it doesn't need to be (i.e. if its better suited as a separate component/subsystem in its own right)

The _LE versions are for when you have endian swapping taking place.  If the graphics are the same endian as the CPU, no swapping should occur.  I ran into a similar terminology problem in SDL with a friend insisting that his Radeon 7000 on his PC was big-endian.  It is not, it just uses the same endianness for the graphics card and the CPU so no swapping was necessary.  They were both little-endian.
The _LE versions are because the PixFmts refer to the bitmap data being in big endian format in memory, for which the normal version would need to do endianness conversion before applying the shifts/masks. on this platform it is in _LE in memory also so we don't need the conversion hence using the _LE version of the call). would use _LE (if it's really little endian 16 bit mode).

 
What is the bare minimum needed to implement a framebuffer based gfx driver, with our software handling the rest?

Have tried with just a gfx class that only expose new/dispose/newbitmap - and having an onscreenbitmap used only for the framebuffer itself (with all other bitmaps being chunkybm, and the framebuffer's superclass also being chunkybm), but that alone isn't enough it seems?
You can use workbench/hidds/sm502/ as your example - it is as simple as I could make it.
So, AROS creates the framebuffer bitmap (verified this) -&gt; so surely it should be capable of then rendeing into it? I don't actually create the framebuffer &quot;bitmap object&quot; myself - only as a result of being asked to. The code I currently have on SVN seems to create the framebuffers bitmap object fine, but then crashes in intuitions DisplayDriver callback.  In particular it crashes performing the getattr on the system default pointer. don't expose MEMF_CHIP in an allocatable form so AllocSpriteData was failing (and other code later doesn't check if the values are valid == illegal memory accesses) 

So far have -:

vc_init: queries the gpus memory, and sets up a fake memory handler for it, then adds the bootmode driver and returns saying all is well
vc_gfxhidd:New: sets up some fake syncmodes to test with and creates the real gfx object.
vc_gfxhidd:NewBitmap: checks if its a framebuffer and uses the onbitmap class or uses the chunkybm class otherwise
vc_onbitmap:New; creates a chunkybm object and then pushes the real framebuffer address into it as the buffer,

vc4 had v8adds, v8subs, v8muld, v8min and v8max which operated on four 8bit uint values packed into a 32bit register. Multiplication was in the range 0.0 to 1.0 and addition/subtraction saturated. There were also a range unpacking/packing modes that allowed you to pack and unpack 8bit values into 32bit registers. 

RasPi has to speak to the &quot;operating system&quot; which runs on the GPU itself and request/free memory - it cant directly manage it itself, and so the managed functions were used to wrap these calls.

The Arm and GPU share memory space. The framebuffer is shared. The Arm can write a pixel and it will appear on the screen (through GPU hardware) without flushing/copying being required.

The GPU can composite multiple FB's in real time - so you have a number of surfaces defined which are rotated etc and  composited in real time to the output. Copying can map from the address space of the Arm to the flat space of the GPU which takes some code, but I don't think whole buffers are copied.

The DMA hardware can also access the whole memory space and can perform 2D fills and blits (no blending). This is documented in the peripheral spec posted. The DMA is just an Arm accessible peripheral and can be set up with low latency (e.g. microseconds).
must use a 0xc0000000-based bus address to access SDRAM, yet non-DMA access should go via a 0x0-based bus address. 
For 2D dma, set TDMODE, and the spec says &quot;interpret the TXFR_LEN register as YLENGTH number of transfers each of XLENGTH, and add the strides to the address after each transfer.&quot; so set STRIDE to pitch of the image, the width is XLENGTH and height is YLENGTH. You would fill by not setting the SRC_INC and point source to your fill data.

The DMA cannot see the ARM's L1 cache, so you would map the framebuffer with ioremap_nocache. Depending on where the source data comes from, it may need an L1 cache flush. The DMA can see the L2 cache. Use 0xC0000000 bus addresses when L2 is disabled and 0x40000000 bus addresses when L2 is enabled. (actually just call virt_to_bus and you'll get the right address out).

openGLES/openVG has high latency. Writing to framebuffer then reading it back is very inefficient (e.g. milliseconds). If you can drive it a unidirectional way, just streaming commands at then that is efficient. openVG is not implemented on top of openGLES - it uses the same hardware but as a first class interface

To improve the Gfx driver, we will need a DMA resource implemented so can use to perform DMA operations. The Gfx driver will need this to perform blits.


Actually MEMF_CHIP has to present, for historical reasons.
This has been never fully agreed upon, but in ports i wrote i exposed the whole memory as MEMF_CHIP. The idea behind this is that CHIP is originally the memory where graphics and sound data can be put. On non-Amiga platforms there are no restrictions on this, so the whole memory is CHIP.
Yes, many old software can misbehave with CHIP memory size larger than 2MB. But this actually applies only to m68k AROS which is going to run m68k binaries. In other cases it's quite logical to fix the program when porting.

As to original question: yes, it's enough to have a framebuffer bitmap (one with aoHidd_BitMap_FrameBuffer set to TRUE) and PutPixel routine. It framebuffer can be served by chunky bitmap class, then you can simply create chunky bitmap with your own buffer (see how VESA driver does this). Chunky PutPixel is already there.

struggling to determine what is the correct pixfmt to use for the 24/16/15 bit gfx modes on the RasPi.  AFAIK it uses RGB565, for 16bit but im unsure what shifts etc should go with it? suffice to say Im getting the wrong colors so far lol.

&lt;pre&gt;
redmask: 0x0000F800
greenmask: 0x000007E0
bluemask: 0x0000001F
alphamask: 0

redshift: 16
greenshift: 21
blueshift: 27
alphashift: 0
&lt;/pre&gt;

It should likely be vHidd_StdPixFmt_RGB16_LE

This stuff is a bit confusing.  The &quot;names&quot; of the stdpixfmts are based on the layout in memory,
ignoring endianess. So for example:

ARGB32: will be 0xAA 0xRR 0xGG 0xBB in memory on both big endian and little endian machines.

The shifts and masks OTOH are based on pixel access (ULONG in this case), so differ depending
on whether you run on big endian machine or little endian machine (that's why there's stdpixfmt_le.h and
stdpixfmt_be.h in rom/hidds/graphics/).

With the 16 bit pixel format it's even more confusing, as for example it's impossible on little endian machine
to describe RGB16 with shifts/masks alone. That's why there's vHidd_PixFmt_SwapPixelBytes_Flag.
(RGB16 == RRRRRGGG GGGBBBBB in memory, and for pixel (WORD) access on little endian machine it needs to
be accessed as GGGBBBBBRRRRRGGGG).

The shifts btw indicate how much to shift the component to the left (!) so that it is moved to the highest bit (31).

The aHidd_PixFmt_StdPixFmt you specify will be ignored most of the time, because when the pixelfmt is registered,
the gfx hidd checks if there's an identical pixfmt (shifts/masks/etc., but ignoring pixfmt-&gt;stdpixfmt) already in the system,
and if so, it uses the already existing one and does not create a new one.

In theory it would be better if gfx drivers could simply/only specify a StdPixFmt without all the shifts/masks stuff when the
gfx driver uses pixfmt which matches one of the stdpixfmts exactly. Another possibility would be for gfx drivers to use
HIDD_Gfx_GetPIxFmt(stdpixfmt_gfx_driver_wants_to_use) and then peek shifts/masks from it and fill out a pixfmt
tag list based on that.
15bit very blue/green: Try to pass same shifts/masks/etc. as in 16 bit pixfmt (maybe you think it's using 15 bit R5G5B5
(or swapped) but it's actually still using 16 bit R5G6B5 (or swapped).
 aHidd_PixFmt_StdPixFmt you pass is mostly ignored. It's the shift/masks/etc. that count.
But I would still pass the correct one (_LE) == whatever rom/hidds/graphics/stdpixfmts_??.h uses
in the entry where you have looked up shifts/masks/etc.

Use the shifts/masks/etc. from the entry in stdpixfmt_le.h (if you are running on little endian machine) or stdpixfmt_be.h (if you
are running on little endian machine) that matches the pixfmt that its meant to be.

0xAA,0xRR,0xGG,0xBB on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on little endian (-&gt;entry in stdpixfmt_le.h which says vHidd_StdPixFmt_BGRA32)

0xAA,0xRR,0xGG,0xBB on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_ARGB32)
0xBB,0xGG,0xRR,0xAA on big endian (-&gt;entry in stdpixfmt_be.h which says vHidd_StdPixFmt_BGRA32)

it feels like AROS trashes the alpha component, otherwise it should be 8A8R8G8B.

read on the subject suggest its in 1x5r5g5b (x is ignored) to keep 16bit alignment .
 
Suggests to me that wrong shift/mask are being applied - however going by the 16bit versions it all looks correct to me so I am really confused as to what is happening.

The output image looks to have too much green/blue, and very weak red.


 Kickstart 

The  idea  is  to minimize amount of archirecture-specific modules to make the user's  life  easier.  So,  the kickstart was split into 'base' (which  does  not  contain anything machine-specific) and 'BSP' (Board Support Package) which contains all hardware-specific stuff. This  way,  for  example, distribution makers can save up space on CD and  make  CDs with multiple platform support. Different configuration would load the same base with different BSP's.

Next  there  was some part which is entirely missing on hosted. These are   filesystems.  Hosted  ports  do  not need them to boot up, so on hosted   they  are  left  out.  At  the  other  hand,  they  are  also architecture-agnostic.  So  i put them into 'FS' package (standing for 'filesystem').


 USB 

Poseidon  is  one  more  big part. I made it into separate package in order to allow users to omit it if they don't need it (for example, to run  on retro PCs without USB). Personally i have one. Again, Poseidon is  hardware-agnostic (well, there are USB drivers but HCIs are pretty standard).

AFAIK its HCI 1.0 compliant but not familiar enough with poseidons drivers, nor USB, to just hack away at the existing code.  Perhaps once i'm more familiar with the workings I can merge in the changes needed to get it operating but for now I will focus on getting it running.  Also our drivers have known issues so perhaps a fresh set of eyes might shed some light on what is going wrong.

Another interesting question is whether Poseidon can operate on device side. Is it flexible enough? How similar is being a USB host and USB device? think it will need a bit of work on Poseidon's side.  Until then I will force the driver into Host/Master mode in the init code, but leave open device etc to configure the chipset for either's use - and look at trying to add support for working in Device/Slave mode &amp; switching modes once it's up and running.

Actually USBROMStartup is some kind of kludge. Can there be any alternative? Could device drivers be self-installing, like our HIDDs? This would get rid of need to list them in USBRomStartup.

* Model A and B limited to 150 mA per port. 
* Model B+ and Pi 2 introduced configurable 600 mA to 1.2 A support over all ports - anything above that requires a powered USB hub.

Implementing the hardware driver that Poseidon uses to interact with the USB components.

Have code in place to (try) and initialise the USB chipset, and configure host/device mode operation (though AFAICT Poseidon doesn't support device mode). Started to get the &quot;virtual&quot; root hub written for the single USB port so that Poseidon should at least list it correctly in the GUI - and try to interact with it to find peripherals.


The BCM2835 uses a soft IP block from Synopsys’ DesignWare library (DWC), specifically the block is called dwc_usb_2_0_hs_otg_subsystem-ahb_se (“USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface SE”).

There is no public documentation for this, and pretty much zero chance of anyone getting hold of it even with NDA. However, there's a Linux driver written by Synopsys ([https://github.com/raspberrypi/linux dwc_usb]). Specifically directories [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_common_port] and [https://github.com/raspberrypi/linux/tree/rpi-patches/drivers/usb/host dwc_otg].

The Synopsys code is actually under a fairly permissive licence – it's not GPL, it's similar to BSD (’don't sue us if it breaks’ is pretty much the only clause). So this should not be a barrier to porting the code.

The code is really well written, with a nice partition between the work done by the driver (dwc_otg, which is fairly involved, given the host does more work than a conventional EHCI driver), and the interface to Linux (dwc_common_port).

Probably only need provision of relevant changes to dwc_common_port. Other things to consider....

* Provision of necessary headers to get it to compile
* Provision of necessary functions (main issues are wait queues, threads, work queues, tasklets, timers, spinlocks and mutexes (multithreading) )
* Interfacing between USB stack and the driver. dwc_otg/dwc_otg_hcd_linux.c looks like the place to start.

the Linux bits of the headers are only required for the dwc_common_port library. dwc_common_port includes a variety of crypto functions which are not used – it appears to also be used for ultrawideband (UWB) and wireless USB (WUSB) drivers where crypto will be an issue, but it isn't going to be for plain wired USB.

Every USB driver acts as an USB hub as well in order to let Poseidon control the state of USB ports. The code there was reading status of the only USB port in Raspberry's CPU but when changing the status it erroneously deleted some of the status bits, including the port enable one. It was so because those bits in the status register are of a type Read/WriteToClear. It means, if one does not want to change their value from 1 back to 0, one has to actually write the 0 value. Very practical thing e.g. in interrupt handlers, where one reads the interrupt status register to learn what was the interrupt reason, and writes it back to the same register in order to clear the interrupts. 

After fixing that code it turned out that the communication was still unsuccessful. Apparently the USB device was not understanding the host for some reason. That should not happen since the request sent was one of the standard ones implemented by virtually anything with an USB connector, assumed that Poseidon clears the data caches before forwarding the work to the USB drivers but that's the responsibility of the driver itself. 

The USB device responded and acknowledged the transmission! But why were all the request sent after address change failing with timeout? They should not. Once again, address set is supported just by anything. Tried to contact the device at address 0 once again and there it was, still responding properly. The enlightenment came. The bus address for DMA transmissions was, as it is in many bare metal USB implementations, just the pure memory address of the buffer as seen by the ARM cpu. Have &quot;prefixed&quot; it with the real location of uncached RAM and booted AROS once again. 


Trident saw this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

and this:

    Product     : Vendor: Vdr=0424/PID=EC00
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 255
    SubClass  : 0
    DevProto  : 1
    VendorID  : 1060
    ProductID : 60416
    DevVers   : 0200

and even this:

    Product     : Hub: Vdr=0424/PID=9514
    Manufacturer: Standard Microsystems Corp.
    SerialNumber: n/a
    /Users/michal/git/AROS/rom/USB/poseidon/./poseidon.library.c:psd_20_psdEnumerateDevice/3092: USBVersion: 0200
    Class     : 9
    SubClass  : 0
    DevProto  : 2
    VendorID  : 1060
    ProductID : 38164
    DevVers   : 0200

What are these things? The first one is USB hub built in the Raspberry. Thanks to this one the Pi machines (with exception of Pi0 and computing modules) have more than just one single USB port. The second one is the network chip in raspberry, the third one is my USB SD card reader which have just connected to see what happens. AROS tried, of course, to boot from it ;)

So, the first step towards working USB is done. The control transfers are working as you can see above. Next step is to implement bulk and interrupt transfers, having the basics in place. Finally some error handling will be added and USB for Pi will be as complete as the PC version. 

[http://www.raspyfi.com/raspberry-pi-usb-audio-fix/ Issue with USB Audio]


 Audio 

[https://github.com/raspberrypi/linux/tree/rpi-patches/sound/arm audio] and its [https://github.com/raspberrypi/firmware/issues/2 very high speed message passing interface type of thing VCHI]

The Model B+ added an additional voltage regulator for the audio output and an additional output driver to drive low-resistance loads like headphones. However it is still using pulse-width modulation (PWM), which has a major impact on sound quality

the old Raspberry Pi used a linear voltage regulator to provide the 3.3V to many of the components on the board while the new one uses a switching regulator. Both can perform reasonably well. However switch mode power supplies often show higher noise figures

Analogue audio

Audio over HDMI rev 1.3 &amp; 1.4


 Ethernet 

10/100 BaseT Ethernet RJ45 socket


 GPIO 

GPIO shouldn't be too bad but bear in mind it is already accessed in places so they would need to allocate pins etc through it (e.g. sdcard to flicker the activity light, serial debug to output data on the GPIO pins)

Probably a resource rather than a device...

Started an i2c driver that will need to allocate GPIO pins. Feel free to work on it if you are interested ;p


 GPU graphics with 2D and 3D acceleration 

Sadly none yet for 32bit but for 64bit... 


 Miscellanous

hdmi issues

Setting the hdmi_force_hotplug=1 makes sure the Pi believes the monitor/TV is really there.

You might also need to set config_hdmi_boost=4 or even higher (up to 9) if your display needs a stronger signal.

If the display is a computer monitor or newer tv, use hdmi_group=1 (auto HDMI use) and if it is an older TV, try hdmi_group=2 (for DMT formats, i.e. for PC monitors) then you HAVE to &quot;set hdmi_drive = 2 to enable HDMI output as this forces HDMI mode rather than DVI mode

Do not set hdmi_safe=1 as that overrides many of the previous options.

Using a shorter or better quality HDMI cable might help. Make sure your Pi's power supply delivers 1 A and not 500 mA.
If you see a problem with the red colour - either absent, or interference - then try a boost

composite video

changing the RCA cable, then the composite port worked out of the box

Boot it as you are doing, without HDMI. If you now plug in the HDMI, do you get the image? In other words, does the Pi think HDMI is connected even when it isn't?

Rename all the files in the first partion of the card except bootcode.bin, start.elf and fixup.dat  What's the result?

Put back config.txt What's the result?

for PAL mode   sdtv_mode=2

dmi_ignore_hotplug Pretends HDMI hotplug signal is not asserted so it appears a HDMI display is not attached
hdmi_ignore_hotplug=1 Use composite mode even if HDMI monitor is detected

&lt;pre&gt;
# NOOBS Auto-generated Settings:
#hdmi_force_hotplug=1
#config_hdmi_boost=4
#overscan_left=24
#overscan_right=24
#overscan_top=16
#overscan_bottom=16
#disable_overscan=0
start_x=1
gpu_mem=128
&lt;/pre&gt;

tvservice -c &quot;PAL 4:3&quot;

&lt;pre&gt;
/opt/vc/bin/tvservice -s   or tvservice -s 
state: HPD high|HDMI mode|HDCP off|composite off (0x12001a), 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m CEA
Group CEA has 1 modes:
(native) mode 16: 1920x1080 @ 60 Hz, progressive

/opt/vc/bin/tvservice -m DMT
Group DMT has 0 modes:
&lt;/pre&gt;

sudo amixer cset numid=3 1

forces the audio to the headphone jack, even with the HDMI video output plugged in

config.txt

the hdmi_ignore_edid_audio=1 option sems relevant as it should tell ALSA that the only available audio is analog, no matter what the display says

There are several different ways that these 4 pole (ring) composite analog cables can be wired up, so some work great in some applications and can be a waste of time in others.

What is needed for the Raspberry Pi B+ and above, which like many camcorders needs the ring contact next to the base contact to be the ground.


The wiring for the 4 pole are:

TIP (LEFT AUDIO CHANNEL)

RING 1 (RIGHT AUDIO CHANNEL)

RING 2 (GROUND/EARTH)

RING 3 BASE/SLEEVE (VIDEO) YELLOW

Most Apple based Players and the Microsoft Zune (TM) are wired this way.

Most analogue camcorders are wired this way as well, where the ground in on Ring 2 will work with the Pi although you may need to swap your Video plug with the Right Audio plug.

Nearly all other MP3 players are not wired this way, the ground is on another ring ie the wrong one.


External devices

* Camera Module Omnivision ov5647 Sunny 5MP (NoIR version) V1.3 - NoIR at 850&amp;nbsp;nm, peak at 880&amp;nbsp;nm and trails off at 940&amp;nbsp;nm wavelengths 
* Camera V2 Sony IMX219 V2.1 8mpixel 8MP 8megapixel - 3280 x 2464 pixels - video at 1080p30, 720p60 and 640x480p90 - wider field of view, 62 vs 54 degrees horizontally - 
* Branded WIFI usb BCM43143 dongle

N.B.  dreaded error after changing cameras (stupidly without turning off the power first) and lasted through several power cycles.  It can be a bad 15-pin FFC ribbon cable, when swapped, camera(s) and the Pi itself are working OK. It can be an instance of a cold solder joint on the CSI connector on the pi board.  the camera can be detected (that's done via I2C) but may still not be able to receive image data (done via CSI-2) if something is broken. CSI-2 is uni-directional. Control is generally done via I2C. 
The CSI-2 receiver always writes to memory, not direct to the ISP. That's the way the Broadcom architecture works as it allows multipass processing easily. GPU memory is accessible from the ARM. Processing using the QPU graphics processors may be possible.  currently the only supported sensor is OV5647 and IMX219.  The linux drivers are all in the firmware blob, else you'd  be looking at at least a man-month of work in a fully fledged imaging lab to do a decent tuning of the camera modules' ISP parameters. 
Static electricity maybe an issue for the camera module and slightly less for the pi board.


== References ==

Testing procedure is put sd card in, connect board to board if necessary, plug in hdmi and then power nothing else is done especially CSI DSI etc 

[https://www.raspberrypi.com/documentation/computers/compute-module.html CM5] has the same 55mm x 40mm 2x100pin connectors form factor as the CM4 but [https://www.epdtonthenet.net/article/214508/Key-Considerations-When-Migrating-from-Raspberry-Pi-CM4-to-CM5.aspx some pins and other small things] have changed. Will need the [https://raspipcb.com/tech-blog/raspberry-pi-cm4-vs-cm5-difference-in-booting-from-sd-card/ right IO board to suit] 

*Green [ Raspberry Pi Compute Module 5 IO Board REV2 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1967]] - untested 
*Green [ RPi Compute Module 5 IO board REV1 [https://pip.raspberrypi.com/categories/1097-raspberry-pi-compute-module-5-io-board SC1751]] - untested 
*Black SupTronics Geekbord X1500 CM5 IO Carrier Board - untested
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[https://sipeed.com/nanocluster Sipeed NanoCluster] - untested up to 7 CM5 
*Green BentoIO CMX0 - untested 
*Box EDATec ED-CLAWBOX - untested 
*Home Assistant Yellow - Kit with PoE with Raspberry Pi Compute Module 5 - untested 
*Blue [https://www.waveshare.com/wiki/CM5_PoE_BASE_A Waveshare CM5-PoE-BASE-A] - untested 
*Box  Waveshare [ CM5-POE-BOX-A] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-B Waveshare CM5-IO-BASE-B] - untested 
*Blue [https://www.waveshare.com/wiki/CM5-IO-BASE-A Waveshare CM5-IO-BASE-A] - untested 
*Blue Waveshare [https://www.waveshare.com/wiki/CM5-NANO-B CM5-NANO-B] - untested 


*[https://carboncomputers.us/products/pi-flux piFlux]
*[https://carboncomputers.us/products/ Zitaotech Hackberry] CM5 lite only - 
*Portable [https://www.waveshare.com/pocketterm35.htm Waveshare PocketTerm35] with Pi4B or Pi5 - untested 
*Box [https://www.clockworkpi.com/uconsole ClockworkPi uConsole][https://www.youtube.com/watch?v=EtI_bAahbR8 CM4 into an adapter or CM3 into so-dimm - Cyberdeck] - untested 


*Green RPi [https://datasheets.raspberrypi.com/cm4io/CM4IO-KiCAD.zip Compute Module 4] [https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf IO board] V1.4 [https://datasheets.raspberrypi.com/cm4io/CM4IOUSB3-KiCAD.zip USB3] [https://datasheets.raspberrypi.com/cm4io/cm4iousb3-appnote.pdf CM4ISO] [https://datasheets.raspberrypi.com/cm4/cm4-datasheet.pdf Dual100pin] (2020) aka Development Platform Board - untested 
*Purple Pi Hut Cytron CM4 Maker Board - untested 
*Black DeskPi Super6C Cluster Mini-ITX Board - untested 
*[ KubeSail PiBox mini 2] 
*Home Assistant Yellow with Raspberry Pi Compute Module 4 - untested 
*[ Turing Pi V2] - untested CM4 with 260-pin SO-DIMM socket adapters and/or nvidia jetson nanos - untested 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-C Waveshare CM4-IO-BASE-C] - untested but binary blobs Rev01 Rev02 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-B Waveshare CM4-IO-BASE-B] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-IO-BASE-A Waveshare CM4-IO-BASE-A] - untested but binary blobs 
*Blue [https://www.waveshare.com/wiki/CM4-NANO-B Waveshare CM4-NANO] - untested but usb and audio turned off or rerouted 


CM3 has a 200 pin sodimm ddr2 connector form factor but not electrically SC0028, SC0029 
*Blue [https://wiki.geekworm.com/CM_IO_Board Geekworm RPi Compute Module IO Board] [https://github.com/geekworm-com/cm-io-board CSI DSI] with CM3 in ddr2 slot underside - '''works''' if SW1 on but CM3+ '''does not''' 
*Green [https://cdn-shop.adafruit.com/product-files/3442/CMIO_schematic.pdf RPi V3 IO board CM3IO] and CM3 Lite - untested 
*Green [https://turingpi.com/ turingpi v1 cluster] - untested up to 7 cm3 7xlan9514 12V discontinued, 3 x Pi4 homelab maybe better 
*Blue [https://www.waveshare.com/wiki/Compute_Module_PoE_Board Waveshare Compute Module PoE Board] and CM3 lite (if not lite, write files to internal eMMC fat32) '''AVOID''' bin blobs 
*Blue [https://www.waveshare.com/compute-module-io-board-plus.htm Waveshare Compute Module IO Board Plus] [https://www.waveshare.com/wiki/Compute_Module_IO_Board_Plus wiki] [https://forums.raspberrypi.com/viewtopic.php?t=235695 pin settings] with CM3+ Lite - '''AVOID''' binary blob 


*[ Pi02w on Geekworm SupTronics X305 Raspberry Pi Zero IO Baseboard] - untested 
*[ Spotpear Pi Zero 2w to Pi3b format-ish] - untested 


*[ pi-top v4] box has 128x64 oled display, micro hdmi, 19Whr battery with pi4 and 15V PD 36W min needed 
*[ pi-top v3] three green pieces, heatsink covers most of the base tray, pi-top hub mk1 lhs and Pi1B Pi2b Pi3b rhs secured from below, black rounded strip with pi-top above keyboard, 13.3&quot; HD 1366 x 768 display, small touchpad, 
*[ pi-top Model 2.0] pi-top on bottom bezel of 14-inch green laptop, large trackpad, keyboard slide down to reveal main system hub on slide rails moved to the right, Raspberry Pi3b screws down, hub slides in, 18V 2.5A 45W charger brick, battery 11.1V 3500mAh 38.85Wh and storage PiTopOS 
*[ Pi-Top CEED Raspberry Pi Modular Educational Desktop with RPI3] monitor 
*[https://www.indiegogo.com/en/projects/jesselozano/pi-top-a-raspberry-pi-laptop-you-build-yourself Pi-Top v1] wedge laptop with RPi2 


&lt;pre&gt;
2008 Trustees collected for Foundation
2009 Pi Foundation charity status gained 
2010 
2011 First Raspberry prototypes 
2012 First boards go on sale at CPC and RS. The Model A and B 700 MHz Arm11 - February 29th BCM 2835
2012 First million sold - more than the 10,000 original planned and anticipated 
2013 First Alpha Experimental builds of AROS Native for the 32bit Pi 
2013 Pi Trading launched making grants available, providing in house educational resources and Pi Academy for teacher training 
2013 Over two million sold 
2014 Over three million sold 
2014 Pi 1 Model B+ introduced that moved composite video to audio jack and same half gig of memory 
2014 Pi Model A+ v1.1 no ethernet and 1 usb - a little smaller - 
2015 Over four million first gen pis sold  
2015 Pi Zero 1.2 BCM2835 first production revision released with no camera port 
2016 Pi0 1.3 released with camera csi connector 
2017 Pi Zero W v1.1 1GHz Pi0W, single-core 32bit CPU BCM2835 released with Cypress CYW43438 wireless 
2020 Raspberry Pi Pico SC0919 with RP2040 32-bit 2Core ARM Cortex-M0+ up to 133 MHz - 264KB of SRAM and 2MB of on-board QSPI Flash - 
2024 Raspberry Pi Pico 2 with RP2350 2Core 32bit Arm Cortex-M33 and 2core open-hardware [https://github.com/wren6991/hazard3 Hazard3 RISC-V] 

2015 Pi 2 Model B v1.1 BCM2836 900/600 MHz ARM Cortex-A7 Armv7 quad 32bit, 32bit VideoCore IV GPU - 1Gb RAM - 5V 2A micro usb - SMSC LAN9514 chip - 
2015 Over a million pi2s sold 


2015 Raspberry Pi 2 Model B version 1.2 Pi2bv1.2, aka Pi2B2 has armv8 BCM2837 underclocked to 900Mhz without wifi/bluetooth module 
2016 Pi 3 Model B - Broadcom BCM2837 SOC four 64bit ARMv8 Cortex-A53 1.2GHz 32bit 1080p VideoCore IV GPU - 1Gb DDR2 - bluetooth 4.1, Cypress CYW43438 wireless 802.11n - 4 x USB2.0 ports - 5.1V 2.5A - SMSC LAN9514 chip 
2016 PIs total over 10 million worldwide 
2017 Compute Module 3 CM3 with BCM2837B0 armv8 Quad 64-bit - small 67.6mm x 31mm board which fits DDR2 SODIMM connector but not electrically compatible which plugs into needed IO board - beware of the I2C protocol issue 
     1Gb LPDDR2 RAM - Lite or 4Gb Emmc storage 
2017 12 million pis sold in total 
2018 Pi 3 Model B+ - 4c A53 BCM2837B0 1.4Ghz - 1Gb, wireless 802.11ac, gigabit ethernet (300Mbit/s) and bluetooth 4.2 - power over ethernet - 4 x USB2.0 ports - Microchip LAN7515 chip 
2019 Over 15 million sold 
2019 Pi 3 Model A+ with BCM2837b0 Cortex-A53 64-bit SoC @ 1.4 GHz with 512Mb LPDDR2, 1 usb2, 1 hdmi, 1 micro usb 5V 2A - no ethernet - 
2019 Raspberry Pi Compute Module 3+ CM3+ - Broadcom BCM2837B0 1.2Ghz, Cortex-A53 (ARMv8) 64-bit SoC on DDR2 SODIMM mechanically compatible only factor - IO board required 
     1Gb DDR2 and 8GB, 16GB, 32GB or a Lite variant without eMMC 
2021 Pi zero 2 (w or no W) RP3A0 quad 1GHz Cortex-A53 64bit BCM2710A1 512mB SDRam 
2025 edaTEC CM0 ED-CM0NANA with additional dev board with quad 1Ghz A53 with 512Mb Raysan RAM, 2 USB2 and 10/100 ethernet - pico castellated edge
 

2019 Pi 4 Model B RPI4B - BCM2711B0T quad 64bit A72 1.5GHz, 4K VideoCore VI, AC wifi, Bluetooth 5.0, GbE Broadcom BCM54213PE (PHY ID 0x600d84a2), 2 micro hdmi decode up to 4K, USB-C 5.1V 3A power, 2xVLI VL805 USB 3, 2xUSB 2.0, 2GB 9LDWW D9WHZ or 4GB 9FDWW D9WHV, 8GB 0AA47 D9ZCL ddr4 ram 
2020 Silent Pi 4 v1.2 upgrade with more USB-c psu support 
2020 PI400 BCM2711C0T 1.8GHz 4Gb DDR4 inside keyboard, 5.1V 5A 27W usb-c psu, 2 micro hdmi, external ide style 40pin gpio, no audio port - 
2020 Raspberry Pi Compute Module 4 BCM2711B0T on new 55mm x 40mm 2x100 pin form factor with extra breakout IO board 
     CM4101000 1Gb RAM Lite SOM 
     CM4102000 2GB RAM Lite 
     CM4104000 4GB RAM Lite 
     CM4004008-4GB-RAM 8GB-EMMC SOM System on Modules 
     CM4104032 4GB RAM 32GB emmc 
     CM4108000 8GB RAM Lite 
     CM4008016 8GB RAM 16Gb eMMc
2021 Raspberry Pi SC0763 Compute Module 4S CM4S with ddr2 sodimm pinouts but not electrically the same with suitable IO board extra cost - 
     CM4S01000 1GB RAM Lite
     CM4S01008 1GB RAM 8GB eMMC Flash
     CM4S02000 2GB RAM Lite
     CM4S04000 4GB RAM Lite
     CM4S08000 8GB RAM Lite 
2021 Pi 4 v1.4 BCM2711B1 upgraded power regulator, to deal with 8gig of ram being more power hungry - 
2021-48 Raspberry Pi 4 model B v1.5 2GB 


2023 Pi 5 v1.0 BCM2712 Quad A76 @2.4Ghz - VideoCore VII - no audio socket - dual 4k from mini hdmi - fan connector - 5.1V 5A psu 
2024 Pi 5 2GB DDR4 version uses BCM2712D0 
2024 Pi-500 with 8Gb LPDDR5 and membrane keyboard 
2024 Pi 5 v1.1 
2024 Raspberry Pi Compute Module 5 CM5 BCM2712 55mm x 40mm form factor with additional IO board 
     CM5004000 04GB RAM 0GB eMMC Lite
     CM5008000 08GB RAM 0GB eMMC Lite
     CM5016000 16GB RAM 0GB eMMC Lite
2025 Pi-500+ with 256GB NVMe storage, 16GB LPDDR4 RAM, and Gateron KS-33 Low Profile Blue mechanical keyboard switches 
2025 Pi5 1GB DDR4 announced 


2022 PiOS linux goes 64bit 
2024 Pi Trading IPO stockmarket stock exchange listing 


2026 April and May Aros 64bit fixed, added AHI audio, VC4 gfx started, usb functions added to rom  
2026 June and July Aros 64bit usb2otg started, dma.resource, sdio.resource, bwfm.device wifi added 
2026 Late July daily 64bit Pi3 LE little endian builds start 
2026 August Pi 4, 400, 5 and 500 DTBs added, expanding existing support and wifi for Pi4 and Pi5 
2026 August Pi5 HAT+ nvme and HDMI, AHI RPiI2S added, Pi4 HVS5 video scaler started, 
2026 
2027 


2028 Pi 6 
&lt;/pre&gt;


==Future==


[https://github.com/ARMSX2/ARMSX2 Arm pi of pcsx2] 


{{BookCat}}</text>
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==Salutation==

Depending on the time of the day, different salutations may be used.

* '''Ẹ káàárọ.''' - good morning {{Audio|LL-Q33578_(ibo)-Goodymeraj-Ogochukwu_Franklin_Onyeka.wav|Listen|help=no}} 
* '''Ẹ káàsán.''' - good afternoon
* '''Ẹ Káalẹ́.'''. - good evening
*'''Ó dàárọ̀.''' - good night
If you are talking to someone who is the same age or younger than you, you greet differently.

* '''Káàárọ.'''
* '''Káàsán.'''
* '''Káalẹ́.'''

To present yourself, you can use the following expression:

* '''Orúkọ mi ni ...''' - My name is...

To ask how the person is:

* '''Ṣe dáadáa nì?''' - How are you?

* '''Gbogbo ẹbí ńkọ́?''' -How  is  your  family? 

{{BookCat}}
*'''Níbo lo wà  ?'''-Where are you?

Yorùbá has salutation for every occasion and situation. Examples:

Ẹ kú ìjókòó (sitting) 
Ẹ kú ìdúró  (standing)
Ẹ kú iṣẹ́.   (Working)
Ẹ kú ìgbádùn (enjoyment)
Ẹ kú ojú oorun (sleeping)</text>
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==Salutation==

Depending on the time of the day, different salutations may be used.

* '''Ẹ káàárọ.''' - good morning
* '''Ẹ káàsán.''' - good afternoon
* '''Ẹ Káalẹ́.'''. - good evening
*'''Ó dàárọ̀.''' - good night
If you are talking to someone who is the same age or younger than you, you greet differently.

* '''Káàárọ.'''
* '''Káàsán.'''
* '''Káalẹ́.'''

To present yourself, you can use the following expression:

* '''Orúkọ mi ni ...''' - My name is...

To ask how the person is:

* '''Ṣe dáadáa nì?''' - How are you?

* '''Gbogbo ẹbí ńkọ́?''' -How  is  your  family? 

{{BookCat}}
*'''Níbo lo wà  ?'''-Where are you?

Yorùbá has salutation for every occasion and situation. Examples:

Ẹ kú ìjókòó (sitting) 
Ẹ kú ìdúró  (standing)
Ẹ kú iṣẹ́.   (Working)
Ẹ kú ìgbádùn (enjoyment)
Ẹ kú ojú oorun (sleeping)</text>
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      <text bytes="210255" sha1="rkkpkihvptss7643f8m7l1ru6fxs3yx" xml:space="preserve">{{DISPLAYTITLE:&lt;span style=&quot;display:block;text-align:center;font-size:100%;background:#d0f0f0;line-height:2.5em;font-family:'Georgia', serif&quot;;&quot;&gt;Building Better Worlds in the 21st Century&lt;/span&gt;}}


&lt;div style=&quot;font-size:125%;font-family:'Georgia', serif;&quot;&gt;

:'''Dani Eder,'''

:''The Seed Factory Project,''

:''6485 Rivertown Rd, Fairburn, GA, 30213''

:''email: danielravennest@gmail.com''


:'''Aug 2026'''


'''Note:''' This report is an introduction to the ideas and work of the Seed Factory Project to date, which are covered in more  detail in the two volume '''[https://en.wikibooks.org/wiki/Seed_Factories Better Worlds]''' set.


&lt;div class=&quot;nonumtoc&quot;&gt;{{TOCright}}&lt;/div&gt;


=='''0.0 - Summary'''==
&amp;emsp;

&amp;emsp; National space programs to date have been based on the idea of going to one place at a time, like the Moon and Mars, for reasons like science and national prestige.  Missions have finite goals and end when they are reached, so they don't include full development of the destinations.  Instead, equipment and supplies have come from Earth, which kept costs high.  Limited goals and high cost resulted in poor return on effort.

&amp;emsp;Our project proposes a broader approach of upgrading and extending civilization on Earth first, then full development of the entire Solar System, and eventually beyond it.  It is based on the idea self-improving production systems that grow from a starter set of core equipment called a '''[http://en.wikibooks.org/wiki/Seed_Factories Seed Factory]'''.  Seed factories make more equipment for themselves mostly using local energy and raw materials.  This is in addition to making finished products like any other factory.

&amp;emsp;Each location follows a growth cycle of self-improvement, making products for local use, trade with the rest of society, and becoming economically self-supporting.  Once matured, a location sends elements of new starter sets to new locations.  Locations are developed in logical progression from easier to harder and more distant.  With proper planning locations can be sustainable, and even reduce unwanted side effects on the environment.

&amp;emsp;The very large physical space, materials, and energy resources beyond Earth enable large total returns.  Since locations grow to support themselves, the net cost of such a program is only the initial start-up, so the return on effort is high.

&amp;emsp;It isn't in the scope of this report to provide detailed plans and hardware designs.  What we describe is a possible path that leverages self-improving production methods.  This is a step towards solving existing problems and building a better future, but much more work is needed for this idea.

=='''1.0 - Problems of Past Space Programs'''==
&amp;emsp;

&amp;emsp;Governments have pursued space projects and programs, individually or in groups, for purposes like research, exploration, advancing technology, and prestige.  While the results can be large, these efforts often suffer from outdated assumptions, high absolute costs, low relative return on effort, and a focus on single destinations.  They have also often not leveraged new knowledge and technology.


:'''Outdated Assumptions'''


&amp;emsp;Sending people to the Moon and Mars are stated goals of '''[https://www.space.commerce.gov/policy/national-space-policy/ US National Space Policy]'''.  Significant annual budgets are being spent towards these goals, primarily on the '''[https://en.wikipedia.org/wiki/Space_Launch_System Space Launch System]''' and '''[https://en.wikipedia.org/wiki/Orion_(spacecraft) Orion Spacecraft]'''.  The program concept to reach these goals is directly descended from plans first made in the mid-20th Century, such as '''[http://launiusr.files.wordpress.com/2011/08/mars_high.jpg Von Braun, 1954]'''.  In the decades since, the technologies to be used have advanced, but the overall concept has not.  In NASA's '''[https://www.nasa.gov/sites/default/files/atoms/files/journey-to-mars-next-steps-20151008_508.pdf Journey to Mars]''' (pdf file Oct 2015), the &quot;mission&quot; approach includes a number of assumptions:


* It is a round trip for the crew, from Earth to Mars and back, with limited duration on the Martian surface. 
* Because the number of missions is small and they are short, it is not economic to develop many local resources.
* Most or all equipment and supplies are launched from Earth.
* High cost limits mission mass.  So crews have to accept risks from radiation exposure, equipment failure, and lack of fallback positions.


&amp;emsp;Other goals like the Moon and orbiting stations have similar limiting assumptions, and are considered separately from each other.


:'''High Cost'''


&amp;emsp;Government-funded and contractor-built space programs have little incentive on either side to finish promptly or keep costs under control.  Project-oriented agencies want to continue their existence, but getting approval for new projects is hard.  Contractors want to earn as much as possible, but winning new contracts by competitive bidding is uncertain.  Politicians who decide on budgets want to preserve jobs in current locations, which works against cost savings.  

&amp;emsp;The incentives on all sides have led to low cost estimates to get project approval.  The tacit understanding is real costs will gradually be revealed as the work progresses.  Spent funds deter cancellation as the full costs are revealed, because the funds would then have been wasted on an unfinished project.  This pattern avoids frequent approval for a new project or competing for new work.  The project schedules are instead stretched to fit real cost to available annual budgets.  The result is a few big &quot;can't fail&quot; projects.  Public failures risk losing funding or even an agencies' existence.  So projects must be conservative, slowing progress.


:'''Low Returns'''


&amp;emsp;In terms of exploration and science, a trip going to one place like Mars, and bringing back perhaps a few hundred kg of samples, is not much return for the effort expended.  Relatively short round trips do not allow for full exploration of a landing site, much less a planet with the land area of Earth.  Lack of refueling stations and reusable vehicles limits sample mass that can be returned to Earth, where researchers and laboratories can fully analyze them.

&amp;emsp;If most items have to be launched from the deep gravity well of Earth, then delivery costs will be high, and increase linearly with the number of missions.  High transport cost limits weight, and in turn safety features like adequate radiation shielding, backup vehicles, and spare parts and supplies.  To minimize risk, what is built must be both lightweight and near-perfect, which is also expensive.  Despite that, crew risk is still high in absolute terms.  The combination of low return and high cost have delayed going to the the Moon and Mars for decades.  Such a program is now moving forward, but very slowly.  


:'''Focus on the Moon and Mars'''


&amp;emsp;The Moon is nearby, big, and obvious to everyone on Earth.  So it was a natural first destination for human exploration.  Venus and Mars are the closest major planets.  Venus was originally thought a suitable destination because of similarity of orbit, mass, and gravity.  However it turned out to be very hot from a thick CO2 atmosphere.  Mars then became the next focus of human exploration by being the most Earth-like and nearby destination.

&amp;emsp;The focus on Earth-like conditions ignores that on Earth, even the best places require some technology to survive, and more of it to be comfortable and flourish.  At a minimum clothing, shelter, and agriculture, are needed, with their underlying technologies.  For most of the Earth technology like ships, planes, and snow crawlers are needed to reach places, and more technology if you intend to stay.

&amp;emsp;Mars, or anywhere else in space, also require technology to survive and flourish.  But Mars does not require dramatically more than harsh places on Earth.  For example the temperatures on Mars overlap those of cold places on Earth, such as Siberia and Antarctica.  At the same time, the surface of Mars is harder to reach than other regions in space.  Getting there needs more work than high orbits near Earth.  The colder surface temperatures and 80% lower solar flux require more equipment than near Earth.  A primary focus on the Moon and Mars over everywhere else is a mistake.  They are large, interesting, and can be useful.  So they should be part of future programs, but not to the exclusion of other places.

&amp;emsp;A new approach is needed that remedies the problems noted above.  It should be based on up-to-date knowledge of the Solar System and new technologies developed since the mid-20th century.  It should explore and use all of the many places in the Solar System.  That includes the orbital and interplanetary spaces around and between natural objects.  Finally, it should have high science and economic returns for the effort expended, including direct returns to people on Earth.

=='''2.0 - New Knowledge and Technologies'''==
&amp;emsp;

&amp;emsp;Our new approach starts with a modern overview of the Solar System and its resources.  We then introduce technologies to access and use those resources.  Self-improving production systems that become highly efficient with &quot;Smart Tools&quot; is key among these.  Our intent is to use these to benefit civilization and the Earth's environment.  
 

==='''2.1 - The Modern Solar System'''===
&amp;emsp;

&amp;emsp;The Solar System as of 1950 included 9 planets and their moons, plus about 2,000 asteroids in the belt between Mars and Jupiter.  Materials would be available on the surfaces of the Moon and Mars, but required significant fuel to take elsewhere.  So they would only be used locally.  Energy would come from solar-powered steam turbines, or a little later from fuel cells.  These ideas are quite outdated and becoming more so each year.

&amp;emsp;Today we can inventory the known Solar System in terms of its material and energy resources.  Such '''[https://en.wikipedia.org/wiki/Natural_resource Natural Resources]''' on Earth are well-studied and understood.  Most people today know about the Moon, the other major planets, and that some of them also have moons.  So here we will mainly review the more recently found and less familiar parts Solar System.

&amp;emsp;In terms of resource access, the smaller members of the Solar System all take less energy to land on and remove materials from than Earth.  They also have greater surface area relative to mass and lower gravity, making extraction easier.


:'''Material Resources'''
  

&amp;emsp;'''[[w:Near-Earth_object|Near Earth Objects (NEOs)]]''' are those which come closer than 1.3 AU to the Sun, where 1 AU is the Earth's average solar distance.  Mars' orbit ranges from 1.38-1.67 AU, so NEO's are &quot;on the way there&quot; in terms of solar distance.  In 1950 time there were 55 such objects known, of which only 13 were asteroids.  The rest were comets, which are easier to find when they have large tails.  The asteroids were ignored because their orbits were not ideal, and mining them was still a subject for science fiction.

&amp;emsp;This has changed dramatically.  As of August 2026 there are over '''[https://cneos.jpl.nasa.gov/stats/totals.html 42,000 known NEOs]'''.  The number has increased exponentially since about 1980 as better telescopes have been used to find them.  These searches are partly driven by the impact risk such objects pose to Earth.  Of those found so far, 875 are asteroids 1 km or larger in size, a nearly full count.  11,700 are larger than 140 meters out of an estimated 27,000 total.  The rest are smaller, with perhaps 4 million to be found larger than 10 meters ([https://iopscience.iop.org/article/10.3847/1538-3881/aa8036 '''Trilling, 2017''']).  124 of them are comets, which lose material when close to the Sun.  Just the largest handful of NEOs have a combined mass of 50 trillion tons, which is roughly a thousand years of mining activity on Earth.  

&amp;emsp;The much larger numbers known today means more of them are in orbits easy to reach from Earth or on the way to Mars.  Very efficient '''[https://en.wikipedia.org/wiki/Spacecraft_electric_propulsion Electric Propulsion]''' and other technologies unknown in 1950 time now exist.  They make it possible to reach NEOs and work with them remotely from Earth, as recent asteroid and comet probes have done.  Early research has been done on '''[https://en.wikipedia.org/wiki/Asteroid_mining Asteroid Mining]''' and '''[https://en.wikipedia.org/wiki/Space_manufacturing Space Manufacturing]''' to make use of their materials.  Using NEOs as sources of propellants, supplies, and other products would greatly reduce what you need to bring from Earth for space projects.

&amp;emsp;Beyond those that come close to Earth, the '''[https://www.minorplanetcenter.net/mpc/summary Total Number]''' of known objects in the Solar System, as of August 2026, is 1.56 million.  This is about 780 times what was known in 1950.  The list of such '''[https://en.wikipedia.org/wiki/List_of_minor_planets Minor Planets]''' has grown rapidly as new dedicated telescopes and search techniques were applied, and is expected to increase by another factor of 10 now that the '''[https://en.wikipedia.org/wiki/Vera_C._Rubin_Observatory Rubin Observatory]''' has begun operating.

[[File:Inner_solar_system_objects_top_view_for_wiki.png|thumb|right|600x600px|Figure 2.1-1 - Inner Solar System objects.]]  

&amp;emsp;91.7% of known objects are in the '''[https://en.wikipedia.org/wiki/Asteroid_belt Main Asteroid Belt]''' between Mars and Jupiter (Figure 2.1-1), but many thousands of others are in orbits throughout the Solar System.  The '''[https://minorplanetcenter.net//iau/lists/MPLists.html Minor Planet Center]''' maintains information about all of them.  The high proportion in the Asteroid Belt is a function of distance, not absolute numbers.  Brightness decreases as square of both distance from the Sun and the telescope.  So discoveries are strongly biased to nearby objects, and to only finding the largest ones at greater distances.  But total number of objects goes up about 3,500 times when the size goes down by 100 times.  So there are many more smaller objects still to be found.

&amp;emsp;Many of the objects discovered beyond Neptune, at 30-80 AU, have '''[https://en.wikipedia.org/wiki/Orbital_eccentricity Eccentric Orbits]'''.  These objects tend to be found at the close end of their orbits, when they are bright enough to see.  This additional discovery bias means there are many more like them waiting to be found, but are currently in more distant parts of their orbits, or never come close enough to find with current telescopes.  The August 2026 count of about 8300 such distant objects is limited to those larger than 100 km for the farthest ones.  As search methods improve, many more such objects will be found at all distances and more of the smaller ones.   

&amp;emsp;'''[https://en.wikipedia.org/wiki/List_of_near-parabolic_comets Near-Parabolic Comets]''' can reach distances measured in light-years, or even escape the Solar System entirely.  Aside from them, the known size of the Solar System has increased 168 times since 1995, from 49.3 AU for Pluto to 8285 AU for the maximum distance of Centaur object '''[https://minorplanetcenter.net/db_search/show_object?object_id=2015%20FW539&amp;commit=Show 2015 FW539]'''.  Some of these objects are quite large (Figure 2.1-2), and there is even a suspected major planet still to be found.  Although the absolute distance of these objects is very large, the energy to reach them has a finite limit. The five planetary probes '''[https://en.wikipedia.org/wiki/List_of_artificial_objects_leaving_the_Solar_System Leaving the Solar System]''' already have more energy than needed to reach anything in the Solar System.  The practical limit is set by how long it takes to reach and use them.

[[File:Trans-Neptunians_Size_Albedo_Color.svg|thumb|right|512x249px|Figure 2.1-2 - Large Trans-Neptune Objects.]] 

&amp;emsp;The inventory of Solar System objects is now known to be incomplete, especially for small and distant ones.  Despite this, there is detailed knowledge of the history, composition, and geology of some of its members, and this is constantly improving.  We expect this to continue, especially from future mass-produced probes with efficient propulsion and refueling capability.  Many more objects can then be visited than the current handful per decade.  As more is learned about these objects, better plans on how to use them can be made.  But even with current knowledge, a start on such plans is possible.    


:'''Energy Resources'''


&amp;emsp;The Sun is an immense energy source, producing 20 trillion times what human civilization uses today.  That energy streams in all directions, not just at the objects which orbit it.  Mining and building on the surface of Solar System bodies is convenient, but they typically gather half or less of the available solar energy.  This is because of day-night cycles, geography, and in some cases atmospheres and eclipses from other bodies.

&amp;emsp;It takes significant energy to move materials from the larger bodies to open space, but once there, solar energy is available up to 100% of the time.  For example, with current rockets it takes about 480 MJ (134 kWh) to raise 1 kg from Earth to an orbit in full sunlight.  Once there, 1 kg of modern space solar panel can extract that much energy in 56 days, but lasts about 100 times longer.  Most solar system bodies are smaller than Earth, and there are more efficient ways to lift materials than today's rockets.  So from a net energy standpoint it often makes sense to work in open space. 

&amp;emsp;Solar cells were only 6% efficient in the mid-20th century, so solar-driven steam turbines were part of the original Mars mission concepts.  Solar cells are now 47.6% efficient in the laboratory and 31% for space power applications, and continue to '''[https://en.wikipedia.org/wiki/Solar-cell_efficiency Improve]'''.  Using lightweight concentrating reflectors, they can be useful even in the outer Solar System.  Where heat, rather than electricity, is needed, direct solar exposure or using mirrors can can reach 80% collection efficiency or higher.

&amp;emsp;In addition to solar, there are various energy sources that are more limited in scale and availability.  These include nuclear fission and potentially fusion, geothermal, and wind.  On Earth we use hydroelectric and chemical combustion, but those are not generally available elsewhere.  The orbital motion and gravity fields of bodies are not energy sources, but their potential and kinetic energy can be used in various ways.  The Sun's output alone, which will last for billions of years, plus raw materials found all over the Solar System, are enough to sustain civilization and the Earth's environment.


:'''The Illusion of Scarcity'''


&amp;emsp;Current civilization is actually quite limited, even on Earth.  The urban, forest, and farm land used in any significant way amounts to only 13.5% of the planet's surface.  The remainder are oceans, deserts, and ice caps that are only traveled through or barely used.  Of the part that is used, the average depth is equivalent to a thin surface layer.

&amp;emsp;The world's biosphere (about 2000 Gigtons) plus the human built environment (about 1100 Gigatons) averages about 6 kg/m&lt;sup&gt;2&lt;/sup&gt;, while the Earth's total mass to area is 11.71 billion kg/m&lt;sup&gt;2&lt;/sup&gt;, or a ratio of one part in 2 billion.  At the density of water, the biosphere plus civilization amounts to a 6 mm (1/4 inch) thick layer across the planet's surface.  If we only consider the fraction of the planet used, the equivalent thickness is 7.4 times higher, or 4.4 cm (1.75 inches).  If this number seems small, it is because most of us live in places that are built up.  Life and civilization are very unevenly distributed.  Cities and river dams, for example, have much higher built mass per area, while tropical forests can reach 25 times the average biosphere density per area.

&amp;emsp;The perceived scarcity of resources is thus an illusion, because we as observers live in the more built up places. Current civilization actually uses only 2 billionths of the planet's mass and one ten-thousandth of the available energy flow.  Photosynthesis uses about 13 times more of the available energy, but still only about 1/8% of it.  In a literal sense we are only scratching the surface of our own planet.  When we consider the whole Solar System, the available resources increase by hundreds of times in mass, and two billion times the energy that reaches Earth.

&amp;emsp;A larger fraction of smaller bodies is accessible.  On Earth pressure and temperature limits going too deep.  Bodies with lower gravity and less hot interiors can be accessed more deeply or all the way through.  The much higher total energy across the Solar System would also allow reprocessing and reusing what we consider waste products today.  Scarcity would not be a problem if these vast untapped resources could be used.

==='''2.2 - New Technologies'''===
&amp;emsp;

&amp;emsp;For our approach we want to use the best available production and space technologies, plus some new ones that can be developed in the near future.  These include seed factories, production networks, space technologies that are already in use but not yet in government plans, and new ones for space not yet fully developed.  This is in addition to more standard existing technology.
  

:'''Seed Factories'''

 
&amp;emsp;Production systems which use part of their output for self-improvement can grow exponentially.  Production can start with simpler tools, but modern technology like computers, communications, automation, robotics, software, and artificial intelligence lets them become more efficient.

&amp;emsp;We call a starter set of tools and machines capable of self-improvement using human labor and other energy inputs a '''[https://en.wikibooks.org/wiki/Seed_Factories Seed Factory]'''.  They grow to become mature factories by analogy to plant seeds, which grow into mature plants that can produce more seeds.  Seed factories can improve in several ways:
 

* Making parts for additional copies of current equipment.
* Making new types of items not in the starter set, and 
* Making different versions of existing equipment (larger, more accurate, etc.).
  

&amp;emsp;While modern technology can reduce the labor needed, some people are still needed today to operate the factory.  Like any other factory, some part of its output is for sale or trade. This helps cover the initial cost and paying for items it can't make internally.

&amp;emsp;The improvements increase production capacity and the range of products that can be made.  Since the capacity to grow increases with the size of the factory, the growth is exponential.  The starter or added equipment can include power generation, mining, and materials processing, so the factory can eventually self-supply and self-power from local resources.  A seed factory may not use any local sources to start with, but can approach 100% as it matures.  Some parts and materials would likely be too hard to make, or too rare locally. So even for a mature factory those would still come from elsewhere.

&amp;emsp;When production at a given location is mature enough, it can start supplying parts for, or complete new starter sets.  These can be set up in the same area, or sent to new locations, repeating the growth process.  Internal growth and making new starter sets highly leverages the initial cost.  It fundamentally changes the return/cost ratio of projects for the better.


:'''Locations and MakerNets'''


&amp;emsp;When we refer to &quot;locations&quot; we mean a single environment type, with equipment and people that are close enough that they can work together and trade physical items easily.  On Earth that might be a single metropolitan area.  In less developed places it might be smaller in size from lack of easy local transport.  Equipment in a given location may have different owners or control systems, but can still coordinate their work and cooperate on larger projects.

&amp;emsp;The collection of coordinating operations forms a network, which we call a '''MakerNet''', after the modern '''[https://en.wikipedia.org/wiki/Maker_culture Maker Subculture]''', who make things.  The network has multiple communicating nodes, each of which includes a set of equipment and people who can do tasks.  A MakerNet can extend over multiple locations, since data transfer and remote control can operate over long distances at low cost.

&amp;emsp;Physical transportation of people and supplies is not as easy, so we distinguish separate locations within a larger network.  To the extent local sources can be used, it would lower transport costs.  So there is an incentive to ship lightweight items like information over bulk materials.


:'''Space Technologies'''


&amp;emsp;New or improved space technologies have been developed since the mid-20th century, but not fully included in existing program plans.  These include:


* '''Electric propulsion''' - which uses many times less propellant than chemical rockets.  Using large tanks of propellant to deliver relatively small payloads has strongly limited space projects in the past. 
* '''Better Materials''' - There are new and significantly improved engineering materials, including high strength fibers, and composite materials that use them.  Production methods for them have also improved.
* '''Closed Loop Life Support''' - has been developed which recycles supplies using mechanical equipment or biology.


&amp;emsp;Additional technologies that were not specifically developed for space, but can be used for it, include small and powerful computers, their software, other kinds of electronics, robotics, automation, high speed communications, and most recently artificial intelligence (AI) applications.

&amp;emsp;Many other space technologies have been proposed, but not yet fully developed.  This is either from lack of money and resources, or not enough scale yet to justify them.  MakerNets and seed factories can potentially overcome these limitations.  Our second volume on '''[https://en.wikibooks.org/wiki/Space_Transport_and_Engineering_Methods Space Systems Engineering]''' collects current and future space technologies that we know of, so they can be considered for future planning and projects.  Some new transport examples are ground-based accelerators and air-breathing engines for reaching orbit, and '''[https://en.wikipedia.org/wiki/Skyhook_(structure) Rotating Skyhooks]''' for artificial gravity and orbit transfer.

&amp;emsp;
=='''3.0 - New Program Concept'''==
&amp;emsp;


&amp;emsp;For discussion purposes we refer to this as a program, with component phases and projects.  But we do not expect it to be under centralized government direction.  Instead it would include independent businesses operated for profit, public/private partnerships, incentive prizes, some government effort, and other project methods.

&amp;emsp;This section summarizes our goals and approach.  The rest of this report, and our other documents, provide more details.  This is a work in progress.  It is by no means a finished proposal or a final design.  It likely never will be, as the future brings new discoveries and technologies.  We have identified new goals and methods, and made a start at the details, but much more work is needed.  Our work is open-source, so feel free to build on it, provide feedback, and contribute your own ideas.


:&lt;u&gt;'''Goal 1 - Benefits on Earth'''&lt;/u&gt;


&amp;emsp;Existing government space program goals are mainly for defense, science, exploration, and national prestige.  They have limited budgets because they compete with other government priorities.  Our approach is to go beyond these limits, to include the full range of civilized activities, both on Earth and in space.  About billion times more people live on Earth right now than in space, and their needs are much larger and more immediate.  So our first goal is to address problems on Earth, starting with easier ones, then moving towards the more difficult.

&amp;emsp;Competition and the profit motive have often demonstrated faster and cheaper results, so we want to take advantage of them.  If there is money to be made, there is a vast pool of capital available beyond government budgets.  The $429 billion '''[https://sia.org/news-resources/state-of-the-satellite-industry-report/ Global Space Economy]''' in 2025 was already mostly commercial activity, and 17.6 times NASA's budget.

&amp;emsp;The original '''[https://ntrs.nasa.gov/citations/19830007077 1982 Version]''' of the seed factory idea was intended to enable large space projects by production in space.  But the laws of nature and how technologies work are the same everywhere.  If networks of exponentially improving and multiplying systems can work in space, they will work on Earth too.  The operating environments, local raw materials, and energy sources may differ by location, but the underlying principles are the same.  

&amp;emsp;The early versions of seed factories would most likely be built in higher income areas.  These are the easiest places to start because equipment, materials, and energy sources are readily available, as are people who know how to work with them.  Conventional jobs have always been at risk from economic and business changes.  In the future they may be permanently replaced by the same kinds of advanced technologies seed factories can use.  Self-built and self-owned production can supplement or replace conventional work for hire.  

&amp;emsp;As the owners of production capacity, people can more securely meet their basic needs.  They get the benefit of the output regardless of how much labor is replaced by technology.  Self-improving systems can grow to mostly copy themselves, so they would become low cost to build.  They can also become highly automated and use renewable energy, making them low cost to operate.  

&amp;emsp;A growing network of productive systems can then be extended to lower income areas on Earth.  This allows bypassing fossil fuel development and the problems it creates, while gaining the comforts, health, and safety found in higher income areas.  The systems can be further extended to difficult and extreme locations on Earth that are currently unused or barely used.  This would lessen scarcity of raw materials, further lowering cost of operation.  These expansions and upgrades should be done with planning and care to prevent new environmental side-effects. 

&amp;emsp;Although we describe a progression from easier to harder locations, a given type of location does not have to be completely developed before starting the next category.  Rather, their starting points are staggered in order of difficulty, and their development then continues in parallel.  


:&lt;u&gt;'''Goal 2 - Benefits from Space'''&lt;/u&gt;


&amp;emsp;Economic and environmental reasons are enough for building self-improving systems on Earth.  Once experience with them is built up, such systems can then be used in a series of locations in space.  There are several reasons for this: 
 

* Access to materials on Earth is limited vertically because temperatures and pressure increase with depth.

* Solar energy in nearby space outside the Earth's shadow averages 7 times more than the Earth's surface because there is no night, weather, or atmospheric absorption.  Close orbits range from 0 to 40% shade, so still have at least 4.2 times the available energy  

* Different and much larger amounts of materials are accessible, which can be used without affecting the Earth's environment.  

* There are a variety of risks to civilization on Earth, both natural and self-created.  Some of them can be reduced by projects in and expansion into space.


&amp;emsp;So our second goal is to make use of space to bring benefits to Earth, and later extend civilization and the biosphere into the space environment.

&amp;emsp;Space projects would logically start with easier and nearby locations, then move to farther and more difficult ones in sequence.  Developing a new location begins with imports of equipment and starter materials from Earth or previous locations.  Core production and resource extraction is built up, then expands to other kinds of industry.  Later deliveries of materials, products, and services helps expand operations.

&amp;emsp;Remote control is feasible when distances are short, otherwise command-response times can be long.  So some people may be needed on-location to set up and maintain equipment.  Suitable locations can build up habitats beyond this for other reasons.  Once built up enough, an existing location, along with previous ones, can serve as staging points for the next ones, supplying transportation, starter sets, and other items as needed.

&amp;emsp;Space locations vary in environment, raw materials, and energy resources.  So a trade network among them and the rest of civilization makes sense, just like it does on Earth.  Each location takes advantage of local conditions to do what it can do best, and trade with others as needed.  Through trade, locations can become economically self-supporting and not a cost sink for society.


:&lt;u&gt;'''Program Advantages'''&lt;/u&gt;


&amp;emsp;Our new approach has a number of advantages:


* It addresses the frequent criticism of space programs that there are problems here on Earth that need solving.  So we place solving economic and environmental problems first, ahead of large space projects.

* Self-improving and highly automated production lowers the cost of rocket factories and launch sites on Earth.  It also lowers how much you need to launch by using local resources already in space.  The combined result is much cheaper space projects.  Activities that are currently uneconomic can become viable.

* In terms of science and exploration, access to the whole Solar System is better than just the Moon and Mars, as interesting as they may be.  Locations develop their local resources, so they can sustain long-term operations, rather than being limited to short term missions and single landing sites.

* A continuing development program much safer than isolated missions.  A network of many locations can keep backup supplies and equipment available, and they can be delivered more quickly.  Automated and remote controlled transports can deliver supplies and equipment before the first people arrive, and regularly afterwards, providing a buffer against problems.

* Lower production and transport costs means more robust designs can be used.  Current space systems minimize weight to save on launch from Earth.  Robust designs will have better safety margins, lowering crew risk.  Bulk mined materials, either in raw form or as end products, can provide radiation shielding during long missions.  Production capacity at the destination, such as the Martian surface, enables making spare parts and replacement supplies on the spot, bypassing long delivery times from Earth.


==='''3.1 - Program Sequence'''===
&amp;emsp;

&amp;emsp;Our program concept is organized into a number of phases and smaller individual projects.  There are several reasons for this:


* The phases have different scales of operation, or use locations with different operating environments, raw materials, and energy resources.  They will need different designs suited to them.

* We intend each phase to economically justify itself, and provide revenue and benefits to support later ones.  It would take too much funding for such a large program otherwise.

* New technologies need more development before using them for seed factories, makernets, and various space projects.  This will not happen all at once.  Splitting up the research and development across phases and projects is more manageable.

* We can lay out a long term program now, but we don't know what new technologies will be invented in the future, or when.  Later phases can be identified for guidance and direction, but it makes sense to concentrate on the early ones for now.  Details of later phases can be left flexible until their time approaches.


[[File:Phase Starts vs Time.png|thumb|right|768x480px|Figure 3.1-1 - Program Phases vs Time.]]  

&amp;emsp;In general, phases don't end, but rather build on previous ones and operate in parallel once started (Figure 3.1-1).  For example, mature industrial factories will continue to operate once new locations are set up elsewhere.  The phases have a logical sequence, where later steps generally depend on earlier ones.  We have identified seven main ones numbered 0 to 6, shown in different colors, with a number of sub-phases indicated by an added letter (4A, 4B, 4C, ...).  

[[File:Program Phases.png|thumb|right|768x480px|Figure 3.1-2 - Logical sequence of program phases.]]  

&amp;emsp;Figure 3.1-2 diagrams the logical relationship of phases.  It does not show all their relationships, since that would make the diagram too complicated to read.  Their general order is from easier to harder, and from local to more distant.  Each phase typically involves multiple projects and locations.  For example Phase 5B - Mars Surface Locations, would eventually include many projects across the planet.  Most locations will evolve across time by expansion and upgrade.  The phases are summarized in the next two headings (3.2 and 3.3), and then in more detail in report sections 4 through 9 below.  
 

==='''3.2 - Phases 0 to 3: Earth Locations'''===
&amp;emsp;

&amp;emsp;Our program in the broadest sense changes the goals from specific destinations, like a mission to Mars, to improving and extending civilization and the biosphere throughout the Solar System and beyond.  We start with our own planet first, because there are large and immediate needs here.  So the first four phases apply to Earth.

&amp;emsp;Much of human civilization is unevenly developed and unsustainable, and the vast majority of people will live here for many decades.  Starting on Earth allows getting experience with technologies that will later be used in space.  It is easier and less expensive to apply them here first, and they can produce economic benefits to sustain themselves.

&amp;emsp;This program would widen participation from national space programs, to the much wider base of all of civilization.  Government space programs are only about 0.08% of gross world product, and only part of that is devoted to exploration and science beyond Earth.  Being more inclusive increases the available inputs for projects, and makes faster progress in the end.  The first four phases are:


:&amp;emsp;&lt;u&gt;'''Phase 0: Research and Development'''&lt;/u&gt; - The first major phase performs necessary research and development (R&amp;D) for production technologies to be used on Earth, later adaptions to space, and ones used only in space.  It also develops transport, habitation, and service technologies as needed for the particular conditions of different locations.  The R&amp;D work is spread out in time according to which phases, locations, and projects particular designs are needed for.  Some later R&amp;D, such as testing hardware in the operating environment, would occur in space.  Since a lot of production technology already exists on Earth, the earliest R&amp;D will mainly be selection of what to use and in what order.  Modified and completely new tech will be worked on later as needed.


:&amp;emsp;&lt;u&gt;'''Phase 1: Starter Locations &amp; Network'''&lt;/u&gt; - This phase builds the first sets of seed factory equipment and begins the self-improvement process.  Phase 1 equipment can start small, such as home and hobby use, which makes it affordable.  Individual equipment items or small groups of them can be located at home or shared work spaces.  A network of people directly or electronically coordinate their work to make items for each other, build new network nodes, and start to accumulate larger shared items.  New locations may start with less than full starter sets, and build up to making internal improvements.  Phase 1 locations are typically in developed and populated areas with access to the materials, energy sources, and equipment needed.


:&amp;emsp;&lt;u&gt;'''Phase 2: Distributed and Industrial Locations'''&lt;/u&gt; - One of the ways a seed factory can grow is to use existing equipment to make parts for larger ones.  This leads from home and hobby size, to small business, commercial, and industrial scale equipment and locations.  At smaller scales it is reasonable to gather the full range of equipment and people in one place, and make a wide range of products.  At larger scales, the equipment and their operators tend to become more distributed and specialized, and serve larger markets.  But they can still coordinate on projects and products.


:&amp;emsp;&lt;u&gt;'''Phase 3: Difficult and Extreme Locations'''&lt;/u&gt; -  This phase begins extending life and civilization to the parts of the Earth where there is very little or none today.  They are unoccupied partly because the environment conditions are more difficult.  Self-improving production allows operating affordably in such places.  New systems would be set up and grow serially from moderate to difficult and more extreme environments.  Technologies like automation and remote control allows machines to operate where it is not feasible for people to stay.     

:&amp;emsp;A major direction for expansion is vertically, to access additional resources and physical space.  This goes beyond the fairly thin current layer of activity near the Earth's surface.  We can expand the total active area by 7.4 times, but height can be increased hundreds or thousands of meters both up and down.  This enables many times more usable volume and materials.


==='''3.3 - Phases 4-6: Space Locations'''===
&amp;emsp;

&amp;emsp;The later parts of our program involve developing and using space to benefit Earth.  It would be based on experience gained in the earlier phases with self-improving systems, which can make more such systems.  It is also based on the larger production capacity developed in Phases 2 and 3.  This capacity enables building transport systems like rocket factories and launch sites, and plus equipment and starter sets to be used at the new locations.  The experience in working in remote and hostile environments in Phase 3 can also be applied to the remote and hostile environments of space.

&amp;emsp;At a civilization level this accesses the much larger physical volume, energy, and material resources beyond Earth.  Some heavy industry can eventually be moved to space locations, protecting the Earth's environment.  It can also decrease societal risks by, for example, diverting hazardous asteroids, or filter parts of the solar spectrum to reduce overheating the planet.

&amp;emsp;As in the earlier phases, we propose a step-by-step approach: extracting local resources, building up core production, diversifying industries, then sending starter sets to the next locations.  Locations become physically and economically self-supporting, allowing moving forward to new ones.  The three later main phases are:


:&amp;emsp;&lt;u&gt;'''Phase 4: Orbital Locations'''&lt;/u&gt; - Locations in this phase share being in orbit around Earth, or in open space between large bodies.  This is in contrast to the the surface or closely bound bound orbits around those bodies.  The sub-phases progress from lower to higher Earth orbits, then in distance from the Sun from closer to more distant.

:&amp;emsp;The main local raw materials are from asteroids and other small bodies, but we can import additional material from Earth, the Moon, and other places.  We can also mine a limited amount of the Earth's upper atmosphere and the &quot;debris belt&quot; of discarded space hardware.  Solar energy is abundantly available in the open spaces near the Sun, but other solutions become more important in the farther areas.  The limit to this phase is the farthest orbits bound to the Sun.


:&amp;emsp;&lt;u&gt;'''Phase 5: Planetary System Locations'''&lt;/u&gt; - These locations are orbits tied by gravity to the Moon, major planets, and their larger moons, or on their respective surfaces.  The sub-phases are by distance starting with the Moon, then to the inner and outer planets.  Although orbital and planetary locations share features like vacuum or atmospheres we can't breath, they differ in having significant gravity wells or surface gravity, and in having night or time in shadow from the Sun.  These differences require different designs, so we place them in a separate phase.  Mars is part of this phase, but compared to current space programs it has long-term and larger scale exploration and development, rather than a few short missions to specific spots.


:&amp;emsp;&lt;u&gt;'''Phase 6: Interstellar Locations'''&lt;/u&gt; - The last major phase of extending life and civilization includes the space between stars and locations bound to other stars.  This is mostly speculative right now because it is far away in time.  A lot new technology will likely be needed, and what will already be developed by then is unknown.  But we see no reason to stop just because the edge of our Solar System is reached.  For now, technical feasibility limits how far projects can go.  But that may change in the future, so we include this final phase as a place-holder, and to provide a direction to plan for.

&amp;emsp;

=='''4.0 - Seed Factory Technology'''==
&amp;emsp;

&amp;emsp;Our program leans heavily on the idea of &quot;seed factories&quot;, which are self-improving production systems which grow from starter sets.  We note some details in this section, but more on the subject can be found in '''[https://en.wikibooks.org/wiki/Seed_Factories Volume I]''', and in information about '''[https://en.wikibooks.org/wiki/User:Danielravennest/SFP Our Project]''', which is attempting to develop the technology.


&amp;emsp;'''Tools and Growth''' - Our ancestors used tools to make more tools at least as far back as the Paleolithic, 2.6 million years ago, when '''[https://en.wikipedia.org/wiki/Hammerstone Hammerstones]''' were used to flake other stones to produce an assortment of tools.  Locally found objects like rocks and sticks were likely used even earlier, but left no identifiable evidence.  In modern times we use metal-cutting '''[https://en.wikipedia.org/wiki/Machine_tool Machine Tools]''' to make parts for more machine tools, plus all the other kinds of machines used to make other products.

&amp;emsp;Any collection of tools and machines can be used the conventional way to provide products and services to others.  The income can then be used to buy new equipment.  What is new about seed factories is using starter sets purposely designed to make parts for more tools and equipment to improve the set.  A starter set can produce its own energy and extract raw materials, or rely on outside supplies to operate.  Once set up, the starter set can improve itself internally in several ways:


* &lt;u&gt;Replication&lt;/u&gt; - making copies of existing parts and equipment,
* &lt;u&gt;Diversification&lt;/u&gt; - making parts for new equipment not in the current set,
* &lt;u&gt;Quality&lt;/u&gt; - making items stronger, more accurate, or from different materials, and
* &lt;u&gt;Scaling&lt;/u&gt; - making different size parts (usually larger) than the current ones.


&amp;emsp;A relatively small starter set can then grow to produce a wide range and large quantity of products.  This can optionally include parts for new starter sets.  A starter set may not be able to copy most of its original parts at first, because it lacks the right equipment.  But after following a planned series of upgrades it can gain the ability to reproduce all or most of the original set.  Biological plant seeds follow a similar growth cycle to make more seeds, which is why we call the starter sets &quot;seed factories&quot;.  Biological plants can even be part of a starter set, such as using trees to provide lumber and also grow more trees. 

&amp;emsp;The seed factory approach substitutes information, like plans and instructions, for some part of a mature and more capable factory.  On Earth this reduces the cost to get started.  For space projects it reduces the starting weight and size, making delivery to distant places easier.  With modern technology, the information can be stored and transmitted efficiently, and '''Smart Tools''' (software, robots, etc.) can do much of the work.  However, growing from a starter set will take more time than immediately building a finished factory.


:'''Self-Replication and Distributed Production'''


&amp;emsp;A seed factory is not the same as a '''[https://en.wikipedia.org/wiki/Self-replicating_machine Self-Replicating Machine]'''.  First, a number of different materials and production processes are needed to make modern equipment.  These are best carried out by separate tools and machines designed for each task.  For large-scale production the set of equipment will be closer to commercial building size, and better described as a factory than a single machine.  

&amp;emsp;Second, a starter set can be much smaller and simpler than the mature factory.  We think of it as the seed from which a factory grows.  But a plant seed is not the same as the mature plant, so this is not direct replication in the sense of making an exact copy.  If a mature factory can produce new starter sets, it is indirect replication by a cycle of growth and then making copies.  This is more like plants and animals reproducing by way of smaller and simpler offspring.

&amp;emsp;Third, starter sets and the mature factories are not generally able to make everything they need by themselves.  At first they will lack all the right equipment.  Even when mature there will likely be items too hard to make, or the materials too rare locally.  Those need to be supplied from elsewhere.  Since they cannot do it all by themselves, they are not fully self-replicating.

&amp;emsp;Traditional factories and workshops had to bring the equipment and people to one place, because it was the only way to coordinate the work.  With modern computers, software, and communications this is no longer required.  Equipment in different places can work together, and people can operate them remotely.  So a modern view of factory capacity is the ability to make things on a regular basis.  The people and equipment may be in one place for efficiency, but they don't have to be - they can be partly or entirely distributed.  What's important is they can work together to make desired products.
 

:'''Operations and Functions'''

 
&amp;emsp;Production in general involves a number of processes, which turn can require multiple steps.  A seed factory may not be able to do all of them at the start, but they can be added in steps as it upgrades.  Process categories include:  


* &lt;u&gt;Control of operations&lt;/u&gt; - collecting data and sending instructions to the various people and equipment.
* &lt;u&gt;Supply power&lt;/u&gt; - this includes electricity, thermal heating, and other sources.
* &lt;u&gt;Extract materials&lt;/u&gt; - mining and harvesting raw materials.
* &lt;u&gt;Process materials&lt;/u&gt; - converting raw materials to usable inventory.
* &lt;u&gt;Fabricate parts&lt;/u&gt; - use inventory stock to produce finished parts.
* &lt;u&gt;Storage and protection&lt;/u&gt; - house inventory in various stages of production, plus protect equipment and inventory from local conditions when needed.
* &lt;u&gt;Assemble elements&lt;/u&gt; - combine finished parts and materials to produce completed products.
* &lt;u&gt;Grow organics&lt;/u&gt; - such as food and timber.  These can grow on their own given the right conditions, making it different from other kinds of production.


&amp;emsp;Most production flows need materials and energy to work with, in addition to tools and machines.  In developed areas these can come from outside sources.  In less- or undeveloped areas, this may be difficult.  Even in developed areas it may be more economic to self-supply.  Production systems can start with or build their own mining and processing equipment for materials.  They can also start with or build energy sources, such as wind turbines and solar farms.

&amp;emsp;Once operating, production generally uses up supplies like lubricants and drill bits, and needs replacements for parts that wear out.  These can either be part of the starter set inventory, or supplied from outside as needed.  Over time, a growing system can start to make these items for itself.  In order to keep growing and improving, a given system has to make or import items faster than old ones wear out.  It also needs enough outside supplies of energy, materials, parts, and other items that it can't make internally.

&amp;emsp;We don't expect mature factories to reach 100% self-sufficiency.  Some items will likely come from other places, in exchange for surplus products and services supplied to others.  We also don't expect fully automated production at current levels of industrial technology.  Some people will be needed to use the equipment and do tasks only people can do.  Those people can be physically present, or in some cases control operations remotely.
&amp;emsp;

&amp;emsp;
=='''5.0 - Phase 0: Research and Development (R&amp;D)'''==
&amp;emsp;

&amp;emsp;The rest of this report provides more detail on our program phases and sub-phases.  It does not provide complete plans and hardware designs both for length and because they haven't been defined yet.  We also can't claim this is the best possible program.  We present it as a ''&lt;u&gt;possible&lt;/u&gt;'' path that leverages self-improving production methods.  Much more work is needed on this idea, and we invite other people to help.  Where next steps have been identified, we note them below, in our two volumes on seed factories and space systems, and our other documents.

&amp;emsp;A vast amount of knowledge, technology, skills, and products already exist.  Where they do, we can simply select and use them.  When new arrangements of existing items, or modified or completely new items are needed, '''[https://en.wikipedia.org/wiki/Research_and_development Research and Development]''' (R&amp;D) is the technical method to create them.  It is a set of innovative activities undertaken by groups of individuals, corporations, industrialists, or governments. This program phase is numbered zero because it is preparation needed to make the later phases possible.  The R&amp;D sub-phases are numbered according to the later phases the work applies to.  So sub-phase 0.1 would be R&amp;D work that applies to Phase 1: Starter Locations.


:'''R&amp;D Goals'''


&amp;emsp;Our program needs research and development because we are attempting a new way to organize projects using starter sets and self-improvement.  This will likely need some new equipment and processes for particular environments, especially those in space.  So the goal of this phase is to supply ready-to-use technology and designs.  Since R&amp;D is the first program phase, it can't evolve from previous ones.  Instead it must start with existing items like buildings, tools, machines, design methods, and skills.

&amp;emsp;Developing new locations is not the main purpose of this phase, like it is for later ones.  Places like offices, industrial space, and test areas will be needed for the R&amp;D work, but can start with existing ones.  In later phases, testing for unique environments may be easier to do in those environments rather than building simulators.  So some later R&amp;D work may move to difficult locations on Earth, or to locations in space.


:'''Production by R&amp;D Phase'''


&amp;emsp;Some production will happen in the course of setting up R&amp;D locations, testing new equipment designs, and figuring out the best operating flows.  But that is not the main goal. Such outputs can be used later, but they are secondary to the main goal to provide usable designs and processes for later phases to use.

&amp;emsp;Some of the newly designed equipment that is built for testing may be kept and used internally afterwards. This would help expand and upgrade the R&amp;D locations themselves, and serve as a demonstration of the self-improvement process.  Other finished equipment, products, and services generated during R&amp;D can get sold or traded to fund further R&amp;D work.  Feedback from practical use of such items can help improve the designs. 

&amp;emsp;Final designs should have a long operating life if they are to be useful.  So early prototypes should aim for longer lives than the time needed to test them.  Prototypes with remaining useful lives can be delivered and used in other locations for later phases and projects.  Lastly, the R&amp;D phase may produce some final versions of starter set equipment.  These can be used directly in later phases.  


:'''Sharing Our Results'''


&amp;emsp;We want our work to have the most benefit for the most people.  So we plan to eventually open-source the designs, so that anyone can use and improve on them.  They may be temporarily kept private to help finance additional R&amp;D.  In general individual machines, factories, and the products they produce, would be separately owned, either privately or institutionally.

&amp;emsp;The R&amp;D Phase may develop new methods and technology to use for itself in the course of working towards later phase designs.  We would also make such new developments available for others to use.  An example is full resource accounting, a method to track all the inputs and outputs of a system the way financial accounting tracks money.  In order for projects to be functional and sustainable, they should account for everything, including scarce resources and all process wastes.  If possible these should be recyclable or usable elsewhere, but you can't do that if you don't identify and track them. 


:'''R&amp;D Tasks and Projects'''


&amp;emsp;The R&amp;D work is divided up according to the later phases and projects that need it.  Items used by  multiple phases are assigned to the first one they are needed for.  Later phases start at different times.  So the R&amp;D work for each one is started far enough ahead that it is ready when needed.

&amp;emsp;New designs and technology are likely needed even for the last phase.  So we expect R&amp;D work will continue for the whole life of our program.  In addition to internal R&amp;D work, we expect technology to make progress outside our program.  So part of the R&amp;D phase is staying current with outside developments, so that improved designs and methods can be developed within the program later.  New and expanded locations within a phase, and unique conditions found there, may require design updates, new hardware models, and customization.  Lastly, we expect feedback from using the items in later phases and suggestions for improvements.  All of these are reasons to continue the R&amp;D process.

&amp;emsp;The R&amp;D work is logically grouped into smaller projects according to the technologies being developed or type of end use.  So far we have started this Seed Factory Project to develop the basic ideas for self-improving systems, and started working on what will be needed for Phase 1 locations and networks.

&amp;emsp;Future R&amp;D project examples are ocean mining platforms or interplanetary tugs.  Such systems would be used in later phases, so we have not yet identified specific ones.  There is a lot of science and technology work happening elsewhere in civilization.  We do not expect to duplicate that work, but use their results where it makes sense, and contribute back our own results to the general fund of knowledge.

&amp;emsp;
=='''6.0 - Moderate Locations'''==
&amp;emsp;

&amp;emsp;Once the R&amp;D phase starts providing plans, designs, and technology, the core self-improvement methods stay the same in all later phases.  But equipment sets must be adapted to local environments, material and energy resources, and available people and their skills.  Finished products and services also need to be adapted for local and export use.  So our program concept has multiple later phases to account for all these differences.

&amp;emsp;Phases 1 and 2 are for the easiest environment conditions, which we call &quot;Moderate&quot;.  This includes temperatures, water supply, and a number of others.  The ranges we consider moderate are listed in section 7.1 which covers conditions that are more difficult.  Moderate ones are the kinds of places where most people currently live.  Among them are locations with significant population and physical development, such as around cities.  These locations have enough people, supply sources, and transportation to get started.  So they are the easiest ones to build the first projects in.  The three phases/sub-phases for these areas are mainly distinguished by scale of operation.  They are phases 1:Starter, 2A: Distributed, and 2B: Industrial.


==='''6.1 - Phase 1: Starter Locations and Network'''===
&amp;emsp;

:'''Goals'''


&amp;emsp;The main goals of this phase are (1) provide products and services at the personal and community level, (2) develop experience with starter sets and self-improvement, and (3) develop trade networks among people in local sites and different locations.  By site we mean an individual place like a home or commercial building, while a location is at the scale of a city or metropolitan area that travel and transport across is reasonably easy.  Network members can trade physical items, labor, information, and other items as needed.  They can also coordinate work on larger or more complicated projects, despite being in different places.

&amp;emsp;Networks would be used in all later phases.  This is because (1) locations vary in the material and energy sources available.  (2) Individuals and groups have variable skills and interests.  They also may not want to travel too far to work on projects.  (3) Physical space, utilities, safety, and local rules may limit the work done at a particular site.


:'''Starting Points'''
 

&amp;emsp;Projects in general need Tools, Resources, Energy, and Knowledge to complete.  We call this the &quot;TREK&quot; principle for short.  Early projects won't have the benefit of a lot of finished R&amp;D work.  To start with they can use already developed tools and machines, existing sources of materials and parts, available electric power and fuels, and the many books, online videos, and other information sources on how to do what is needed.

&amp;emsp;Early project examples are (1) setting up for a hobby that needs working space and equipment and (2) improvements to an existing home.  Such projects don't have to be completed all at once.  They can be started with minimal equipment for the first steps, and gradually add more items as skills accumulate.  Eventually an owner can start building custom items like a work table or storage for themselves.  If they can find other people interested in similar projects they can share knowledge, trade items, and help each other when extra people are needed.  Like other parts of our program, people's skills and the equipment they work with are not intended to reach a static end point, but to grow and develop over time.  So self-education, training, and practice are encouraged.

&amp;emsp;Equipment for this phase starts at the hobby and home use level, for personal and local community products and services.  Their duty cycle (percentage of time in operation) is less than full time, and the equipment is smaller and less expensive.  This puts the equipment in reach of ordinary people or small groups.  Groups of people can afford a number of these smaller items.  They can be housed in space they already have, or they can build or rent space without too much difficulty.  
  
&amp;emsp;Equipment may be distributed at people's homes, or grouped into clusters on one property, such as a '''[https://en.wikipedia.org/wiki/Hackerspace Community Workshop]''' or small scale production cooperative.  Individual sites may be limited in size and cost, but the network as a whole can grow and improve by adding more sites and upgrading existing ones.


:'''Later Improvements'''


&amp;emsp;Improvements can come from new R&amp;D work. personal experience, more copies of existing items, scaling to larger (and sometimes smaller) sizes, and purchases funded from sales.  As the network expands and upgrades itself, it can produce more items internally for further upgrades, and more products for network use or to sell.  Network production can be logically grouped into (1) tools and machines intended to make more tools and machines, (2) items intended for production but not for making more equipment, such as a sawmill or greenhouse, and (3) finished products to be used, traded, or sold, like furniture and food.

&amp;emsp;The R&amp;D phase would gradually develop plans, designs, and instructions for starter sets, upgrade paths, and custom equipment.  These would be shared as information, and can start to be provided as physical packaged sets.  Later projects can then start self-improving faster.  A trading network can grow as more sites in more locations are built.

&amp;emsp;Examples of future R&amp;D-developed equipment include a 1x2 meter bridge mill, with replaceable heads and bits so it can perform different tasks, and a 15 kW solar furnace with replaceable focus targets.  The furnace can directly heat items in a crucible, or generate steam for an electric generator.  Such starter set equipment is designed for flexibility, rather than maximum efficiency and speed.  That way a smaller starter set can be used for a variety of tasks at lower cost.  Later equipment, built with the help of the starter set, can be dedicated to single tasks with higher efficiency and performance.  Starter equipment may be supplied finished and ready to operate, as kits with some level of assembly and supplies needed, or purely as plans and instructions.

==='''6.2 - Phase 2A: Distributed Locations'''===
&amp;emsp;

:'''Goals'''


&amp;emsp;The goals of this phase are (1) increased scale of sites and locations, and (2) relief from job insecurity and displacement by automation.  


:'''Evolution'''


&amp;emsp;Phase 1 locations in general would accumulate skills and equipment.  Some sites within the location will move beyond hobby and home use, towards more regular small business and commercial activity.  This involves part or full time operation, and selling more products outside the self-improvement network.  The larger scale and more intense uses will need different equipment sets.

&amp;emsp;When running a business, speed and efficiency become more important, so equipment is chosen or built to do particular tasks well.  This results in a larger collection of more specialized equipment.  Skills and training also become more specialized and take longer to learn.  Particular sites will tend to do a few things well, and trade for other things they need.  A comprehensive large site (general purpose workshop or factory) that does many kinds of work is still possible in this phase, but less common.  So working sites will tend to be distributed in multiple places.

&amp;emsp;Business and commercial scale operation is not limited to production only, but can also serve the full range of habitation, transport, and service industries.  For example, a restaurant is a service business, but it needs a building, furniture, and kitchen equipment first.  So the logical progression is from core equipment to make more equipment, then finished products like building materials and furniture, and finally industries that don't produce items, but use them to operate.


:'''Ownership'''


&amp;emsp;In the current economic system, separation of ownership and labor results in the problem of job insecurity.  The owners of a for-profit business have the incentive to remove workers as soon as possible to save on labor costs.  The removal may be due to lower production and sales, or changes in business methods and technology that need less labor or different skills.  

&amp;emsp;When a person or group has built and expanded their own equipment and business, the owners and workers are the same people.  They don't have the same incentive to remove themselves.  To the extent they make items for their own use, production would remain constant.  If outside sales decrease, they own the equipment to build and start doing something else to make up the difference.  Automation is a threat to conventional jobs by needing less labor.  But owners who use the same automation for themselves are not threatened with unemployment.  Rather they just work less time or more efficiently.

&amp;emsp;By diversifying into different industries, self-owned production can integrate with the rest of civilization and be self-supporting.  New network members can become owners by first building or buying into a share of core production.  They can then use that production to make or trade for what's needed in other industries.  Alternately they can start out working for others in their chosen industry, and buy or trade for production shares.  Either way they have more security as owners.

==='''6.3 - Phase 2B: Industrial Locations'''===
&amp;emsp;

:'''Goals'''


&amp;emsp;The main goal of this phase is to reach the most efficient production levels by additional growth in scale and specialization.  Industrial locations are in the same kind of developed areas and moderate environments as Phase 2A Distributed Locations, so we group them together under Phase 2.  


:'''Growth and Specialization'''


&amp;emsp;Industrial sites can evolve from distributed small business or commercial sites by continuing self-improvement and growth.  They can also be built as new sites of the final size, where the equipment is supplied by other parts of the network.  In that case, supplying the larger equipment and space to house them will likely need outside capital, because individuals or a small group typically won't have enough funds.  Gradual evolution from a smaller size by self-production would not require as much, or any, outside funding.

&amp;emsp;Larger work spaces with larger input and output flows will tend to limit industrial locations to fewer products.  For example, if you are processing scrap metal on an industrial scale into new metal stock, it helps to be near a rail line to transport the scrap and the finished metal.  The more products, factory space, and specialized needs you have, the less likely you will find one big site that can satisfy all of them.

&amp;emsp;The larger production scale means more outside customers for the products, or larger scale customers.  The market area for a site will likely reach beyond a single location, to a region or even world-wide.  Since outputs are sold to a wide range of customers at greater distances, transport capacity becomes more important in this phase.

&amp;emsp;A narrow product range and large scale markets means demand can be more variable from general economic circumstances or competition.  Distributed finance and ownership makes sense in this case.  Demand may be low for a particular product, but may be high for something else.  In a distributed portfolio these tend to average out.  Owners can then reassign their labor and equipment as needed to meet the higher demand products.

&amp;emsp;The overall production network has a high capacity to recycle and self-produce what it needs.  So modifying equipment to meet changing needs is easier to do.  This is a somewhat different business model than investors and workers, with managers in between.  It more a network of active owner-operators who can change the mix of what they own and what they produce as needed.

&amp;emsp;Like distributed locations, industrial ones can serve the full range of industry types.  A combination of industrial, distributed, and individual scale industries can meet most of the needs that people have.  If they own their own equipment, or shares in them, because they collectively built and grew them themselves, those needs are met securely, despite higher levels of automation.

=='''7.0 - Other Earth Locations'''==
&amp;emsp;

:'''Goal'''


&amp;emsp;The main goal of this phase is a better quality of life through sustainable development.  The Earth's population is growing, and most people want a better lifestyle.  This needs more physical resources and energy.  But the Earth is already being stressed by human impact on the environment, and future growth will only increase the stress.


:'''Method'''


&amp;emsp;One way out of this dilemma is to produce abundant renewable energy with self-improving systems.  These systems make more of themselves exponentially, including more power sources.  Renewable energy will have much less impact on the planet's heat balance.  Large amounts of energy allow increased reprocessing of wastes, and extraction from lower grade ores or even common rock and ocean water.  Rapid expansion brings material goods to the rest of the world faster.  Self-production and automation lowers the relative costs of products, energy, and materials.


:'''New Locations'''  


&amp;emsp;Increased supply of raw materials and energy will likely need access to more difficult and remote locations.  So Phase 3 covers working in areas that are thinly or completely uninhabited, or that have difficult or extreme local environments.  New designs and processes will be needed for such areas.  So a new program phase with added R&amp;D is started.

&amp;emsp;Harder conditions are a matter of degree, rather than absolutes with a clear dividing line.  Sections 7.1 and 7.2 list the ones we have identified.  We define the &quot;normal&quot; (moderate) range as those where the middle 90% of of people live.  Difficult and extreme conditions are then significantly above or below the moderate range.

&amp;emsp;If at least one of the eleven parameters is well beyond the moderate range, then the location is assigned to the difficult category.  Extreme locations are even farther from moderate, and can be hostile to people living and working there.  More remote-control and automated operations will tend to be used, instead of trying to build controlled environments for people. 

&amp;emsp;We want to preserve the Earth's total environment, and the parts that are still in a natural state.  So developing the difficult and extreme locations must consider sustainability, renewable energy, and environmental impact.  An example would be building offshore fisheries to replace wild fish catches.  The latter are putting a strain on the ocean food chain, so it is desirable to minimize that impact.  But the fisheries must consider all their inputs and outputs in a total system approach to avoid unintended side-effects.

&amp;emsp;The mechanics of building in these locations is somewhat different than previous phases.  These areas are less populated, with fewer supply sources and utilities available.  So growing from a minimal set of tools and machines is harder to do.  Instead, more finished equipment is sent from previous locations to start basic functions like mining and producing energy.  A set of production equipment then uses these resources, plus some level of imported supplies, to increase capacity.  

&amp;emsp;That capacity then supplies products and services for local use.  Surplus output is traded with the rest of civilization to make the locations self-supporting economically.  Once built up, a location can also contribute to starting additional ones.  The experience gained in working in difficult or extreme conditions, working remotely, and building up resource extraction and production in such places will be useful for later phases beyond Earth.


==='''7.1 - Phase 3A: Difficult Earth Locations'''===
&amp;emsp;

&amp;emsp;We define moderate conditions as those where the middle 90% of the Earth's population lives, with 5% at the upper or lower ends for a given parameter.  This definition is somewhat arbitrary, but we think reasonable from a design standpoint.  The &quot;Difficult&quot; environments are then those that are at least 10% beyond the moderate range in at least one parameter.  10% is measured either linearly or as a logarithmic factor, depending how wide the normal range is.  The parameters and moderate and difficult ranges are:


&amp;emsp;'''Temperature''' - This is measured by winter average daily lows and summer average daily highs.  The moderate range is 260-310K (-13 to 37C).  A given location is likely to exceed either the high or low limit, but not both.  The difficult range is therefore below 255K (-18C) or above 315K (42C).  Examples of difficult temperatures include Chelyabinsk, Russia, where average winter lows are -19C, and Death Valley, California, where summer highs are up to 47C.  The lower limit ie more likely to be reached at high altitudes and latitudes.  The high limit is more likely to be reached deep underground, because the Earth's internal temperature rises 25 Kelvin/Celsius on average per kilometer of depth.

&amp;emsp;'''Water Supply''' - This is measured by fresh water supply in meters or tons/m^2 per year from rain, rivers, snow, ice, moisture condensation and freshwater aquifers.  Salty surface water and aquifers are not included, as they aren't drinkable without desalination.  Aquifers are limited to natural replenishment rates, as they are not sustainable if drawn from faster.  The moderate range is 0.25 to 2.5 meters/year.  Since this is a large range, we use a logarithmic scale, and define difficult as 26% below or above the moderate limits, or &lt;0.185  and &gt;3.15 meters/year.  The world's drier deserts fall below the 18.5 cm rainfall level, and places like the east coast of Nicaragua exceed the 315 cm upper limit on rainfall.  Too much water is difficult because it can cause problems like flooding, erosion, and decay.

&amp;emsp;'''Atmosphere Pressure''' - This is measured by average local air pressure in kiloPascals (kPa).  For reference, standard sea-level pressure is 101.325 kPa (14.696 psi).  The moderate range is assumed to be from 80-100 kPa (near sea-level to 2000 meters altitude)  Difficult pressures are below 70kPa (2750 meters altitude) or above 110 kPa (750 meters below sea-level).  These correspond to high mountains or plateaus, and deep underground at low altitudes, since the lowest surface elevation is -413 meters.  Low pressures and rapid changes in pressure can cause medical problems for people, so pressure-control is needed where people are.  Effects on equipment are mostly minor in this range.

&amp;emsp;'''Ground Pressure''' - This is the ground/soil strength at the surface, or surrounding water or rock pressure below the surface, in MegaPascals (MPa).  These affect the design of structures, and values that are too low or too high become difficult.  For reference, average household floors are designed for 0.275 MPa loads.  The moderate range is 0.25 to 2.0 MPa.  Difficult conditions are then below 0.19 MPa or above 2.5 MPa.  The high limit is reached at ocean depths of 250 meters, and underground at depths of 100 meters in average rock.  High surrounding pressures require closed containers to lower them for people, or support structures to prevent collapse.  The low limit is reached in open waters (zero strength), fine sand or moist clay (low strengths).  Low ground strength requires larger building foundations, or floating construction in the case of open waters

&amp;emsp;'''Energy Supply''' - This is measured by average energy supply from renewable natural sources in W/m^2.  Wind and solar are available in most places, and are rapidly renewable.  Ocean thermal and geothermal are widely available if you go deep enough, but take long periods to renew once depleted, so we only count their renewal rate, not the stored energy.  Sources like hydroelectric or tidal energy are not available everywhere, but counted if they are.

&amp;emsp;Fossil fuels are not sustainable because of finite supply and the waste products they produce.  Biofuels may be produced sustainably.  Fuels for nuclear fission and fusion (which is still being developed) are in large enough supply to be considered sustainable but require mining or separation.  They can be used to produce energy, but we don't count their contribution to local supply.

&amp;emsp;Low energy supply is difficult because some is needed for almost every kind of human activity.  If it is not available locally, it must be imported by methods like fuel delivery or power lines.  High levels of energy supply are not considered difficult.  The range of energy flux is roughly 150 to 900 W/m^2 on Earth, so a difficult low value is 125 W/m^2.  Any significant depth below the surface is cut off from wind and solar sources, so are likely to be difficult and require energy supplied from elsewhere.

&amp;emsp;'''Gravity Level''' - This is mainly one of the conditions for space environments.  On and near the Earth's surface it does not vary by more than 10% unless you are in a centrifuge or accelerating vehicle, so there are no natural places on Earth beyond moderate conditions.  Low gravity causes biological problems for people, and may for animals and plants.  High gravity is difficult to work in for people, and requires extra structural support for physical items.

&amp;emsp;'''Radiation Dose''' - This is measured by unprotected background radiation in milliSeivert (mSv)/year.  Industrial exposure, such as to medical imaging staff, or from mining, using, and disposing of radioactive materials, is not considered an environment condition.  But such exposure needs its own designs for safety and shielding.  Natural background radiation varies by location, according to altitude, magnetic field, and what materials are in the ground below.  In most places on Earth it varies from 1 to 13 mSv/year.

&amp;emsp;A few places have high radiation levels from concentrations of radioactive elements and their decay products, up to 135 mSv/yr.  People have lived in such locations for many generations, with no apparent ill effects.  Since adaption may have occurred for long-term residents, we will be conservative and consider high radiation levels a hazard to the general population.

&amp;emsp;Levels above 17 mSv/year would be considered difficult.  Depending on sources, they might require shielding, sealing, or air circulation.  Low radiation levels are not considered hazardous, so background levels below 1 mSv/year are not considered difficult.  Note that the human body contains some radioactive elements naturally, so there is no zero background level.  Even the highest natural radiation levels on Earth are not significant for most equipment designs.

&amp;emsp;'''Ping Time''' - This is the round-trip communication delay to the next nearest 5% of world population, in milliseconds (ms).  Long delays create difficulty in voice communications or real-time remote control, and slow down any computer network-based activity.  There is no lower limit for this parameter, since short ping times are not a difficult condition.

&amp;emsp;On or near the Earth's surface we consider ping times above 100 milliseconds to be difficult, as this much delay starts to be noticeable to people.  There are few locations that have such high values to reach 5% of the world's people.  The 5% value is because you can choose to do tasks like remote control from reasonably nearby, and not from the farthest place on Earth.  This parameter becomes more important in space.  The speed of light limits operations to within 15,000 km to stay under 100 ms.  That only reaches moderately high Earth orbit, and most of space is far beyond that distance.

&amp;emsp;'''Travel Time''' - This is the maximum one-way normal travel time for people, to reach the nearest 5% of other people.  Travel time for cargo is assumed to be proportional to that for people.  High travel times makes it more difficult and expensive to bring in people with special skills, or necessary parts and materials.  Densely populated areas can usually be reached in 5 hours or less.  Most of the world's populated areas can be reached within 48 hours, so we set this as the upper limit for moderate (developed) travel.  The worst case travel time is 10-20 days for parts of Tibet which lack roads, and ocean locations distant from any airports, requiring ship travel to reach.  Very low travel times are not a difficulty, so we set no lower limit for this parameter. We define difficult travel as needing more than 2.5 days.

&amp;emsp;'''Stay Time''' - This is the average stay time per person per location, in years.  People stay in the same location if they live and sleep there the majority of the time, and make trips to other locations less than half the time.  Short stay times are more difficult because of increased transportation needs and staff turnover.  The short times may be caused by a harsh environment, lack of habitation and services, or the location is simply undesirable.  It can also be caused by a rapidly growing population lowering the average residence time.  In that case, the difficulty is caused by having to rapidly build new habitation and services.

&amp;emsp;Long stay times are not considered difficult, and their upper limit is the human lifespan.  Rapidly growing areas provide the shortest average times on Earth, 7 years if normal turnover is added to growth.  Since the upper bound is ~70 years, we will set the difficult limit at 25% below the shortest average, at 5 years.  Examples where such low values occur are mining and construction camps in remote locations.

&amp;emsp;'''Transport Energy''' - This is the total energy to reach a location from the nearest 5% of population, by the most efficient method, in MegaJoules per kilogram (MJ/kg).  For reference, 3.6 MJ = 1 kiloWatt-hour of electricity.  Transport energy includes kinetic, potential, and frictional energy.  High transport energy is difficult because of increased need for equipment, and their higher cost of operation.

&amp;emsp;On Earth, potential and kinetic energy of transport are generally low, and friction dominates.  Rail and water transport are currently the most efficient bulk methods, and range from 0.225 to 2.25 MJ/kg between densely and sparsely populated areas.  Low transport energy is not considered difficult, but we set values above 2.85 MJ/kg to be.  Such values can occur when rail and water transport are not available, and part of the trip must be by less efficient methods.  It can also happen when there is a lot of altitude change on the route, increasing frictional losses so as not to exceed speed limits.


&amp;emsp;Some of these parameters change with time, due to technology and development.  For example, parts of Alaska had long travel times when the only available transport was by dog sled.  Once small airplanes and a network of landing fields were available, it became less difficult.  It may be a specific goal to upgrade a location to less difficult status, but we define it for phases and R&amp;D by the pre-existing conditions that have to be dealt with.


==='''7.2 - Phase 3B: Extreme Earth Locations'''===
&amp;emsp;

&amp;emsp;We define extreme locations as an additional 10% beyond the difficult range.  This is again in linear or logarithmic amounts, depending on the span of moderate conditions most people live in.  The more extreme parameters will need further design modifications, and therefore supporting R&amp;D to develop them.  We define no upper bound on how extreme things can get, they are only limited by the natural environment and general state of civilization.  The parameter values are:


&amp;emsp;'''Temperature''' - average daily lows below 250K (-23C) or average daily highs above 320K (47C).  The lows might be found in Antarctica or at high altitudes. The highs are found deep underground or in the hottest deserts.

&amp;emsp;'''Water Supply''' - The lower range is less than 0.12 meters/year (4.75 inches), which is a very dry desert.  The upper range is more than 3.8 meters/year, which is found in the wettest rain forests.

&amp;emsp;'''Atmosphere Pressure''' - The extreme ranges are below 60 kPa or above 120 kPa, which correspond to altitudes above about 5500 meters or below -1600 meters.  These correspond to very high mountain tops and deep underground.

&amp;emsp;'''Ground Pressure''' - The ranges are below 0.12 MPa or above 3 MPa.  These correspond to soft clay or open water at the low end, and depths of 300 meters in water and 120 meters in rock.

&amp;emsp;'''Energy Supply''' - The low range is below 90 W/m^2 from wind and solar, which is mainly encountered below the surface.  High values of energy supply are not a difficulty.

&amp;emsp;'''Gravity Level''' - This parameter does not vary by more than a few percent on Earth, so extreme conditions more than 20% beyond normal do not occur.

&amp;emsp;'''Radiation Dose''' - The extreme range is more than 21 mSV/year, which occurs in some natural high radiation areas, or if spending a lot of time (&gt;25%) at high altitude near the magnetic poles, where cosmic radiation can come down vertically.

&amp;emsp;'''Ping Time''' - The range for extreme ping time is more than 125 ms round trip.  This is nearly around the world at the speed of light, so accessing 5% of the population only takes this long if radio or fiber communications routes are very indirect or unavailable.

&amp;emsp;'''Travel Time''' - The range for extreme travel time is more than 3 days to reach.  This is found only in very remote areas without conventional transportation.

&amp;emsp;'''Stay Time''' - The lower range is average stay times below 3 years 4 months, which mainly would be found in temporary work locations.

&amp;emsp;'''Transport Energy''' - The upper range for extreme transport energy is above 3.5 MJ/kg.  This is reached mainly when inefficient transportation has to be used.

=='''8.0 - Phase 4: Orbital Locations'''==
&amp;emsp;

[[File:Von_Braun_1952_Space_Station_Concept_9132079_original.jpg|thumb|right|640x446px|Figure 8.0-1 - 1952 space station concept by Wernher von Braun and Chesley Bonestell.]]

:'''Goals'''


&amp;emsp;The main goals of phases 4 through 6 are using space to bring benefits to Earth, and to help with some long-term problems and risks that can't be handled any other way.  

&amp;emsp;Figure 8.0-1 is an early concept for a rotating '''[https://en.wikipedia.org/wiki/Space_station Space Station]''', made 5 years before the first orbital launch of Sputnik 1. Note the ring-shaped solar collector on top.  This would heat a fluid to produce power, since the first practical silicon solar cell would not be made until 2 years later.  We show this concept as a reminder that plans can only be made from what is known at the time.  Our approach to developing space may look equally out of date 75 years in the future.  Despite that, we have to start somewhere and then make updates as needed.


:'''Approach'''


&amp;emsp;This section (8.0) 9.0, and 10.0 cover Phases 4, 5, and 6 in that order.  Sub-phases for each are grouped together because they involve working in similar space environments.  We expect the various sub-phases to have different starting times due to relative difficulty in reaching their locations and distance from Earth.  But once started the sub-phases would overlap and continue in parallel.

&amp;emsp;Orbital locations (Phase 4) come first, because Earth orbit has to be reached before going anywhere else in space.  Planetary system locations (Phase 5) come next.  They share being on or tied by gravity to the larger Solar System bodies other than Earth.  Their gravity wells take more work to travel to and from than orbital locations in similar solar orbits.  The local environments are also different on and around these bodies.  Phase 6 (Interstellar Locations) involves places beyond the Sun's gravitational dominance.  It is expected to be last in time.  It is hard to predict what technology will be available by then, and how such distant locations would be used.  So the last phase is mainly included as a placeholder and to provide some direction for future work.


:'''Current and Near-Term Space Industry'''
 

&amp;emsp;Working on long-term problems doesn't have an immediate economic return.  So the first uses of our approach for places beyond Earth would be to support existing and near-term space industry.  According the '''[https://orbitalradar.com/how-many-satellites-in-orbit Orbital Radar]''' site there were over 18,000 active satellites orbiting the Earth in September 2026.  There were also about 10,700 pieces of debris and leftover rocket parts.   There are a smaller number of spacecraft and other items that have been sent beyond Earth orbit, some of which are still operating.  The inactive equipment, plus other discarded items and fragments, make up artificial '''[https://en.wikipedia.org/wiki/Space_debris Space Debris]'''.  The increasing amount of debris is one of the long-term problems that need solving.  

&amp;emsp;'''[https://sia.org/news-resources/state-of-the-satellite-industry-report/ Total Economic Activity]''' related to space was $429 billion as of 2025, split between government and private projects.  But nearly all of the people involved, and most of the physical tasks, happen on Earth.  This provides a starting point for using our self-improvement methods and other advanced technology.  In turn that should lower costs.  

&amp;emsp;Reaching space is generally industrial-scale activity.  Rockets themselves are large, and so are the places and equipment to build and launch them.  So it would be part of or follow Phase 2B's other industrial locations.  What is sent to space can be as small as hobby scale.  '''[https://en.wikipedia.org/wiki/Amateur_radio_satellite Amateur Radio Operators]''' have sent satellites into orbit, and over 3,000 '''[https://en.wikipedia.org/wiki/CubeSat Cubesats]''' based on 10 cm modular sizes have been sent to space.  Building and operating equipment sent to space more typically ranges from Phase 2A's small business and commercial scale up to the industrial level.  

&amp;emsp;Reaching space was very expensive until recently because some or all of a rocket was discarded after one use.  The high cost limited space activity to large nations or groups of them at first.  Over time, commercial space activity has grown to be about 75% of the total.  Lower cost transportation and satellite equipment is actively being pursued.  The methods include adopting mass production, and discarding less or none of the rocket each flight.  

&amp;emsp;Most equipment sent to space is also discarded when it fails or reaches the end of its useful life.  Replacing the equipmwnt adds to the cost of operating in space.  Refueling, maintenance, and repair of space hardware is very limited.  New production, upgrades, and recycling in space is limited to non-existent.  Total cost can be lowered by changing how space projects are built, delivered, and operated.  In turn this would expand existing uses, and open up new ones like private space stations and space tourism.  


:'''Long-Term Sustainability'''


&amp;emsp;As of 2025 fossil fuels supplied 81.9% of global primary energy.  Since about 1900 their rapid growth powered most of the development of modern civilization.  But that comes with a number of unfortunate side effects.  They include environmental damage, pollution, and adding greenhouse gases, mainly CO2, to the atmosphere far faster then natural processes remove it.

&amp;emsp;These gases reduce infrared radiation back to space, altering the balance between incoming sunlight and outgoing heat.  Venus' surface temperature of 462 C (864 F) shows why this is a bad idea.  Only 50C of Venus' higher temperature is due to being closer to the Sun.  The rest is primarily heat trapped by a thick CO2 atmosphere.  Society must transition this century to renewable non-carbon energy sources, so Earth doesn't become more like the hell that Venus is.

&amp;emsp;Despite the large-scale use of fossil and other energy sources, current civilization can't afford to capture and reprocess all waste materials, nor extract new materials from abundant but low-grade sources.  New materials come from '''[https://en.wikipedia.org/wiki/Ore Ores]''' instead.  These have higher concentrations of desired products, which take less work to extract.  However, high-grade ores are in limited supply.  If used materials are not fully reprocessed, those ores will eventually run out.  So the current state of civilization is unsustainable.  It is heading towards severe problems from increasing temperature, running out of affordable materials, or both.  

&amp;emsp;At the same time, the world's population is growing, and not everyone has the benefits of high income economies.  Full development of such economies would demand even more energy and materials.  It's unfair to deny these benefits to some people because others were the first to get them.  A growing population with a high standard of living will put more stress on the remaining natural world, and deplete accessible resources faster.  Self-improving factories and other advanced technologies can be used to build more renewable energy sources and reprocess more wastes.  This would have less impact on Earth, but it would not reduce it to zero.  


:'''Civilization-Level Risks'''


&amp;emsp;Another problem is preserving civilization and the biosphere in the face of large-scale risks.  One such risk is runaway greenhouse warming due to positive feedback loops.  This is different than the temperature rising a certain number of degrees from higher CO&lt;sub&gt;2&lt;/sub&gt; levels.  Melting ice caps can expose darker water or land, increasing the absorbed sunlight and causing further melting.  Another feedback loop is release of methane from frozen ocean hydrates and organic matter in permafrost.  Methane is a strong greenhouse gas, and so can lead to accelerated release.

&amp;emsp;Another risk is from asteroids.  Large asteroids fly past Earth fairly frequently, and occasionally hit it, causing widespread damage.  There are enough craters, recorded impacts, and near misses to know it is a low probability event, but can be catastrophic if it does.  So it is worth trying to reduce that risk.  Note that small objects either burn up in the atmosphere or only cause local damage, and don't require civilization-level action to prevent.

&amp;emsp;There are other large-scale risks besides these two.  Examples include '''[https://en.wikipedia.org/wiki/Supervolcano Supervolcano]''' eruptions, genetically engineered plagues, and nuclear war.  It is worth some effort to identify these risks, and reduce them if possible.  Backup locations beyond Earth can be a last resort if such efforts fail, but most efforts should likely be directed at prevention rather than recovery.


==='''8.1 - Using Space to Solve Earth's Problems'''===
&amp;emsp;

&amp;emsp;There are abundant energy and material resources in space.  If the cost of using them can be brought low enough, then that becomes preferable to, for example, putting more solar panels in climates unsuited to them, or digging ever deeper underground to find high quality ores.

&amp;emsp;There is seven times more solar energy available in space near the Earth than the average on the ground.  Atmospheric absorption, night, and weather account for the difference.  The equipment to collect that energy is also about seven times lighter because it doesn't need to handle gravity and weather.  So the energy output to equipment mass ratio is roughly 50 times higher.

&amp;emsp;There is also a wide variety of accessible materials in space, starting with the Moon's surface and nearby asteroids.  These have been &quot;pre-mined&quot; in the sense that impacts have left them broken up and loose.  Extracting them doesn't need heavy equipment, so the tons mined per ton of equipment is high.  The combination of high energy and low equipment could allow rapid bootstrapping of space industry.  The products can then help solve the problems and risks we noted above.


:'''Lowering Space Operations Cost'''


&amp;emsp;Reaching and working in space has been very expensive, especially beyond the lowest Earth orbits.  But that is an engineering problem, not one set by basic physics.  For example, wholesale potatoes are on the order of $300/ton, and the wholesale electrical energy to put those potatoes in Earth orbit (8.7 MWh) is on the order of $550, less than twice as much.  Sending even cheap bulk commodities to space would be affordable if done with high efficiency.  Current launch costs are quoted at $1.52 million/ton or more (Falcon Heavy, 2022), 2750 times as much.  This shows how much room there is for improvement.  

&amp;emsp;There are a number of ways this cost can be reduced.  Reaching space today requires a good deal of equipment on Earth, like rocket factories, the rockets themselves, and launch sites for them.  Self-improving automated production can lower the costs of these.  As with other industries, you can begin with a starter set, and grow it until you have mature factories that produce the space hardware you need.

&amp;emsp;A large amount of rocket and satellite hardware is discarded after use.  This is a major contributor to high costs.  Improved designs can allow reuse and repair.  Conventional rockets are also inefficient.  They require about 40 times the payload mass in fuel (for '''[https://en.wikipedia.org/wiki/Rocket_propellant#Current_cryogenic_types LOX/RP-1]''') containing 387 MJ/kg of fuel energy.  The payload ends up with 32 MJ/kg of kinetic and potential energy, so the fuel efficiency is only 8.3%.  Alternate launch methods can dramatically improve on this value, but there has to be enough traffic to space to justify their development. 

&amp;emsp;Advanced production methods in space, using materials and energy already there, can ultimately reduce mass launched from Earth by 98-99%.  The transportation component of operating in space can then be reduced by a similar ratio.  If in-space production costs are less than the launch savings, then overall costs go down.  

&amp;emsp;More efficient space technologies, like electric propulsion and closed life support, further reduce the mass from Earth needed to operate.  The closer we can source supplies to the desired destination, the less effort is needed to move them there.  So a Lunar or Mars base would ideally get most of what it needs locally, or from not too far away, and only get from Earth what can't be found or made otherwise.  The combination of all these methods would get much closer to &quot;potato cost&quot;.


:'''Space Development Process'''


&amp;emsp;Our approach would follow the same general path in space as it does on Earth.  In particular the methods used for difficult and extreme locations on Earth are relevant, although the details will differ.  Space is nearly undeveloped and barely populated.  So early tasks include delivering equipment to supply energy and gather raw materials.  A core set of processing equipment would be used to turn raw materials into basic supplies like propellants, and production inventory like metal stock.

&amp;emsp;Other equipment takes these products, plus some amount of imported items, and fabricates parts for more production equipment, plus finished items like habitats for people and food production.  Metals for machinery and construction are likely the majority of first generation production, since that is the foundation of industry on Earth.  Second and later generation equipment can then produce other materials and products in an expanding sequence.  

&amp;emsp;In the early stages there is less equipment available at a given location.  So a larger percentage of parts and materials has to be imported from previous places, or from Earth.  As more equipment accumulates, a higher percentage can be produced locally.  Once a given location has matured enough, it can start to make items for new starter sets.  These can be used in the same region, such as other parts of the Moon, or sent off to start developing new regions.

&amp;emsp;Once a location can export a surplus of locally made items, they can be traded for those it can't make, or needed materials that are locally rare.  Such trade would be based on '''[https://en.wikipedia.org/wiki/Comparative_advantage Comparative Advantage]''' like it is on Earth.  By export and trade a location can become economically self-supporting, and not a cost burden.  This is in contrast to a station or base that can't make things locally, which has to be supplied from elsewhere at a continuing cost.

&amp;emsp;Self-supporting locations can produce an expanding wave of civilization and life as far as people want to carry them - throughout the Solar System, and in the long term, beyond it.


:'''General Space Environment Features'''


&amp;emsp;Orbital locations in Phase 4 begin at 200 km altitude above the Earth's surface, where atmospheric density is low enough for stable orbits.  They extend beyond that to the limits of stable orbits bound by gravity to Earth, then to interplanetary orbits at all distances from the Sun.  The planetary system locations of Phase 5 are embedded within the larger interplanetary region, and move with the major bodies and the gravity fields they produce.

&amp;emsp;The environment conditions, raw materials, and available energy vary widely across the different regions.  So we divide Phase 4 into six sub-phases by region, and Phase 5 into five sub-phases.  We expect their development to start mostly in order by distance from Earth.  Orbital locations include smaller bodies like asteroids found there, and planetary systems include an area of stable orbits around them and the smaller bodies tied to them by gravity.

&amp;emsp;The environment parameters for Phases 4 and 5 are generally more difficult than extreme ones on Earth (Phase 3B).  The added difficulty in many cases is incremental, not orders of magnitude steps, and not in all parameters.  Proper design and operation can deal with most of these conditions, but some places are so extreme that current technology has no way to handle them.  The general ranges are noted here.  Some details for sub-phases and particular locations are noted below.  Extensive and growing knowledge about them comes from the field of '''[https://en.wikipedia.org/wiki/Planetary_science Planetary Science]'''.


* '''Temperature''' - Distance from the Sun, and the percent field of view of the '''[https://en.wikipedia.org/wiki/Cosmic_background_radiation Cosmic Background]''', which is at near absolute zero temperature (2.7K) are the main determinants of local temperature.  It can range anywhere from above 700K to below 50K (+425 to -225 C).  Partly shadowed orbits, or night on a surface, can produce wide temperature swings.  Reflection from the surface of a body, or underground surroundings, will modify the ambient temperature.

* '''Water Supply''' - Orbital locations don't have a weather system that delivers a renewable water supply like Earth.  But some bodies have water in the form of hydrated minerals or ice.  Liquid water layers may exist inside dwarf planets and moons, and water in general is abundant beyond the &quot;frost line&quot; around 3 times Earth's distance from the Sun (3 AU), where temperatures are low enough for ice to be stable in a vacuum.

* '''Atmosphere Pressure''' - Vacuum is the normal condition in open space and on the surface of most bodies.  Some of the larger dwarf planets and moons have non-zero pressures, and all the major planets except Mercury have significant to dominant atmospheres.

* '''Ground Pressure''' - This doesn't exist in open space, and is generally low even for larger asteroids, either because of low gravity or low surface strength.  Ground pressure can become significant if you go deep enough into larger asteroids.  It becomes very high inside large moons and major planets.

* '''Energy Supply''' - Varies from above 10 kW/m&lt;sup&gt;2&lt;/sup&gt; in close solar orbits to below 1.5 W/m&lt;sup&gt;2&lt;/sup&gt; beyond Neptune.  Orbits with time in shadow lose a percentage of this.  Surfaces in vacuum reduce solar energy by about 50% from nights, with variations from topography like mountains and craters.  Atmospheres can further reduce solar energy.

:&amp;emsp;Other sources like wind, precipitation, and geothermal may be available on some bodies.  Nuclear power is possible using fuel delivered from Earth or mined from places with radioactive elements like the Moon.  Power can be transmitted over moderate distances using conductors and beams, or even simple reflectors.

* '''Gravity Level''' - Natural gravity ranges from zero in free orbits, to about 3% of Earth's on dwarf planets, and up to 2.4 times Earth on larger moons and major planets.  Artificial gravity can be supplied by rotation where biology or industrial processes need it.  Artificial gravity is only limited by structural materials and practical issues like arrival and departure.

* '''Radiation Dose''' - Most orbits and surface regions have high natural levels of radiation from galactic cosmic rays, solar particle events (flares), and '''[https://en.wikipedia.org/wiki/Van_Allen_radiation_belt Radiation Belts]''' like the ones around Earth.  Devices like solar panels and electronics are generally less sensitive to radiation than living things, but can still be damaged or temporarily upset.

:&amp;emsp;Radiation can be lowered to safe levels using bulk mass as shielding, or possibly artificial methods like magnetic fields.  Shielding mass in orbital locations can come from asteroids or imported from moons.  On substantial bodies their mass provides partial natural shielding, and going underground and arranging local materials can provide the rest.  Space transport vehicles can use fuel, water, or other supplies as shielding.  Large habitats may get enough shielding from their outer structure, equipment, and storage tanks.

* '''Ping Time''' - Round trip communication time varies greatly from milliseconds in low Earth orbits to hours or even days in the outer Solar System.  Essentially all the communication time is due to speed of light delays.  On Earth, fiber-optic cables transmit at about 2/3 the speed of light, and follow indirect paths from geography and a spherical planet.

* '''Travel Time''' - This also varies greatly according to orbit region.  It can take a few hours to reach low Earth orbit or return from it to the ground, plus some travel time to other population on the Earth's surface.  Travel to the outer Solar System using known propulsion systems will take a number of years or even decades.

* '''Stay Time''' - This is currently very short because there are no permanently inhabited locations in orbit.  Astronaut crews typically stay about 6 months aboard the International Space Station.  With the development of larger, more permanent locations, with artificial gravity, food supplies, etc. the stay times can increase to a number of years.

* '''Transport Energy''' - Much less than 5% of civilization is in space, so transport energy is measured from the Earth's surface to an orbital location.  This is a minimum of 33 MJ/kg, set by the physics of reaching low Earth orbit.  It is a lot higher using current rockets, because their operating efficiency is low.  More distant orbital locations require additional energy to reach, and currently this reduces cargo mass dramatically, producing even higher transport energy/kg. 


==='''8.2 - Phase 4A: Low Orbit Locations'''===
&amp;emsp;

&amp;emsp;Sections 8.2 to 8.7 cover sub-phases 4A to 4F.  We limit the a amount of detail to keep the size of this report reasonable, and in some cases is limited by the current state of knowledge about the regions.  Each region would be developed using the general approach in Section 8.1, with some methods adapted to local conditions.  The start of each successive sub-phase is staggered in time, but a region does not have to be fully developed before starting on the next one.  They would develop in parallel once started.  

&amp;emsp;We suggest some economic uses for these regions, how to reach them, and how to develop them.  We don't know enough to say if these are the best or only uses for them, and we certainly don't know what ideas other people will come up with in the future.  So consider this report as a starting point for others to improve upon.


:'''Low Orbit Features'''


&amp;emsp;Earth orbits exist in a continuous range from 200 km, the minimum set by atmospheric drag, to the maximum set by Sun's gravity becoming dominant.  We divide that range in half by the transport energy required to reach it, at 2700 km average altitude.  Conditions are different enough between low and high orbits to get their own sub-phases.  Orbits can be elliptical and constantly vary in altitude, so we use the average between the high and low points, which is called the '''[https://en.wikipedia.org/wiki/Semi-major_and_semi-minor_axes Semi-Major Axis]'''.

&amp;emsp;Objects in low orbits are in the Earth's shadow about 22-40% of the time, reducing available solar energy.  The Earth fills a large part of the field of view, which affects thermal balances, and lighting when over the sunlit side.  Orbit periods are 2.5 hours or less, so travel time to a particular orbit location from the Earth's surface is fairly short.  Ping time by way of ground stations is under 20 ms, so not difficult.  But low orbits have a limited view of the Earth's surface at one time.  So multiple ground stations are needed, or communications are relayed by a higher satellite.  This can add up to 500 ms to round-trip communications, which is a noticeable delay.

&amp;emsp;The Earth's magnetic field traps particles into '''[https://en.wikipedia.org/wiki/Van_Allen_radiation_belt Radiation Belts]''' that begin at low orbit height and extend past them to high orbits.  Unprotected people and electronics can be damaged by the high radiation levels.  So spacecraft have to be designed to withstand radiation, avoid these belts, cross them quickly, have sufficient shielding, or the belts depleted artificially.

&amp;emsp;Material resources are relatively scarce in low orbit.  They include the upper edge of the Earth's atmosphere, and debris from inactive satellites and rocket stages.  The mass of particles in the radiation belts is very small.  Other materials have to be imported from Earth or higher locations.


:'''Economic Uses'''


&amp;emsp;We would like all regions in space to become economically self-supporting.  Earth orbits already are, with 75% of total space activity being commercial.  Low orbits are occupied by a large number of active satellites serving the people below.  Current uses include Earth observation, such as weather, mapping, and agricultural monitoring.  Many satellites are now used for communications relay between points on the surface.  Government uses include research, such as the International Space Station and Hubble Telescope, and national security.

&amp;emsp;Future uses may include tourism, orbital assembly and maintenance, payload transfer, and refueling for more distant destinations.  Further development of low orbits would start with existing markets.  It would expand to new ones as transportation costs are reduced and local industry built up.  We discuss some options in this section, but it is an area with projects being worked on by many others.

&amp;emsp;We don't expect large-scale production and habitats in low orbits, because more materials and energy are available higher up.  We do expect low orbits to become transit points, because below the radiation belts is the nearest place to Earth that is reasonably safe and doesn't need constant propulsion to maintain position. 


:'''Transport from Earth'''


&amp;emsp;Low orbit has few available materials, so most items have to be imported.  Rockets and space hardware have existed for decades, but they are still too expensive for many future uses.  As noted in section 8.1,  self-improving and automated production can help lower the cost of building and running aerospace factories and launch sites.

&amp;emsp;Reusing rocket hardware can improve costs substantially, but conventional rockets have low energy efficiency.  They are limited by the energy in chemical '''[https://en.wikipedia.org/wiki/Propellant Propellants]''' and the mass of the Earth requiring a minimum energy to reach orbit, neither of which is changing.  A shift to different launch technologies can can improve efficiency and cost.  But there has to be enough traffic to justify the added R&amp;D cost in the face of existing rocket systems.  There are many possible launch technologies.  See Part 2 of our volume on '''[https://en.wikibooks.org/wiki/Space_Transport_and_Engineering_Methods Space Systems Engineering]''' for an extensive list.  We provide one example here to illustrate the possibilities:  

[[File:AEDC_Range-G_Launcher_facility.jpg|thumb|800x599px|Figure 8.2-1 - AEDC Range-G Hypersonic Research Gun (on left, 20cm interior diameter of barrel).]]


&amp;emsp;'''Hypersonic Guns''' - Hypervelocity gas guns have been used in research for decades (Figure 8.2-1).  They are inexpensive to build compared to most aerospace hardware.  This is because they don't have to fly, so can be made of heavy industrial parts, and '''[https://en.wikipedia.org/wiki/Light-gas_gun Light Gas Guns]''' are basically simple devices.

&amp;emsp;A larger version of such a gun, on a mountain with the correct slope, can supply 50-70% of orbit velocity for bulk cargo which is not sensitive to high g-forces.  These include fuel, water, structural parts, even frozen food.  Outdoor barrels measured in kilomdeters rather than meters lower g-forces and operating pressures.  But the forces are still generally too high for delicate cargo and people.  Those would use other kinds of transportation.  Industrial factories grown from starter sets could be a low-cost source for the construction equipment to build on a mountain, the high pressure pipe, other parts for the gun, and an energy source to compress and heat the gas for launch.  

&amp;emsp;Muzzle velocities much higher than ~4 km/s (half of orbit speed) become increasingly less efficient.  This is because of limits on expansion rate of the working gas, and increased drag and heating while climbing through the atmosphere.  The remaining part of reaching orbit is supplied by an internal rocket engine on the projectile or by other methods.  Because the rocket engine only supplies half or less of the velocity, it is many times smaller relative to cargo than conventional rockets.

&amp;emsp;The fuel-to-payload energy efficiency is roughly two-thirds, much better than conventional rockets.  The gun also uses energy, but it is relatively cheap to operate.  It is stationary on the ground, uses inexpensive materials, and can be used many times.  The projectiles are rugged and durable, and can also be used many times.  Re-entry is much gentler than the initial launch.  The operating cost per ton to orbit should therefore be lower than conventional rockets.  A gun-type launcher could deliver a large portion of the mass to orbit.  There is no requirement that everything going to space has to travel the same way, any more than it does here on Earth.


&amp;emsp;'''Other Launch Methods''' - Hypervelocity guns are just one example.  Other technologies with reasonable prospects include high-speed air-breathing engines for the early part of flight, and orbiting structures with suborbital landing platforms for the later part.  Both are more efficient than chemical rockets in their respective velocity ranges.  Unfortunately neither can easily serve the whole job of transport to orbit.  A combination of systems, each operating where it works best, is likely the better option.

&amp;emsp;High speed jet engines and orbital platforms would require substantial R&amp;D, and are therefore not likely to be the first things built.  Instead, lowering the cost of conventional rockets is the first step.  It would then be supplemented with a low R&amp;D system like a hypersonic gun.  Once new markets are opened up by the lower costs, the more advanced technologies that need more R&amp;D can then make economic sense.


:'''Mining and Production'''


&amp;emsp;Low orbits are not ideal places to process raw materials.  That requires a lot of energy, and sunlight is blocked a good percentage of the time.  But there is enough energy to fabricate parts and assemble them to finished items.  For example, spools of high strength fiber and metal wire are rugged enough to be launched by bulk systems.  The fiber and wire can be wrapped and plasma-sprayed in layers around inflatable or collapsible forms, to build up large, lightweight structures.  Large pressurized volumes built this way can then house other production and assembly equipment and people to work there.

&amp;emsp;There are some material resources in low orbit that don't require a lot of processing.  At altitudes of around 200 km it may be possible to &quot;scoop mine&quot; the upper atmosphere.  A collection scoop funnels incoming air, which is very thin at this altitude, to a vacuum pump and compressor.  A portion of the air is expelled by electric engines at much higher velocity than the incoming flow.  This makes up for drag from the scoop.  The remaining air is stored in tanks.

&amp;emsp;When the tanks are full, the mining ship climbs higher and unloads to storage tanks at a depot.  The reason to mine like this, rather than launching gases directly from Earth, is the solar arrays that power the mining ship can produce 1000 times the energy needed to put themselves in orbit over their operating life.  As long as the gas mining can be done with reasonable efficiency, launching solar arrays rather than tanks of gases results in much more usable product in the end.

&amp;emsp;A steady supply of air (or nitrogen and oxygen if separated) obviously can be used to support people in orbit.  It can also fuel tugs that collect dead satellites and debris from the Earth's &quot;debris belt&quot;.  This both reduces the hazard they create, and supplies useful resources.  The collected materials can be scavenged for usable parts or recycled into new products.  Dead satellites and empty rocket stages are made of aerospace materials, so they should not need a lot of processing to reuse.

&amp;emsp;Mining the debris is only feasible with a cheap source of propellant and efficient electric engines.  The pieces are in random orbits, and would consume too much propellant to gather otherwise.  Air plus debris mining can provide enough materials to support some production in low orbit.  The larger sources available from the Moon and asteroids, and the full-time solar energy in higher orbits, leads to the majority of production being done elsewhere.  It can be efficiently delivered &quot;downhill&quot; using gentle '''[https://en.wikipedia.org/wiki/Aerobraking Aerobraking]'''.  Low orbit mining and production then ends up supporting local uses, and this region functions as a transfer point between the ground and elsewhere.

==='''8.3 - Phase 4B: High Orbit Locations'''===
&amp;emsp;

:'''High Orbit Features'''


&amp;emsp;We define high orbits as extending from 2700 km average altitude to the limit of the Earth's dominant gravitational influence, or '''[https://en.wikipedia.org/wiki/Hill_sphere Hill Sphere]'''.  For Earth this is about 1.5 million km, but towards the outer edges orbits become less stable.  This is a large range of distances, but it only represents the upper 25% of energy between the Earth's surface and escape.  That's because gravity is an inverse square force and weakens rapidly as distance increases.

&amp;emsp;The Moon is the most prominent feature in high orbit.  It has its own area of dominant gravity, with a radius of about 60,000 km, and reasonably stable orbits with semi-major axes to about 35,000 km.  Additional energy is needed to descend through the Moon's gravity field to low orbits or the surface.  Conditions are also different enough near and on the Moon that we assign the region within 35,000 km to Phase 5A - Lunar Locations.

&amp;emsp;High orbits are in sunlight 85-100% of the time, reaching the highest values when farther from the Earth and Moon.  Temperature is determined mostly by the Sun and the cold '''[https://en.wikipedia.org/wiki/Cosmic_microwave_background Cosmic Microwave Background]''', but at lower altitudes the Earth contributes a significant amount of reflected light and infrared heat.  Orbit periods range from 2.5 hours to 7 months, so travel times by the most efficient routes can be long.  Direct paths can be much faster, 12 days or less, at the expense of additional energy.

&amp;emsp;Ping time varies from as little as 25 ms, which is not difficult, up to 10 seconds, which has a large impact on voice, real-time control, and electronic data.  The upper part of the Earth's radiation belts, solar, and cosmic radiation create high to dangerous levels for people and equipment.  Energy resources are abundant in this region, but material resources are low in their natural state.  The Moon and Near Earth Objects can supply materials with fairly low transport energies.


:'''Economic Uses'''


&amp;emsp;One orbit in this region, geosynchronous, at 35,000 km altitude, is already heavily used.  This orbit has a period of 24 hours, which matches the Earth's rotation.  So satellites appear to stay above a fixed ground location, and ground antennas can be stationary rather than having to track satellite motion.  Synchronous orbit is in the outer fringe of the radiation belts.

&amp;emsp;Future production and human habitation would likely start higher up.  One set of such locations are near the Earth-Moon L4 and L5 '''[https://en.wikipedia.org/wiki/Lagrange_point Lagrange Points]'''.  These are stable regions, but not singular points.  The Sun's gravity varies with the Earth's distance from the Sun, and the Moon's orbit is not circular or in the same plane as the Earth and Sun.  So uncontrolled objects will move around the region.

&amp;emsp;Delivery, refueling, and maintenance of high orbit satellites from Earth are current and near-term activities for this region.  Future activity can begin with transporting fuel and other items up or down through the region, to or from more distant early interplanetary locations and low orbit.  This and other possible future activities depend on bringing transport costs down to affordable levels.  This would happen incrementally as self-improving production for early markets bootstraps to larger levels.

&amp;emsp;There are some civilization-level problems that high orbit activity can help with.  If climate change solutions on Earth are not enough, orbiting sun filters can be used.  They would let wavelengths used by plants through, but block other parts of the solar spectrum.  This would help cool the planet.  Hazardous solar system objects that pose a risk to Earth could be diverted or put to use instead.  This requires finding them far enough in advance to change their orbit.  An active civilization and biosphere off-planet could restore Earth if catastrophes happen despite our best efforts.

&amp;emsp;The solar energy flowing through this region is nearly 500 million times what civilization uses today.  The Moon and nearby asteroids can supply 750 million years of raw materials at Earth's current mining rate without recycling.  With abundant energy and recycling a small fraction of these resources could make civilization sustainable as long as the Sun lasts.


:'''Transport from Other Orbits'''


&amp;emsp;Excluding the Moon, the high orbit region is nearly devoid of raw materials.  So they must be imported from elsewhere.  Current transport from Earth uses a rocket to reach orbit, then chemical or electric propulsion to reach higher orbits.  Electric propulsion is about ten times more fuel-efficient than chemical rockets, and is being used more in recent years.

&amp;emsp;Electric engines need large amounts of power to operate, but efficient and lightweight solar panels have been developed in the last few decades (see '''[https://commons.wikimedia.org/wiki/File:Best_Research-Cell_Efficiencies.svg Solar Cell Efficiency Chart]''').  The engines are low thrust, which would expose unprotected people and some other items to too much radiation while crossing the Van Allen belts.  So some early transport will use less efficient but faster rockets.  Once propellants and bulk mass for shielding are available from space sources, protected or more advanced transport methods can be used.

&amp;emsp;Bulk materials mined from NEOs (Section 2.1 Material Resources) are not time- or radiation-sensitive.  They can be transported entirely by electric engines on tugs that make multiple trips.  Since part of the product from these objects is more fuel for the tugs, the transport becomes self-sustaining once started. A tug can return about 750 times its hardware mass over a 15 year working life, while consuming about 17 times its mass in propellant over the same period.  Tugs can also efficiently deliver hardware and finished products to other orbits as needed.

&amp;emsp;The Moon is small enough that bulk materials can be thrown directly into orbit by electric catapults.  Assuming 50% efficiency and 50% duty cycle from lunar night, a solar panel can power throwing 1000 times its own mass per year for a 15 year operating life.  If the catapult is not too heavy relative to the total mass it can throw, the overall mass return ratio is high.  From low Lunar orbit, electric tugs take over and deliver the materials for processing.  There are about five major &quot;ore types&quot; of different compositions on the Moon and NEOs: highlands, maria, carbonaceous, stony, and metallic.  Using all these types would supply the widest range of raw materials to make the widest range of products.


:'''High Orbit Production'''


&amp;emsp;Energy is needed to convert raw materials into finished products.  High orbits have abundant '''[https://en.wikipedia.org/wiki/Solar_constant Solar Energy]''', up to 11,930 kWh/m&lt;sup&gt;2&lt;/sup&gt;/year.  It can be converted to electricity by solar panels or used directly for heating using concentrating reflectors.  Modern space solar panels and reflectors are very light weight relative to their power output, since they don't have to withstand gravity or weather.  Excess heat can be disposed of by radiators or natural '''[https://en.wikipedia.org/wiki/Radiant_exitance Emittance]'''.  Low temperatures can be reached with '''[https://en.wikipedia.org/wiki/Space_sunshade Thermal Shades]''' to block the Sun and other heat sources, plus active refrigeration if needed.

&amp;emsp;A set of solar panels can supply enough power to start production, since electric power has many uses.  Early processing, fabrication, and assembly equipment would come from Earth or low orbit.  The first set of products are simple items to be used directly, such as shielding mass, fuel, and basic construction materials.  The early production equipment would be supplemented over time by items made in orbit.  Over time high orbit industry would transition from importing everything, to making items locally, then exporting products to other destinations. 

&amp;emsp;Given sources of raw materials and energy, the simplest product of all is radiation shielding for people and equipment.  This only requires crushing and sorting, then packing into containers around areas that need protection.  Shielding also acts as thermal insulation and impact protection.  Shielded modules allow extended crew stays in high orbit.  Crews can operate production equipment and perform economic tasks for others, like satellite maintenance and refueling.  To some extent the crew can be helped by remote control from Earth.

&amp;emsp;Next in difficulty, but not necessarily in priority, are water and carbon compounds, extracted from '''[https://en.wikipedia.org/wiki/C-type_asteroid Carbonaceous-Type Asteroid]''' material.  This requires 200-300 C temperatures, which reflectors can supply, and a container and condenser to capture the vapors.  Water and carbon can be chemically reformed to oxygen and hydrocarbons, which are common high-thrust rocket propellants.  This is useful when transporting people through the radiation belts or for landing on the Moon.  They can also be used in electric engines for higher efficiency at lower thrust.  Water, carbon compounds, air mined from low orbit, and possibly rock for soil can supply greenhouse modules, so that crews can produce their own food and recycle life support supplies.

&amp;emsp;Metallic or '''[https://en.wikipedia.org/wiki/M-type_asteroid M-Type Asteroids]''' are thought to be the source '''[https://en.wikipedia.org/wiki/Iron_meteorite Iron Meteorites]''' found on Earth and Mars.  They make up about 5% of known asteroids, with the metal portion being an iron-nickel alloy.  A high temperature furnace can melt the alloy, and a small amount of carbon added to make a steel alloy, and then cast into basic shapes.

&amp;emsp;Steel makes up about 90% of all metal used on Earth.  Being able to produce it from space sources would allow a much higher percentage of self-production in space.  Subtractive and additive '''[https://en.wikipedia.org/wiki/Machine_tool Machine Tools]''' are used to turn basic metal shapes into finished parts.  Those can be assembled, along with some imported items, into new machines, including more machine tools.  New machines and constructed metal items can then work with other materials. 

&amp;emsp;Other space-made products can include '''[https://en.wikipedia.org/wiki/Basalt_fiber Basalt Fiber]''' made from lunar basalts, and '''[https://en.wikipedia.org/wiki/Carbon_fibers Carbon Fibers]''' from asteroid carbon compounds.  These are are very high strength-to-weight.  Fiber-reinforced metal structures are strong and relatively light weight. They would be useful for all kinds of construction.  

&amp;emsp;'''[https://en.wikipedia.org/wiki/Vacuum_deposition Vacuum Deposition]''' is relatively easy to do in high orbit since vacuum is the natural state of that region.  Products can include lightweight reflector sheets, and parts for radiator panels.  These can be combined with high-concentration solar cells from Earth to supply power with less mass than complete panels.  '''[https://en.wikipedia.org/wiki/Refractory Refractories]''' are a class of materials that can withstand high temperatures.  Some were formed in high-temperature environments in space, and others can be made artificially.  Reflectors and shades can be used in all kinds of industrial processes for thermal processing of materials.

&amp;emsp;In the long term, in-space production can supply up to 98-99% of the mass for space projects, greatly reducing what needs to come from Earth.  The remaining 1-2% includes materials too rare in space to usefully mine, and products too hard to make relative to importing from Earth.  Examples are electronics and drugs, which are already mass produced and high value for their weight.  Importing is easier than trying to make them locally in space.


:'''Living in High Orbit'''
   

&amp;emsp;After science and and supporting existing satellites, the first people to spend much time in high orbits would be there to build up industry.  But ultimately large, comfortable space habitats can be built as permanent living space, like towns and cities on Earth.  Like the ones on Earth, they don't have to be built all at once.  The first ones can be small, and attached to industrial production facilities.

&amp;emsp;Larger residential habitats can also start small, but be designed to grow over time.  Growth can be linear by adding at the ends, or in layers, like an onion.  Linear growth can start with modules attached in a ring, with solar panels attached to each.  The ring can be spun for artificial gravity.  Additional rings can be stacked with the first one, with a ring of reflectors to direct sunlight to all the panels.

&amp;emsp;Layered growth adds new pressure shells with compartments outside the previous ones.  The outer shells are in vacuum, and provide radiation, meteor impact, and thermal shielding.  Inwards of that are pressurized areas for storage and mechanical equipment.  Then comes living quarters and a central open space.  The entire habitat rotates for artificial gravity.  As new layers are added, items are moved or added to fill the larger space.  Compared to building a large habitat all at once, this spreads the construction cost over time, and the habitat is only expanded when extra space is needed.

&amp;emsp;
==='''8.4 - Phase 4C: Inner Interplanetary Locations'''===
&amp;emsp;

:'''Inner Interplanetary Features'''


&amp;emsp;These are orbits detached from the Earth's dominant gravity and orbit the Sun instead, though they may pass close to the Earth at times.  They range from as close as equipment can function to the Sun and out to 1.8 times the Earth's average distance from the Sun (1.8 AU).  This is just beyond Mars' greatest distance from the Sun (1.666 AU) and where the Main Asteroid Belt starts.  It excludes Mercury, Venus, and Mars, and orbits around them, which are part of Phase 5 - Planetary Locations (Section 9.0 below).

&amp;emsp;Solar power is available 100% of the time in these orbits, but the intensity varies from 31% to many times that near Earth, depending on Solar distance.  Exposed temperature correspondingly varies from 244K (-29C) to very hot for dark objects, and less for bright or reflective ones.  Travel time from Earth can range from months to years depending on orbit and propulsion method, and whether gravity assists from the planets are used.  These save fuel, but usually require extra time.

&amp;emsp;Solar and cosmic radiation are a moderately high background, with occasional flares/solar particle events that are much more intense, up to lethal human levels without shielding.  Ping time ranges from a few seconds for orbits crossing near Earth, to over 45 minutes at 1.8 AU on the far side of the Sun, by way of a relay satellite.  The Sun interrupts direct communication to the opposite side.  

&amp;emsp;As noted in section 2.1, there are over 42,500 known near Earth Objects (NEOs) as of September 2026, and the number is currently increasing by 3,200 a year.  There are another 1500 which don't come closer than 1.3 AU to the Sun and orbit within 1.8 AU on average.  The largest among both sets, '''[https://en.wikipedia.org/wiki/1036_Ganymed 1036 Ganymed]''' isn't particularly easy to reach, but has about 100 times the mass of all the rock ever mined on Earth.  So total material resources in this region is large.

&amp;emsp;Asteroid orbits vary in size, are typically not circular, and somewhat tilted with respect to Earth's, so the energy required to reach a particular one varies.  Timing also matters, since everything moves at different speeds in solar orbits.  Efficient travel depends on a vehicle and the target arriving at the same place at the same time.  The composition of asteroids vary across about a dozen spectral classes, indicating different chemical compositions.  

&amp;emsp;There are not many active comets in this region because the Sun's heat evaporates their ices in a short time.  About 25 '''[https://en.wikipedia.org/wiki/List_of_minor_planets_and_comets_visited_by_spacecraft Minor Planets and Comets]''' have been visited by spacecraft so far.  Most of our knowledge is from telescopes and examining meteorites that have fallen to Earth, and sometimes radar if they come close to us.


:'''Economic Uses'''


&amp;emsp;There are only a few spacecraft currently in this region.  They are mostly scientific probes in transit to other places, or stationed at the Earth-Sun Lagrange points 1 and 2 (ESL-1 and ESL-2).  Future use is likely to start with asteroid mining and delivery to Earth orbit with electric tugs.  About 75% of discovered  asteroids in this region are more than 30 meters in size.  This is due to limits of current telescopes rather than actual numbers, and may change with time.  30 meters implies a mass of 20-100 thousand tons depending on composition.  This is too heavy to move whole with near-term propulsion.  A method that should work with all sizes is scraping loose material or grabbing boulders from asteroid surfaces.  

&amp;emsp;Prior to mining, prospecting missions should visit multiple candidates for geologic mapping and sampling.  Mining would start with asteroids that are easy to reach from Earth orbit, and return bulk ore there to be processed.  As Earth orbits become more developed, they can start to send production and habitat equipment to this region in addition to mining.  Since raw materials and full-time solar energy are available, this can grow in time to full size factories and produce habitats, vehicles, and whatever else is needed locally.


:'''Inner Interplanetary Transport'''


&amp;emsp;The early transport in this region would be mainly slow but efficient electric tugs.  They can haul large loads of rock relative to their mass, up to 1000 tons for a 10 ton vehicle and 23 tons of propellant.  This will vary with the orbit destination and velocity changes needed.  Smaller cargo loads can be moved faster with the same propulsion.

&amp;emsp;'''[https://en.wikipedia.org/wiki/Gravity_assist Gravity Assists]''' can be used if the Moon and inner planets are in the right positions.  Chemical rockets would be used when fast velocity changes are needed. Solar sails may be effective in moving things even more slowly but with no propellant use.  This depends on large lightweight reflectors delivered to or made in orbit.

&amp;emsp;Over time, a network of &quot;transit habitats&quot; can be built up.  These are stationed in repeating orbits between planets and particular destinations.  They would be larger, safer, and more comfortable than individual passenger vehicles.  They can self-supply from nearby asteroids.  This reduces having to send life support equipment and supplies each time for the relatively long trips in the region.

&amp;emsp;Rotating platforms called '''[https://en.wikipedia.org/wiki/Skyhook_(structure) Skyhooks]'''  can be built to provide both comfortable gravity and fast velocity changes.  The platform mass stores momentum from very efficient propulsion that can be exchanged with payloads arriving and departing.  The platform needs to be relatively heavy relative to each payload, so it doesn't change its own orbit much in use.  Natural asteroids, production &quot;slag&quot; (leftover material not used in products), and the platform's own structure and equipment can serve this purpose.  If traffic is balanced in direction, the net orbit change will be minimal.

&amp;emsp;Skyhooks can serve as a space equivalent to airports - mainly used to get from one place to another.  Like airports, they need enough traffic to justify their construction, and can be developed and upgraded over time.  Building them is easier if high strength materials can be produced locally in space.


:'''Inner Interplanetary Production'''


&amp;emsp;Global artificial primary energy consumption on Earth was 20.3 TeraWatts in 2025.  Note that primary energy does not include sunlight used by plants.  This includes mining, processing, and manufacturing about 2 million kg/s of materials.  So the energy intensity of civilization is 9 MJ/kg on average.  We will double this to allow for recycling of materials in space, and add 8 km/s of orbit velocity change, requiring 300 MJ/kg of electric tug power.  That covers a reasonable range of interplanetary orbits.

&amp;emsp;Transportation rather than production is then the dominant energy use in this region for new materials that need delivery.  Modern space solar arrays typically product about 100 W/kg near Earth, and would take 36.8 days to produces the required 318 MJ.  With a useful life of 20 years, their total energy output is 200 times that needed to transport their own mass in raw materials and all other energy needed to make replacement panels.  Concentrating reflector and nuclear power sources are not yet developed enough for space to do calculate energy return ratios.  They may turn out better or worse than solar panels, but as long as we have one known energy source with a high return ratio, we can base space industry on it.

&amp;emsp;The same process of bootstrapping production in Earth orbits can be used in interplanetary space.  This starts with mining for export, then simple products made locally, and gradually growing to make more complex ones.  As distance from Earth increases, fewer raw materials would tend to from the Moon, and more from nearby asteroids.  These asteroids are of different types, which provides a reasonable variety of materials to work with.

&amp;emsp;If we restrict ourselves to within 20 degrees of the '''[https://en.wikipedia.org/wiki/Ecliptic Ecliptic]''', to maintain access to the planets and keep velocity changes lower, we have access to 1/3 of the Sun's total energy, or 1.3 x 10^26 Watts.  This is 7 trillion times our current energy use, a number so large it is hard to imagine it could not sustain a civilization.


:'''Living Beyond Earth Orbit'''


&amp;emsp;Once methods of living in orbits around Earth are developed in the previous phases, doing so in solar orbits beyond the Earth-Moon region can use the same basic technologies.  The main adjustments would be for available solar energy and temperature with distance from the Sun, and the kinds of materials found relatively nearby in velocity terms.  In space, velocity changes take work, while coasting to a destination merely takes time.

&amp;emsp;It isn't yet clear if a &quot;hunter-gatherer&quot; or &quot;sedentary&quot; lifestyle would be more effective.  The first means moving equipment to new asteroid locations as needed, while in the second the equipment stays in a particular orbit, and materials are brought to it.  Since everything is in relative motion around the Sun, opportunities will change with time.  So choosing a particularly useful asteroid as a home location may be a good strategy.

==='''8.5 - Phase 4D: Mid-Interplanetary Locations'''===
&amp;emsp;

&amp;emsp;Living and working in the next region out from the Sun is a smooth continuation of the previous phase, but is different in having lower levels of solar energy and much larger amounts of raw materials.


:'''Mid-Interplanetary Features'''

[[File:InnerSolarSystem-en.png|thumb|600x600px|Figure 8.5-1 - Main Asteroid Belt and Jupiter Trojan region.]]


&amp;emsp;This region includes orbits from 1.8 to 6.0 AU in semi-major axes (Figure 8.5-1).  As of 2023 this includes dwarf planet '''[https://en.wikipedia.org/wiki/Ceres_(dwarf_planet) Ceres]''', 1.18 million other Main Belt asteroids, over 5600 '''[https://en.wikipedia.org/wiki/Hilda_asteroid Hildas]''', which are in 3:2 resonance with Jupiter, and over 12,500 '''[https://en.wikipedia.org/wiki/Jupiter_trojan Jupiter Trojans]''' that occupy the Lagrange regions ahead of and behind the planet.  It does not include Jupiter itself and the region within 20 million km of the planet (Section 9.4).

&amp;emsp;There are around 450 known comets in the region.  The '''[https://en.wikipedia.org/wiki/Frost_line_(astrophysics) Frost Line]''' for water is in this region at 2.7-3.2 AU.  So this is where many comets become active (give off gas and dust), making them easier to find.  Hydrogen and oxygen are the 1st and 3rd most common elements, and helium (2nd) doesn't make compounds.  So water is the most common compound of two elements.  Objects beyond the frost line tend to have have large amounts of it.

&amp;emsp;Solar power is available 100% of the time except shadowed areas on and around objects.  Intensity varies from 31 to 2.78% of that near Earth.  Temperature varies from 244 to 217K (-29 to -56C) for black objects, and less for lighter colored ones.  Travel time from Earth is months to years on minimum energy transits, with high to lethal radiation levels for unprotected people.  Ping time varies from 13 to 120 minutes, including a relay to avoid a direct path through the Sun.

&amp;emsp;The vast and growing number of known objects in the region have a total mass of about 3 billion Gigatons, which far exceeds the Earth's total mining output of about 60 Gigatons/year.  About half the total mass is in the four '''[https://en.wikipedia.org/wiki/List_of_exceptional_asteroids Largest Asteroids]''': 1 Ceres, 4 Vesta, 2 Pallas, and 10 Hygeia.  Composition varies considerably between asteroids due to differences in their formation and history.  Velocity to reach orbit from the largest body, Ceres, is only 270 meters/second, or 860 times less kinetic energy than from Earth.  So all these objects are easy to access once you are near them.  The main energy cost is in adjusting your orbit around the Sun.


:'''Economic Uses'''


&amp;emsp;This region has very few of spacecraft at present, so most uses are in the future.  Abundant raw materials of diverse composition, and adequate amounts of solar energy when concentrated, will enable mining and transport to earlier locations as early activities.  Previous locations have higher solar intensity for production and habitation.  When it makes sense to do so, seed factories and other advanced technologies can help bootstrap a full range of local industry, and eventually large scale habitation.  There is enough material and energy in this region to support a full civilization.


:'''Mid-Interplanetary Transport'''


&amp;emsp;The same transport methods can be used in this region as for the inner interplanetary region.  The main difference is adding reflectors to solar panels to make up for the lower solar intensity.  Electric catapults and skyhooks are somewhat more efficient for injecting bulk cargo to transfer orbits, because they do point acceleration rather than spiral orbits.  If a large asteroid absorbs the reaction force, they also don't need propellant.  Gravity assists from the inner planets and Jupiter can also increase efficiency.


:'''Mid-Interplanetary Production'''


&amp;emsp;The inner parts of this region have enough sunlight for solar panels to produce power directly.  In the outer regions, solar panels benefit from reflectors to increase the light intensity.  Concentrating reflectors can produce higher temperatures at all distances, either for industrial processes or habitats.  Increasing amounts of reflectors are needed as you get farther from the Sun, but they are inherently lightweight in a zero gravity environment with no weather.  Note that the total amount of solar energy available in this region is the same as for the Inner Interplanetary region.  It has simply traveled farther and is more spread out.  The difference is access to larger amounts of raw materials.

&amp;emsp;Asteroids are covered in a mixture of rocks and dust of varying sizes.  This is the result of repeated impacts over their life and gravitational attraction.  In fact, some asteroids are so low in density that they must be &quot;gravel piles&quot;, with no solid central body.  Since most asteroids are small, the rocks and dust are easily disturbed and can become a hazard to mining and production operations.  So material has to be removed carefully without too much disturbance.  Alternately the mining area or the whole asteroid can be covered to contain loose material.

&amp;emsp;More distant asteroids and comets contain water and other volatile compounds.  These can be extracted separately by heating.  Bulk or separated products are then moved by tugs to factories for later production steps.  For larger operations, a shell can surround the whole asteroid, keeping gas and dust contained.  Processing equipment can then be attached to the outside of the shell, and materials delivered continuously until the asteroid is consumed.  The mining and production unit can then move to another target, or the target moved to the unit, whichever is lighter.
 

==='''8.6 - Phase 4E: Outer Interplanetary Locations'''===
&amp;emsp;

&amp;emsp;This region is again a continuation of the previous one, with even less solar energy and about 40 times more available materials.


:'''Outer Interplanetary Features'''


&amp;emsp;Outer interplanetary orbits range from 6 to 60 AU in semi-major axis.  The areas close to Saturn, Uranus, and Neptune are excluded.  They are accounted for in Phase 5E (Section 9.5}.  As of 2023 there are over 500 known '''[https://en.wikipedia.org/wiki/Centaur_(small_Solar_System_body) Centaur]''' objects.  These have orbits among the four giant planets, whose gravity makes them unstable over a few million years. There are also thousands of known '''[https://en.wikipedia.org/wiki/Trans-Neptunian_object Trans-Neptune Objects]''' with orbits beyond that planet, making a total of about 3800 in this region.  Some, like Pluto and Eris, are large enough to be considered '''[https://en.wikipedia.org/wiki/Dwarf_planet Dwarf Planets]'''.  The remainder are in the range of 15 to 850 km, with the lower end set by our current telescopes' ability to find them.  There are undoubtedly smaller ones that are undiscovered.  

&amp;emsp;Available solar power is low, from 2.78% to 0.0278% of near-Earth values.  This requires large reflectors to increase intensity, nuclear fission or fusion (if developed), or beamed energy from closer to the Sun.  Ambient temperatures are extremely cold, from 160 to 50K for black objects, and lower for lighter ones.  Travel time from Earth is typically many years, with high to occasionally lethal radiation levels for unprotected people. Ping time is 1.4 to 17 hours.

&amp;emsp;The number of known objects is much smaller than the Mid-Interplanetary region, but their mass is roughly 40 times larger - about 2% of Earth or nearly double the Moon.  With increasing distance from the Sun, gases and ices with lower boiling points condensed from the original Solar Nebula.  So there is more water, ammonia, nitrogen and other frozen materials, along with rocks and metals.  The distinction between asteroid and frozen comet becomes fuzzy, so we call all of them 'objects' and the smaller ones 'minor planets'.


:'''Outer Interplanetary Activities'''


&amp;emsp;This region is likely too far to use with current technology.  Activities beyond science and exploration are far enough in the future that technology is likely to change in unexpected directions.  When  other activities would start and what they will be is undertain, but we can speculate based on what we know today.  The raw materials in the region are different than those closer to the Sun.  So the first activities are likely to be mining materials scarce closer to the Sun, and bringing them to where there is more energy to process them.  

&amp;emsp;Due to weak sunlight in this region, nuclear propulsion and gravity assists from the larger bodies are likely to be major transport methods.  The solar system has a limited amount of natural '''[https://en.wikipedia.org/wiki/Radionuclide Radionuclides]''' that can produce useful power levels.  If '''[https://en.wikipedia.org/wiki/Fusion_power Fusion Power]''' is not developed enough, they can be made artificially near the Sun where abundant energy is available.  If nuclear fusion is well developed, there is abundant hydrogen from which fusion fuels can be produced.

&amp;emsp;As distance increases from the Sun, orbit velocities and required velocity changes decrease as the square root of.  Solar flux decreases faster, as the inverse square of distance.  So solar sails become less effective than for closer regions.  Beamed energy from close to the Sun is a possibility.  It requires large optics to focus the beam to a reasonable size at destinations in the region.

&amp;emsp;We don't expect a lot of production here at first.  Water and nitrogen are very useful and found in large amounts.  Transport would be slow using minimum energy trajectories.  If there is enough demand, a &quot;pipeline&quot; of bulk cargoes in transit could be set up, with vehicles at each end to set them on course and collect them at the end.  The cargo can coast in between, saving on vehicle use.  Once the pipeline is filled, then cargoes arrive on a regular schedule.  

&amp;emsp;If lightweight solar reflectors or fusion are developed enough, a full economy based on them may develop, with full production and habitation.  We don't see a strong reason to live this far out rather than the warmer and brighter inner regions, but such reasons may develop.


==='''8.7 - Phase 4F: Distant Orbit Locations'''===
&amp;emsp;

&amp;emsp;The previous three phases are called 'interplanetary' because they are among or near the eight known major planets.  This last region is beyond all of them so we call it 'distant'.


:'''Distant Orbit Features'''


&amp;emsp;Distant orbits range from 60 AU in semi-major axis to the limits of the Sun's dominance at about 100,000 AU.  As of 2023 there are about 1200 known asteroids and comets in the region.  It includes about 650 '''[https://www.minorplanetcenter.net/iau/lists/t_centaurs.html Scattered Disk]''' and '''[https://www.minorplanetcenter.net/iau/lists/t_tnos.html Trans-Neptune]''' objects, and a similar number of 
'''[https://en.wikipedia.org/wiki/List_of_long-period_comets Long Period]''' and '''[https://en.wikipedia.org/wiki/List_of_near-parabolic_comets Near Parabolic]''' comets.

&amp;emsp;A few of these objects belong to much larger and more distant populations known as the '''[https://en.wikipedia.org/wiki/Hills_cloud Hills]''' and '''[https://en.wikipedia.org/wiki/Oort_cloud Oort Clouds]'''.  For our purposes we define these as orbits with axes from 2000-10,000 AU and 10,000 to where passing stars, gas clouds, and galactic tides make orbits unstable.  This is roughly 100,000 AU.  The existence of comets whose orbits extend to these distances argues for the cloud's existence.  Otherwise no active comets would be left after billions of years.  Their total number and mass is only guessed at, but may be billions to trillions and multiples of the Earth's mass.  There is some evidence to suspect a major planet is also in this region.

&amp;emsp;Current telescopes are limited to finding objects within about 80 AU from the Sun.  So only the ones that come within the 60-80 AU range at their closest ''and'' are currently at the near end of their orbits have been found to date.  We expect to find many more objects in the region as telescopes improve.  Active comets from distant orbits which come close to the Sun give us some information on composition from the gas and dust they emit.

&amp;emsp;Solar energy is very weak in this region, below 0.0278% of that near Earth, and temperatures are extremely cold, from 50K down to near the cosmic background of 2.7K.  Travel time with current propulsion technology is many years to centuries.  Ping time ranges from 14 hours to 3 years.  


:'''Distant Orbit Activities'''


&amp;emsp;Our current information about objects in this region is poor.  So any uses beyond science and exploration are deferred to the far future.  When that time comes, though, there is a very large reserve of materials that can be put to use.  One identified use is the Sun acting as a gravitational lens, with a focus around 800 AU from the Sun, in the Scattered Disk region.  Placing telescopes directly opposite a star of interest would allow much more detailed observations than otherwise possible, because of the 2 million km optical diameter of the Sun as a lens.

&amp;emsp;To keep transport times within reason, very high energy propulsion would be needed, such as nuclear fusion.  Since the light elements needed for fusion are common in these outer regions, this could be self-fueling once set up.  Unfortunately, fusion is not yet a viable technology.  Transport that uses it remains speculative at present.  Due to the low to nearly non-existent solar energy in this region, nuclear energy sources would likely be needed to even consider local production.  Production must remain speculative at present.

=='''9.0 - Planetary System Locations'''==
&amp;emsp;

&amp;emsp;The planetary systems of Phase 5 are different in several ways from the orbital locations in Phase 4 and from each other.  Specific designs are needed to handle the differences, so we identify separate sub-phases for each.  First are their gravity fields, which require energy to travel through and create significant surface gravity.  Second are their large sizes relative objects in the orbital regions, and third is the diversity of conditions found on and around the planets.

&amp;emsp;Reasons to use planetary systems include access to the different raw materials available, relief of Earth's biosphere by moving industry off-planet, and some people's preference for natural environments.  As with orbital locations, the start of each sub-phase is staggered from nearest to furthest, and is preceded by orbital transport that can reach them carrying useful amounts of equipment.  So Phase 4 and 5 projects will overlap in time.


==='''9.1 - Phase 5A: Lunar Locations'''===
&amp;emsp;

&amp;emsp;Earth is one of the eight major planets in the Solar System.  It is already occupied and developed, and we covered using our technical approach earlier in this report.  We also covered most orbits around Earth in Sections 8.2 and 8.3.  The exception was the '''[https://en.wikipedia.org/wiki/Moon Moon]''' and the area around it.  We place it here among other planetary systems since lunar activities are more similar to those for smaller planets and the larger moons of the other planets.


:'''Lunar Features'''


&amp;emsp;The Lunar region includes the Moon itself, and orbits with semi-major axes below 35,000 km .  These are close enough to be relatively stable.  Lunar orbits in general are somewhat unstable.  The Moon has mass concentrations from past impacts that create an uneven gravity field (Figure 9.1-1).  The Earth and Sun are also much more massive than the Moon, and have significant effects on objects orbiting it ([https://link.springer.com/article/10.1134/S0038094617070061 ''Gordienko, 2018'']).

&amp;emsp;The Moon has the same average distance from the Sun as the Earth, so available solar energy and basic temperatures ranges are the same.  Sunlight is partly blocked in lower Lunar orbits, and blocked about 50% of the time on the surface over a 29.5 day cycle.  Surface gravity averages 1.62 m/s&lt;sup&gt;2&lt;/sup&gt;, or 1/6th of Earth, with a total variation of 0.025 m/s&lt;sup&gt;2&lt;/sup&gt; by location.

&amp;emsp;Escape velocity from the Lunar surface is 2380 m/s, or 21% of Earth.  So escape energy is only 4.5% of Earth's.  Low orbit velocities are 1680 m/s or less, and 700 m/s more is needed to escape from them.  Circular orbit velocity at the upper edge of the region is 375 m/s, and escape is an added 155 m/s.  Surface area of the Moon is 37.93 million km^2 measured horizontally, or about one quarter of the Earth's land area.  Sloped terrain increase the total exposed surface area.

[[File:Moon_gravity_acceleration_map_LGM2011.jpg|thumb|right|800x450px|Figure 9.1-1 - Lunar surface gravity map.  Near side on left, far side on right.]]

&amp;emsp;Earth is only 81.3 times the Moon's mass.  So the center of mass of both averages 1/4 of the way down from the Earth's surface to it's center.  Both move around this center every 27.3 days with respect to the stars.  Since both also orbit the Sun, the Moon's orbit and day lengths are not the same.  

&amp;emsp;The Moon is tidally locked to Earth, and keeps approximately the same side facing us.  It is not exact because the Moon's orbit is not circular, it has a slight residual pendulum motion, and we have different vantage points from the Earth's surface.  So about 59% of its surface can be seen from Earth over time.  The two hemispheres are called the &quot;near&quot; and &quot;far&quot; sides.  There is no &quot;dark&quot; side, since both get sunlight during a lunar day.  

&amp;emsp;Orbits around the Moon vary from 108 minutes close to the surface, to 6.8 days for the largest ones in the region.  Travel time from Earth is 3-4 days for direct transfer orbits.  Electric propulsion is much more efficient, but also much slower.  Without shielding, travel to and staying on and around the Moon can expose people to lethal radiation levels.  This is from Earth's radiation belts, solar, and cosmic sources.  Ping time from Earth to the Lunar region varies from 2.2 to 2.94 seconds, depending on where in the region, and the Moon's distance in it's orbit.  This includes satellite relay time if communicating with areas that can't be seen directly from Earth.

&amp;emsp;The Moon has a somewhat variable and reasonably well understood '''[https://en.wikipedia.org/wiki/Geology_of_the_Moon Geology]'''.  This is known from a number of lander and orbital missions, some of which returned samples, and '''[https://en.wikipedia.org/wiki/Lunar_meteorite Lunar Meteorites]''' thrown to Earth by impacts.  Broadly, the surface is oxide minerals with silicon, iron, calcium, aluminum, and magnesium, in order of abundance, and 3-4% other elements.

&amp;emsp;The Moon is too small and warm to keep an atmosphere.  With nothing to stop them, the surface has been heavily cratered and broken up by repeated impacts of all sizes.  The result is a '''[https://en.wikipedia.org/wiki/Lunar_soil Regolith]''' or lunar soil that has been tossed around many times.  It is a mix of the original crust and the remains of impacting objects.  There is no weathering like on Earth, but the solar wind can charge dust particles which then move, and temperature cycles cause rocks to crack near the surface.


:'''Economic Uses'''


&amp;emsp;The Lunar region is embedded in the High Orbit region, and reaching it from Earth is possible with current and near-term transport.  Science and exploration activities are already in progress.  Further development can start as soon as there are economic reasons for it.  The first uses are likely to be local on the surface, and from the Moon's relative closeness to populated satellite orbits and low energy to reach these orbits.  For example, some '''[https://en.wikipedia.org/wiki/Lunar_water Water]''' appears to be trapped in cold polar craters on the Moon.  It has multiple uses, and could be delivered relatively efficiently to high and low Earth orbits.    

&amp;emsp;Regolith mining can supply enough materials for much larger projects on the Moon and nearby orbits.  The loose surface layer averages 5 meters thick across the whole Moon.  It can be collected without using heavy equipment and totals about 300,000 Gigatons, or 7,000 years of Earth's total stone and sand mining in 2020.  Projects that use lunar (and asteroid) materials are not as limited by launch mass and cost from Earth, so they can use simpler and heavier designs.  In the future, production that uses lots of energy, or have hazards and side effects, could be moved to space to reduce the burden on Earth's environment.

&amp;emsp;Satellites that beam energy to Earth is one possibility.  If this can be done economically, it might become the largest export market from orbit.  Renewable energy on Earth is now relatively low cost, but it is variable and some places have poor conditions for using it.  There is 10 times more solar energy in space than such places and it is more predictable.  So it may prove useful, despite the extra cost of building in space.


:'''Lunar Transport'''


&amp;emsp;Early landings on the Moon would not have the support of much infrastructure.  They would use current high thrust chemical rockets to access the surface.  At first, all propellants would come from Earth.  Water from polar lunar craters can supply 83.5% of methane/oxygen propellant, and and also life support supplies, reducing the mass needed from Earth.  Carbonaceous type asteroids contain up to 20% carbon compounds and water.  These can be reformed chemically to CH&lt;sub&gt;4&lt;/sub&gt; and O&lt;sub&gt;2&lt;/sub&gt; and fully replace Earth supplies.  How much would come from each source will depend on cost and availability. 

&amp;emsp;Over time, chemical propulsion can be replaced by more efficient methods.  As mentioned in Section 8.3, an electric catapult can deliver 1000 times a solar array's mass per year from the surface to Lunar orbit.  Electric propulsion can then move lunar and asteroid materials a common orbit for processing.  High orbits around the Moon or Earth are preferred for their near-full time sunlight and a combined low velocity to reach.  Both propellants and other products can be made with processing and manufacturing equipment in the same location.  
 
&amp;emsp;Lunar basalt and carbon from asteroids can be used to make high strength fibers.  These can be used to build an efficient skyhook system in lunar orbit.  Such a system makes sense if there is enough traffic to the Moon.  If the tip velocity is equal to orbit velocity they cancel, and trips to the lunar surface would need very little fuel.  A lander can be dropped off and picked up at low altitude.  It would not be dropped directly on the surface because of the variable gravity field and heights of lunar mountains and crater walls.

&amp;emsp;If the skyhook is in near-polar orbit, it can access any point on the surface every 15 days as the Moon rotates below it.  Using other angles of the skyhook's rotation, and by climbing to different distances from the center, arrival and departure directions and speeds up to 1.41 times lunar escape are possible.  Catching and releasing vehicles affects the skyhook's orbit.  If traffic is balanced in direction and mass, and the skyhook is massive enough, it is a temporary change.  If traffic is more in one direction than the other, the difference can be made up by electric propulsion at high efficiency.

&amp;emsp;Low gravity is known to be harmful to people. If the skyhook radius is about 250 km, the tip acceleration will be about 1 g, which avoids this problem.  A large supply of lunar materials can supply shielding.  With these people can live comfortably and safely.  They are close enough to the lunar surface to operate equipment by remote control in real time.  Alternate solutions are using rotating habitats on the surface or limiting stay times.


:'''Lunar Production'''


&amp;emsp;The advantages of using the Moon are relative closeness to high orbits, and low energy to move cargo.  But there are few low boiling-point materials left on the Moon, because it formed in a molten state, suffered many high energy impacts and early tidal heating, and is too small to keep an atmosphere.  A fully-developed space economy would need to supplement lunar materials with those from nearby asteroids and from Earth.  Some materials are too rare to usefully mine in space, and some products are too hard or expensive to make there relative to delivery from Earth.  So two-way trade can develop for lunar activities to support themselves.

&amp;emsp;Early Lunar production can start with mining bulk regolith for radiation/thermal/impact protection, and polar ice for propellant and life support.  These don't need a lot of complex equipment.  More energy-intensive and complex processes like vacuum oxide reduction and  '''[https://en.wikipedia.org/wiki/Carbothermic_reaction Carbothermic Reactions]''' can separate oxygen and various metals from the regolith.  Seed factory equipment can be used to bootstrap making other products for local use and export.  As better transport systems are installed in sequence, the cost of delivery elsewhere will decrease.

&amp;emsp;Solar energy will likely be the dominant energy source for lunar production.  Silicon for solar cells, aluminum for reflectors, and other metals for structures are widely available from the regolith to provide solar power.  However some craters with water are permanently shadowed, the lunar night is two weeks long, and large solar plants are not very portable.  So other energy sources may be useful.

&amp;emsp;Some regions of the Lunar surface contain ~10 parts per million Uranium and Thorium.  The ore has an energy content of about 800 MJ/kg (20 times that of coal on Earth).  Helium-3 has been proposed as a fusion fuel to be mined from the Moon.  Although the energy content of pure He-3 is 200 TJ/kg, the concentration is only 15 parts per billion or less, resulting in an ore content of only 3 MJ/kg.  So fissionable elements are a better energy source on the Moon in terms of energy produced per ton of mined ore.

&amp;emsp;Other energy sources for the Moon can include the rims of shadowed craters, where sunlight is highly available, microwave or laser beamed power across terrain or from orbit, and even fuel cells or batteries for portable power.  Thermal energy storage is an option using the vast amount of rocks and dust as the storage medium, and the natural vacuum as insulation.  The material is heated during the day by sunlight, and the heat used to generate power during the Lunar night.


:'''Living in Lunar Locations'''


&amp;emsp;Low gravity is known to be harmful, so long-term habitats on the Lunar surface may require rotation to create artificial gravity.  An example would be a large habitat dome for spaciousness, and a centrifuge built around the rim for living quarters.  Residents would spend enough time in the centrifuge to maintain health, but could work and enjoy the low gravity the rest of the time.

&amp;emsp;We have essentially no data on how much gravity is enough between zero and 1.0.  We know the body deteriorates over time in zero gravity.  So as a worst case, people would need to spend most of their time in a one gee environment of some type, but this subject needs more research.  Another option is limiting permanent stay times on the surface.  People would live mostly in orbit with artificial gravity and operate most equipment by remote control.

&amp;emsp;The other requirements for people to live and work in the lunar region have mostly been solved by existing space stations, and using bulk materials for shielding.  One exception is lunar dust, which is abrasive, toxic, and is everywhere on the surface.  Various methods to deal with it have been proposed, but R&amp;D is needed to figure out which work best.


==='''9.2 - Phase 5B: Mars Locations'''===
&amp;emsp;

&amp;emsp;'''[https://en.wikipedia.org/wiki/Mars Mars]''' is next among planetary locations in terms of velocity and time to reach, and the environment conditions there.  It is a large step beyond the Moon, but Mars is within the inner interplanetary region (Section 8.4) that Earth also occupies.  So we expect Martian activities to start after some level of development of the region in-between.


:'''Mars Features'''


&amp;emsp;The Mars region includes the planet, two small moons, and reasonably stable orbits with semi-major axes  up to 340,000 km (100 radii).  Its orbit around the Sun is 9.3% eccentric, varying from 1.38 to 1.67 AU in distance.  Solar flux varies with distance from 494 to 716 W/m&lt;sup&gt;2&lt;/sup&gt;, or 36 to 52.5% of that near Earth.  Surface gravity varies from 3.683 to 3.743 m/s&lt;sup&gt;2&lt;/sup&gt;, a 1.6% range, with a reference value of 3.711 (3/8ths of Earth).  Lower values are near the equator and atop tall mountains, while higher values are at lower altitudes in the north polar region and '''[https://en.wikipedia.org/wiki/Hellas_Planitia Hellas]''' basin.

&amp;emsp;Ping time from Earth varies from 6 to 45 minutes, depending on relative orbital position and need for a relay satellite to avoid the Sun.  Unprotected radiation levels range from high to lethal, but the Mars surface and its moons provide ample material for shielding.

&amp;emsp;Escape velocity from the surface is 5,027 m/s, and is 502 m/s at the upper edge of the orbital region.  Circular orbit velocities are 70.7% of escape.  This ratio holds for orbits around any body.  Escape energy is 20% that of Earth.  Orbits around Mars vary from 100 minutes for low ones to 70 days at the edge of the region.  Surface area of Mars is 144.8 million km&lt;sup&gt;2&lt;/sup&gt;, or 97% of Earth's land area.  Day length is 24h 40m, slightly longer than Earth, and the Martian year is 1.881 Earth years.  Travel times vary according to the relative positions of Mars and Earth, and the transport method used.  When aligned, minimum energy orbits average 7 months one way.

&amp;emsp;The moons '''[https://en.wikipedia.org/wiki/Phobos_(moon) Phobos]''' and '''[https://en.wikipedia.org/wiki/Deimos_(moon) Deimos]''' have near-circular orbits of with 9,377 and 23,460 km radius.  They have mean diameters of  22.5 and 12.4 km, but are irregular shapes.  They have a combined mass of 12,800 Gigatons, or 290 years of Earth's rock and sand mining.  This is a significant orbital resource.  They are likely collected impact debris, so similar to Mars in composition.

[[File:Generalised_Geological_Map_of_Mars.jpg|thumb|700x1024px|Figure 9.2-1 - Generalized geologic map of Mars.]]

&amp;emsp;The atmosphere is 96% CO2, a bit under 2% each Argon and Nitrogen, and an assortment of trace gases.  Surface pressure varies from 30 Pascals at the top of Olympus Mons to 1155 Pascals in the Hellas basin.  The high value is 1.14% of sea-level pressure on Earth.  Pressure varies by 30% annually, as some of the CO2 freezes and evaporates at the poles.  Surface temperatures vary from 120 to 293K (-153 to 20 C), depending on latitude and season.  Typical day-night variation is 70K/C because the atmosphere does not have much thermal mass.

&amp;emsp;Mars has quite a varied surface geology, as a result of internal melting and vulcanism, impacts, and much higher levels of water and atmospheric pressure earlier in it's history (Figure 9.2-1 from '''[http://pubs.usgs.gov/sim/3292/ USGS Map 3292, 2014]'''). There is significant amounts of water in the soil as hydrates, permafrost, and in thick dusty ice caps.


:'''Economic Uses'''


&amp;emsp;Human activity in the region can begin with a scientific outpost.  It would be an extension of existing robotic exploration, and Phase 4C activity among asteroids in the surrounding region (Section 8.4).  The outpost and relay satellites are placed in orbit close enough to Mars for real-time remote control.  Surface robots carry out science and sample collection at first, with some samples returned to the outpost for further analysis.  Most outpost supplies can come from Mars' moons and nearby asteroids.  

&amp;emsp;Over time, other robots and equipment are delivered to the surface to start to preparing for people.  Once enough supplies and basic production are in place, they can start to visit.  This approach delays risking people on the surface until a supply chain and reliable two-way transportation is available.

&amp;emsp;As more production capacity is built up on Mars and surrounding orbits, it can start to transition from science to prospecting for unique resources, building up local habitation, and a full economy.  Since Mars has almost the same land area as Earth, there is plenty of room to do this.  Building up activities in the Mars region would be a relatively small extension from previous regions.  So it is not a large cost burden, but rather an investment in further growth.


:'''Mars Transport'''


&amp;emsp;In Phases 4B and 4C (sections 8.3 and 8.4 above), electric tugs were used to move asteroid materials back to Earth/Moon orbits for processing.  To expand towards Mars, the same type of tugs move materials from Near Earth or Near Mars orbits to specific '''[https://en.wikipedia.org/wiki/Mars_cycler Mars Cycler]''' orbits.  These orbits allow repeat flybys of Earth and Mars using gravity assists.  Given the many thousands of asteroids in the interplanetary region, some of them have low velocity to and from a cycler orbit.

&amp;emsp;Other tugs deliver habitat modules and initial processing equipment from near Earth to the same orbit.  The raw asteroid materials are distributed around the habitat for radiation shielding, and used as a counterweight for artificial gravity.  At the next opportunity a crew meets up with the new &quot;Mars Transfer Station&quot;, and begins to process the raw materials into fuel, air, water, metals, etc.  They also establish a greenhouse to produce food.  When raw materials run low, a tug is sent to another nearby asteroid to get more.

&amp;emsp;Whenever the Transfer Station is near Earth, new crew, equipment, and supplies can be delivered.  Crew aboard the transfer station are safe from radiation hazards, have gravity to maintain health, and can eventually produce most of what they need themselves.  The Station can be used multiple times to bring new crews to Mars, saving mass over carrying a life support system and supplies for every trip.  Cargo besides people can travel to the Mars region directly with tugs.

&amp;emsp;When the transfer station is built up enough, a set of crew detach and inject into Mars orbit.  The Martian moons then become a source of materials in addition to nearby asteroids.  Eventually enough propellants are produced locally for trips to the planet's surface.

&amp;emsp;Chemical rockets consume a lot of propellants traveling back and forth from the surface.  In the longer term, some combination of skyhook and surface catapult can replace most of that.  These would be large projects, but the propellant savings for each trip makes up for it.  Carbon from asteroids or the moons, and basalt from Mars, can be used to make the strong fibers for such systems.

&amp;emsp;Skyhooks can start small with low capacity, but their orbit parameters and timing would be shifted from bulk going up.  Linear or rotary electric catapults on the surface are attached to the planet and not affected this way.  To limit drag losses they would be built on the large Martian volcanoes.  Mixed use of both systems is also possible.  It is too early to choose among these or other options, but chemical rockets are inefficient.  In the long run something better would be preferred.


:'''Mars Production'''


&amp;emsp;Like other phases of our program, the production in the region starts with mining raw materials for basic products with ready-to-use equipment.  Seed factory equipment is delivered to orbit and the surface as needed.  This bootstraps more diverse, larger scale, and advanced production.  The supply chain from Earth and intermediate regions supports this with regular deliveries.

&amp;emsp;Mars has a different history than asteroids, so it likely has sources of volatile compounds and minerals not common in the orbital regions.  Very efficient bulk transport is desirable for an export market to develop.  Because the gravity well of Mars requires large-scale systems to do this, exports may not be economic right away, but rather need a build-up period in the region first.


:'''Living in Mars Locations'''


&amp;emsp;Living in the orbital region around Mars would be similar to high orbits around Earth or the interplanetary region that surrounds both.  There would be minor differences in available solar energy and local material sources.  Living on the surface would require adapting designs to local conditions of gravity, temperature, and other parameters.  Since gravity is 3/8 Earth normal, that includes how to maintain health for people and other living things.  Example methods are body weights and rotating habitats.

&amp;emsp;'''[https://en.wikipedia.org/wiki/Terraforming Terraforming]''' Mars has often been suggested because it is already the most similar place to Earth.  Doing this for a small population is likely too much effort for the amount of use it would get.  When the population gets large enough or technology has advanced enough the local population (Martians) can decide if terraforming makes sense.  Self-improving production systems can make such a project easier.

&amp;emsp;An alternate approach is to use habitat domes to provide a feeling of being outdoors.  Internal pressure would be much higher than outside.  So lightweight domes need a lot of structure and anchoring to avoid lifting off the ground.  Domes can be weighted down by bulk soil and rock, or using thick glass.  These also provide radiation, temperature, and impact protection.  


==='''9.3 - Phase 5C: Venus and Mercury Locations'''===
&amp;emsp;

&amp;emsp;'''[https://en.wikipedia.org/wiki/Venus Venus]''' and '''[https://en.wikipedia.org/wiki/Mercury_(planet) Mercury]''' are the next in difficulty after Mars.  They have abundant solar energy available, but as a result are mostly very hot.  There are relatively few nearby asteroids to start orbital development with.


:'''Venus and Mercury Features'''


&amp;emsp;The Venus and Mercury regions include the planets, and relatively stable orbits within 600,000 and 100,000 km of their centers, respectively.  Like Earth they are embedded in the Inner Interplanetary region (Section 8.4). They have no known moons.  So the main interest is the planets themselves and activity around them.  Venus' orbit is nearly circular at 0.723 AU, while Mercury's is 20% eccentric and varies from 0.307 to 0.467 AU.

&amp;emsp;Solar flux is 1.9 times higher than near Earth at Venus, and 4.6-10.6 times higher at Mercury. Equilibrium temperatures in sunlight are 17% and 46-80% higher in Kelvin.  The surface temperature is 735K (462 C) for Venus, from a thick atmosphere with a strong greenhouse effect.  Mercury ranges from below 100K in shadowed polar craters, to as high as 700K at the sub-solar point at perihelion.  A given location can vary nearly this whole temperature range due to a 58.6 day rotation period.  Venus's rotation takes 243 days, but the atmosphere mostly eliminates temperature changes.

&amp;emsp;Venus' surface gravity is 8.87 m/s^2 (90% of Earth), and Mercury's is 3.7 m/s^2, the same as for Mars.  Escape velocities are 10.36 and 4.25 km/s from their surfaces and 1,041 and 664 m/s from the outer edge of their regions. Orbits range from 90 minutes to 59 days around Venus, and 85 minutes to 15.5 days around Mercury.  Ping times from Earth vary from 4.3 to 30 minutes for Venus, and 9 to 25 minutes for Mercury.  Travel times by least energy transfer orbits are 4.8 and 3.5 months respectively.

&amp;emsp;The '''[https://en.wikipedia.org/wiki/Geology_of_Venus Geology of Venus]''' appears to be mostly volcanic, and it has lost most of its water to space.  The atmosphere has a surface pressure of 9.2 MPa (90.8 times Earth), and is composed of 96.5% CO2 and 3.5% Nitrogen, with some trace gases.  While it is very hot at the surface, moderate pressures of 0.5 times Earth and temperatures around 27 C exist at 55 km altitude.  Mercury has only a trace atmosphere, and a '''[https://en.wikipedia.org/wiki/Silicate_mineral Silicate]''' surface about 40% O, 25% Si, 11% Mg, 6% Al, 4% each Ca and Fe, and 2% S.  Polar regions can have surprisingly moderate average temperatures, and water ice has been found in shadowed polar craters


:'''Economic Uses'''


&amp;emsp;Near-term use of Venus and Mercury is more difficult because of the higher velocity to reach them and generally hostile temperatures.  Scoop-mining gases from the upper reaches of Venus' atmosphere is a possibility.  In the mid-term, floating habitats are possible at altitudes where temperature and pressure are reasonable.  Polar stations on Mercury can take advantage of lower average temperatures with proper insulation.  In the long term asteroid iron or aluminum can be used for orbiting sunshades to cool both planets where needed.

&amp;emsp;Reducing temperature lowers the scale height of Venus' atmosphere, and preferentially lowers the pressure of the high altitude regions of the planet, making them more accessible.  There is the possibility that low enough temperatures will promote carbonation of the volcanic surface minerals, further lowering pressures, and that this process can be enhanced artificially.  If the surface conditions can be made more tolerable, then large scale access to raw materials plus high energy available in orbit could promote industry.

&amp;emsp;It takes 7 to 12 km/s velocity change to travel from near Earth to the Venus and Mercury orbit regions, and therefore 0.15 and 0.27 kg of propellant per kg cargo using electric thrusters.  This does not account for gravity assists or skyhook transfers.  These require 263 and 474 MJ of solar power respectively.  If the cargo is all solar arrays, or equivalent thermal power generation, they will produce an additional 13.75 and 91.5 MJ/day added power output, and repay the extra energy use in 19 and 5.2 days respectively.  So energy-intensive processes highly favor going closer to the Sun.


:'''Venus and Mercury Transport'''


&amp;emsp;Higher orbit speeds as you get closer to the Sun means more velocity changes are needed to reach them.  Like elsewhere, gravity assists and skyhook systems can help do this more efficiently.  Solar-powered electric propulsion is quite viable closer to the Sun.  Solar flux increases faster then velocity changes, so this introduces the possibility of solar sails as an additional transport method in the inner regions.  The advantage of solar sails is they do not consume propellant.  But in the outer Solar System low solar energy makes them very slow.

&amp;emsp;For example, reflected sunlight provides 15.5 Newtons/km^2 at Venus, and a 1 micron thick Magnesium-Aluminum sail would mass 2400 kg/km^2.  This generates 558 m/s/day acceleration for the bare sail.  This is reduced by the remaining structure and cargo mass, and by angling the sail to control thrust direction.  This acceleration is comparable to that for electric propulsion using solar array mass near Earth.  A combined system can take advantage of reduced propellant use from a sail and wider thrust angles from the electric engines.  


:'''Venus and Mercury Production'''


&amp;emsp;Production in the Venus and Mercury regions would likely start in orbit as an extension of Inner Interplanetary activity.  The higher solar flux relative to energy needed to reach inner orbits favors processes that need lots of energy.  Raw materials can come from nearby and imported asteroid sources, and possibly scoop mining gas from Venus orbit.  There are only 59 known asteroids whose orbit is entirely inside Earth's, and less than 2500 others whose orbit is smaller than Earth's and cross inside of it.  This is only 0.2% of the total known, so many materials may have to be imported from farther away.

&amp;emsp;Habitats to support production, with artificial gravity, thermal, and radiation shielding can be built in more developed regions and transported to Venus and Mercury orbit to start with.  Surface catapults are possible from Mercury's polar regions, where temperatures are more moderate.  The combination of materials delivered at least partly by solar sailing and abundant solar energy should allow production to grow in time.


:'''Living at Venus and Mercury'''


&amp;emsp;Living in orbits around the two planets would be similar to the nearby interplanetary region, and not require much new design.  The planets themselves are mostly hostile in their current state, so we expect few other habitats would be built beyond possible science and exploration outposts in the mid-term.  If planet-scale terraforming becomes feasible, mostly by blocking excess sunlight, non-industrial habitats may develop in the long-term.


==='''9.4 - Phase 5D: Jupiter System Locations'''===
&amp;emsp;

&amp;emsp;Development of the '''[https://en.wikipedia.org/wiki/Jupiter Jupiter System]''' would likely follow the Mid-Interplanetary (Section 8.5), as its orbit is near the outer edge of that region.  It isn't clear if the Jupiter region will be easier or harder to develop than Venus and Mercury.


:'''Jupiter System Features'''


&amp;emsp;The Jupiter System includes the largest planet in the Solar System (317.8 Earth masses), and reasonably stable orbits around it with semi-major axes less 25 million km.  It includes four '''[https://en.wikipedia.org/wiki/Galilean_moons Galilean Moons]''' more than 3000 km diameter, named as a group after their discoverer.  As of 2023 there are 91 known '''[https://en.wikipedia.org/wiki/Moons_of_Jupiter Smaller Moons]''' from 1-170 km in size.  The larger moons can support their own reaxonably stable orbits, and can be used for gravity assists to change orbits in the Jupiter system.  

&amp;emsp;Solar flux varies from 3.3-4.1% of that near Earth, so concentrating reflectors are useful in this region.  Escape velocity is 59.5 km/s from just above the atmosphere, or an added 24.6 km/s from low orbit. Escape is 3.11 km/s from the edge of the region. Orbit periods range from 174 minutes to 2.26 years.  Travel time from Earth by minimum energy orbit is 2.7 years, while gravity assists and other propulsion methods can increase or decrease the time.  Ping time is 1.06 to 1.85 hours, depending on relative orbit locations.

&amp;emsp;Jupiter has a strong magnetic field which creates intense radiation belts.  This ranges from high to immediately deadly levels for unprotected people, and can rapidly degrade even shielded electronics.  Outside these belts, the usual solar and galactic radiation is still a hazard.  Temperature in Jupiter System orbits are about 217K (-56 C) for black objects, and less for lighter colored ones.  Jupiter is a Gas Giant, and therefore has no solid surface.  The atmosphere is 90% Hydrogen, 10% Helium, plus trace gases.  Orbit minus rotation velocity is 29.5 km/s, making it very difficult to access the planet itself or even mine the atmopshere from orbit.

&amp;emsp;The four large moons (Io, Europa, Ganymede, and Callisto) orbit 0.422, 0.671, 1.07, and 1.88 million km from Jupiter in nearly circular orbits.  They have a combined surface area of 232.8 million km^2, or 1.56 times the land area of Earth.  They have negligible atmospheres.  All four are tidally locked to Jupiter, so their days are equal to their orbit periods of 1.77, 3.55, 7.15, and 16.7 days.  Surface gravity varies from 1.23 to 1.80 m/s^2, or 12.5 to 18.4% of Earth.

&amp;emsp;Io's surface is volcanic deposits and sulfur compounds.  The other three large moons are either entirely or partially covered in ice, with various minerals and frozen compounds making up the rest of their surfaces.  Surface temperatures of the large moons range from 70-165K, except for volcanic hot spots on Io, and vary mostly by latitude and how close they are to Jupiter, which determines how much reflected light they get on the near side.


:'''Economic Uses'''


&amp;emsp;Use of the Jupiter System would likely follow the Main Belt and Trojan locations in Phase 4D.  There are 12,500 Jupiter Trojans vs 91 smaller moons around Jupiter, and the Trojans are much larger in total mass.  Since Jupiter's gravity well requires more velocity to navigate, there is no particular reason to use the smaller moons except as a way to access the larger ones.  The outer Jovian moons are likely captured asteroids, and are the same Solar distance as the Trojan group.  So they don't represent new technical challenges.

&amp;emsp;The large moons together have 6.6% of Earth's mass, or 5.4 times that of Earth's Moon.  They can be a very large source of materials, with some significant variations in composition.  Early uses are likely to be mining-based, with return of materials to more developed regions.  Even the largest moon, Ganymede, has a low enough orbit velocity that a catapult or skyhook can deliver directly to orbit, after which an electric tug can transport it elsewhere.  Water is widely available in the Jupiter System, both for life support and propellant.  High radiation close to the planet requires careful design for habitats and electronics.  Remote control from a safe distance is a possibility.


:'''Jupiter System Transport'''


&amp;emsp;Transport from the Mid-Interplanetary region and closer to Earth can start with electric propulsion, and for people use shielded habitat modules.  High-thrust landers can be used to start with for the large moons, while skyhooks and catapults can be brought or built later for higher efficiency.  Since these would already be developed for previous locations, not much new design would be needed except for radiation protection close to the planet.  Transfer habitats in cyclic orbits with heavily shielded sections is a design option.  Those sections are used when when close to the planet.  We don't expect to land on or mine Jupiter itself until far in the future because of the extremely high energy required.  The other Gas Giants are easier to access and have milder radiation belts.


:'''Jupiter System Production'''


&amp;emsp;Growth of local production follows the usual path of mining first, then bringing seed factory equipment to bootstrap other industries.  The smaller outer moons can be an early source of fuel and water.  Rocky and metallic materials may need to be imported from the surrounding regions, depending on the composition of the moons.  Large reflectors would be a desirable early product to generate power and heat.


:'''Living in the Jupiter System'''


&amp;emsp;Living in the outer parts of the Jupiter system is very similar to the Trojan asteroid regions, as they are the same average distance from the Sun.  Only '''[https://en.wikipedia.org/wiki/Callisto_(moon) Callisto]''' among the large moons has tolerable radiation levels at its surface.  The closer moons and orbits around and among them require significant shielding.  Water is a good shielding material, and all the large moons have lots of it.


==='''9.5 - Phase 5E: Outer Giant Locations'''===
&amp;emsp;

&amp;emsp;The three outer giant planets, '''[https://en.wikipedia.org/wiki/Saturn Saturn]''', '''[https://en.wikipedia.org/wiki/Uranus Uranus]''', and '''[https://en.wikipedia.org/wiki/Neptune Neptune]''', are next in difficulty from distance and lower solar energy.  This is compensated somewhat by lower masses than Jupiter, so smaller velocity changes are needed to work around.
 

:'''Outer Giant Features'''


&amp;emsp;The three planets average 9.55, 19.22, and 30.11 AU from the Sun.  These planets and their orbital regions are embedded in the Outer Interplanetary region of Phase 4E (Section 8.6).  Saturn's orbital region extends 30 million km from the planet center, and includes 83 '''[https://en.wikipedia.org/wiki/Moons_of_Saturn Known Moons]''' as of 2023. Eleven of these moons are larger than 100 km, of which five (Tethys, Dione, Rhea, Titan, and Iapetus) are larger than 1,000 km, with Titan being 5,150 km in diameter (75% of Mars).

&amp;emsp;Uranus' region is 24 million km in radius, and has 27 known '''[https://en.wikipedia.org/wiki/Moons_of_Uranus Moons]'''.  Five of them (Miranda, Ariel, Umbriel, Titania, and Oberon) are considered major, ranging from 470 to 1575 km in diameter.  Neptune's region is 50 million km radius, and has 14 known '''[https://en.wikipedia.org/wiki/Moons_of_Neptune Moons]''', of which Triton is by far the largest at 2700 km diameter.  The larger moons of all three can support stable orbits and enable gravity assists.  All the giant planets, including Jupiter, have ring systems.  Saturn's is the most massive at an estimated 30 million Gigatons, almost as much as the 400 km moon Mimas, which orbits nearby.

&amp;emsp;Solar energy is weak in these regions, about 1%, 1/4%, and 1/9% of that near Earth.  Large reflectors would be needed to bring sunlight to useful levels.  Nuclear power may be more effective.  Escape velocities are 35.5, 21.3, and 23.5 km/s from each planet, and 1,535, 682, and 255 m/s from the edge of their regions.  Orbit periods are vary from 250, 180, and 155 minutes close to the planets, to 3.8, 9.9, and 27 years at the edge.  Travel times are 6, 16, and 30 years by minimum energy orbits.  Gravity assists and added propulsion can shorten the trips.

&amp;emsp;Ping times average 2.65, 5.33, and 8.35 hours, plus or minus about 20 minutes for relative planetary positions.  Radiation levels around Saturn are about as high as Earth's Van Allen Belts, so added shielding is needed for people and electronics.  It is most intense between the ring system and the moon Enceladus.  Radiaition around Uranus and Neptune are lower, but still include the solar and cosmic background flux present in most parts of the Solar System.

&amp;emsp;Like Jupiter, the outer Giants have no solid surface.  Their atmospheres get denser with depth until they are beyond the '''[https://en.wikipedia.org/wiki/Critical_point_(thermodynamics) Critical Point]''' and reach liquid density and higher.  The upper portions are 96% hydrogen, 3% helium for Saturn; 83% hydrogen, 15% helium, and 2.3% hethane for Uranus; and 80% hydrogen, 19% helium, and 1.5% methane for Neptune.  All three have small amounts of trace gases.  Orbit minus planet rotation velocities are 15.2, 12.5, and 13.9 km/s.  Scoop mining their atmospheres would be hard, but should be feasible.


:'''Economic Uses'''


&amp;emsp;The outer Giant regions are too far for near-term use.  Their development could start once the Outer Interplanetary region around them is accessible.  The first use is likely to be mining various raw materials.  The combined total of 124 moons and one major ring system around these planets have a mass of 1720 x 10&lt;sup&gt;20&lt;/sup&gt; kg, or 2.34 times the Moon.  This is a very large source of materials, but their distance means mining them will be delayed.  Mined material would likely be brought back back to inner regions where there is more energy for processing and projects that need them.  Other uses besides mining are too far in the future to predict right now.  

&amp;emsp;Titan has a thick Nitrogen atmosphere (1.4 times Earth pressure) with 1.4% Methane at upper levels and 4.9% at lower levels.  Low orbits are about 1.8 km/s, so scoop-mining this atmosphere is particularly easy.  Helium-3 has been proposed as a low radiation fusion fuel.  Fusion in general has not yet been solved, and the He-3 reaction is 10 times harder than deuterium-tritium (D-T), which is the main target of current research.  

&amp;emsp;If either kind of fusion becomes feasible, scoop-mining the outer Giant atmospheres may become economic because of its high energy output, and the light gases also make good propellants.  All three giants have deuterium, and Uranus and Neptune have the highest concentrations of Helium in their atmospheres, and thus the He-3 isotope.  The easier D-T fusion should enable trips to these planets in reasonable time.


:'''Outer Giant Transport'''


&amp;emsp;Chemical rockets have sent probes to the outer planets, but this is very inefficient.  As in other regions, gravity assists from massive bodies, surface catapults, and skyhooks can be used to improve transport efficiency.  Solar power has been used for probes as far as Jupiter and its Trojan asteroids, but reflectors to increase power for propulsion in farther regions hasn't yet been developed.  Current work is on small fission reactors for a variety of uses, including nuclear-electric propulsion, which would be much more efficient than chemical.

&amp;emsp;Fission and fusion fuels have high energy content but the reactors to use them tend to be higher mass than solar power.  The also emit harmful radiation, but most parts of the Solar System are already filled with it anyway.  The same shielding can protect from both sources.  Nuclear fuels are also relatively rare compared to silicon used for solar cells or aluminum/magnesium alloy for concentrating reflectors.  It isn't clear what the best energy source for future propulsion will be.


:'''Outer Giant Production and Living'''


&amp;emsp;We don't expect activities beyond science, exploration, and mining in these regions until technology improves significantly from current levels.  Since we can't predict what improvements will be made in the long-term, we will leave what local production and habitation is possible as an open question.


=='''10.0 - Interstellar Locations'''==
&amp;emsp;

&amp;emsp;The last major phase of our program involves interstellar locations.  The key difference that warrants a new phase is the extreme distances involved.  This breaks the ability to deliver things from the Solar System and communicate with it in a reasonable time.  Deveopment of these locations would require high self-sufficiency in transport, enough starting materials, and self-improving systems capable of growth without outside assistance.  

&amp;emsp;Phase 6 projects are far enough in the future that we can only speculate about them in general terms.  We include it mainly as a place-holder and to give direction for future long-term work.  We divide it into two sub-phases - the spaces between stars, and those around other star systems.  Since you must cross interstellar space before reaching the other systems, logically the sub-phases are in that order.  


==='''10.1 - Phase 6A: Interstellar Space Locations'''===
&amp;emsp;

:'''Interstellar Features'''


&amp;emsp;We define the Interstellar region as starting 100,000 AU from the Sun, where nearby stars and the Milky Way galaxy as a whole begin to contest the Sun's gravity.  There is no outer limit for this region beyond whatever travel distances are possible from future technology.  Since we don't know what those future technologies will be, for now we will arbitrarily set a boundary of 20 light years from the Sun.

&amp;emsp;Probably the most significant feature of this region is that star systems are all in relative motion to each other, with an average velocity of 50 km/s.  This is on top of the general rotation of the galaxy at about 225 km/s.  As of 2023 there are 131 known '''[https://en.wikipedia.org/wiki/List_of_nearest_stars_and_brown_dwarfs Stars and Brown Dwarfs]''' in the 20 light year &quot;Solar Neighborhood&quot;.  Given their average velocity, they will travel 20 light years in 120,000 years, so the membership of the neighborhood will change about every 1250 years on average.

&amp;emsp;The local interstellar region is very low density gas, at ~0.3 atoms per cubic centimeter, or 1 gram per 564 km cube.  That does not include cometary clouds around stars, or wandering objects between them.  We know very little about such smaller objects, but assume some exist by similarity to our own Solar System.

&amp;emsp;The Interstellar environment between stars is not much different from distant orbit environments in Phase 4F (Section 8.7).   Stellar energy is effectively zero, and while stellar radiation is not a factor in this region, cosmic radiation still is.

 
:'''Economic Uses'''


&amp;emsp;We don't know enough about material resources and energy sources in this region to propose economic uses.  The distance to the Sun detaches any industries from regular trade with the rest of civilization.  Science, exploration, and seeding interstellar colonies are possible long-term activities.


:'''Interstellar Transport'''


&amp;emsp;Interstellar transport can be divided into slow and fast types.  The slow type is on the order of stellar velocities (5-500 km/s).  An example is a large habitat with large material reserves and fusion power as an energy source.  It can subsist on the cometary clouds around stars and unbound objects between them.  When it gets close enough to a selected star, it can enter orbit and travel with it.  Such habitats would be based on previous space habitats in the Solar System, so it doesn't require a lot of new development.

&amp;emsp;Travel times between stars at these speeds would average 3000 years or longer.  Such times are long enough that technology changes during the trip are a factor.  Trying to reach a specific star doesn't make unless technology had reached a plateau or making improvements in transit was planned for.  If the habitat is considered a permanent place to live that happens to be moving to access new resources, speed of travel is less of an issue.

&amp;emspFast interstellar puts much more energy into transportation, to reach higher velocities and shorten time to a destination.  Possible methods include fusion-powered engines and beamed power using the Sun as a gravitational lens for focus.  Rather than a large habitat with a full range of civilized activity, fast interstellar operates more like ships on Earth, with a crew dedicated to reaching a destination and maintaining operations.  We don't yet know what interstellar transport methods will prove feasible, if any, and the other space-related technologies available by then, so this is all speculative for now.
  

:'''Interstellar Production'''


&amp;emsp;We don't know enough about resources in this region to consider gathering raw materials.  So the only production we can plan for now is what they bring with them.  If they start with a large reserve, such as a captured comet nucleus, it can be used for supplies, maintenance, and upgrades.


==='''10.2 - Phase 6B: Stellar Locations'''===
&amp;emsp;

:'''Stellar System Features'''


&amp;emsp;We define stellar regions as those surrounding individual stars, brown dwarfs, or multi-object systems, of which there are 94 within 20 light years.  The size of the regions are scaled to the square root of the system mass divided by Sun's mass, times 100,000 AU.  This is their region of gravitational dominance and any cometary cloud bound to them.

&amp;emsp;Stars and brown dwarfs are bright enough to find with current equipment.  In fact 22 star systems within 20 light years can be seen from a dark location on Earth without optical aid.  We have basic information about planets and disks around other stars.  Their parent stars tell us where to look, and the stars themselves provide data about the planets from Doppler shifts and transits.

&amp;emsp;The number of discovered planets at all distances is growing rapidly, from none before 1988 to about 2000 by the end of 2015, and over 5000 by 2023.  59 of them are within 20 light years.  Dust and gas in '''[https://en.wikipedia.org/wiki/Circumstellar_disc Disks]''' around younger stars are visible to current telescopes, but none are within 20 light years.  Two nearby star systems, epsilon Eridani and Tau Ceti, are known to have longer-lived debris disks.


:'''Economic Uses'''


&amp;emsp;Due to extreme distance, the only economic uses we see for now are science, exploration, and seeding independent colonies.  More study is needed with better telescopes before any attempt to plan travel to these stars.


:'''Exostellar Transport'''


&amp;emsp;Transport between stars is covered under Phase 6A in the previous section.  Travel within a given stellar region would use the same technologies as around the Sun, with modifications for available energy sources.


:'''Exostellar Production'''


&amp;emsp;As mentioned earlier, we would want to observe the nearby stars in more detail by using the Sun as a giant gravitational lens.  Following that would likely be robotic probes to more closely examine whatever is found around these stars.  A self-bootstrapping seed factory approach should work at other stars, since the properties of energy and matter are the same everywhere.  However the details will depend on what resources are available.


&lt;/div&gt;</text>
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      <id>4671257</id>
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      <timestamp>2026-09-20T02:22:12Z</timestamp>
      <contributor>
        <username>Arlo Barnes</username>
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      <comment>wf</comment>
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      <text bytes="1540" sha1="q9cwo8wztj0rmav0tw7s5puq082l34t" xml:space="preserve">This is a guide to using {{template|interlinear}}.

* &lt;code&gt;X1&lt;/code&gt;: first person singular: [[Láadan/Lessons/12]]
* &lt;code&gt;PB&lt;/code&gt;: possessive by means of birth: [[Láadan/Lessons/13]]

== Wikisource ==

* Arahanesha, buda, emeth, mathom, shé, théle, thera, thera, Zheshu

=== [[s:mul:category:Láadan]] ===
==== [[s:mul:Thul i Shem Betha]] ====

{{interlinear|lang=ldn|glossing=link|box=yes|display-messages=no
|ablist=X1:first person singular:Láadan/Lessons/12#Pronouns;BIRTH:possessive by means of birth:Láadan/Lessons/11#Possessive_Markers
|top=The Father and His Sons
|Thul i Shem Betha
|Parent And Offspring X1-BIRTH
|Parent and Her/His Offspring
}}

== Wikibooks ==
=== [[:category:book:Láadan]] ===
==== [[Láadan/Lessons/11#Examples]] ====

{{interlinear|lang=ldn|glossing=link|box=yes|display-messages=no
|ablist=X3:third person singular:Láadan/Lessons/12#Pronouns;LAW:possessive by means of custom or law:Láadan/Lessons/11#Possessive_Markers;STATE:speech act marker statement of fact:Láadan/Lessons/3#Speech Act morpheme
|top=I bought Mary's house.
|Bíi eril eb le belid Meri bethoth wa.
|STATE: had buy I her (Mary's) X3-obj-LAW assert.
|Thus had bought I her Mary own-house indeed.
}}

== Wikifunctions ==
=== [[f:user:Arlo Barnes/ldn]] ===

{{interlinear|lang=ldn|glossing=link|box=yes|display-messages=no
|ablist=STATE:speech act marker statement of fact:Láadan/Lessons/3#Speech Act morpheme
|top=I know the cat to be grey.
|Bíi líithin ruleth wa.
|STATE: be-gray cat-obj assert.
|Thus was grey cat indeed.
}}</text>
      <sha1>q9cwo8wztj0rmav0tw7s5puq082l34t</sha1>
    </revision>
    <revision>
      <id>4671261</id>
      <parentid>4671257</parentid>
      <timestamp>2026-09-20T02:45:11Z</timestamp>
      <contributor>
        <username>Arlo Barnes</username>
        <id>381814</id>
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      <comment>/* f:user:Arlo Barnes/ldn */ no time reference</comment>
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      <format>text/x-wiki</format>
      <text bytes="1536" sha1="j0xnlefldldbaazt2girddo2lbupbfm" xml:space="preserve">This is a guide to using {{template|interlinear}}.

* &lt;code&gt;X1&lt;/code&gt;: first person singular: [[Láadan/Lessons/12]]
* &lt;code&gt;PB&lt;/code&gt;: possessive by means of birth: [[Láadan/Lessons/13]]

== Wikisource ==

* Arahanesha, buda, emeth, mathom, shé, théle, thera, thera, Zheshu

=== [[s:mul:category:Láadan]] ===
==== [[s:mul:Thul i Shem Betha]] ====

{{interlinear|lang=ldn|glossing=link|box=yes|display-messages=no
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|Parent And Offspring X1-BIRTH
|Parent and Her/His Offspring
}}

== Wikibooks ==
=== [[:category:book:Láadan]] ===
==== [[Láadan/Lessons/11#Examples]] ====

{{interlinear|lang=ldn|glossing=link|box=yes|display-messages=no
|ablist=X3:third person singular:Láadan/Lessons/12#Pronouns;LAW:possessive by means of custom or law:Láadan/Lessons/11#Possessive_Markers;STATE:speech act marker statement of fact:Láadan/Lessons/3#Speech Act morpheme
|top=I bought Mary's house.
|Bíi eril eb le belid Meri bethoth wa.
|STATE: had buy I her (Mary's) X3-obj-LAW assert.
|Thus had bought I her Mary own-house indeed.
}}

== Wikifunctions ==
=== [[f:user:Arlo Barnes/ldn]] ===

{{interlinear|lang=ldn|glossing=link|box=yes|display-messages=no
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|Bíi líithin ruleth wa.
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|Thus grey cat indeed.
}}</text>
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  <page>
    <title>User:Aphroditelita</title>
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      <timestamp>2026-09-20T07:40:08Z</timestamp>
      <contributor>
        <username>Veritas Sapientiae</username>
        <id>3399623</id>
      </contributor>
      <minor />
      <comment>Veritas Sapientiae moved page [[User:Nervelita]] to [[User:Aphroditelita]]: Automatically moved page while renaming the user &quot;[[Special:CentralAuth/Nervelita|Nervelita]]&quot; to &quot;[[Special:CentralAuth/Aphroditelita|Aphroditelita]]&quot;</comment>
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      <text bytes="288" sha1="h2t3zu1tww1zjpi9q05o50uf9im2wxs" xml:space="preserve">{{Babel|en}}My name is Elita. 

English Wikipedia: https://en.wikipedia.org/wiki/User:Nervelita 

English Wiktionary: https://en.wiktionary.org/wiki/User:Nervelita

== About me ==
*Before using this account, I edited here a few times using [[User: 2601:58B:4380:9C90:6DC1:E004:B199:B8EA]]</text>
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  <page>
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      <contributor>
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        <id>3615407</id>
      </contributor>
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      <text bytes="1411" sha1="mu1z9in2txlf684ygup6yu45b8go5kp" xml:space="preserve">'''This is the talk page for DeirgeDel, the successor sccount to the abandoened Djm-leighpark account, and any matters relating to Djm-leighpark may be brought here. Please add new discussions to the bottom of the page. Thankyou.'''
----

==[[:Character Encodings]]==
{{tmbox|type=delete|text='''DeirgeDel, please [[Wikibooks:Requests for deletion#Character Encodings|share your thoughts]] about whether to [[WB:WIW|keep]] or [[WB:DP|delete]] &quot;[[:Character Encodings|Character Encodings]]&quot;.'''&lt;br /&gt;You are being notified because you have contributed to this work. —[[User:Kittycataclysm|Kittycataclysm]] ([[User talk:Kittycataclysm|discuss]] • [[Special:Contributions/Kittycataclysm|contribs]]) 00:41, 2 May 2025 (UTC)}}

== Wikipedia is seeing fewer readers this year? ==
Hi {{PAGENAME}},
You probably don't remeber me, but I remember you vividly, not from wb but from another wikmedia project. The reason I am contacting you today is a sentence that got my attention when I was looking at the English Wikipedia and saw a box meant for potential donors that said:
* '''Wikipedia is seeing fewer readers this year'''

I know you care about the future of the enwp, bUt I wonder if you are equally concerned about the future of some of the smaller projects?

respectfully, ottawahitech [[Special:Contributions/~2026-40500-29|~2026-40500-29]] ([[User talk:~2026-40500-29|talk]]) 23:14, 19 September 2026 (UTC)</text>
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      <contributor>
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        <id>3626395</id>
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      <comment>/* Happy */ new section</comment>
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      <text bytes="158" sha1="i9103p7fb0d6p6gy6uu5ktyg3av68te" xml:space="preserve">{{Talk header}}

== Happy  ==
happy [[Special:Contributions/~2026-50782-91|~2026-50782-91]] ([[User talk:~2026-50782-91|talk]]) 09:34, 20 September 2026 (UTC)</text>
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    <revision>
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      <timestamp>2026-09-20T09:37:38Z</timestamp>
      <contributor>
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        <id>3626395</id>
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      <comment>/* CBE account */ new section</comment>
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      <text bytes="307" sha1="rgusa6fz46akend6gwxdg7kztkz1f4v" xml:space="preserve">{{Talk header}}

== Happy  ==
happy [[Special:Contributions/~2026-50782-91|~2026-50782-91]] ([[User talk:~2026-50782-91|talk]]) 09:34, 20 September 2026 (UTC)

== CBE account  ==
monye [[Special:Contributions/~2026-50782-91|~2026-50782-91]] ([[User talk:~2026-50782-91|talk]]) 09:37, 20 September 2026 (UTC)</text>
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    <revision>
      <id>4671322</id>
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      <timestamp>2026-09-20T10:23:10Z</timestamp>
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      <comment>[[WB:REVERT|Reverted]] edits by [[Special:Contributions/~2026-50782-91|~2026-50782-91]] ([[User talk:~2026-50782-91|talk]]) to last version by MathXplore</comment>
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	&quot;Yzmo&quot;: [
		&quot;editor&quot;
	],
	&quot;ZI Jony&quot;: [
		&quot;editor&quot;
	],
	&quot;Zabe&quot;: [
		&quot;global-rollbacker&quot;
	],
	&quot;Zafer&quot;: [
		&quot;ombuds&quot;
	],
	&quot;Zedshort&quot;: [
		&quot;editor&quot;
	],
	&quot;ZeroOne&quot;: [
		&quot;editor&quot;
	],
	&quot;Zetud&quot;: [
		&quot;global-rollbacker&quot;,
		&quot;vrt-permissions&quot;
	],
	&quot;Ziv&quot;: [
		&quot;editor&quot;
	],
	&quot;Zoeannl&quot;: [
		&quot;editor&quot;
	],
	&quot;Zollerriia&quot;: [
		&quot;editor&quot;
	],
	&quot;Zoohouse&quot;: [
		&quot;editor&quot;
	],
	&quot;Zoot&quot;: [
		&quot;editor&quot;
	],
	&quot;Zsohl&quot;: [
		&quot;autoreview&quot;,
		&quot;editor&quot;
	],
	&quot;Zvsmith&quot;: [
		&quot;editor&quot;
	],
	&quot;Zweighaft&quot;: [
		&quot;editor&quot;
	],
	&quot;ZxxZxxZ&quot;: [
		&quot;editor&quot;
	],
	&quot;~riley&quot;: [
		&quot;global-rollbacker&quot;,
		&quot;editor&quot;
	],
	&quot;Érico&quot;: [
		&quot;global-renamer&quot;
	],
	&quot;İmmortalance&quot;: [
		&quot;global-renamer&quot;
	],
	&quot;Виктор Пинчук&quot;: [
		&quot;editor&quot;
	],
	&quot;Воображение&quot;: [
		&quot;editor&quot;
	],
	&quot;Всевидящий&quot;: [
		&quot;global-rollbacker&quot;
	],
	&quot;Д.Ильин&quot;: [
		&quot;editor&quot;
	],
	&quot;Л.П. Джепко&quot;: [
		&quot;editor&quot;
	],
	&quot;יהודה שמחה ולדמן&quot;: [
		&quot;editor&quot;
	],
	&quot;מקף&quot;: [
		&quot;global-rollbacker&quot;,
		&quot;global-renamer&quot;
	],
	&quot;د. فارس الجويلي&quot;: [
		&quot;global-renamer&quot;
	],
	&quot;روتانا&quot;: [
		&quot;global-renamer&quot;
	],
	&quot;علاء&quot;: [
		&quot;steward&quot;,
		&quot;vrt-permissions&quot;
	],
	&quot;فيصل&quot;: [
		&quot;global-renamer&quot;,
		&quot;vrt-permissions&quot;
	],
	&quot;सीमा1&quot;: [
		&quot;editor&quot;
	],
	&quot;タチコマ robot&quot;: [
		&quot;editor&quot;
	],
	&quot;ネイ&quot;: [
		&quot;global-renamer&quot;
	],
	&quot;一隻北極熊&quot;: [
		&quot;editor&quot;
	],
	&quot;人间百态&quot;: [
		&quot;global-rollbacker&quot;
	],
	&quot;臺灣象象&quot;: [
		&quot;autoreview&quot;
	],
	&quot;范&quot;: [
		&quot;vrt-permissions&quot;
	],
	&quot;魔琴&quot;: [
		&quot;global-rollbacker&quot;
	],
	&quot;ꠢꠣꠍꠘ ꠞꠣꠎꠣ&quot;: [
		&quot;editor&quot;
	],
	&quot;기나ㅏㄴ&quot;: [
		&quot;global-rollbacker&quot;,
		&quot;global-renamer&quot;
	]
}</text>
      <sha1>5cmwvkgmo8opkf9njo8q1vl86x91lc9</sha1>
    </revision>
  </page>
  <page>
    <title>User:Ottawahitech/Israeli History</title>
    <ns>2</ns>
    <id>471969</id>
    <revision>
      <id>4671201</id>
      <parentid>4473115</parentid>
      <timestamp>2026-09-19T19:22:57Z</timestamp>
      <contributor>
        <username>~2026-40500-29</username>
        <id>3615407</id>
      </contributor>
      <comment>/* Trump second presidency */ ICC</comment>
      <origin>4671201</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="4002" sha1="eihb9gve51ymitblnvxuufuyt2f92hl" xml:space="preserve">Israel-Hamas war (add a new chapter to [[Israeli History]]?
 
== Possible sources ==
{{wikiversity|Was Gaza Strip from 2010 to 2020 like a concentration camp?}}

* [[wikiquote:Al-Aqsa Flood]]
* [[wikiquote:Israel–Hamas war]]
* [[wikiquote:Israel–Hamas war hostage crisis]]
* [[wikiquote:United States support for Israel in the Israel–Hamas war]]
* [[wikiquote:Bibi Netanyahu]]
* [[wikiquote:Fareed Zakaria#Video clips]]
* [[wikiquote:Shlomo Vishinsky]]+https://en.wikiquote.org/wiki/Yair_Lapid
* [[wikiquote:Al-Shifa Hospital]]

=== Biden presidency ===
* [[Andrea May Sahouri]] [https://www.freep.com/story/opinion/columnists/2023/10/15/israeli-hamas-conflict-gaza-palestinian-humanity/71171009007/ I almost gave up hope people will see humanity in Palestinians | Opinion] (Oct 15, 2023) Detroit Free Press
* [[Nizam Mamode]] [https://www.theguardian.com/commentisfree/2025/feb/02/surgeon-gaza-children-britain-sniper-fire-drones-labour-arms-israel As a surgeon in Gaza, I witnessed hell visited on children. It shames me that Britain played a part in it] (2 Feb 2025) The Guardian

=== Trump second presidency ===
==== Possible sources ceasefire ====
===== Ceasefire with Hamas =====
* [[Fareed Zakaria]] GPS on CNN January 19, 2025 breaking news Israel-Hamas ceasefire goes into effect
** [https://transcripts.cnn.com/show/fzgps/date/2025-01-19/segment/01 Transcript]

** Video ;[https://www.cnn.com/2025/01/19/world/video/gps0119-haviv-gur-on-the-israel-hamas-ceasefire On GPS: An Israeli perspective on why the Israel-Hamas war is likely to continue]
*** Haviv Rettig Gur, senior analyst at The Times of Israel, tells Fareed about Israel's fundamental ethos of protecting its people and why the war is likely to continue, even after the return of some hostages.

** Video: [https://www.cnn.com/2025/01/19/world/video/gps0119-mustafa-barghouti-on-gaza-ceasefire On GPS: Palestinian politician Mustafa Barghouti reacts on day one of the Israel-Hamas ceasefire]
*** Mustafa Barghouti, president of the Palestinian National Initiative, spoke with Fareed about the lack of attention paid to Palestinian prisoners held by Israel and about who will lead Gaza in the future.

* [[Michael Smerconish]] CNN January 25: [https://www.nbcnews.com/news/world/live-blog/hostage-release-israel-hamas-ceasefire-deal-live-updates-rcna189091 Israel-Hamas ceasefire: Four female hostages return to Israel; 200 Palestinians released]
* [[NHK]] NewsLine January 26, 2025 
** [https://www3.nhk.or.jp/nhkworld/en/news/20250127_02/ One week since start of ceasefire between Israel and Hamas]
* [[NHK]] News January 27, 2025 
** [https://www3.nhk.or.jp/nhkworld/en/news/20250127_09/ White House: Hezbollah, Israel ceasefire agreement to continue until Feb. 18]

* [https://www.theguardian.com/world/2025/feb/ls-female-spotters-are-free-now-their-families-want-to-know-why-warnings-were-ignored Israel’s female spotters are free – now their families want to know why warnings were ignored] (Feb 1, 2025)  The Guardian
* [[CBC]] (Feb 04, 2025) [https://www.cbc.ca/news/world/trump-iran-deport-prisoners-gaza-1.7450362 Trump proposes 'permanently' displacing Palestinians so U.S. can take over Gaza] (Feb 04, 2025) CBC

===== Ceasefire with Hezbollah =====
* [[CSPAN]] NOVEMBER 26, 2024
** [https://www.c-span.org/video/?c5143557/president-biden-israel-hezbollah-ceasefire-deal clip of president biden remarks on israel-hezbollah ceasefire deal]
* Reuters January 23, 2025
** [https://www.reuters.com/world/middle-east/israel-voices-concerns-about-implementation-ceasefire-with-hezbollah-ahead-2025-01-23/ Israel sees more to do on Lebanon ceasefire as deadline nears]

==== ICC ====
* zohran mamdani, United Nations, New York, 
* critical point for ICC amanpour and company 2026-09-18, personal allegations against Chief Prosecutor, harassment bullying, Sarah, Deputy Prosecutor interviewed, work in progress, mosad agent, Philippines, jurisdiction, sanctions by usa, consequences: banking, health insurance, family</text>
      <sha1>eihb9gve51ymitblnvxuufuyt2f92hl</sha1>
    </revision>
  </page>
  <page>
    <title>Aros/Developer/Docs/Libraries/Codesets</title>
    <ns>0</ns>
    <id>475469</id>
    <revision>
      <id>4671298</id>
      <parentid>4669775</parentid>
      <timestamp>2026-09-20T08:27:13Z</timestamp>
      <contributor>
        <username>Jeff1138</username>
        <id>301139</id>
      </contributor>
      <minor />
      <origin>4671298</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="129493" sha1="kocaivssq06kvwzjfz3z80vdpy4g5w6" xml:space="preserve">{{ArosNav}}

==Introduction==

Character set (charsets) encoding is the process of assigning numbers to graphical characters, especially the written characters of human language

Unicode v16.0 emojis are not supported but [https://github.com/jens-maus/libcodesets codesets.library] provides 

&lt;pre&gt;
internally supported (hardcoded) charsets/codesets are: (conversions are possible from and to each codeset):

    AmigaPL – Polish (Amiga)
    Amiga-1251      – Cyrillic (Amiga)
    ISO-8859-1      – Latin 1 aka Western European ASCII based 
    ISO-8859-1+Euro – West European (with EURO)
    ISO-8859-2      – Latin-2 aka Central/East European
    ISO-8859-3      – South European
    ISO-8859-4      – North European
    ISO-8859-5      – Slavic languages
    ISO-8859-6      – Latin 5 aka Turkish
    ISO-8859-15     – Latin 9 - West European II
    ISO-8859-16     – South-Eastern European
    KOI8-R – Russian
    UTF-8 – Unicode

In addition, external charset table files can be stored in LIBS:Charsets or loaded by an application from PROGDIR:Charsets. The charset files included with this distributions are:

    IBM866 – Cyrillic (cp866)
    ISO-8859-7 – Greek (LatinGreek)
    ISO-8859-10 – Nordic (Latin 6)
    windows-1250 – Central/East Europe (Windows)
    windows-1251 – Cyrillic (Windows)
    windows-1252 – West European (Windows)

Windows-1252 was first character set in Windows. It was a copy of ASCII, but used 8-bits to represent 256 different characters (international letters). Windows-1252 is supported by all browsers.
&lt;/pre&gt;


From [https://github.com/charabaruk/WookieChat Wookiechat]

Charsets: wookiechat doesnt need the incoming charset to be configured exactly anymore. When someone types weird characters, wookie will scan it for utf8 characters.. if it has those, then it'll convert it to ascii as best an Amiga can using codesets.library. if theres none, then it'll just use codesets.library Codesets_FindBest() function.


[https://github.com/jens-maus/yam YAM] 

&lt;syntaxhighlight lang=&quot;c&quot;&gt;
&lt;/syntaxhighlight&gt;

[https://github.com/sacredbanana/AmigaGPT AmigaGPT]

&lt;syntaxhighlight lang=&quot;c&quot;&gt;
&lt;/syntaxhighlight&gt;


==Source Code==

&lt;syntaxhighlight lang=&quot;c&quot;&gt;
&lt;/syntaxhighlight&gt;

&lt;syntaxhighlight lang=&quot;c&quot;&gt;
/***************************************************************************

 codesets.library - Amiga shared library for handling different codesets
 Copyright (C) 2001-2005 by Alfonso [alfie] Ranieri &lt;alforan@tin.it&gt;.
 Copyright (C) 2005-2014 codesets.library Open Source Team

 This library is free software; you can redistribute it and/or
 modify it under the terms of the GNU Lesser General Public
 License as published by the Free Software Foundation; either
 version 2.1 of the License, or (at your option) any later version.

 This library is distributed in the hope that it will be useful,
 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 Lesser General Public License for more details.

 codesets.library project: http://sourceforge.net/projects/codesetslib/

 Most of the code included in this file was relicensed from GPL to LGPL
 from the source code of SimpleMail (http://www.sf.net/projects/simplemail)
 with full permissions by its authors.

 $Id$

***************************************************************************/

#include &lt;exec/libraries.h&gt;
#include &lt;libraries/codesets.h&gt;
#include &lt;proto/codesets.h&gt;
#include &lt;proto/exec.h&gt;

#include &lt;stdio.h&gt;

/* This is just a very quickly written test, not a full-featured convertor */
#define BUF_SIZE 102400

struct Library *CodesetsBase = NULL;
#if defined(__amigaos4__)
struct CodesetsIFace *ICodesets = NULL;
#endif

#if defined(__amigaos4__)
#define GETINTERFACE(iface, base)	(iface = (APTR)GetInterface((struct Library *)(base), &quot;main&quot;, 1L, NULL))
#define DROPINTERFACE(iface)			(DropInterface((struct Interface *)iface), iface = NULL)
#else
#define GETINTERFACE(iface, base)	TRUE
#define DROPINTERFACE(iface)
#endif

struct codeset *srcCodeset;
struct codeset *destCodeset;

int main(int argc, char **argv)
{
  char *buf, *destbuf;
  ULONG destlen;
  FILE *f;

  if (argc &lt; 4)
  {
    fprintf(stderr, &quot;Usage: %s &lt;source codeset&gt; &lt;destination codeset&gt; &lt;source file&gt;\n&quot;, argv[0]);
    return 0;
  }
  if((CodesetsBase = OpenLibrary(CODESETSNAME,CODESETSVER)) &amp;&amp;
     GETINTERFACE(ICodesets, CodesetsBase))
  {
    srcCodeset = CodesetsFind(argv[1], CSA_FallbackToDefault, FALSE, TAG_DONE);
    if (srcCodeset)
    {
      destCodeset = CodesetsFind(argv[2], CSA_FallbackToDefault, FALSE, TAG_DONE);
      if (destCodeset)
      {
        buf = AllocMem(BUF_SIZE, MEMF_CLEAR);

        if (buf)
        {
          f = fopen(argv[3], &quot;r&quot;);
          if (f)
          {
            fread(buf, BUF_SIZE-1, 1, f);
            fclose(f);
            destbuf = CodesetsConvertStr(CSA_SourceCodeset, (IPTR)srcCodeset,
                                         CSA_DestCodeset, (IPTR)destCodeset,
                                         CSA_Source, (IPTR)buf,
                                         CSA_DestLenPtr, (IPTR)&amp;destlen,
                                         TAG_DONE);
            if (destbuf)
            {
              fprintf(stderr, &quot;Result length: %u\n&quot;, (unsigned int)destlen);
              fwrite(destbuf, destlen, 1, stdout);
              fputc('\n', stderr);
              CodesetsFreeA(destbuf, NULL);
            }
          else
            fprintf(stderr, &quot;Failed to convert text!\n&quot;);
          }
          FreeMem(buf, BUF_SIZE);
        }
        else
          fprintf(stderr, &quot;Failed to allocate %d bytes for buffer\n&quot;, BUF_SIZE);
      }
      else
        fprintf(stderr, &quot;Unknown destination codeset %s\n&quot;, argv[2]);
    }
    else
      fprintf(stderr, &quot;Unknown source codeset %s\n&quot;, argv[1]);

    DROPINTERFACE(ICodesets);
    CloseLibrary(CodesetsBase);
  }
  else
    fprintf(stderr, &quot;Failed to open codesets.library!\n&quot;);

  return 0;
}
&lt;/syntaxhighlight&gt;


&lt;syntaxhighlight lang=&quot;c&quot;&gt;
/***************************************************************************

 codesets.library - Amiga shared library for handling different codesets
 Copyright (C) 2001-2005 by Alfonso [alfie] Ranieri &lt;alforan@tin.it&gt;.
 Copyright (C) 2005-2014 codesets.library Open Source Team

 This library is free software; you can redistribute it and/or
 modify it under the terms of the GNU Lesser General Public
 License as published by the Free Software Foundation; either
 version 2.1 of the License, or (at your option) any later version.

 This library is distributed in the hope that it will be useful,
 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 Lesser General Public License for more details.

 codesets.library project: http://sourceforge.net/projects/codesetslib/

 Most of the code included in this file was relicensed from GPL to LGPL
 from the source code of SimpleMail (http://www.sf.net/projects/simplemail)
 with full permissions by its authors.

 $Id$

***************************************************************************/

#include &lt;proto/exec.h&gt;
#include &lt;proto/codesets.h&gt;
#include &lt;stdio.h&gt;
#include &lt;string.h&gt;

#define ISO8859_1_STR &quot;Schmöre bröd, schmöre bröd, bröd bröd bräd.&quot;
#define CP1251_STR    &quot;1251 êîäèðîâêà äëÿ ïðèìåðà.&quot;
#define ASCII_STR     &quot;latin 1 bla bla bla.&quot;
#define KOI8R_STR     &quot;koi îÅ×ÏÚÍÏÖÎÏ ÐÅÒÅËÏÄÉÒÏ×ÁÔØ ÉÚ ËÏÄÉÒÏ×ËÉ&quot;

struct Library *CodesetsBase = NULL;
#if defined(__amigaos4__)
struct CodesetsIFace* ICodesets = NULL;
#endif

#if defined(__amigaos4__)
#define GETINTERFACE(iface, base)	(iface = (APTR)GetInterface((struct Library *)(base), &quot;main&quot;, 1L, NULL))
#define DROPINTERFACE(iface)			(DropInterface((struct Interface *)iface), iface = NULL)
#else
#define GETINTERFACE(iface, base)	TRUE
#define DROPINTERFACE(iface)
#endif

int main(void)
{
  int res;

  if((CodesetsBase = OpenLibrary(CODESETSNAME,CODESETSVER)) &amp;&amp;
      GETINTERFACE(ICodesets, CodesetsBase))
  {
    IPTR errNum = 0;
    struct codeset *cs;

    if((cs = CodesetsFindBest(CSA_Source, (IPTR)ISO8859_1_STR,
                              CSA_ErrPtr, (IPTR)&amp;errNum,
                              TAG_DONE)))
    {
      printf(&quot;Identified ISO8859_1_STR as %s with %d of %d errors\n&quot;, cs-&gt;name, (int)errNum, (int)strlen(ISO8859_1_STR));
    }
    else
      printf(&quot;couldn't identify ISO8859_1_STR!\n&quot;);

    if((cs = CodesetsFindBest(CSA_Source, (IPTR)CP1251_STR,
                              CSA_ErrPtr, (IPTR)&amp;errNum,
                              CSA_CodesetFamily, CSV_CodesetFamily_Cyrillic,
                              TAG_DONE)))
    {
      printf(&quot;Identified CP1251_STR as %s with %d of %d errors\n&quot;, cs-&gt;name, (int)errNum, (int)strlen(CP1251_STR));
    }
    else
      printf(&quot;couldn't identify CP1251_STR!\n&quot;);

    if((cs = CodesetsFindBest(CSA_Source, (IPTR)ASCII_STR,
                              CSA_ErrPtr, (IPTR)&amp;errNum,
                              CSA_CodesetFamily, CSV_CodesetFamily_Cyrillic,
                              TAG_DONE)))
    {
      printf(&quot;Identified ASCII_STR as %s with %d of %d errors\n&quot;, cs-&gt;name, (int)errNum, (int)strlen(ASCII_STR));
    }
    else
      printf(&quot;couldn't identify ASCII_STR!\n&quot;);

    if((cs = CodesetsFindBest(CSA_Source, (IPTR)KOI8R_STR,
                              CSA_ErrPtr, (IPTR)&amp;errNum,
                              CSA_CodesetFamily, CSV_CodesetFamily_Cyrillic,
                              TAG_DONE)))
    {
      printf(&quot;Identified KOI8R_STR as %s with %d of %d errors\n&quot;, cs-&gt;name, (int)errNum, (int)strlen(KOI8R_STR));
    }
    else
      printf(&quot;couldn't identify KOI8R_STR!\n&quot;);

    res = 0;

    DROPINTERFACE(ICodesets);
    CloseLibrary(CodesetsBase);
    CodesetsBase = NULL;
  }
  else
  {
    printf(&quot;can't open %s %d+\n&quot;,CODESETSNAME,CODESETSVER);
    res = 20;
  }

  return res;
}
&lt;/syntaxhighlight&gt;

&lt;syntaxhighlight lang=&quot;c&quot;&gt;
&lt;/syntaxhighlight&gt;

&lt;syntaxhighlight lang=&quot;c&quot;&gt;
&lt;/syntaxhighlight&gt;


From [https://github.com/sba1/simplemail SimpleMail] 

&lt;syntaxhighlight lang=&quot;c&quot;&gt;
/***************************************************************************
 SimpleMail - Copyright (C) 2000 Hynek Schlawack and Sebastian Bauer

 This program is free software; you can redistribute it and/or modify
 it under the terms of the GNU General Public License as published by
 the Free Software Foundation; either version 2 of the License, or
 (at your option) any later version.

 This program is distributed in the hope that it will be useful,
 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 GNU General Public License for more details.

 You should have received a copy of the GNU General Public License
 along with this program; if not, write to the Free Software
 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
***************************************************************************/

/**
 * @brief Support of codesets.
 *
 * @file codesets.c
 */

#include &quot;codesets.h&quot;

#include &lt;ctype.h&gt;
#include &lt;dirent.h&gt; /* dir stuff */
#include &lt;stdlib.h&gt;
#include &lt;string.h&gt;
#include &lt;unistd.h&gt;

#include &quot;codesets_table.h&quot;
#include &quot;debug.h&quot;
#include &quot;punycode.h&quot;
#include &quot;smintl.h&quot;
#include &quot;support_indep.h&quot;

/* from ConvertUTF.h */

/*
 * Copyright 2001 Unicode, Inc.
 *
 * Disclaimer
 *
 * This source code is provided as is by Unicode, Inc. No claims are
 * made as to fitness for any particular purpose. No warranties of any
 * kind are expressed or implied. The recipient agrees to determine
 * applicability of information provided. If this file has been
 * purchased on magnetic or optical media from Unicode, Inc., the
 * sole remedy for any claim will be exchange of defective media
 * within 90 days of receipt.
 *
 * Limitations on Rights to Redistribute This Code
 *
 * Unicode, Inc. hereby grants the right to freely use the information
 * supplied in this file in the creation of products supporting the
 * Unicode Standard, and to make copies of this file in any form
 * for internal or external distribution as long as this notice
 * remains attached.
 */

/* ---------------------------------------------------------------------

    Conversions between UTF32, UTF-16, and UTF-8.  Header file.

    Several funtions are included here, forming a complete set of
    conversions between the three formats.  UTF-7 is not included
    here, but is handled in a separate source file.

    Each of these routines takes pointers to input buffers and output
    buffers.  The input buffers are const.

    Each routine converts the text between *sourceStart and sourceEnd,
    putting the result into the buffer between *targetStart and
    targetEnd. Note: the end pointers are *after* the last item: e.g.
    *(sourceEnd - 1) is the last item.

    The return result indicates whether the conversion was successful,
    and if not, whether the problem was in the source or target buffers.
    (Only the first encountered problem is indicated.)

    After the conversion, *sourceStart and *targetStart are both
    updated to point to the end of last text successfully converted in
    the respective buffers.

    Input parameters:
	sourceStart - pointer to a pointer to the source buffer.
		The contents of this are modified on return so that
		it points at the next thing to be converted.
	targetStart - similarly, pointer to pointer to the target buffer.
	sourceEnd, targetEnd - respectively pointers to the ends of the
		two buffers, for overflow checking only.

    These conversion functions take a ConversionFlags argument. When this
    flag is set to strict, both irregular sequences and isolated surrogates
    will cause an error.  When the flag is set to lenient, both irregular
    sequences and isolated surrogates are converted.

    Whether the flag is strict or lenient, all illegal sequences will cause
    an error return. This includes sequences such as: &lt;F4 90 80 80&gt;, &lt;C0 80&gt;,
    or &lt;A0&gt; in UTF-8, and values above 0x10FFFF in UTF-32. Conformant code
    must check for illegal sequences.

    When the flag is set to lenient, characters over 0x10FFFF are converted
    to the replacement character; otherwise (when the flag is set to strict)
    they constitute an error.

    Output parameters:
	The value &quot;sourceIllegal&quot; is returned from some routines if the input
	sequence is malformed.  When &quot;sourceIllegal&quot; is returned, the source
	value will point to the illegal value that caused the problem. E.g.,
	in UTF-8 when a sequence is malformed, it points to the start of the
	malformed sequence.

    Author: Mark E. Davis, 1994.
    Rev History: Rick McGowan, fixes &amp; updates May 2001.

------------------------------------------------------------------------ */

/* ---------------------------------------------------------------------
    The following 4 definitions are compiler-specific.
    The C standard does not guarantee that wchar_t has at least
    16 bits, so wchar_t is no less portable than unsigned short!
    All should be unsigned values to avoid sign extension during
    bit mask &amp; shift operations.
------------------------------------------------------------------------ */

typedef unsigned long	UTF32;	/* at least 32 bits */
typedef unsigned short	UTF16;	/* at least 16 bits */
typedef unsigned char	UTF8;	/* typically 8 bits */
typedef unsigned char	Boolean; /* 0 or 1 */

/* Some fundamental constants */
#define UNI_REPLACEMENT_CHAR (UTF32)0x0000FFFD
#define UNI_MAX_BMP (UTF32)0x0000FFFF
#define UNI_MAX_UTF16 (UTF32)0x0010FFFF
#define UNI_MAX_UTF32 (UTF32)0x7FFFFFFF

typedef enum {
	conversionOK, 		/* conversion successful */
	sourceExhausted,	/* partial character in source, but hit end */
	targetExhausted,	/* insuff. room in target for conversion */
	sourceIllegal,		/* source sequence is illegal/malformed */
  sourceCorrupt,    /* source contains invalid UTF-7 */ /* addded */
} ConversionResult;

typedef enum {
	strictConversion = 0,
	lenientConversion
} ConversionFlags;

ConversionResult ConvertUTF32toUTF16 (
		UTF32** sourceStart, const UTF32* sourceEnd,
		UTF16** targetStart, const UTF16* targetEnd, const ConversionFlags flags);

ConversionResult ConvertUTF16toUTF32 (
		UTF16** sourceStart, UTF16* sourceEnd,
		UTF32** targetStart, const UTF32* targetEnd, const ConversionFlags flags);

ConversionResult ConvertUTF16toUTF8 (
		UTF16** sourceStart, const UTF16* sourceEnd,
		UTF8** targetStart, const UTF8* targetEnd, ConversionFlags flags);

ConversionResult ConvertUTF8toUTF16 (
		UTF8** sourceStart, UTF8* sourceEnd,
		UTF16** targetStart, const UTF16* targetEnd, const ConversionFlags flags);

ConversionResult ConvertUTF32toUTF8 (
		UTF32** sourceStart, const UTF32* sourceEnd,
		UTF8** targetStart, const UTF8* targetEnd, ConversionFlags flags);

ConversionResult ConvertUTF8toUTF32 (
		UTF8** sourceStart, UTF8* sourceEnd,
		UTF32** targetStart, const UTF32* targetEnd, ConversionFlags flags);

static Boolean isLegalUTF8Sequence(const UTF8 *source, const UTF8 *sourceEnd);

/* --------------------------------------------------------------------- */

int utf8islegal(const char *source, const char *sourceend)
{
	return isLegalUTF8Sequence((const UTF8*)source, (const UTF8*)sourceend);
}

/* --------------------------------------------------------------------- */

/* ConvertUTF.c */

/*
 * Copyright 2001 Unicode, Inc.
 *
 * Disclaimer
 *
 * This source code is provided as is by Unicode, Inc. No claims are
 * made as to fitness for any particular purpose. No warranties of any
 * kind are expressed or implied. The recipient agrees to determine
 * applicability of information provided. If this file has been
 * purchased on magnetic or optical media from Unicode, Inc., the
 * sole remedy for any claim will be exchange of defective media
 * within 90 days of receipt.
 *
 * Limitations on Rights to Redistribute This Code
 *
 * Unicode, Inc. hereby grants the right to freely use the information
 * supplied in this file in the creation of products supporting the
 * Unicode Standard, and to make copies of this file in any form
 * for internal or external distribution as long as this notice
 * remains attached.
 */

/* ---------------------------------------------------------------------

    Conversions between UTF32, UTF-16, and UTF-8. Source code file.
	Author: Mark E. Davis, 1994.
	Rev History: Rick McGowan, fixes &amp; updates May 2001.

    See the header file &quot;ConvertUTF.h&quot; for complete documentation.

------------------------------------------------------------------------ */


/*#include &quot;ConvertUTF.h&quot;*/
/*#ifdef CVTUTF_DEBUG*/
#include &lt;stdio.h&gt;
/*#endif*/

static const int halfShift	= 10; /* used for shifting by 10 bits */

static const UTF32 halfBase	= 0x0010000UL;
static const UTF32 halfMask	= 0x3FFUL;

#define UNI_SUR_HIGH_START	(UTF32)0xD800
#define UNI_SUR_HIGH_END	(UTF32)0xDBFF
#define UNI_SUR_LOW_START	(UTF32)0xDC00
#define UNI_SUR_LOW_END		(UTF32)0xDFFF
#define false			0
#define true			1

/* --------------------------------------------------------------------- */

ConversionResult ConvertUTF32toUTF16 (
		UTF32** sourceStart, const UTF32* sourceEnd,
		UTF16** targetStart, const UTF16* targetEnd, const ConversionFlags flags) {
	ConversionResult result = conversionOK;
	UTF32* source = *sourceStart;
	UTF16* target = *targetStart;
	while (source &lt; sourceEnd) {
		UTF32 ch;
		if (target &gt;= targetEnd) {
			result = targetExhausted; break;
		}
		ch = *source++;
		if (ch &lt;= UNI_MAX_BMP) { /* Target is a character &lt;= 0xFFFF */
			if ((flags == strictConversion) &amp;&amp; (ch &gt;= UNI_SUR_HIGH_START &amp;&amp; ch &lt;= UNI_SUR_LOW_END)) {
				--source; /* return to the illegal value itself */
				result = sourceIllegal;
				break;
			} else {
			    *target++ = ch;	/* normal case */
			}
		} else if (ch &gt; UNI_MAX_UTF16) {
			if (flags == strictConversion) {
				result = sourceIllegal;
			} else {
				*target++ = UNI_REPLACEMENT_CHAR;
			}
		} else {
			/* target is a character in range 0xFFFF - 0x10FFFF. */
			if (target + 1 &gt;= targetEnd) {
				result = targetExhausted; break;
			}
			ch -= halfBase;
			*target++ = (ch &gt;&gt; halfShift) + UNI_SUR_HIGH_START;
			*target++ = (ch &amp; halfMask) + UNI_SUR_LOW_START;
		}
	}
	*sourceStart = source;
	*targetStart = target;
	return result;
}

/* --------------------------------------------------------------------- */

ConversionResult ConvertUTF16toUTF32 (
		UTF16** sourceStart, UTF16* sourceEnd,
		UTF32** targetStart, const UTF32* targetEnd, const ConversionFlags flags) {
	ConversionResult result = conversionOK;
	UTF16* source = *sourceStart;
	UTF32* target = *targetStart;
	UTF32 ch, ch2;
	while (source &lt; sourceEnd) {
		ch = *source++;
		if (ch &gt;= UNI_SUR_HIGH_START &amp;&amp; ch &lt;= UNI_SUR_HIGH_END &amp;&amp; source &lt; sourceEnd) {
			ch2 = *source;
			if (ch2 &gt;= UNI_SUR_LOW_START &amp;&amp; ch2 &lt;= UNI_SUR_LOW_END) {
				ch = ((ch - UNI_SUR_HIGH_START) &lt;&lt; halfShift)
					+ (ch2 - UNI_SUR_LOW_START) + halfBase;
				++source;
			} else if (flags == strictConversion) { /* it's an unpaired high surrogate */
				--source; /* return to the illegal value itself */
				result = sourceIllegal;
				break;
			}
		} else if ((flags == strictConversion) &amp;&amp; (ch &gt;= UNI_SUR_LOW_START &amp;&amp; ch &lt;= UNI_SUR_LOW_END)) {
			/* an unpaired low surrogate */
			--source; /* return to the illegal value itself */
			result = sourceIllegal;
			break;
		}
		if (target &gt;= targetEnd) {
			result = targetExhausted; break;
		}
		*target++ = ch;
	}
	*sourceStart = source;
	*targetStart = target;
#ifdef CVTUTF_DEBUG
if (result == sourceIllegal) {
    fprintf(stderr, &quot;ConvertUTF16toUTF32 illegal seq 0x%04x,%04x\n&quot;, ch, ch2);
    fflush(stderr);
}
#endif
	return result;
}

/* --------------------------------------------------------------------- */

/*
 * Index into the table below with the first byte of a UTF-8 sequence to
 * get the number of trailing bytes that are supposed to follow it.
 */

static const char trailingBytesForUTF8[256] = {
	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
	1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
	2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2, 3,3,3,3,3,3,3,3,4,4,4,4,5,5,5,5
};

/*
 * Magic values subtracted from a buffer value during UTF8 conversion.
 * This table contains as many values as there might be trailing bytes
 * in a UTF-8 sequence.
 */
static const UTF32 offsetsFromUTF8[6] = { 0x00000000UL, 0x00003080UL, 0x000E2080UL,
					 0x03C82080UL, 0xFA082080UL, 0x82082080UL };

/*
 * Once the bits are split out into bytes of UTF-8, this is a mask OR-ed
 * into the first byte, depending on how many bytes follow.  There are
 * as many entries in this table as there are UTF-8 sequence types.
 * (I.e., one byte sequence, two byte... six byte sequence.)
 */
static const UTF8 firstByteMark[7] = { 0x00, 0x00, 0xC0, 0xE0, 0xF0, 0xF8, 0xFC };

/* --------------------------------------------------------------------- */

/* The interface converts a whole buffer to avoid function-call overhead.
 * Constants have been gathered. Loops &amp; conditionals have been removed as
 * much as possible for efficiency, in favor of drop-through switches.
 * (See &quot;Note A&quot; at the bottom of the file for equivalent code.)
 * If your compiler supports it, the &quot;isLegalUTF8&quot; call can be turned
 * into an inline function.
 */

/* --------------------------------------------------------------------- */

ConversionResult ConvertUTF16toUTF8 (
		UTF16** sourceStart, const UTF16* sourceEnd,
		UTF8** targetStart, const UTF8* targetEnd, ConversionFlags flags) {
	ConversionResult result = conversionOK;
	UTF16* source = *sourceStart;
	UTF8* target = *targetStart;
	while (source &lt; sourceEnd) {
		UTF32 ch;
		unsigned short bytesToWrite = 0;
		const UTF32 byteMask = 0xBF;
		const UTF32 byteMark = 0x80;
		ch = *source++;
		/* If we have a surrogate pair, convert to UTF32 first. */
		if (ch &gt;= UNI_SUR_HIGH_START &amp;&amp; ch &lt;= UNI_SUR_HIGH_END &amp;&amp; source &lt; sourceEnd) {
			UTF32 ch2 = *source;
			if (ch2 &gt;= UNI_SUR_LOW_START &amp;&amp; ch2 &lt;= UNI_SUR_LOW_END) {
				ch = ((ch - UNI_SUR_HIGH_START) &lt;&lt; halfShift)
					+ (ch2 - UNI_SUR_LOW_START) + halfBase;
				++source;
			} else if (flags == strictConversion) { /* it's an unpaired high surrogate */
				--source; /* return to the illegal value itself */
				result = sourceIllegal;
				break;
			}
		} else if ((flags == strictConversion) &amp;&amp; (ch &gt;= UNI_SUR_LOW_START &amp;&amp; ch &lt;= UNI_SUR_LOW_END)) {
			--source; /* return to the illegal value itself */
			result = sourceIllegal;
			break;
		}
		/* Figure out how many bytes the result will require */
		if (ch &lt; (UTF32)0x80) {			bytesToWrite = 1;
		} else if (ch &lt; (UTF32)0x800) {		bytesToWrite = 2;
		} else if (ch &lt; (UTF32)0x10000) {	bytesToWrite = 3;
		} else if (ch &lt; (UTF32)0x200000) {	bytesToWrite = 4;
		} else {				bytesToWrite = 2;
							ch = UNI_REPLACEMENT_CHAR;
		}

		target += bytesToWrite;
		if (target &gt; targetEnd) {
			target -= bytesToWrite; result = targetExhausted; break;
		}
		switch (bytesToWrite) {	/* note: everything falls through. */
			case 4:	*--target = (ch | byteMark) &amp; byteMask; ch &gt;&gt;= 6;
			case 3:	*--target = (ch | byteMark) &amp; byteMask; ch &gt;&gt;= 6;
			case 2:	*--target = (ch | byteMark) &amp; byteMask; ch &gt;&gt;= 6;
			case 1:	*--target =  ch | firstByteMark[bytesToWrite];
		}
		target += bytesToWrite;
	}
	*sourceStart = source;
	*targetStart = target;
	return result;
}

/* --------------------------------------------------------------------- */

/*
 * Utility routine to tell whether a sequence of bytes is legal UTF-8.
 * This must be called with the length pre-determined by the first byte.
 * If not calling this from ConvertUTF8to*, then the length can be set by:
 *	length = trailingBytesForUTF8[*source]+1;
 * and the sequence is illegal right away if there aren't that many bytes
 * available.
 * If presented with a length &gt; 4, this returns false.  The Unicode
 * definition of UTF-8 goes up to 4-byte sequences.
 */

static Boolean isLegalUTF8(const UTF8 *source, int length) {
	UTF8 a;
	const UTF8 *srcptr = source+length;
	switch (length) {
	default: return false;
		/* Everything else falls through when &quot;true&quot;... */
	case 4: if ((a = (*--srcptr)) &lt; 0x80 || a &gt; 0xBF) return false;
	case 3: if ((a = (*--srcptr)) &lt; 0x80 || a &gt; 0xBF) return false;
	case 2: if ((a = (*--srcptr)) &gt; 0xBF) return false;
		switch (*source) {
		    /* no fall-through in this inner switch */
		    case 0xE0: if (a &lt; 0xA0) return false; break;
		    case 0xF0: if (a &lt; 0x90) return false; break;
		    case 0xF4: if (a &gt; 0x8F) return false; break;
		    default:  if (a &lt; 0x80) return false;
		}
    	case 1: if (*source &gt;= 0x80 &amp;&amp; *source &lt; 0xC2) return false;
		if (*source &gt; 0xF4) return false;
	}
	return true;
}

/* --------------------------------------------------------------------- */

/*
 * Exported function to return whether a UTF-8 sequence is legal or not.
 * This is not used here; it's just exported.
 */
Boolean isLegalUTF8Sequence(const UTF8 *source, const UTF8 *sourceEnd) {
	int length = trailingBytesForUTF8[*source]+1;
	if (source+length &gt; sourceEnd) {
	    return false;
	}
	return isLegalUTF8(source, length);
}

/* --------------------------------------------------------------------- */

ConversionResult ConvertUTF8toUTF16 (
		UTF8** sourceStart, UTF8* sourceEnd,
		UTF16** targetStart, const UTF16* targetEnd, const ConversionFlags flags) {
	ConversionResult result = conversionOK;
	UTF8* source = *sourceStart;
	UTF16* target = *targetStart;
	while (source &lt; sourceEnd) {
		UTF32 ch = 0;
		unsigned short extraBytesToRead = trailingBytesForUTF8[*source];
		if (source + extraBytesToRead &gt;= sourceEnd) {
			result = sourceExhausted; break;
		}
		/* Do this check whether lenient or strict */
		if (! isLegalUTF8(source, extraBytesToRead+1)) {
			result = sourceIllegal;
			break;
		}
		/*
		 * The cases all fall through. See &quot;Note A&quot; below.
		 */
		switch (extraBytesToRead) {
			case 3:	ch += *source++; ch &lt;&lt;= 6;
			case 2:	ch += *source++; ch &lt;&lt;= 6;
			case 1:	ch += *source++; ch &lt;&lt;= 6;
			case 0:	ch += *source++;
		}
		ch -= offsetsFromUTF8[extraBytesToRead];

		if (target &gt;= targetEnd) {
			result = targetExhausted; break;
		}
		if (ch &lt;= UNI_MAX_BMP) { /* Target is a character &lt;= 0xFFFF */
			if ((flags == strictConversion) &amp;&amp; (ch &gt;= UNI_SUR_HIGH_START &amp;&amp; ch &lt;= UNI_SUR_LOW_END)) {
				--source; /* return to the illegal value itself */
				result = sourceIllegal;
				break;
			} else {
			    *target++ = ch;	/* normal case */
			}
		} else if (ch &gt; UNI_MAX_UTF16) {
			if (flags == strictConversion) {
				result = sourceIllegal;
				source -= extraBytesToRead; /* return to the start */
			} else {
				*target++ = UNI_REPLACEMENT_CHAR;
			}
		} else {
			/* target is a character in range 0xFFFF - 0x10FFFF. */
			if (target + 1 &gt;= targetEnd) {
				result = targetExhausted; break;
			}
			ch -= halfBase;
			*target++ = (ch &gt;&gt; halfShift) + UNI_SUR_HIGH_START;
			*target++ = (ch &amp; halfMask) + UNI_SUR_LOW_START;
		}
	}
	*sourceStart = source;
	*targetStart = target;
	return result;
}

/* --------------------------------------------------------------------- */

ConversionResult ConvertUTF32toUTF8 (
		UTF32** sourceStart, const UTF32* sourceEnd,
		UTF8** targetStart, const UTF8* targetEnd, ConversionFlags flags) {
	ConversionResult result = conversionOK;
	UTF32* source = *sourceStart;
	UTF8* target = *targetStart;
	while (source &lt; sourceEnd) {
		UTF32 ch;
		unsigned short bytesToWrite = 0;
		const UTF32 byteMask = 0xBF;
		const UTF32 byteMark = 0x80;
		ch = *source++;
		/* surrogates of any stripe are not legal UTF32 characters */
		if (flags == strictConversion ) {
			if ((ch &gt;= UNI_SUR_HIGH_START) &amp;&amp; (ch &lt;= UNI_SUR_LOW_END)) {
				--source; /* return to the illegal value itself */
				result = sourceIllegal;
				break;
			}
		}
		/* Figure out how many bytes the result will require */
		if (ch &lt; (UTF32)0x80) {			bytesToWrite = 1;
		} else if (ch &lt; (UTF32)0x800) {		bytesToWrite = 2;
		} else if (ch &lt; (UTF32)0x10000) {	bytesToWrite = 3;
		} else if (ch &lt; (UTF32)0x200000) {	bytesToWrite = 4;
		} else {				bytesToWrite = 2;
							ch = UNI_REPLACEMENT_CHAR;
		}

		target += bytesToWrite;
		if (target &gt; targetEnd) {
			target -= bytesToWrite; result = targetExhausted; break;
		}
		switch (bytesToWrite) {	/* note: everything falls through. */
			case 4:	*--target = (ch | byteMark) &amp; byteMask; ch &gt;&gt;= 6;
			case 3:	*--target = (ch | byteMark) &amp; byteMask; ch &gt;&gt;= 6;
			case 2:	*--target = (ch | byteMark) &amp; byteMask; ch &gt;&gt;= 6;
			case 1:	*--target =  ch | firstByteMark[bytesToWrite];
		}
		target += bytesToWrite;
	}
	*sourceStart = source;
	*targetStart = target;
	return result;
}

/* --------------------------------------------------------------------- */

ConversionResult ConvertUTF8toUTF32 (
		UTF8** sourceStart, UTF8* sourceEnd,
		UTF32** targetStart, const UTF32* targetEnd, ConversionFlags flags) {
	ConversionResult result = conversionOK;
	UTF8* source = *sourceStart;
	UTF32* target = *targetStart;
	while (source &lt; sourceEnd) {
		UTF32 ch = 0;
		unsigned short extraBytesToRead = trailingBytesForUTF8[*source];
		if (source + extraBytesToRead &gt;= sourceEnd) {
			result = sourceExhausted; break;
		}
		/* Do this check whether lenient or strict */
		if (! isLegalUTF8(source, extraBytesToRead+1)) {
			result = sourceIllegal;
			break;
		}
		/*
		 * The cases all fall through. See &quot;Note A&quot; below.
		 */
		switch (extraBytesToRead) {
			case 3:	ch += *source++; ch &lt;&lt;= 6;
			case 2:	ch += *source++; ch &lt;&lt;= 6;
			case 1:	ch += *source++; ch &lt;&lt;= 6;
			case 0:	ch += *source++;
		}
		ch -= offsetsFromUTF8[extraBytesToRead];

		if (target &gt;= targetEnd) {
			result = targetExhausted; break;
		}
		if (ch &lt;= UNI_MAX_UTF32) {
			*target++ = ch;
		} else if (ch &gt; UNI_MAX_UTF32) {
			*target++ = UNI_REPLACEMENT_CHAR;
		} else {
			if (target + 1 &gt;= targetEnd) {
				result = targetExhausted; break;
			}
			ch -= halfBase;
			*target++ = (ch &gt;&gt; halfShift) + UNI_SUR_HIGH_START;
			*target++ = (ch &amp; halfMask) + UNI_SUR_LOW_START;
		}
	}
	*sourceStart = source;
	*targetStart = target;
	return result;
}

/* ---------------------------------------------------------------------

	Note A.
	The fall-through switches in UTF-8 reading code save a
	temp variable, some decrements &amp; conditionals.  The switches
	are equivalent to the following loop:
		{
			int tmpBytesToRead = extraBytesToRead+1;
			do {
				ch += *source++;
				--tmpBytesToRead;
				if (tmpBytesToRead) ch &lt;&lt;= 6;
			} while (tmpBytesToRead &gt; 0);
		}
	In UTF-8 writing code, the switches on &quot;bytesToWrite&quot; are
	similarly unrolled loops.

   --------------------------------------------------------------------- */

/* Some code has been taken from the ConvertUTF7.c file (the utf7 stuff below),
   this is the copyright notice */

/* ================================================================ */
/*
File:   ConvertUTF7.c
Author: David B. Goldsmith
Copyright (C) 1994, 1996 IBM Corporation All rights reserved.
Revisions: Header update only July, 2001.

This code is copyrighted. Under the copyright laws, this code may not
be copied, in whole or part, without prior written consent of IBM Corporation.

IBM Corporation grants the right to use this code as long as this ENTIRE
copyright notice is reproduced in the code.  The code is provided
AS-IS, AND IBM CORPORATION DISCLAIMS ALL WARRANTIES, EITHER EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  IN NO EVENT
WILL IBM CORPORATION BE LIABLE FOR ANY DAMAGES WHATSOEVER (INCLUDING,
WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS
INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY
LOSS) ARISING OUT OF THE USE OR INABILITY TO USE THIS CODE, EVEN
IF IBM CORPORATION HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
BECAUSE SOME STATES DO NOT ALLOW THE EXCLUSION OR LIMITATION OF
LIABILITY FOR CONSEQUENTIAL OR INCIDENTAL DAMAGES, THE ABOVE
LIMITATION MAY NOT APPLY TO YOU.

RESTRICTED RIGHTS LEGEND: Use, duplication, or disclosure by the
government is subject to restrictions as set forth in subparagraph
(c)(l)(ii) of the Rights in Technical Data and Computer Software
clause at DFARS 252.227-7013 and FAR 52.227-19.

This code may be protected by one or more U.S. and International
Patents.

*/


/* ------------------------------------- */

struct list codesets_list;

/**************************************************************************
 Returns the supported codesets as an null terminated string array
**************************************************************************/
char **codesets_supported(void)
{
	static char **array;

	if (array) return array;

	if ((array = (char**)malloc(sizeof(char*)*(list_length(&amp;codesets_list)+1))))
	{
		struct codeset *code;
		int i;

		SM_DEBUGF(15,(&quot;%ld supported Codesets:\n&quot;,list_length(&amp;codesets_list)));

		code = (struct codeset*)list_first(&amp;codesets_list);
		i = 0;

		while (code)
		{
			SM_DEBUGF(15,(&quot;  %p next=%p prev=%p list=%p name=%p %s alt=%p char=%p\n&quot;,code,code-&gt;node.next,code-&gt;node.prev,code-&gt;node.list,code-&gt;name,code-&gt;name,code-&gt;alt_name,code-&gt;characterization));
			array[i++] = code-&gt;name;
			code = (struct codeset*)node_next(&amp;code-&gt;node);
		}
		array[i] = NULL;
	}
	return array;
}

/**************************************************************************
 The compare function
**************************************************************************/
static int codesets_cmp_unicode(const void *arg1, const void *arg2)
{
	char *a1 = (char*)((struct single_convert*)arg1)-&gt;utf8 + 1;
	char *a2 = (char*)((struct single_convert*)arg2)-&gt;utf8 + 1;
	return (int)strcmp(a1,a2);
}

/**
 * Reads the codeset table from the given filename and adds it.
 *
 * @param name
 * @return
 */
static int codesets_read_table(char *name)
{
	char buf[512];

	FILE *fh = fopen(name,&quot;r&quot;);

	if (fh)
	{
		struct codeset *codeset;
		if ((codeset = (struct codeset*)malloc(sizeof(struct codeset))))
		{
			int i;
			memset(codeset,0,sizeof(struct codeset));

			for (i=0;i&lt;256;i++)
				codeset-&gt;table[i].code = codeset-&gt;table[i].ucs4 = i;

			while (myreadline(fh,buf))
			{
				char *result;
				if ((result = get_key_value(buf,&quot;Standard&quot;))) codeset-&gt;name = mystrdup(result);
				else if ((result = get_key_value(buf,&quot;AltStandard&quot;))) codeset-&gt;alt_name = mystrdup(result);
				else if ((result = get_key_value(buf,&quot;ReadOnly&quot;))) codeset-&gt;read_only = !!atoi(result);
				else if ((result = get_key_value(buf,&quot;Characterization&quot;)))
				{
					if ((result[0] == '_') &amp;&amp; (result[1] == '(') &amp;&amp; (result[2] == '&quot;'))
					{
						char *end = strchr(result+3,'&quot;');
						if (end)
						{
							char *txt = mystrndup(result+3,end-(result+3));
							if (txt) codeset-&gt;characterization = mystrdup(_(txt));
							free(txt);
						}
					}
				} else
				{
					char *p = buf;
					int fmt2 = 0;

					if ((*p == '=') || (fmt2 = ((*p == '0') || (*(p+1)=='x'))))
					{
						p++;
						p += fmt2;

						i = strtol(p,&amp;p,16);
						if (i &gt; 0 &amp;&amp; i &lt; 256)
						{
							while (isspace((unsigned char)*p)) p++;

							if (!mystrnicmp(p,&quot;U+&quot;,2))
							{
								p += 2;
								codeset-&gt;table[i].ucs4 = strtol(p,&amp;p,16);
							} else
							{
								if (*p!='#') codeset-&gt;table[i].ucs4 = strtol(p,&amp;p,0);
							}
						}
					}
				}
			}

			for (i=0;i&lt;256;i++)
			{
				UTF32 src = codeset-&gt;table[i].ucs4;
				UTF32 *src_ptr = &amp;src;
				UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];
				ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
				*dest_ptr = 0;
				codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
			}

			memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
			qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
			list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);
		}
		fclose(fh);
	}
	return 1;
}

/*****************************************************************************/

int codesets_init(void)
{
	int i;
	struct codeset *codeset;
	UTF32 src;

	SM_ENTER;

	list_init(&amp;codesets_list);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 0;
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;ISO-8859-1 + Euro&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(_(&quot;West European (with EURO)&quot;));
	codeset-&gt;read_only = 1;

	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i==164) src = 0x20AC; /* the EURO sign */
		else src = i;
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1;
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;ISO-8859-1&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(_(&quot;West European&quot;));
	codeset-&gt;read_only = 0;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		src = i;
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1; /* One entry is enough */
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;ISO-8859-2&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(_(&quot;Central/East European&quot;));
	codeset-&gt;read_only = 0;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i &lt; 0xa0) src = i;
		else src = iso_8859_2_to_ucs4[i-0xa0];
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1; /* One entry is enough */
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;ISO-8859-3&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(_(&quot;South European&quot;));
	codeset-&gt;read_only = 0;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i &lt; 0xa0) src = i;
		else src = iso_8859_3_to_ucs4[i-0xa0];
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1; /* One entry is enough */
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;ISO-8859-4&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(_(&quot;North European&quot;));
	codeset-&gt;read_only = 0;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i &lt; 0xa0) src = i;
		else src = iso_8859_4_to_ucs4[i-0xa0];
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1; /* One entry is enough */
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;KOI8-R&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(_(&quot;Russian&quot;));
	codeset-&gt;read_only = 0;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i &lt; 0x80) src = i;
		else src = koi8r_to_ucs4[i-0x80];
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1; /* One entry is enough */
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;ISO-8859-5&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(_(&quot;Slavic languages&quot;));
	codeset-&gt;read_only = 0;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i &lt; 0xa0) src = i;
		else src = iso_8859_5_to_ucs4[i-0xa0];
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1; /* One entry is enough */
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;ISO-8859-9&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(_(&quot;Turkish&quot;));
	codeset-&gt;read_only = 0;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i &lt; 0xa0) src = i;
		else src = iso_8859_9_to_ucs4[i-0xa0];
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1; /* One entry is enough */
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;ISO-8859-15&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(_(&quot;West European II&quot;));

	codeset-&gt;read_only = 0;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i &lt; 0xa0) src = i;
		else src = iso_8859_15_to_ucs4[i-0xa0];
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1; /* One entry is enough */
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;ISO-8859-16&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(_(&quot;South-Eastern European&quot;));

	codeset-&gt;read_only = 0;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i &lt; 0xa0) src = i;
		else src = iso_8859_16_to_ucs4[i-0xa0];
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1; /* One entry is enough */
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;AmigaPL&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(&quot;AmigaPL&quot;);
	codeset-&gt;read_only = 1;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i &lt; 0xa0) src = i;
		else src = amigapl_to_ucs4[i-0xa0];
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	if (!(codeset = (struct codeset*)malloc(sizeof(struct codeset)))) return 1; /* One entry is enough */
	memset(codeset,0,sizeof(*codeset));
	codeset-&gt;name = mystrdup(&quot;Amiga-1251&quot;);
	codeset-&gt;alt_name = NULL;
	codeset-&gt;characterization = mystrdup(&quot;Amiga-1251&quot;);
	codeset-&gt;read_only = 1;
	for (i=0;i&lt;256;i++)
	{
		UTF32 *src_ptr = &amp;src;
		UTF8 *dest_ptr = &amp;codeset-&gt;table[i].utf8[1];

		if (i &lt; 0xa0) src = i;
		else src = amiga1251_to_ucs4[i-0xa0];
		codeset-&gt;table[i].code = i;
		codeset-&gt;table[i].ucs4 = src;
		ConvertUTF32toUTF8(&amp;src_ptr, src_ptr + 1, &amp;dest_ptr, dest_ptr + 6, strictConversion);
		*dest_ptr = 0;
		codeset-&gt;table[i].utf8[0] = (char*)dest_ptr - (char*)&amp;codeset-&gt;table[i].utf8[1];
	}
	memcpy(codeset-&gt;table_sorted,codeset-&gt;table,sizeof(codeset-&gt;table));
	qsort(codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table[0]),(int (*)(const void *arg1, const void *arg2))codesets_cmp_unicode);
	list_insert_tail(&amp;codesets_list,&amp;codeset-&gt;node);

	SM_DEBUGF(15,(&quot;%ld internal charsets\n&quot;,list_length(&amp;codesets_list)));

	{
		/* dynamicaly loaded */

		DIR *dfd; /* directory descriptor */
		struct dirent *dptr; /* dir entry */
		char path[380];

		getcwd(path, sizeof(path));
		if (chdir(SM_CHARSET_DIR) != -1)
		{
			if ((dfd = opendir(SM_CURRENT_DIR)))
			{
				while ((dptr = readdir(dfd)) != NULL)
				{
					if (!strcmp(&quot;.&quot;,dptr-&gt;d_name) || !strcmp(&quot;..&quot;,dptr-&gt;d_name)) continue;
					SM_DEBUGF(15,(&quot;Loading \&quot;%s\&quot; charset\n&quot;,dptr-&gt;d_name,list_length(&amp;codesets_list)));
					codesets_read_table(dptr-&gt;d_name);
				}
				closedir(dfd);
			}
			chdir(path);
		}
	}

	SM_RETURN(1,&quot;%ld&quot;);
}

/*****************************************************************************/

void codesets_cleanup(void)
{
	struct codeset *codeset;

	while ((codeset = (struct codeset*)list_remove_tail(&amp;codesets_list)))
	{
		free(codeset-&gt;name);
		free(codeset-&gt;alt_name);
		free(codeset-&gt;characterization);
		free(codeset);
	}
}

/*****************************************************************************/

struct codeset *codesets_find(const char *name)
{
	struct codeset *codeset = (struct codeset*)list_first(&amp;codesets_list);

	/* Return ISO-8859-1 as default codeset */
	if (!name) return codeset;

	while (codeset)
	{
		if (!mystricmp(name,codeset-&gt;name) || !mystricmp(name,codeset-&gt;alt_name)) return codeset;
		codeset = (struct codeset*)node_next(&amp;codeset-&gt;node);
	}
	return NULL;
}

/*****************************************************************************/

int codesets_unconvertable_chars(struct codeset *codeset, const char *text, int text_len)
{
	struct single_convert conv;
	const char *text_ptr = text;
	int i;
	int errors = 0;

	for (i=0;i &lt; text_len;i++)
	{
		unsigned char c = *text_ptr++;
		if (c)
		{
			int len = trailingBytesForUTF8[c];
			conv.utf8[1] = c;
			strncpy((char*)&amp;conv.utf8[2],text_ptr,len);
			conv.utf8[2+len] = 0;
			text_ptr += len;

			if (!bsearch(&amp;conv,codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table_sorted[0]),codesets_cmp_unicode))
				errors++;
		} else break;
	}

	return errors;
}

/*****************************************************************************/

struct codeset *codesets_find_best(const char *text, int text_len, int *error_ptr)
{
	struct codeset *codeset = (struct codeset*)list_first(&amp;codesets_list);
	struct codeset *best_codeset = NULL;
	int best_errors = text_len;

	while (codeset)
	{
		if (!codeset-&gt;read_only)
		{
			int errors = codesets_unconvertable_chars(codeset, text, text_len);

			if (errors &lt; best_errors)
			{
				best_codeset = codeset;
				best_errors = errors;
			}
			if (!best_errors) break;
		}
		codeset = (struct codeset*)node_next(&amp;codeset-&gt;node);
	}

	if (!best_codeset) best_codeset = (struct codeset*)list_first(&amp;codesets_list);
	if (error_ptr) *error_ptr = best_errors;

	return best_codeset;
}

/*****************************************************************************/

int utf8len(const utf8 *str)
{
	int len ;
	unsigned char c;

	if (!str) return 0;
	len = 0;

	while ((c = *str++))
	{
		len++;
		str += trailingBytesForUTF8[c];
	}

	return len;
}

/*****************************************************************************/

utf8 *utf8dup(const utf8 *str)
{
	return (utf8*)mystrdup((char*)str);
}

/*****************************************************************************/

int utf8realpos(const utf8 *str, int pos)
{
	const utf8 *str_save = str;
	unsigned char c;

	if (!str) return 0;

	while (pos &amp;&amp; (c = *str))
	{
		pos--;
		str += trailingBytesForUTF8[c] + 1;
	}
	return str - str_save;
}

/*****************************************************************************/

int utf8charpos(const utf8 *str, int pos)
{
	int cp = 0;
	unsigned char c;

	while (pos &gt; 0 &amp;&amp; (c = *str))
	{
		str += trailingBytesForUTF8[c] + 1;
		pos -= trailingBytesForUTF8[c] + 1;
		cp++;
	}
	return cp;
}

/*****************************************************************************/

int utf8bytes(const utf8 *str)
{
	unsigned char c = *str;
	return trailingBytesForUTF8[c] + 1;
}

/*****************************************************************************/

utf8 *utf8ncpy(utf8 *to, const utf8 *from, int n)
{
	utf8 *saved_to = to;
	for (;n;n--)
	{
		unsigned char c = *from++;
		int len = trailingBytesForUTF8[c];

		*to++ = c;
		for (;len;len--)
		{
			*to++ = *from++;
		}
	}
	return saved_to;
}

/*****************************************************************************/

utf8 *utf8create(const void *from, const char *charset)
{
  /* utf8create_len() will stop on a null byte */
	return utf8create_len(from,charset,0x7fffffff);
}

/*****************************************************************************/

int utf8fromstr(const char *from, struct codeset *codeset, utf8 *dest, unsigned int dest_size)
{
	const char *src = from;
	unsigned char c;
	int conv = 0;

	if (dest_size &lt; 1)
		return 0;

	if (!codeset)
		codeset =  (struct codeset*)list_first(&amp;codesets_list);

	for (src = from;(c = (unsigned char)*src);src++)
	{
		unsigned char *utf8_seq;
		unsigned int l;

		utf8_seq = &amp;codeset-&gt;table[c].utf8[0];

		/* Recall that the first element represents
		 * the number of characters */
		l = utf8_seq[0];
		if (dest_size &lt;= l)
			break;

		utf8_seq++;
		for(;(c = *utf8_seq);utf8_seq++)
			*dest++ = c;

		dest_size -= l;
		conv++;
	}

	*dest = 0;
	return conv;
}

/*****************************************************************************/

utf8 *utf8create_len(const void *from, const char *charset, int from_len)
{
	int dest_size = 0;
	char *dest;
	char *src = (char*)from;
	unsigned char c;
	int len;
	struct codeset *codeset = codesets_find(charset);

	if (!from) return NULL;

	if (!codeset)
	{
		if (!mystricmp(charset,&quot;utf-7&quot;))
		{
			return (utf8*)utf7ntoutf8((char *)from,from_len);
		}
		if (!mystricmp(charset,&quot;utf-8&quot;))
		{
			return (utf8*)mystrdup((char *)from);
		}
		codeset = (struct codeset*)list_first(&amp;codesets_list);
	}

	len = from_len;

	while (((c = *src++) &amp;&amp; (len--)))
		dest_size += codeset-&gt;table[c].utf8[0];

	if ((dest = (char*)malloc(dest_size+1)))
	{
		char *dest_ptr = dest;

		for (src = (char*)from;from_len &amp;&amp; (c = *src);src++,from_len--)
		{
			unsigned char *utf8_seq;

			for(utf8_seq = &amp;codeset-&gt;table[c].utf8[1];(c = *utf8_seq);utf8_seq++)
				*dest_ptr++ = c;
		}

		*dest_ptr = 0;
		return (utf8*)dest;
	}
	return NULL;
}

/*****************************************************************************/

int utf8tostr(const utf8 *str, char *dest, unsigned int dest_size, struct codeset *codeset)
{
	unsigned int i;
	struct single_convert *f;
	char *dest_iter = dest;

	if (!dest_size)
	{
		return 0;
	}

	if (!codeset) codeset = (struct codeset*)list_first(&amp;codesets_list);
	if (!codeset || !str)
	{
		*dest = 0;
		return 0;
	}

	for (i=0;i &lt; dest_size-1;i++)
	{
		unsigned char c = *str;
		if (c)
		{
			if (c &gt; 127)
			{
				unsigned int len_add = trailingBytesForUTF8[c];
				unsigned int len_str = len_add + 1;

				BIN_SEARCH(codeset-&gt;table_sorted,0,255,mystrncmp((unsigned char*)str,codeset-&gt;table_sorted[m].utf8+1,len_str),f);

				if (f) *dest_iter++ = f-&gt;code;
				else *dest_iter++ = '_';

				str += len_add;
			} else *dest_iter++ = c;

			str++;
		} else break;
	}
	*dest_iter = 0;
	return i;
}

/*****************************************************************************/

char *utf8tostrcreate(const utf8 *str, struct codeset *codeset)
{
	char *dest;
	int len;
	if (!str) return NULL;
	len = strlen((char*)str);
	if ((dest = (char*)malloc(len+1)))
		utf8tostr(str,dest,len+1,codeset);
	return dest;
}

/*****************************************************************************/

int utf8tochar(const utf8 *str, unsigned int *chr, struct codeset *codeset)
{
	struct single_convert conv;
	struct single_convert *f;
	unsigned char c;
	int len = 0;

	if (!codeset) codeset = (struct codeset*)list_first(&amp;codesets_list);
	if (!codeset) return 0;

	if ((c = *str++))
	{
		int i;

		len = trailingBytesForUTF8[c];
		conv.utf8[1] = c;

		for (i=0;i&lt;len;i++)
		{
			if (!(conv.utf8[i+2] = *str++))
			{
				/* We encountered a 0 byte although the trailing byte suggested
				 * a different length. Hence the given utf8 sequence is not
				 * considered as valid */
				*chr = 0;
				return i+1;
			}
		}
		conv.utf8[2+len] = 0;

		if ((f = (struct single_convert*)bsearch(&amp;conv,codeset-&gt;table_sorted,256,sizeof(codeset-&gt;table_sorted[0]),codesets_cmp_unicode)))
		{
			*chr = f-&gt;code;
		} else *chr = 0;
	} else *chr = 0;
	return len+1;
}

/*****************************************************************************/

static inline int utf8cmp_single(unsigned char *a, unsigned char *b)
{
#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
	int d;

	if ((d = a[0] - b[0])) return d;
	if ((d = a[1] - b[1])) return d;
	if ((d = a[2] - b[2])) return d;
	if ((d = a[3] - b[3])) return d;
	return 0;
#else
	return (*((unsigned int *)a) - *((unsigned int *)b));
#endif
}

/*****************************************************************************/

int utf8tolower(const char *str, char *dest)
{
	unsigned char ch[4] = {0,0,0,0};
	unsigned char c;
	struct uniconv *uc;
	int bytes;
	int i;

	c = *str++;
	if (c&lt;0x80)
	{
		*dest = tolower(c);
		return 1;
	}
	bytes = trailingBytesForUTF8[c];
	if (bytes &gt; 3)
	{
		*dest++ = c;
		memcpy(dest + 1,str + 1,bytes);
		return bytes + 1;
	}

	ch[3-bytes] = c;
	for (i=bytes-1;i&gt;=0;i--)
	{
		if (!(ch[3-i] = *str++))
			return 0;
	}

	BIN_SEARCH(utf8_tolower_table,0,ARRAY_LEN(utf8_tolower_table),utf8cmp_single(utf8_tolower_table[m].from, ch),uc);

	if (uc)
		memcpy(dest, uc-&gt;to + 3 - bytes, bytes + 1);
	else
		memcpy(dest, ch + 3 - bytes, bytes + 1);
	return bytes + 1;
}

/*****************************************************************************/

int utf8stricmp(const char *str1, const char *str2)
{
	unsigned char c1;
	unsigned char c2;

	if (!str1)
	{
		if (!str2) return 0;
		return -1;
	}

	if (!str2) return 1;

	while (1)
	{
		int d;
		char bytes1,bytes2;

		c1 = *str1++;
		c2 = *str2++;

		if (!c1)
		{
			if (!c2) return 0;
			return -1;
		}
		if (!c2) return 1;

		if (c1 &lt; 0x80)
		{
			if (c2 &lt; 0x80)
			{
				d = tolower(c1) - tolower(c2);
				if (d) return d;
				continue;
			} else
			{
				/* TODO: must use locale sensitive sorting */
				return -1;
			}
		}
		if (c2 &lt; 0x80) return 1; /* TODO: must use locale sensitive sorting */

		bytes1 = trailingBytesForUTF8[c1];
		bytes2 = trailingBytesForUTF8[c2];

		/* case mapping only happens within same number of bytes (currently) */
		if ((d = bytes1 - bytes2)) return d;

		if (bytes1 &gt; 3)
		{
			/* case mapping relevant characters are only withing 4 bytes */
			while (bytes1)
			{
				if ((d = *str1++ - *str2++)) return d;
				bytes1--;
			}
		} else
		{

			unsigned char ch1[4],ch2[4];
			struct uniconv *uc1;
			struct uniconv *uc2;
			int ch1l;
			int ch2l;

			*((unsigned int *)ch1) = 0;
			*((unsigned int *)ch2) = 0;

			ch1[3-bytes1] = c1;
			ch2[3-bytes1] = c2;

			while (bytes1)
			{
				bytes1--;
				ch1[3 - bytes1] = *str1++;
				ch2[3 - bytes1] = *str2++;
			}


			BIN_SEARCH(utf8_tolower_table,0,ARRAY_LEN(utf8_tolower_table),(*((unsigned int *)utf8_tolower_table[m].from) - *((unsigned int *)ch1)),uc1);
			BIN_SEARCH(utf8_tolower_table,0,ARRAY_LEN(utf8_tolower_table),(*((unsigned int *)utf8_tolower_table[m].from) - *((unsigned int *)ch2)),uc2);

			if (uc1) ch1l = *((unsigned int *)uc1-&gt;to);
			else ch1l = *((unsigned int *)ch1);

			if (uc2) ch2l = *((unsigned int *)uc2-&gt;to);
			else ch2l = *((unsigned int *)ch2);

			if (ch1l != ch2l)
			{
				if (ch1l &lt; ch2l) return -1;
				return 1;
			}
		}
	}
	return 0;
}

/*****************************************************************************/

int utf8stricmp_len(const char *str1, const char *str2, int len)
{
	unsigned char c1;
	unsigned char c2;

	if (!str1)
	{
		if (!str2) return 0;
		return -1;
	}

	if (!str2) return 1;

	while (len&gt;0)
	{
		int d;
		char bytes1,bytes2;

		c1 = *str1++;
		c2 = *str2++;
		len--;

		if (!c1)
		{
			if (!c2) return 0;
			return -1;
		}
		if (!c2) return 1;

		if (c1 &lt; 0x80)
		{
			if (c2 &lt; 0x80)
			{
				d = tolower(c1) - tolower(c2);
				if (d) return d;
				continue;
			} else
			{
				/* TODO: must use locale sensitive sorting */
				return -1;
			}
		}
		if (c2 &lt; 0x80) return 1; /* TODO: must use locale sensitive sorting */

		bytes1 = trailingBytesForUTF8[c1];
		bytes2 = trailingBytesForUTF8[c2];

		/* case mapping only happens within same number of bytes (currently) */
		if ((d = bytes1 - bytes2)) return d;

		if (bytes1 &gt; 3)
		{
			/* case mapping relevant characters are only withing 4 bytes */
			while (bytes1)
			{
				if ((d = *str1++ - *str2++)) return d;
				bytes1--;
			}
		} else
		{

			unsigned char ch1[4],ch2[4];
			struct uniconv *uc1;
			struct uniconv *uc2;
			int ch1l;
			int ch2l;

			*((unsigned int *)ch1) = 0;
			*((unsigned int *)ch2) = 0;

			ch1[3-bytes1] = c1;
			ch2[3-bytes1] = c2;

			while (bytes1)
			{
				bytes1--;
				ch1[3 - bytes1] = *str1++;
				ch2[3 - bytes1] = *str2++;

				len--;
			}


			BIN_SEARCH(utf8_tolower_table,0,ARRAY_LEN(utf8_tolower_table),(*((unsigned int *)utf8_tolower_table[m].from) - *((unsigned int *)ch1)),uc1);
			BIN_SEARCH(utf8_tolower_table,0,ARRAY_LEN(utf8_tolower_table),(*((unsigned int *)utf8_tolower_table[m].from) - *((unsigned int *)ch2)),uc2);

			if (uc1) ch1l = *((unsigned int *)uc1-&gt;to);
			else ch1l = *((unsigned int *)ch1);

			if (uc2) ch2l = *((unsigned int *)uc2-&gt;to);
			else ch2l = *((unsigned int *)ch2);

			if (ch1l != ch2l)
			{
				if (ch1l &lt; ch2l) return -1;
				return 1;
			}
		}
	}
	return 0;
}

/*****************************************************************************/

int utf8match(const char *haystack, const char *needle, int case_insensitive, match_mask_t *match_mask)
{
	int h, n;
	int needle_len;
	int haystack_len;

	unsigned char hc;
	unsigned char nc;

	haystack_len = strlen(haystack);
	needle_len = strlen(needle);

	h = 0;
	n = 0;
	while (h &lt; haystack_len &amp;&amp; n &lt; needle_len)
	{
		int match;
		int hbytes;
		int nbytes;

		match = 0;
		hc = haystack[h];
		nc = needle[n];

		hbytes = trailingBytesForUTF8[hc];
		nbytes = trailingBytesForUTF8[nc];

		if (hbytes == nbytes)
		{
			if (hc == nc)
			{
				int i;

				match = 1;

				for (i=0; i &lt; hbytes; i++)
				{
					if (haystack[i+1] != needle[i+1])
						match = 0;
				}
			} else
			{
				if (hbytes == 0 &amp;&amp; case_insensitive)
				{
					if (tolower(hc) == tolower(nc))
					{
						match = 1;
					}
				}
			}

			if (!match &amp;&amp; case_insensitive &amp;&amp; hbytes &gt; 0)
			{
				char hchars[6] = {0};
				char nchars[6] = {0};
				int hl, nl;

				if ((hl = utf8tolower(&amp;haystack[h], hchars)) &gt; 0 &amp;&amp;
					(nl = utf8tolower(&amp;needle[n], nchars)) &gt; 0)
				{
					if (hl == nl)
					{
						match = memcmp(hchars, nchars, nl) == 0;
					}
				}

			}
		}

		if (match)
		{
			n += nbytes + 1;
		}

		if (match_mask)
		{
			unsigned int match_pos;

			match_pos = match_bitmask_pos(h);
			if (match)
			{
				match_mask[match_pos] |= match_bitmask(h);
			} else
			{
				match_mask[match_pos] &amp;= ~match_bitmask(h);
			}
		}

		h += hbytes + 1;
	}

	if (n == needle_len)
	{
		if (match_mask)
		{
			/* Make sure that the remaining relevant positions are cleared */
			for (;h &lt; haystack_len; h++)
			{
				match_mask[match_bitmask_pos(h)] &amp;= ~match_bitmask(h);
			}
		}
		return 1;
	}
	return 0;
}

/*****************************************************************************/

char *utf8stristr(const char *str1, const char *str2)
{
	int str2_len;

	if (!str1 || !str2) return NULL;

	str2_len = strlen(str2);

	while (*str1)
	{
		if (!utf8stricmp_len(str1,str2,str2_len))
			return (char*)str1;
		str1++;
	}
	return NULL;
}

/*****************************************************************************/

const char *uft8toucs(const char *chr, unsigned int *code)
{
	unsigned char c = *chr++;
	unsigned int ucs = 0;
	int i,bytes;
	if (!(c &amp; 0x80))
	{
		*code = c;
		return chr;
	} else
	{
		if (!(c &amp; 0x20))
		{
			bytes = 2;
			ucs = c &amp; 0x1f;
		}
		else if (!(c &amp; 0x10))
		{
			bytes = 3;
			ucs = c &amp; 0xf;
		}
		else if (!(c &amp; 0x08))
		{
			bytes = 4;
			ucs = c &amp; 0x7;
		}
		else if (!(c &amp; 0x04))
		{
			bytes = 5;
			ucs = c &amp; 0x3;
		}
		else /* if (!(c &amp; 0x02)) */
		{
			bytes = 6;
			ucs = c &amp; 0x1;
		}

		for (i=1;i&lt;bytes;i++)
			ucs = (ucs &lt;&lt; 6) | ((*chr++)&amp;0x3f);
	}
	*code = ucs;
	return chr;
}

static unsigned char base64[] = &quot;ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/&quot;;
static short invbase64[128];

static unsigned char ibase64[] = &quot;ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+,&quot;;
static short iinvbase64[128];

static unsigned char direct[] = &quot;ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789'(),-./:?&quot;;
static unsigned char optional[] = &quot;!\&quot;#$%&amp;*;&lt;=&gt;@[]^_`{|}&quot;;
static unsigned char spaces[] = &quot; \011\015\012&quot;;		/* space, tab, return, line feed */
static char mustshiftsafe[128];
static char mustshiftopt[128];

static int needtables = 1;

static void tabinit(void)
{
	int i, limit;

	for (i = 0; i &lt; 128; ++i)
	{
		mustshiftopt[i] = mustshiftsafe[i] = 1;
		invbase64[i] = -1;
	}
	limit = strlen((char*)direct);
	for (i = 0; i &lt; limit; ++i)
		mustshiftopt[direct[i]] = mustshiftsafe[direct[i]] = 0;
	limit = strlen((char*)spaces);
	for (i = 0; i &lt; limit; ++i)
		mustshiftopt[spaces[i]] = mustshiftsafe[spaces[i]] = 0;
	limit = strlen((char*)optional);
	for (i = 0; i &lt; limit; ++i)
		mustshiftopt[optional[i]] = 0;
	limit = strlen((char*)base64);
	for (i = 0; i &lt; limit; ++i)
		invbase64[base64[i]] = i;

	/* that's for the modified imap utf7 stuff */
	limit = strlen((char*)ibase64);
	for (i = 0; i &lt; limit; ++i)
		iinvbase64[ibase64[i]] = i;

	needtables = 0;
}

#if __cplusplus &gt;= 201703L
#define DECLARE_BIT_BUFFER unsigned long BITbuffer = 0, buffertemp = 0; int bufferbits = 0
#else
#define DECLARE_BIT_BUFFER register unsigned long BITbuffer = 0, buffertemp = 0; int bufferbits = 0
#endif

#define BITS_IN_BUFFER bufferbits
#define WRITE_N_BITS(x, n) ((BITbuffer |= ( ((x) &amp; ~(-1L&lt;&lt;(n))) &lt;&lt; (32-(n)-bufferbits) ) ), bufferbits += (n) )
#define READ_N_BITS(n) ((buffertemp = (BITbuffer &gt;&gt; (32-(n)))), (BITbuffer &lt;&lt;= (n)), (bufferbits -= (n)), buffertemp)

/*****************************************************************************/

char *utf7ntoutf8(char *source, int sourcelen)
{
	FILE *fh;
	int base64value=0,base64EOF=0,first=0;
	int shifted = 0;
	char *dest = NULL;
	DECLARE_BIT_BUFFER;

	if (needtables) tabinit();

	if ((fh = tmpfile()))
	{
		int dest_len;

		while (sourcelen)
		{
			unsigned char c = *source++;
			sourcelen--;

			if (shifted)
			{
				if ((base64EOF = (!sourcelen) || (c &gt; 0x7f) || (base64value = invbase64[c]) &lt; 0))
				{
					shifted = 0;
					/* If the character causing us to drop out was SHIFT_IN or
					   SHIFT_OUT, it may be a special escape for SHIFT_IN. The
					   test for SHIFT_IN is not necessary, but allows an alternate
					   form of UTF-7 where SHIFT_IN is escaped by SHIFT_IN. This
					   only works for some values of SHIFT_IN.
					 */
					if (c &amp;&amp; sourcelen &amp;&amp; (c == '+' || c == '-'))
					{
						/* get another character c */
						unsigned char prevc = c;

						c = *source++;

						/* If no base64 characters were encountered, and the
							 character terminating the shift sequence was
							 SHIFT_OUT, then it's a special escape for SHIFT_IN.
						*/
						if (first &amp;&amp; prevc == '-')
						{
							fputc('+',fh);
						}
					}
				} else
				{
					/* Add another 6 bits of base64 to the bit buffer. */
					WRITE_N_BITS(base64value, 6);
					first = 0;
				}
			}

			/* Extract as many full 16 bit characters as possible from the
			   bit buffer.
			 */
			while (BITS_IN_BUFFER &gt;= 16)
			{
				UTF32 src_utf32 = READ_N_BITS(16);
				UTF32 *src_utf32_ptr = &amp;src_utf32;
				UTF8 target_utf8[10];
				UTF8 *target_utf8_ptr = target_utf8;

				ConvertUTF32toUTF8(&amp;src_utf32_ptr,src_utf32_ptr+1,&amp;target_utf8_ptr,target_utf8+10, strictConversion);

				fwrite(target_utf8,1,target_utf8_ptr - target_utf8,fh);
			}

			if (!c) break;

			if (base64EOF) BITS_IN_BUFFER = 0;

			if (!shifted)
			{
				if (c == '+')
				{
					shifted = first = 1;
				} else
				{
					if (c &lt;= 0x7f)
					{
						fputc(c,fh);
					} /* else the source is invalid, so we ignore this */
				}
			}
		}

		if ((dest_len = ftell(fh)))
		{
	    fseek(fh,0,SEEK_SET);
			if ((dest = (char*)malloc(dest_len+1)))
			{
				fread(dest,1,dest_len,fh);
				dest[dest_len]=0;
			}
		}
	}

	return dest;
}

/*****************************************************************************/

char *utf8toiutf7(char *utf8, int sourcelen)
{
	FILE *fh;
	char *dest = NULL;

	if (needtables) tabinit();

	if ((fh = tmpfile()))
	{
		int dest_len;
		int shifted = 0;
		DECLARE_BIT_BUFFER;

		while (1)
		{
			unsigned char c;
			int noshift;

			if (sourcelen)
			{
				c = *utf8;
				noshift = (c &gt;= 0x20 &amp;&amp; c &lt;= 0x7e) &amp;&amp; (c != '&amp;');
			} else
			{
				c = 0;
				noshift = 1;
			}

			if (shifted)
			{
				while (BITS_IN_BUFFER &gt;= 6)
				{
					unsigned char bits = READ_N_BITS(6);
					fputc(ibase64[bits],fh);
				}

				if (noshift)
				{
					int bits_in_buf = BITS_IN_BUFFER;

					if (bits_in_buf)
					{
						unsigned char bits = READ_N_BITS(bits_in_buf);
						bits &lt;&lt;= 6 - bits_in_buf;
						fputc(ibase64[bits],fh);
					}
					shifted = 0;
					fputc('-',fh);
				}
			}

			if (!c) break;

			if (noshift)
			{
				if (c == '&amp;')
				{
					fputs(&quot;&amp;-&quot;,fh);
				} else fputc(c,fh);
				utf8++;
				sourcelen--;
			} else
			{
				UTF8 *source = (UTF8*)utf8;
				UTF16 dest = 0;
				UTF16 *dest_ptr = &amp;dest;
				ConversionResult res;

				res = ConvertUTF8toUTF16(&amp;source, source + sourcelen, &amp;dest_ptr, dest_ptr + 1, strictConversion);
				if (res == conversionOK || res == targetExhausted)
				{
					sourcelen -= trailingBytesForUTF8[c] + 1;
					utf8 += trailingBytesForUTF8[c] + 1;

					if (!shifted)
					{
						fputc('&amp;',fh);
						shifted = 1;
					}

					WRITE_N_BITS(dest,16);
				}
			}
		}

		if ((dest_len = ftell(fh)))
		{
	    fseek(fh,0,SEEK_SET);
			if ((dest = (char*)malloc(dest_len+1)))
			{
				fread(dest,1,dest_len,fh);
				dest[dest_len]=0;
			}
		}
	}
	return dest;
}

/*****************************************************************************/

char *iutf7ntoutf8(char *source, int sourcelen)
{
	FILE *fh;
	int base64value=0,base64EOF=0,first=0;
	int shifted = 0;
	char *dest = NULL;
	DECLARE_BIT_BUFFER;

	if (needtables) tabinit();

	if ((fh = tmpfile()))
	{
		int dest_len;

		while (sourcelen)
		{
			unsigned char c = *source++;
			sourcelen--;

			if (shifted)
			{
				if ((base64EOF = (!sourcelen) || (c &gt; 0x7f) || (base64value = invbase64[c]) &lt; 0))
				{
					shifted = 0;
					/* If the character causing us to drop out was SHIFT_IN or
					   SHIFT_OUT, it may be a special escape for SHIFT_IN. The
					   test for SHIFT_IN is not necessary, but allows an alternate
					   form of UTF-7 where SHIFT_IN is escaped by SHIFT_IN. This
					   only works for some values of SHIFT_IN.
					 */
					if (c &amp;&amp; sourcelen &amp;&amp; (c == '-'))
					{
						/* get another character c */
						unsigned char prevc = c;

						c = *source++;

						/* If no base64 characters were encountered, and the
							 character terminating the shift sequence was
							 SHIFT_OUT, then it's a special escape for SHIFT_IN.
						*/
						if (first &amp;&amp; prevc == '-')
						{
							fputc('&amp;',fh);
						}
					}
				} else
				{
					/* Add another 6 bits of base64 to the bit buffer. */
					WRITE_N_BITS(base64value, 6);
					first = 0;
				}
			}

			/* Extract as many full 16 bit characters as possible from the
			   bit buffer.
			 */
			while (BITS_IN_BUFFER &gt;= 16)
			{
				UTF32 src_utf32 = READ_N_BITS(16);
				UTF32 *src_utf32_ptr = &amp;src_utf32;
				UTF8 target_utf8[10];
				UTF8 *target_utf8_ptr = target_utf8;

				ConvertUTF32toUTF8(&amp;src_utf32_ptr,src_utf32_ptr+1,&amp;target_utf8_ptr,target_utf8+10, strictConversion);

				fwrite(target_utf8,1,target_utf8_ptr - target_utf8,fh);
			}

			if (!c) break;

			if (base64EOF) BITS_IN_BUFFER = 0;

			if (!shifted)
			{
				if (c == '&amp;')
				{
					shifted = first = 1;
				} else
				{
					if (c &lt;= 0x7f)
					{
						fputc(c,fh);
					} /* else the source is invalid, so we ignore this */
				}
			}
		}

		if ((dest_len = ftell(fh)))
		{
	    fseek(fh,0,SEEK_SET);
			if ((dest = (char*)malloc(dest_len+1)))
			{
				fread(dest,1,dest_len,fh);
				dest[dest_len]=0;
			}
		}
	}

	return dest;
}

/*****************************************************************************/

char *utf8topunycode(const utf8 *source, int sourcelen)
{
	enum punycode_status status;
	const utf8 *sourceend;
	char *puny;
	punycode_uint puny_len;

	punycode_uint *dest, *target;
	punycode_uint dest_len;

	if (!(dest = (punycode_uint *)malloc(sourcelen * sizeof(punycode_uint))))
		return NULL;

	target = dest;
	sourceend = source + sourcelen;

	while (source &lt; sourceend)
	{
		punycode_uint ch = 0;
		unsigned short extraBytesToRead = trailingBytesForUTF8[*(UTF8*)source];

		if (source + extraBytesToRead &gt;= sourceend)
		{
			/* source exhausted */
			free(dest);
			return NULL;
		}

		/* Do this check whether lenient or strict */
		if (!isLegalUTF8((UTF8*)source, extraBytesToRead+1))
		{
			free(dest);
			return NULL;
		}

		/*
		 * The cases all fall through.
		 */
		switch (extraBytesToRead) {
			case 3:	ch += *source++; ch &lt;&lt;= 6;
			case 2:	ch += *source++; ch &lt;&lt;= 6;
			case 1:	ch += *source++; ch &lt;&lt;= 6;
			case 0:	ch += *source++;
		}
		ch -= offsetsFromUTF8[extraBytesToRead];

		if (ch &lt;= UNI_MAX_UTF32) {
			*target++ = ch;
		} else if (ch &gt; UNI_MAX_UTF32) {
			*target++ = UNI_REPLACEMENT_CHAR;
		}
	}

	dest_len = target - dest; /* No 0 ending */
	puny_len = dest_len * 2;

	do
	{
		int strored_puny_len = puny_len;

		if (!(puny = (char*)malloc(puny_len+5)))
		{
			free(dest);
			return NULL;
		}
		status = punycode_encode(dest_len, dest, NULL /* case flags */, &amp;puny_len, puny);

		if (status == punycode_success)
		{
			puny[puny_len] = 0;
			free(dest);
			return puny;
		}
		puny_len = strored_puny_len * 2;
	} while (status == punycode_big_output);

	free(puny);
	free(dest);
	return NULL;
}
/*****************************************************************************/

utf8 *punycodetoutf8(const char *source, int sourcelen)
{
	enum punycode_status status;
	punycode_uint *utf32;
	punycode_uint length;

	length = sourcelen;

	if (!(utf32 = (punycode_uint*)malloc(sizeof(punycode_uint)*sourcelen)))
		return NULL;

	status = punycode_decode(sourcelen, source, &amp;length, utf32, NULL);
	if (status == punycode_success)
	{
		utf8 *dest = (utf8*)malloc(sourcelen * 4);
		if (dest)
		{
			UTF8 *dest_start = (UTF8*)dest;
			UTF32 *source_start = (UTF32*)utf32;

			ConvertUTF32toUTF8((UTF32**)&amp;source_start, (UTF32*)(utf32) + length, &amp;dest_start, dest_start + sourcelen * 4 - 2, strictConversion);
			*dest_start = 0;
			free(utf32);
			return dest;
		}
	}
	free(utf32);
	return NULL;
}

/*****************************************************************************/

int isascii7(const char *str)
{
	char c;
	if (!str) return 1;
	while ((c = *str++))
	{
		if (c &amp; 0x80) return 0;
	}
	return 1;
}
&lt;/syntaxhighlight&gt;


&lt;syntaxhighlight lang=&quot;c&quot;&gt;
&lt;/syntaxhighlight&gt;


&lt;syntaxhighlight lang=&quot;c&quot;&gt;
&lt;/syntaxhighlight&gt;


&lt;syntaxhighlight lang=&quot;c&quot;&gt;
&lt;/syntaxhighlight&gt;


&lt;syntaxhighlight lang=&quot;c&quot;&gt;
&lt;/syntaxhighlight&gt;

&lt;syntaxhighlight lang=&quot;c&quot;&gt;
&lt;/syntaxhighlight&gt;


== Library Calls ==

&lt;pre&gt;
TABLE OF CONTENTS

codesets.library/codesets.library
codesets.library/CodesetsSupportedA
codesets.library/CodesetsFindA
codesets.library/CodesetsFindBestA
codesets.library/CodesetsConvertStrA
codesets.library/CodesetsFreeA
codesets.library/CodesetsFreeVecPooledA
codesets.library/CodesetsSetDefaultA
codesets.library/CodesetsListCreateA
codesets.library/CodesetsListDeleteA
codesets.library/CodesetsListAddA
codesets.library/CodesetsListRemoveA
codesets.library/CodesetsUTF8CreateA
codesets.library/CodesetsUTF8ToStrA
codesets.library/CodesetsUTF8Len
codesets.library/CodesetsIsValidUTF8
codesets.library/CodesetsIsLegalUTF8
codesets.library/CodesetsIsLegalUTF8Sequence
codesets.library/CodesetsStrLenA
codesets.library/CodesetsConvertUTF16toUTF32
codesets.library/CodesetsConvertUTF16toUTF8
codesets.library/CodesetsConvertUTF32toUTF16
codesets.library/CodesetsConvertUTF32toUTF8
codesets.library/CodesetsConvertUTF8toUTF16
codesets.library/CodesetsConvertUTF8toUTF32
codesets.library/CodesetsDecodeB64A
codesets.library/CodesetsEncodeB64A


codesets.library/codesets.library

    *******************************************************************
    Copyright (c) 2005-2008 by codesets.library Open Source Team
    $Id$
    $URL$

    codesets.library is an AmigaOS shared library which provides
    functions to deal with different kind of codesets. It provides
    general character conversion routines, e.g. for converting
    from one charset (e.g. UTF8) into another (e.g. ISO-8859-1) or
    vice versa.

    codesets.library is mainly based on some code from UNICODE, some
    code from the SimpleMail project as well as some additions done
    by the codesets.library Open Source Team.

    It is released and distributed under the terms of the GNU Lesser
    General Public License (LGPL) and available free of charge.

    Please visit http://www.sf.net/projects/codesetslib/ for
    the very latest version and information regarding codesets.library.
    *******************************************************************

    For some short introduction on how to use codesets.library, the
    following pharagraph should provide a good summary. What you
    usually want to do with codesets.library is, to convert strings from
    one so-called &quot;Source Codeset&quot; into another &quot;Destination Codeset&quot;.
    The following list are only the main functions provided to
    developers, wanting to achieve this conversion in their applications:


    CodesetsSupportedA()
    --------------------

      For querying codesets library which codesets/charsets it supports
      either by its internal available charsets or by having obtained
      them from the operating system (e.g. AmigaOS4), this function
      can be used.

      E.g. in a MUI application you would do something like:

      -- cut here --
      STRPTR *array;

      if((array = CodesetsSupportedA(NULL)))
      {
        DoMethod(list, MUIM_List_Insert, array, -1, MUIV_List_Insert_Sorted);
        CodesetsFreeA(array, NULL);
      }
      -- cut here --


    CodesetsFindA()
    ---------------

      For processing/converting a specific string, you normally have to
      specify in which codeset this string has to be intepreted. For this
      purpose you have to pass a so-called &quot;Source Codeset&quot; to the main
      function of codesets.library. With the &quot;CodesetsFindA()&quot; function you
      can query codesets.library for providing you a pointer to the
      corresponding codeset structure which you afterwards will forward to
      the main conversion routines later on.

      For receiving the pointer to the Amiga-1251 codeset:
      -- cut here --
      struct codeset *cs;

      if((cs = CodesetsFind(&quot;Amiga-1251&quot;,
                            CSA_FallbackToDefault, FALSE,
                            TAG_DONE)))
      {
        ...
      }
      -- cut here --

      For querying codesets.library for the currently used system wide
      default of your running operating system:
      -- cut here --
      struct codeset *default;

      if((default = CodesetsFindA(NULL, NULL)))
      {
        ...
      }
      -- cut here --


    CodesetsConvertStrA()
    ---------------------

      The more or less most common function to use in codesets.library is
      definitly this function. It allows to convert a string from
      one &quot;Source Codeset&quot; to another &quot;Destination Codeset&quot;. It takes
      the source string converts it internally into UTF8 if necessary and
      then directly convert the UTF8 to the specified destination codeset.

      To convert a string 'str' to a destination codeset:
      -- cut here --
      STRPTR destString;

      if((destString = CodesetsConvertStr(CSA_SourceCodeset, srcCodeset,
                                          CSA_DestCodeset,   destCodeset,
                                          CSA_Source,        str,
                                          TAG_DONE)))
      {
        ....

        CodesetsFreeA(destString, NULL);
      }
      -- cut here --

   Even if the above functions should cover most of the common functionality
   an ordinary user of codesets.library would require, it supplies a lot more
   functions which in fact we will not go into detail here but present
   certain examples in the respective documentation section of each function.

   However, if you find the documentation is still too limited or you feel
   some major functionality is missing regarding dealing with codesets,
   please let us know so that we or even you can improve it.


   Your codesets.library Open Source Team.
   February 2006


codesets.library/CodesetsSupportedA

   NAME
    CodesetsSupportedA - returns names of supported codesets

   SYNOPSIS
    array = CodesetsSupportedA(attrs);
                               A0

    STRPTR * CodesetsSupportedA(struct TagItem *);

    array = CodesetsSupported(tag1, ...);
                              A0

    STRPTR * CodesetsSupported(Tag, ...);

   FUNCTION
    Returns a NULL terminated array of the supported codeset
    names. The array _must_ be freed with CodesetsFreeA().

   INPUTS
    attrs - a list of additional tag items. Valid items are:

      CSA_CodesetList (struct codesetList *)
        You may supply an unlimited number of additional
        codeset lists which you have previously allocated/loaded
        with CodesetsListCreateA(). Otherwise just the internal
        list of available codesets will be searched.
        Default: NONE

     CSA_AllowMultibyteCodesets (BOOL)
       Include multibyte codesets (UTF8, UTF16, UTF32) in the
       generated names array.
       Default: TRUE

   RESULT
    array - the names array or NULL on an error.

   EXAMPLE
    For printing out all supported codeset names:

    -- cut here --
    STRPTR *array;

    if((array = CodesetsSupportedA(NULL)))
    {
      int i;

      for(i=0; array[i] != NULL; i++)
        printf(&quot;%s&quot;, array[i]);

      CodesetsFreeA(array, NULL);
    }
    -- cut here --

   SEE ALSO
    codesets.library/CodesetsListCreateA


codesets.library/CodesetsFindA

   NAME
    CodesetsFindA - finds a codeset

   SYNOPSIS
    codeset = CodesetsFindA(name, attrs);
    D0                      A0    A1

    struct codeset * CodesetsFindA(STRPTR, struct TagItem *);

    codeset = CodesetsFind(name, tag1, ...);
    D0                     A0    A1

    struct codeset * CodesetsFind(STRPTR, Tag, ...);

   FUNCTION
    Finds and returns a codeset by its name. The data behind the
    pointer should be considered read-only and must not be altered
    in any way.

   INPUTS
    name - the codeset name (or alias) to find
    attrs - a list of additional tag items. Valid items are:

      CSA_FallbackToDefault (BOOL)
        If TRUE the function never fails and returns the default
        codeset if the supplied codeset name can't be found.
        Default: TRUE

      CSA_CodesetList (struct codesetList *)
        You may supply an unlimited number of additional
        codeset lists which you have previously allocated/loaded
        with CodesetsListCreateA(). Otherwise just the internal
        list of available codesets will be searched.
        Default: NONE

   RESULT
    codeset - the codeset or NULL on an error

   EXAMPLE
     E.g. for receiving the pointer to the Amiga-1251 codeset:

     -- cut here --
     struct codeset *cs;

     if((cs = CodesetsFind(&quot;Amiga-1251&quot;,
                           CSA_FallbackToDefault, FALSE,
                           TAG_DONE)))
     {
       ...
     }
     -- cut here --

     For querying codesets.library for the currently used system
     wide default of your running operating system:
     -- cut here --
     struct codeset *default;

     if((default = CodesetsFindA(NULL, NULL)))
     {
       ...
     }
     -- cut here --

   NOTE
    Please note for querying the system's default codeset the
    method of finding this codeset is highly dependent on the way
    the operating system can be queried for it. E.g. on AmigaOS4
    the default codeset is queried with updated system functions,
    but for AmigaOS3 a static list of language&lt;&gt;codeset mappings
    is used.

   SEE ALSO
    codesets.library/CodesetsListCreateA


codesets.library/CodesetsFindBestA

   NAME
    CodesetsFindBestA - finds the best codeset matching a
                        string content.

   SYNOPSIS
    codeset = CodesetsFindBestA(attrs);
    D0                          A0

    struct codeset * CodesetsFindBestA(struct TagItem *);

    codeset = CodesetsFindBest(tag1, ...);
    D0                         A0

    struct codeset * CodesetsFindBest(Tag, ...);

   FUNCTION
    Returns the best found codeset for the given text in the supplied
    codeset family. In case no proper codeset for the supplied source string
    could be found, NULL is returned or the default codeset if the
    CSA_FallbackToDefault attribute is set to TRUE. In addition, in case
    the CSA_ErrPtr is given, the amount of failed identifications (chars)
    are returned.

   INPUTS
    attrs - a list of tag items. Valid items are:

      CSA_Source (STRPTR)
        The string which you want to convert. Must be supplied,
        otherwise the functions returns NULL.

      CSA_SourceLen (ULONG)
        Length of CSA_Source or less to check just a part
        Default: string length of CSA_Source

      CSA_ErrPtr (int *)
        Pointer to an integer variable which will be filled with the
        number of found errors (not identifyable chars)
        Default: NULL

      CSA_CodesetList (struct codesetList *)
        You may supply an unlimited number of additional
        codeset lists which you have previously allocated/loaded
        with CodesetsListCreateA(). Otherwise just the internal
        list of available codesets will be searched.
        Default: NONE

      CSA_CodesetFamily (ULONG)
        To narrow the analyze, a user might define the codeset family
        of which the supplied text might be composed of. The reason for
        this is, that there isn't a unique identification algorithm
        which can tell the codeset out of a given text. So to narrow
        the identification, the follow values might be specified:

          CSV_CodesetFamily_Latin    - Latin codeset family (e.g. ISO-8859-X)
          CSV_CodesetFamily_Cyrillic - Cyrillic codeset family (e.g. KOI8R)

        Default: CSV_CodesetFamily_Latin

      CSA_FallbackToDefault (BOOL)
        If TRUE the function never fails and returns the default
        codeset if the supplied text couldn't be identified
        Default: FALSE

   RESULT
    codeset - the best matching codeset or NULL in case a NULL pointer
              was supplied as the source string.

   EXAMPLE
     E.g. for receiving the pointer to 'best matching' codeset matching
     a KOI8-R string:

     -- cut here --
     struct codeset *cs;
     char str[] = &quot;îÅ×ÏÚÍÏÖÎÏ ÐÅÒÅËÏÄÉÒÏ×ÁÔØ ÉÚ ËÏÄÉÒÏ×ËÉ&quot;;
     int errPtr;

     if((cs = CodesetsFindBest(CSA_Source, str,
                               CSA_ErrPtr, &amp;errPtr,
                               CSA_CodesetFamily, CSV_CodesetFamily_Cyrillic,
                               CSA_FallBackToDefault, FALSE,
                               TAG_DONE)))
     {
       ... should return the KOI8-R codeset ...
     }
     -- cut here --

   SEE ALSO
    codesets.library/CodesetsListCreateA


codesets.library/CodesetsConvertStrA

   NAME
    CodesetsConvertStrA - converts a string from one source codeset to
                          another destination codeset.

   SYNOPSIS
    dest = CodesetsConvertStrA(attrs)
    D0                         A0

    STRPTR CodesetsConvertStrA(struct TagItem *);

    dest = CodesetsConvertStr(tag1, ...);
    D0                        A0

    STRPTR CodesetsConvertStr(Tag, ...);

   FUNCTION
    The function takes source string which is encoded in a so-called
    'Source codeset' and converts it immediately into an equivalent
    string which will be encoded in the corresponding 'Destination Codeset'.

   INPUTS
    attrs - a list of mandatory tag items. Valid items are:

      CSA_Source (STRPTR)
        The string which you want to convert. Must be supplied,
        otherwise the functions returns NULL.

      CSA_SourceLen (ULONG)
        Length of CSA_Source or less to convert just a part
        Default: string length of CSA_Source

      CSA_SourceCodeset (struct codeset *)
        The codeset in which the source string is encoded.
        Default: the system's default codeset

      CSA_DestCodeset (struct codeset *)
        The codeset to which the source string should be converted to.
        Default: the system's default codeset

      CSA_DestLenPtr (ULONG *)
        If supplied, will contain the length of the converted string
        which is returned.

      CSA_MapForeignChars (BOOL)
        If a character of the source string cannot be directly mapped
        to the destination codeset a &quot;?&quot; character will normally be used
        to signal this case. If this attribute is set, an internal
        replacement table will be used which tries to replace these
        &quot;foreign&quot; characters by &quot;looklike&quot; ASCII character sequences.
        Please note, that this functionality is mostly just usable by
        Latin users due to the straight mapping to ASCII (7bit).
        Default: FALSE

      CSA_MapForeignCharsHook (struct Hook *)
        If a character of the source string cannot be directly mapped
        to the destination codeset a &quot;?&quot; character will normally be used
        to signal this case. By using this attribute, a hook can be
        supplied which is called for every such foreign character.
        Within this hook the UTF8 sequence is supplied which cannot be
        directly mapped to the destination codeset. During the execution
        of the hook a replacement string might be specified, which in turn
        will be used by the internals of codesets.library to map this
        &quot;foreign&quot; char to a difference character or UTF8 sequence.

        If both, CSA_MapForeignChars and CSA_MapForeignCharsHook, are
        specified the hook will only be executed in case the internal
        routines don't supply an own mapping for the foreign UTF8 sequence.

        The hook function should be declared as:

        ULONG ASM SAVEDS fun(REG(a0, struct Hook *hook),
                             REG(a2, struct replaceMsg *msg),
                             REG(a1, void *dummy))

        struct Hook *hook
          Your hook

        msg-&gt;dst
          place your desired replacement string here

        msg-&gt;src
          the UTF8 sequence to be replaced, this string is READ-ONLY!

        msg-&gt;srclen
          the length of the UTF8 sequence to be replaced, do NOT peek
          beyond this limit.

        The return value of this hook function is the length of the replacement
        string. Return zero if no replacement did happen. Positive values will
        be treated as lengths of ASCII strings. Negative values signals a
        replacement by another UTF8 sequence. Please note, that in case you
        supply a UTF8 sequence as a replacement for the &quot;foreign&quot; UTF8, your
        hook might be called again if this sequence can still not be mapped to
        the destination codesets, thus is again a &quot;foreign&quot; sequence.


   RESULT
    either a pointer to the generated destination string or NULL
    on a found error.

   EXAMPLE
    To convert an ISO-8859-1 encoded string 'src' into an Amiga-1251
    equivalent 'dst' string:
    -- cut here --
    STRPTR src, dst;
    struct codeset *srcCodeset, *dstCodeset;

    srcCodeset = CodesetsFindA(&quot;ISO-8859-1&quot;, NULL);
    dstCodeset = CodesetsFindA(&quot;Amiga-1251&quot;, NULL);

    if((dst = CodesetsConvertStr(CSA_SourceCodeset, srcCodeset,
                                 CSA_DestCodeset,   dstCodeset,
                                 CSA_Source,        src,
                                 TAG_DONE)))
    {
      ....

      CodesetsFreeA(dst, NULL);
    }
    -- cut here --

   SEE ALSO
    codesets.library/CodesetsFreeA


codesets.library/CodesetsFreeA

   NAME
    CodesetsFreeA - frees objects previously internally allocated
                    by codesets.library

   SYNOPSIS
    CodesetsFreeA(obj, attrs)
                  A0   A1
    void CodesetsFreeA(APTR, struct TagItem *);

    CodesetsFree(obj, tag1, ...);
                 A0   A1
    void CodesetsFree(APTR, Tag, ...);

   FUNCTION
    Frees object previously allocated by codesets.library. E.g. using
    functions like CodesetsSupportedA() or CodesetsConvertStrA().

   INPUTS
    obj - the object to free
    attrs - a list of additional tag items. Currently non items.

   RESULT
    no result

   EXAMPLE

    -- cut here --
    STRPTR *array;

    if((array = CodesetsSupportedA(NULL)))
    {
      ...

      CodesetsFreeA(array, NULL);
    }
    -- cut here --

   SEE ALSO
    codesets.library/CodesetsSupportedA
    codesets.library/CodesetsConvertStrA


codesets.library/CodesetsFreeVecPooledA

   NAME
    CodesetsFreeVecPooledA - frees objects previously allocated
                             by methods supporting CSA_Pool

   SYNOPSIS
    CodesetsFreeVecPooledA(pool, obj, attrs)
                           A0    A1   A2
    void CodesetsFreeVecPooledA(APTR, APTR, struct TagItem *);

    CodesetsFreeVecPooled(pool, obj, tag1, ...);
                          A0    A1   A2
    void CodesetsFreeVecPooled(APTR, APTR, Tag, ...);

   FUNCTION
    Frees object previously allocated by codesets.library via a
    private memory pool which was previously used on codesets
    functions via the CSA_Pool tag.

   INPUTS
    pool - pointer to the private memory pool
    obj - the object to free
    attrs - a list of additional tag items. Valid tags are:

      CSA_PoolSem (struct SignalSemaphore *)
        A semaphore to lock when using CSA_Pool

   RESULT
    no result

   EXAMPLE

    -- cut here --
    UTF8   *utf8;
    STRPTR str;
    APTR   pool;

    if((utf8 = CodesetsUTF8Create(CSA_Source,     str,
                                  CSA_Pool,       pool,
                                  TAG_DONE)))
    {
        ...

        CodesetsFreeVecPooledA(pool,utf8,NULL);
    }
    -- cut here --

   SEE ALSO
    codesets.library/CodesetsUTF8CreateA
    codesets.library/CodesetsUTF8ToStrA


codesets.library/CodesetsSetDefaultA

   NAME
    CodesetsSetDefaultA - sets the default codeset, overwriting
                          the system default if necessary.

   SYNOPSIS
    codeset = CodesetsSetDefaultA(name, attrs);
                                  A0    A1

    struct codeset * CodesetsSetDefaultA(STRPTR, struct TagItem *);

    codeset = CodesetsSetDefault(name, tag1, ...);
                                 A0    A1

    struct codeset * CodesetsSetDefault(STRPTR, Tag, ...);

   FUNCTION
    Sets the default codeset to name. The codeset will be stored in
    the environment variable 'codeset_default'.

   INPUTS
    name - the name of the codeset to set as default
    attrs - a list of additional tag items. Valid items are:

      CSA_Save (BOOL)
        If TRUE the codeset will be permanently saved and survives
        a reset. Otherwise the default setting will just last until
        the next reboot.
        Default: FALSE

   RESULT
    codeset - the codeset or NULL

   NOTE
    In case the operating system supports the direct query of the
    currently active system's default codeset, this function will
    still overwrite this setting. So by using this method a user may
    overwrite all system's setting and set a global default codeset
    for his machine no matter what the OS suggests. However, in case
    your operating sytsem perfectly supports the querying of the
    system's default codeset (e.g. AmigaOS4) you are adviced to use
    this function with care - or even avoid to use it at all.

   SEE ALSO
    codesets.library/CodesetsFindA


codesets.library/CodesetsListCreateA

   NAME
    CodesetsListCreateA - creates a private, task-wise codeset list
                          and returns it to the user for further reference.

   SYNOPSIS
    list = CodesetsListCreateA(attrs);
    D0                         A0

    struct codesetList * CodesetsListCreateA(struct TagItem *);

    list = CodesetsListCreate(tag1, ...);
    D0                        A0

    struct codesetList * CodesetsListCreateA(Tag, ...);

   FUNCTION
    This function allows to create a private, task-wise codeset list by
    loading charset files from either a whole directory tree, a specific
    charset file or even by using an existing codeset structure.
    By using this function, an application might load and carry its very
    own private charsets in parallel to the internal charsets of
    codeset.library. This way each application can provide a different
    codeset list to the user without having to load and manage these
    lists on their own.

   INPUTS
    attrs - a list of additional tag items. Valid items are:

      CSA_CodesetDir (STRPTR)
        The path to a whole directory which codesets library will
        walk through for searching for proper charset files.
        Default: NULL

      CSA_CodesetFile (STRPTR)
        The path to a specific file which codesets.library will try
        to load as a standard charset translation file.
        Default: NULL

      CSA_SourceCodeset (struct codeset *)
        The pointer to an already existing codeset structure which
        will immediately be added to the created list. Please be
        carefull to add one codeset to multiple lists, especially
        when you do a CodesetsListDelete() to free the list.
        Default: NULL

   RESULT
    list - the private codeset list or NULL on an error condition

   NOTE
    For convienence, if no tag item attribute at all is supplied to the
    function, codesets.library will try to load charsets from the
    corresponding &quot;PROGDIR:Charsets&quot; directoy and add found codeset to
    the list. However, in case a tag item is specified (no matter what
    kind) the PROGDIR: scanning will be omitted.

   EXAMPLE
    For loading all found charset files from PROGDIR:Charsets:

    -- cut here --
    struct codesetList *csList;

    if((csList = CodesetsListCreateA(NULL)))
    {
      STRPTR codesetArray = CodesetsSupported(CSA_CodesetList, csList,
                                              TAG_DONE);

      // codesetsArray should now also carry our private
      // codesets from PROGDIR:Charsets
      ...

      CodesetsListDeleteA(CSA_CodesetList, csList,
                          TAG_DONE);
    }
    -- cut here --

   SEE ALSO
    codesets.library/CodesetsListDeleteA
    codesets.library/CodesetsListAddA
    codesets.library/CodesetsListRemoveA
    codesets.library/CodesetsListSupportedA
    codesets.library/CodesetsListFindA
    codesets.library/CodesetsListFindBestA


codesets.library/CodesetsListDeleteA

   NAME
    CodesetsListDeleteA - deletes/frees all resources of previously created
                          private codeset lists.

   SYNOPSIS
    result = CodesetsListDeleteA(attrs);
    D0                           A0

    BOOL CodesetsListDeleteA(struct TagItem *);

    result = CodesetsListDelete(tag1, ...);
    D0                          A0

    BOOL CodesetsListDelete(Tag, ...);

   FUNCTION
    This function deletes all resources (also the contained codeset
    structures per default) and frees the memory of previously allocated
    private codeset lists.

   INPUTS
    attrs - a list of mandatory tag items. Valid items are:

      CSA_CodesetList (struct codesetList *)
        Pointer to a previously created, private codeset list whos
        resources should be freed.
        Default: NULL

      CSA_FreeCodesets (BOOL)
        If TRUE, all contained codesets should also be freed/deleted,
        otherwise just frees the list object itself.
        Default: TRUE

   RESULT
    result - TRUE on success otherwise FALSE

   NOTE
    Please note that if you added an explicit codeset structure to more
    than two private codeset lists you may run into problems with you
    don't take care of this yourself. This is a dumb function which just
    walks through the list and frees all resources. Set CSA_FreeCodesets
    to FALSE in case you just want to free the list object.

   SEE ALSO
    codesets.library/CodesetsListCreateA
    codesets.library/CodesetsListAddA
    codesets.library/CodesetsListRemoveA


codesets.library/CodesetsListAddA

   NAME
    CodesetsListAddA - allows to add additional codesets to an already
                       existing private codeset list previously created with
                       CodesetsListCreateA().

   SYNOPSIS
    result = CodesetsListAddA(attrs);
    D0                        A0

    BOOL CodesetsListAddA(struct TagItem *);

    result = CodesetsListAdd(tag1, ...);
    D0                       A0

    BOOL CodesetsListAdd(Tag, ...);

   FUNCTION
    This function allows to add additional codesets to an already existing
    private codeset list. Either codesets themself may be added directly, or
    the path to either a file or a directory may be specified from which
    additional codesets may be loaded from known charset files.

   INPUTS
    attrs - a list of mandatory tag items. Valid items are:

      CSA_CodesetDir (STRPTR)
        The path to a whole directory which codesets library will
        walk through for searching for proper charset files.
        Default: NULL

      CSA_CodesetFile (STRPTR)
        The path to a specific file which codesets.library will try
        to load as a standard charset translation file.
        Default: NULL

      CSA_SourceCodeset (struct codeset *)
        The pointer to an already existing codeset structure which
        will immediately be added to the created list. Please be
        carefull to add one codeset to multiple lists, especially
        when you do a CodesetsListDelete() to free the list.
        Default: NULL

   RESULT
    result - TRUE on success otherwise FALSE

   NOTE
    Be careful when adding one codeset to more than one codeset list as
    you may run into problems when freeing the list afterwards.

   SEE ALSO
    codesets.library/CodesetsListCreateA
    codesets.library/CodesetsListDeleteA
    codesets.library/CodesetsListAddA


codesets.library/CodesetsListRemoveA

   NAME
    CodesetsListRemoveA - removes a single or multiple codesets from a
                          previously created codeset list.

   SYNOPSIS
    result = CodesetsListRemoveA(attrs);
    D0                           A0

    BOOL CodesetsListRemoveA(struct TagItem *);

    result = CodesetsListRemove(tag1, ...);
    D0                          A0

    BOOL CodesetsListRemove(Tag, ...);

   FUNCTION
    This function allows to remove single or multiple codesets from a
    previously created codeset list. The removed codeset structures will
    also be freed/deleted per default.

   INPUTS
    attrs - a list of mandatory tag items. Valid items are:

      CSA_SourceCodeset (struct codeset *)
        Pointer to a codeset structure which should be removed from
        its corresponding list. Per default its resources will also
        be internally freed.
        Default: NULL

      CSA_FreeCodesets (BOOL)
        If TRUE, all supplied codesets should also be freed/deleted,
        otherwise the codesets will just be removed from their lists.
        Default: TRUE

   RESULT
    result - TRUE on success otherwise FALSE

   NOTE
    The function will automatically prevent removal of codesets from the
    internal codeset list of codesets.library and will return FALSE in
    case a user tried to remove a codeset from the internal list.

   SEE ALSO
    codesets.library/CodesetsListDeleteA
    codesets.library/CodesetsListAddA


codesets.library/CodesetsUTF8CreateA

   NAME
    CodesetsUTF8CreateA - creates an UTF8 compliant string
                          interpretation out of a supplied source
                          string.


   SYNOPSIS
    utf8 = CodesetsUTF8CreateA(attrs);
                               A0
    UTF8 * CodesetsUTF8CreateA(struct TagItem *);

    utf8 = CodesetsUTF8Create(tag1, ...);
                              A0
    UTF8 * CodesetsUTF8Create(Tag, ...);


   FUNCTION
    Creates an UTF8 from a string which is encoded in specified
    codeset.

   INPUTS
    attrs - a list of mandatory tag items. Valid items are:

      CSA_Source (STRPTR)
        The string which you want to convert. Must be supplied,
        otherwise the functions returns NULL.

      CSA_SourceLen (ULONG)
        Length of CSA_Source or less to convert just a part
        Default: string length of CSA_Source

      CSA_SourceCodeset (struct codeset *)
        The codeset in which the source string is encoded.
        Default: the system's default codeset

      CSA_Dest (STRPTR)
        Destination buffer. If you supply a valid buffer here, you
        must also set CSA_DestLen to the length of your buffer. If
        CSA_AllocIfNeeded is TRUE, CSA_DestLen is checked to see if
        CSA_Dest may contain the whole utf8. If CSA_Dest can't
        contain the utf8, a brand new buffer is allocated. If
        CSA_AllocIfNeeded is FALSE, up to CSA_DestLen (ending '\0'
        included) are written to CSA_Dest. If CSA_DestHook is supplied,
        CSA_Dest is ignored.
        Default: NULL.

      CSA_DestHook (struct Hook *)
        Destination hook. If this is supplied, it is called with a
        partial converted string.

        The hook function should be declared as:

        ULONG ASM SAVEDS fun(REG(a0, struct Hook *hook),
                             REG(a2, struct convertMsg *msg),
                             REG(a1, STRPTR buf))

        struct Hook *hook
          Your hook

        STRPTR buf
          The partial '\0' terminated buffer

        msg-&gt;state - one of

          o CSV_Translating
            More calls to came

          o CSV_End
            Last call

        msg-&gt;Len
          length of string 'buf'

        You may define the min length of the buffer via CSA_DestLen.
        If so, accepted values are 16&lt;=v&lt;=sizeof_codeset_buffer.

        Don't count on this size to be fixed, even if you used
        CSA_DestLen !

      CSA_DestLen (ULONG)
        If CSA_DestHook is used, it represents the min length of the
        buffer that causes hook calls. Otherwise it is the size of
        the buffer supplied in CSA_Dest. So if CSA_DestHook is
        supplied, CSA_DestLen is optional, otherwise it is required.

      CSA_DestLenPtr (ULONG *)
        If supplied, will contain the length of the utf8 string

      CSA_AllocIfNeeded (BOOL)
        If the destination buffer length is too small to contain
        the UTF8 a new buffer is allocated
        Default: TRUE

      CSA_Pool (APTR)
        If a new destination buffer needs to be allocated (it happens
        if and only if CSA_DestHook is not used, CSA_AllocIfNeeded
        is TRUE, or if CSA_Dest buffer is too small for the utf8) this
        pool is used. The result must be freed via
        CodesetsFreeVecPooledA(pool, utf8, NULL).
        If CSA_Pool is not supplied, the destination buffer is allocated
        from the internal memory pool and must be freed via
        CodesetsFreeA(utf8, NULL).

      CSA_PoolSem (struct SignalSemaphore *)
        A semaphore to lock when using CSA_Pool

   RESULT
    utf8 - the utf8 string or NULL
           If CSA_DestHook is used always NULL.
           If CSA_DestHook is not used NULL means failure
           to allocate mem.

   EXAMPLE
    The shortest invocation is:
    -- cut here --
    UTF8   *utf8;
    STRPTR str;

    if((utf8 = CodesetsUTF8Create(CSA_Source, str,
                                  TAG_DONE)))
    {
        ...

        CodesetsFreeA(utf8,NULL);
    }
    -- cut here --


    In case you want to use your pool to allocate mem:
    -- cut here --
    UTF8   *utf8;
    STRPTR str;
    APTR   pool;

    if((utf8 = CodesetsUTF8Create(CSA_Source,     str,
                                  CSA_Pool,       pool,
                                  TAG_DONE)))
    {
        ...

        CodesetsFreeVecPooledA(pool,utf8,NULL);
    }
    -- cut here --


    If your pool is to be arbitrated via a semaphore:
    -- cut here --
    UTF8   *utf8;
    STRPTR str;
    APTR   pool;
    struct SignalSemaphore *sem;

    if((utf8 = CodesetsUTF8Create(CSA_Source,     str,
                                  CSA_Pool,       pool,
                                  CSA_PoolSem,    sem,
                                  TAG_DONE)))
    {
        ...

        CodesetsFreeVecPooledA(pool,utf8,NULL);
    }
    -- cut here --


    If you want to use your own buffer to reduce mem
    allocation:
    -- cut here --
    UTF8   *utf8;
    STRPTR buf[256];

    if((utf8 = CodesetsUTF8Create(CSA_Source,  str,
                                  CSA_Dest,    buf,
                                  CSA_DestLen, sizeof(buf),
                                  TAG_DONE)))
    {
        ...

        if(utf8 != buf)
          CodesetsFreeA(utf8,NULL);
    }
    -- cut here --


    If your string are max MAXLEN chars long (e.g. image to be
    in a MUI application and you know the max size of your
    string gadgets), you should better supply your own buffer:
    -- cut here --
    UTF8   *utf8;
    STRPTR buf[MAXSIZE*6+1];

    if((utf8 = CodesetsUTF8Create(CSA_Source, str,
                                  CSA_Dest,   buf,
                                  CSA_Dest,   sizeof(buf),
                                  TAG_DONE)))
    {
        ...
    }
    -- cut here --


    If you strings are very large and so you are sure there is
    no mem for them and or you have your own reasons to do
    that:
    -- cut here --
    static ULONG ASM SAVEDS
    destFun(REG(a0, struct Hook *hook),
            REG(a2, struct convertMsg *msg),
            REG(a1, STRPTR buf))
    {
      printf(&quot;[%3ld] [%s]\n&quot;,msg-&gt;len,buf);
      if(msg-&gt;state == CSV_End)
        printf(&quot;\n&quot;);

      return 0;
    }

    struct Hook dest;
    dest.h_Entry = (HOOKFUNC)destFun;

    CodesetsUTF8Create(CSA_Source,    str,
                       CSA_DestHook,  &amp;dest,
                       TAG_DONE);
    -- cut here --

   SEE ALSO
    codesets.library/CodesetsUTF8ToStrA
    codesets.library/CodesetsUTF8Len


codesets.library/CodesetsUTF8ToStrA

   NAME
    CodesetsUTF8ToStrA - converts an UTF8 encoded string into
                         a specified destination codeset.


   SYNOPSIS
    str = CodesetsUTF8ToStrA(attrs);
    D0                       A0

    STRPTR CodesetsUTF8ToStrA(attrs);

    str = CodesetsUTF8ToStr(tag1, ...);
    D0                      A0

    STRPTR CodesetsUTF8ToStr(Tag,...);


   FUNCTION
    Convert an utf8 string to a specified codeset.

   INPUTS
    attrs - a list of mandatory tag items. Valid items are:

      CSA_Source (STRPTR)
        The string which you want to convert. Must be supplied,
        otherwise the functions returns NULL.

      CSA_SourceLen (ULONG)
        Length of CSA_Source. Must be &gt; 0 or the function returns
        NULL.
        Default: string length of CSA_Source - strlen()

      CSA_Dest (STRPTR)
        Destination buffer. If you supply a valid buffer here, you
        must also set CSA_DestLen to the length of your buffer. If
        CSA_AllocIfNeeded is TRUE, CSA_DestLen is checked to see if
        CSA_Dest may contain the whole converted string. If CSA_Dest
        can't contain the output string, a brand new buffer is allocated.
        If CSA_AllocIfNeeded is FALSE, up to CSA_DestLen (ending '\0'
        included) are written to CSA_Dest. If CSA_DestHook is supplied,
        CSA_Dest is ignored.
        Default: NULL.

      CSA_DestCodeset (struct codeset *)
        The codeset to which the UTF8 string should be encoded to.
        Default: the system's default codeset

      CSA_DestHook (struct Hook *)
        Destination hook. If this is supplied, it is called with a
        partial converted string.

        The hook function should be declared as:

        ULONG ASM SAVEDS fun(REG(a0, struct Hook *hook),
                             REG(a2, struct convertMsg *msg),
                             REG(a1, STRPTR buf))

        struct Hook *hook
          Your hook

        STRPTR buf
          The partial '\0' terminated buffer

        msg-&gt;state - one of

          o CSV_Translating
            More calls to came

          o CSV_End
            Last call

        msg-&gt;Len
          length of string 'buf'

        You may define the min length of the buffer via CSA_DestLen.
        If so, accepted values are 16&lt;=v&lt;=sizeof_codeset_buffer.

        Don't count on this size to be fixed, even if you used
        CSA_DestLen !

      CSA_DestLen (ULONG)
        If CSA_DestHook is used, it represents the min length of the
        buffer that causes hook calls. Otherwise it is the size of
        the buffer supplied in CSA_Dest. So if CSA_DestHook is
        supplied, CSA_DestLen is optional, otherwise it is required.

      CSA_DestLenPtr (ULONG *)
        If supplied, will contain the length of the converted string.

      CSA_AllocIfNeeded (BOOL)
        If the destination buffer length is too small to contain
        the output string, a new buffer is allocated.
        Default: TRUE

      CSA_Pool (APTR)
        If a new destination buffer needs to be allocated (it happens
        if and only if CSA_DestHook is not used, CSA_AllocIfNeeded
        is TRUE, or if CSA_Dest buffer is too small for the utf8) this
        pool is used. The result must be freed via
        CodesetsFreeVecPooledA(pool, string, NULL).
        If CSA_Pool is not supplied, the destination buffer is allocated
        from the internal memory pool and must be freed via
        CodesetsFreeA(string, NULL).

      CSA_PoolSem (struct SignalSemaphore *)
        A semaphore to lock when using CSA_Pool

      CSA_ErrPtr (int *)
        Pointer to an integer variable which will be filled with the
        number of found issues (number of not convertable chars)
        Default: NULL

      CSA_MapForeignChars (BOOL)
        If a character of the source string cannot be directly mapped
        to the destination codeset a &quot;?&quot; character will normally be used
        to signal this case. If this attribute is set, an internal
        replacement table will be used which tries to replace these
        &quot;foreign&quot; characters by &quot;looklike&quot; ASCII character sequences.
        Please note, that this functionality is mostly just usable by
        Latin users due to the straight mapping to ASCII (7bit).
        Default: FALSE

      CSA_MapForeignCharsHook (struct Hook *)
        If a character of the source string cannot be directly mapped
        to the destination codeset a &quot;?&quot; character will normally be used
        to signal this case. By using this attribute, a hook can be
        supplied which is called for every such foreign character.
        Within this hook the UTF8 sequence is supplied which cannot be
        directly mapped to the destination codeset. During the execution
        of the hook a replacement string might be specified, which in turn
        will be used by the internals of codesets.library to map this
        &quot;foreign&quot; char to a difference character or UTF8 sequence.

        If both, CSA_MapForeignChars and CSA_MapForeignCharsHook, are
        specified the hook will only be executed in case the internal
        routines don't supply an own mapping for the foreign UTF8 sequence.

        The hook function should be declared as:

        ULONG ASM SAVEDS fun(REG(a0, struct Hook *hook),
                             REG(a2, struct replaceMsg *msg),
                             REG(a1, void *dummy))

        struct Hook *hook
          Your hook

        msg-&gt;dst
          place your desired replacement string here

        msg-&gt;src
          the UTF8 sequence to be replaced, this string is READ-ONLY!

        msg-&gt;srclen
          the length of the UTF8 sequence to be replaced, do NOT peek
          beyond this limit.

        The return value of this hook function is the length of the replacement
        string. Return zero if no replacement did happen. Positive values will
        be treated as lengths of ASCII strings. Negative values signals a
        replacement by another UTF8 sequence. Please note, that in case you
        supply a UTF8 sequence as a replacement for the &quot;foreign&quot; UTF8, your
        hook might be called again if this sequence can still not be mapped to
        the destination codesets, thus is again a &quot;foreign&quot; sequence.


   RESULT
    str - the string or NULL
          If CSA_DestHook is used always NULL.
          If CSA_DestHook is not used NULL means failure
          to allocate mem.

   SEE ALSO
    codesets.library/CodesetsUTF8CreateA
    codesets.library/CodesetsUTF8Len


codesets.library/CodesetsUTF8Len

   NAME
    CodesetsUTF8Len - returns the length of a supplied utf8 string.

   SYNOPSIS
    len = CodesetsUTF8Len(utf8);
    D0                    A0

    ULONG CodesetsUTF8Len(UTF8 *);

   FUNCTION
    Returns the amount of real characters stored in a supplied UTF8
    string. This is _NOT_ the space required to store the UTF8 string,
    it is the actual number of _real_ character the UTF8 represents.

   INPUTS
    utf8 - pointer to the UTF8 string generated by the internal
           functions of codesets.library

   RESULT
    len - length of utf8

   SEE ALSO
    codesets.library/CodesetsUTF8CreateA
    codesets.library/CodesetsUTF8ToStrA


codesets.library/CodesetsIsValidUTF8

   NAME
    CodesetsIsValidUTF8 - tells if a supplied standard string is meant to
                          carry a perfectly valid UTF8 sequence

   SYNOPSIS
    result = CodesetsIsValidUTF8(str);
    D0                           A0

    BOOL CodesetsIsValidUTF8(STRPTR);

   FUNCTION
    Returns TRUE in case the supplied string only contains char sequences
    which are compatible to the UTF8 standard.

   INPUTS
    str - a standard STRPTR string.

   RESULT
    result - TRUE in case the string conatins valid UTF8 data.

   NOTE
    This function uses the common 'GOOD_UCS' macro together with parsing
    the whole string. This means that it will only return TRUE in case
    the supplied string only contains UTF8 sequences. A mixture of UTF8
    and non-UTF8 sequences will result in the function returning FALSE.

   SEE ALSO
    codesets.library/CodesetsUTF8CreateA
    codesets.library/CodesetsUTF8ToStrA


codesets.library/CodesetsIsLegalUTF8

   NAME
    CodesetsIsLegalUTF8 - check a UTF8 sequence

   SYNOPSIS
    res = CodesetsIsLegalUTF8(source, length);
                              A0      D0

    ULONG CodesetsIsLegalUTF8(UTF8 *, ULONG);


   FUNCTION
    Checks if source is a valid UTF8 sequence generated
    by the internal functions of codesets.library

   INPUTS
    source - the char sequence to check
    length - size of source

   RESULT
    res - TRUE or FALSE

   SEE ALSO
    codesets.library/CodesetsUTF8CreateA
    codesets.library/CodesetsUTF8ToStrA


codesets.library/CodesetsIsLegalUTF8Sequence

   NAME
    CodesetsIsLegalUTF8Sequence - check a char sequence

   SYNOPSIS
    res = CodesetsIsLegalUTF8Sequence(source, end);
                                      A0      A1

    ULONG CodesetsIsLegalUTF8(UTF8 *, UTF8 *);

   FUNCTION
    Check if source is a valid UTF8 sequence within the
    source and end boundaries.

   INPUTS
    source - the char sequence to check
    end - pointer to the end of the sequence to check

   RESULT
    res - TRUE or FALSE

   SEE ALSO
    codesets.library/CodesetsUTF8CreateA
    codesets.library/CodesetsUTF8ToStrA


codesets.library/CodesetsStrLenA

   NAME
    CodesetsStrLenA - returns the length of the source string
                      in case it will be converted to an UTF8
                      string.

   SYNOPSIS
    len = CodesetsStrLenA(str, attrs)
                          A0   A1

    ULONG CodesetsStrLenA(STRPTR, struct TagItem *);

    len = CodesetsStrLen(str, tag1, ...);
                         A0   A1

    ULONG CodesetsStrLen(STRPTR, Tag, ...);

   FUNCTION
    Return the length (size) of str in case it will be converted to
    an UTF8 compliant string.

   INPUTS
    str - the string to obtain length of
    attrs - a list of additional tag items. Valid items are:

      CSA_SourceCodeset (struct codeset *)
        The codeset the source string is encoded in.
        Default: the system's default codeset

      CSA_SourceLen (ULONG)
        The length of str
        Default: string length of CSA_Source

   RESULT
    len - the length of the string if it will be converted to
          an UTF8 string.

   SEE ALSO
    codesets.library/CodesetsUTF8CreateA


codesets.library/CodesetsConvertUTF16toUTF32

   NAME
    CodesetsConvertUTF16toUTF32 - converts from UTF16 to UTF32

   SYNOPSIS
    res = CodesetsConvertUTF16toUTF32(sourceStart,sourceEnd,targetStart,targetEnd,flags );
    D0                                A0          A1        A2          A3        D0

    ULONG CodesetsConvertUTF16toUTF32(const UTF16 **,const UTF16 *,UTF32 **,UTF32 *,ULONG);

   FUNCTION
    Converts UTF16 to UTF32.

   INPUTS

   RESULT

   SEE ALSO


codesets.library/CodesetsConvertUTF16toUTF8

   NAME
    CodesetsConvertUTF16toUTF8 - converts from UTF16 to UTF8

   SYNOPSIS
    res = CodesetsConvertUTF16toUTF8(sourceStart,sourceEnd,targetStart,targetEnd,flags );
    D0                                A0          A1        A2          A3        D0

    ULONG CodesetsConvertUTF16toUTF8(const UTF16 **,const UTF16 *,UTF8 **,UTF8 *,ULONG);

   FUNCTION
    Converts UTF16 to UTF8.

   INPUTS

   RESULT

   SEE ALSO


codesets.library/CodesetsConvertUTF32toUTF16

   NAME
    CodesetsConvertUTF32toUTF16 - converts from UTF32 to UTF16

   SYNOPSIS
    res = CodesetsConvertUTF32toUTF16(sourceStart,sourceEnd,targetStart,targetEnd,flags );
    D0                                A0          A1        A2          A3        D0

    ULONG CodesetsConvertUTF32toUTF16(const UTF32 **,const UTF32 *,UTF16 **,UTF16 *,ULONG);

   FUNCTION
    Converts UTF32 to UTF16.

   INPUTS

   RESULT

   SEE ALSO


codesets.library/CodesetsConvertUTF32toUTF8

   NAME
    CodesetsConvertUTF32toUTF8 - converts from UTF32 to UTF8

   SYNOPSIS
    res = CodesetsConvertUTF32toUTF8(sourceStart,sourceEnd,targetStart,targetEnd,flags );
    D0                                A0          A1        A2          A3        D0

    ULONG CodesetsConvertUTF32toUTF8(const UTF32 **,const UTF32 *,UTF8 **,UTF8 *,ULONG);

   FUNCTION
    Converts UTF32 to UTF16.

   INPUTS

   RESULT

   SEE ALSO


codesets.library/CodesetsConvertUTF8toUTF16

   NAME
    CodesetsConvertUTF8toUTF16 - converts from UTF8 to UTF16

   SYNOPSIS
    res = CodesetsConvertUTF8toUTF16(sourceStart,sourceEnd,targetStart,targetEnd,flags );
    D0                                A0          A1        A2          A3        D0

    ULONG CodesetsConvertUTF8toUTF16(const UTF8 **,const UTF8 *,UTF16 **,UTF16 *,ULONG);

   FUNCTION
    Converts UTF8 to UTF16.

   INPUTS

   RESULT

   SEE ALSO


codesets.library/CodesetsConvertUTF8toUTF32

   NAME
    CodesetsConvertUTF8toUTF32 - converts from UTF8 to UTF32

   SYNOPSIS
    res = CodesetsConvertUTF8toUTF32(sourceStart,sourceEnd,targetStart,targetEnd,flags );
    D0                                A0          A1        A2          A3        D0

    ULONG CodesetsConvertUTF8toUTF32(const UTF8 **,const UTF8 *,UTF32 **,UTF32 *,ULONG);

   FUNCTION
    Converts UTF8 to UTF32.

   INPUTS

   RESULT

   SEE ALSO


codesets.library/CodesetsDecodeB64A

   NAME
    CodesetsDecodeB64A - decodes a supplied base64 encoded string
                         or file into plain text charwise.

   SYNOPSIS
    res = CodesetsDecodeB64A(attrs);
    D0                       A0

    ULONG CodesetsDecodeB64A(struct TagItem *);

    res = CodesetsDecodeB64(tag1, ...);
    D0                      A0

    ULONG CodesetsDecodeB64A(Tag, ....);

   FUNCTION
    Decodes a string or a complete base64 encoded file to a
    plain text buffer or also a destination file

   INPUTS
    attrs - a list of mandatory tag items. Valid items are:

      CSA_B64SourceString (STRPTR)
        The source string to decode

      CSA_B64SourceLen (ULONG)
        The length of CSA_B64SourceString Must be supplied if
        CSA_B64SourceString is used.

      CSA_B64SourceFile (STRPTR)
        Source file name.

      CSA_B64DestPtr (STRPTR *)
        Destination buffer pointer. Set to the allocated buffer.
        Must be supplied if CSA_B64DestFile is not used. To
        free the buffer use CodesetsFreeA().

      CSA_B64DestFile (STRPTR)
        Destination file name. Must be supplied if
        CSA_B64DestPtr is used.

      CSA_B64FLG_NtCheckErr (BOOL)
        Don't stop on error.

   RESULT
    res - result, one of (if 0 OK, if &gt;0 error)
        CSR_B64_ERROR_OK
        CSR_B64_ERROR_MEM
        CSR_B64_ERROR_DOS
        CSR_B64_ERROR_INCOMPLETE
        CSR_B64_ERROR_ILLEGAL

   NOTE
    It fully operates charwise and doesn't take respect of the
    individual codeset the decoded data may be still be encoded to.

   SEE ALSO
    codesets.library/CodesetsEncodeB64A


codesets.library/CodesetsEncodeB64A

   NAME
    CodesetsEncodeB64A - encodes a string or whole file
                         to base64

   SYNOPSIS
    res = CodesetsEncodeB64A(attrs);
    D0                       A0

    ULONG CodesetsEncodeB64A(struct TagItem *);

    res = CodesetsEncodeB64(tag1, ...);
    D0                      A0

    ULONG CodesetsEncodeB64(Tag, ....);

   FUNCTION
    Encodes the supplied string or file to either a whole
    buffer or also to a file.

   INPUTS
    attrs - a list of mandatory tag items. Valid items are:

      CSA_B64SourceString (STRPTR)
        The source string to encode

      CSA_B64SourceLen (ULONG)
        The length of CSA_B64SourceString. Must be supplied if
        CSA_B64SourceString is used.

      CSA_B64SourceFile (STRPTR)
        Source file name.

      CSA_B64DestPtr (STRPTR *)
        Destination buffer pointer. Set to the allocated buffer.
        Must be supplied if CSA_B64DestFile is not used. To
        free the buffer use CodesetsFreeA().

      CSA_B64DestFile (STRPTR)
        Destination file name. Must be supplied if
        CSA_B64DestPtr is used.

      CSA_B64MaxLineLen (ULONG)
        Maximum length of encoded lines. 0&lt;v&lt;256
        Default: 72

      CSA_B64Unix (ULONG)
        If TRUE eol is \n (LF), otherwise \r\n (CRLF).
        Default: TRUE

   RESULT
    res - result, one of (if 0 OK, if &gt;0 error)
        CSR_B64_ERROR_OK
        CSR_B64_ERROR_MEM
        CSR_B64_ERROR_DOS
        CSR_B64_ERROR_INCOMPLETE
        CSR_B64_ERROR_ILLEGAL

   NOTE
    It fully operates charwise and doesn't take respect of the
    individual codeset the decoded data may be encoded to.

   SEE ALSO
    codesets.library/CodesetsDecodeB64A

&lt;/pre&gt;</text>
      <sha1>kocaivssq06kvwzjfz3z80vdpy4g5w6</sha1>
    </revision>
  </page>
  <page>
    <title>Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/Refusal of Metaphysical Dualism</title>
    <ns>0</ns>
    <id>476955</id>
    <revision>
      <id>4671207</id>
      <parentid>4671078</parentid>
      <timestamp>2026-09-19T21:51:51Z</timestamp>
      <contributor>
        <username>DavidCota64</username>
        <id>3507033</id>
      </contributor>
      <comment>Clarify the stabilising function of dualism; distinguish Plato, Augustine, Descartes, Kant, Husserl, and Heidegger; align instability with the OEC lexicon.</comment>
      <origin>4671207</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="14112" sha1="n6ayvnzek4o4v60s4hlrawspnmhxrnp" xml:space="preserve">== 1.1 – Refusal of Metaphysical Dualism ==
'''Introduction'''

A brain lesion can alter speech; an inscription on paper can preserve a relation after its writer has gone; a technical interface can change which distinctions become actionable. These changes occur in material supports, yet inherited vocabularies often assign meaning or intelligibility to a different ontological domain. The resistance that begins this chapter is therefore concrete: how can symbolic efficacy be real without adding an immaterial substance?

Metaphysical dualism — the belief in an ontological split between matter and thought, between the extended and the internal, between what is acted upon and what gives meaning — is not merely one doctrine among others in the history of philosophy. It is the foundational operation through which Western metaphysics secured its authority. Rather than describing reality, dualism organised an ontological hierarchy: between the visible and the invisible, the contingent and the necessary, the finite and the infinite. It did not simply distinguish levels of reality; it installed a logic of transcendence that positioned one pole as source and measure of the other, subordinating the sensible to the intelligible, the body to the soul, experience to reason. This is the logic refused here. The critique does not dismiss a list of theories as though they were interchangeable; it targets the operative gesture of separation through which one domain is made the source and measure of another. 

The refusal, in the framework here adopted, is therefore not a mere counter-argument. It is a shift of philosophical ground. In refusing the dualist gesture, the framework dislodges thought from its transcendent anchor and returns it to the immanent field of matter in transformation. This position does not deny the complexity of thought or of the symbolic; on the contrary, it affirms them by showing them as an effect of material complexification and not as an exterior principle. What is at stake is the possibility of an ontology that does not resort to an “outside” to explain intelligence, consciousness or meaning. 

'''The Dualist Architecture and its Stabilising Function'''

The target is not the whole history of Western philosophy, but a recurrent gesture within several of its lineages. Plato’s distinction between intelligible Forms and the sensible world, Augustine’s hierarchies of the eternal and the temporal and of soul and body, and Descartes’s distinction between ''res cogitans'' and ''res extensa'' are not equivalent doctrines. In the restricted comparison made here, they share an assignment of explanatory or normative priority to an order not exhausted by mutable material processes (Plato 1997; Augustine 1991; Descartes 1996).

Such an architecture can perform a symbolic stabilising function: it insulates the source or measure of intelligibility from the contingency of the material field. Kant complicates rather than simply repeats this gesture. The ''a priori'' conditions of possible experience do not constitute a second substance, and the noumenon marks a limit to cognition rather than another knowable world. Husserl’s reduction likewise does not posit a second substance, but relocates constitutive priority in transcendental subjectivity. Heidegger explicitly refuses to treat Being as another being; the question raised from the present framework is therefore narrower: whether disclosure can be explained while its material conditions remain unspecified (Kant [1781] 1998; Husserl 1931; Heidegger [1927] 1962).

Dualism is therefore treated here not merely as a logical error but as an ontological strategy. Its stabilising force lies in placing the source or measure of intelligibility beyond complete exposure to material contingency. The present framework refuses that priority because thought, meaning, and knowledge must be explained within the material processes that produce and reorganise symbolic relations. This refusal does not require describing the real as uniformly unstable: local organisations can persist, but no external foundation or final order guarantees them.

'''The Persistence of Transcendence in Critiques of Dualism'''

Philosophies that reject classical substances may still leave open the question of how their decisive operators are materially realised. Derrida’s ''différance'' destabilises the priority of presence; Lacan shows that the subject is constituted through a symbolic order rather than preceding it; Levinas gives ethical priority to an alterity that cannot be reduced to possession. These are substantial gains, not disguised repetitions of one doctrine (Derrida [1967] 1997; Lacan 1981; Levinas [1961] 1969).

The disagreement developed here is narrower. It asks whether trace, symbolic order, and ethical exteriority have been sufficiently located in the material supports and relations through which they become operative. The claim is not that these thinkers posit a second substance. It is that their concepts can be read in ways that grant an irreducible exteriority to material organisation. The present argument retains the instability of meaning, the linguistic constitution of the subject, and the priority of responsibility, while reconstructing each within finite material relations. This is a contested interpretation and should be assessed against the cited works, not treated as a neutral summary of them. 

'''Thought as Modulation of Matter: Beyond Simondon'''

If there is no separate thinking substance, how are we to understand thought? The framework adopted here does not reduce thought to a cerebral epiphenomenon; it proposes to understand it as a specific modulation of matter. In established human cases, thought is realised by a biossoma: a living biological body sensitive to material differences and capable of symbolic reorganisation. The term is not a synonym for every complex or recursively operating system, and neither complexity nor recursion alone establishes thought or consciousness. Gilbert Simondon’s theory of individuation is an important ally because it does not treat the individual as a given substance. Individuation proceeds within a metastable field charged with tensions; the pre-individual is “more than one”, not a warehouse of ready-made forms (Simondon 2005). The divergence is therefore not based on the mistaken claim that Simondon simply posits a reserve of completed possibilities. It concerns the ontological role assigned to a pre-individual condition antecedent to individuation. The position developed here begins instead from already configured matter whose relations remain capable of new functional couplings. Novelty does not require a completed form hidden in advance, but neither does it require a shapeless background awaiting form. 

Thought is, therefore, an effect of threshold — a functional reorganisation that emerges when matter, under the pressure of complex relations, acquires the capacity to refer to itself, to displace and to reorganise its own patterns. It is not a “thing”, but a local and excessive operability. 

'''The Symbol as Immanent Operation, not Transcendent Reference'''

One of the most radical consequences of this position is the redefinition of the status of the symbol. In the metaphysical tradition, the symbol — and, by extension, language — is often treated as a medium pointing beyond itself: to an idea, a meaning, an essence. Even in secularised versions, the symbol is viewed as representing a mental content or a conceptual structure. The present framework refuses this architecture. The symbol is not a window onto another world or the vehicle of an immaterial content. A material difference first becomes a trace when an organised system discriminates it as a new or previously unknown configuration. In an inaugural inscription, a passive mark and a first symbol are co-constituted: the mark is the materially preserved configuration; the symbol is the materially realised instance through which that mark becomes legible to the system. Later occurrences may be recognised as instances under the same mark and give rise to additional symbols.

This sequence locates representation within matter without denying it. A symbol represents an already inscribed mark; the system can then establish relations among symbols and modulate further operations. The mark itself does not compare, interpret, or reorganise, and a symbol does not act in isolation. Reorganisation belongs to the organised system operating through symbolic relations. Nothing in this account requires a realm of meanings above the material supports, protocols, and effects that make representation possible. 

'''Consequences and Programmatic Opening'''

To refuse metaphysical dualism is not, therefore, a denial of difference, but its radical relocation. Difference ceases to be a gap between two realms and becomes the signature of the internal modulation of a single, immanent field. The world is not flattened; on the contrary, it is recognised in its constitutive heterogeneity — a heterogeneity that is entirely immanent. The implications of this inaugural gesture are developed throughout the work: they reshape our understanding of knowledge, which ceases to be imagined as passive mirroring and becomes materially mediated, situated representation open to correction; of ethics, which begins from shared material vulnerability rather than transcendental law; and of politics, which concerns the composition of bodies and symbols in a field without ultimate foundation. In refusing dualism, the framework here adopted does not offer a new dogmatic system. On the contrary, it opens a field of interrogation and risk. To accept that there is no “beyond” to which to escape is to accept the tremendous responsibility of thinking and acting in a world that is itself the only source of meaning — a world inconsistent, trembling, yet radically sufficient. 

== Reading Colloquium ==
''This guide accompanies the argument; it does not replace it.''
=== 1. Placement of the Text within the Architecture of the Work ===
This is the inaugural text of the ''Foundations of the Ontology of Emergent Complexity''. It establishes the foundational gesture upon which the entire architecture depends: the refusal of metaphysical dualism. Without this refusal, the framework's subsequent moves — the dissolution of the two-worlds fiction (1.2), the material account of thought (1.3), the operative theory of the symbol (1.4), and the rejection of ground and teleology (1.5) — would remain trapped within the very structures they seek to displace. This section is not merely a preamble; it is the condition of possibility for the entire ontology.

=== 2. Philosophical Problem at Stake ===
The problem is structural: Western philosophy has been constituted through the repeated installation of a dualist architecture — matter/thought, body/soul, sensible/intelligible, finite/infinite — in which one pole is elevated to the status of ground, origin, or measure, and the other is subordinated as derivative, deficient, or apparent. The question this text confronts is not whether any particular dualism is correct or incorrect, but whether the dualist gesture itself — the operation of splitting being into two domains — can be refused without simply inverting the hierarchy. Can thought be placed inside matter without reducing it to mechanism? Can transcendence be refused without collapsing into a flat materialism that cannot account for the complexity of the symbolic?

=== 3. Core Thesis and Conceptual Reorganisation ===
The thesis is that dualism is not a descriptive error but an ontological strategy — a symbolic operation designed to secure the authority of philosophy by immunising intelligibility against the instability of the material field. The argument refuses this strategy by relocating thought, the symbol, and ethical responsibility within the immanent field of matter. This is not a reduction but a complexification: matter is not the inert substrate that dualism describes, but an unstable field capable of producing, at specific thresholds of complexity, the very operations (thought, inscription, self-reference) that dualism attributed to a separate domain.

=== 4. Key Concepts and Their Articulation ===
The key concepts introduced here include the refusal of transcendence as a constitutive gesture (not a conclusion but a point of departure), the biossoma as the living material body capable of symbolic reorganisation that replaces the mind/body split, operative excess as the affirmative causal condition in which available compatibilities exceed the system’s present symbolic or structural form and force reorganisation, and thought as modulation of matter rather than as the activity of a separate substance. The section also performs critical engagements with Derrida (différance as residual transcendence), Lacan (the Symbolic order as pre-material structure), Levinas (ethical alterity as infinite transcendence), and Simondon (pre-individual metastability as an ontological antecedent), retaining their insights while refusing the transcendent residues in each.

=== 5. Implications for Readers and Pedagogical Pathways ===
Readers should attend to the precision of the refusal: it is not anti-rationalist, not irrationalist, and not a simple materialism that denies the reality of thought. It is a relocation. Students familiar with continental philosophy will recognise the interlocutors; the challenge is to see how each is both retained and displaced. The key pedagogical move is to understand that &quot;placing thought inside matter&quot; does not mean explaining thought away — it means showing that matter is already more complex than any dualist framework can accommodate. Readers are encouraged to test this claim against their own philosophical commitments: where does transcendence reappear in frameworks that claim to have overcome it?

== [[Foundations of the Ontology of Emergent Complexity/References|🜂 References]] ==
{{BookCat}}</text>
      <sha1>n6ayvnzek4o4v60s4hlrawspnmhxrnp</sha1>
    </revision>
    <revision>
      <id>4671210</id>
      <parentid>4671207</parentid>
      <timestamp>2026-09-19T21:56:23Z</timestamp>
      <contributor>
        <username>DavidCota64</username>
        <id>3507033</id>
      </contributor>
      <comment>Clarify the materialist critique of Derrida, Lacan, and Levinas; distinguish the OEC trace and preserve explicit normative criteria.</comment>
      <origin>4671210</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="14427" sha1="7n0gig3wh4zpi0gdd58f85l7ummh6ox" xml:space="preserve">== 1.1 – Refusal of Metaphysical Dualism ==
'''Introduction'''

A brain lesion can alter speech; an inscription on paper can preserve a relation after its writer has gone; a technical interface can change which distinctions become actionable. These changes occur in material supports, yet inherited vocabularies often assign meaning or intelligibility to a different ontological domain. The resistance that begins this chapter is therefore concrete: how can symbolic efficacy be real without adding an immaterial substance?

Metaphysical dualism — the belief in an ontological split between matter and thought, between the extended and the internal, between what is acted upon and what gives meaning — is not merely one doctrine among others in the history of philosophy. It is the foundational operation through which Western metaphysics secured its authority. Rather than describing reality, dualism organised an ontological hierarchy: between the visible and the invisible, the contingent and the necessary, the finite and the infinite. It did not simply distinguish levels of reality; it installed a logic of transcendence that positioned one pole as source and measure of the other, subordinating the sensible to the intelligible, the body to the soul, experience to reason. This is the logic refused here. The critique does not dismiss a list of theories as though they were interchangeable; it targets the operative gesture of separation through which one domain is made the source and measure of another. 

The refusal, in the framework here adopted, is therefore not a mere counter-argument. It is a shift of philosophical ground. In refusing the dualist gesture, the framework dislodges thought from its transcendent anchor and returns it to the immanent field of matter in transformation. This position does not deny the complexity of thought or of the symbolic; on the contrary, it affirms them by showing them as an effect of material complexification and not as an exterior principle. What is at stake is the possibility of an ontology that does not resort to an “outside” to explain intelligence, consciousness or meaning. 

'''The Dualist Architecture and its Stabilising Function'''

The target is not the whole history of Western philosophy, but a recurrent gesture within several of its lineages. Plato’s distinction between intelligible Forms and the sensible world, Augustine’s hierarchies of the eternal and the temporal and of soul and body, and Descartes’s distinction between ''res cogitans'' and ''res extensa'' are not equivalent doctrines. In the restricted comparison made here, they share an assignment of explanatory or normative priority to an order not exhausted by mutable material processes (Plato 1997; Augustine 1991; Descartes 1996).

Such an architecture can perform a symbolic stabilising function: it insulates the source or measure of intelligibility from the contingency of the material field. Kant complicates rather than simply repeats this gesture. The ''a priori'' conditions of possible experience do not constitute a second substance, and the noumenon marks a limit to cognition rather than another knowable world. Husserl’s reduction likewise does not posit a second substance, but relocates constitutive priority in transcendental subjectivity. Heidegger explicitly refuses to treat Being as another being; the question raised from the present framework is therefore narrower: whether disclosure can be explained while its material conditions remain unspecified (Kant [1781] 1998; Husserl 1931; Heidegger [1927] 1962).

Dualism is therefore treated here not merely as a logical error but as an ontological strategy. Its stabilising force lies in placing the source or measure of intelligibility beyond complete exposure to material contingency. The present framework refuses that priority because thought, meaning, and knowledge must be explained within the material processes that produce and reorganise symbolic relations. This refusal does not require describing the real as uniformly unstable: local organisations can persist, but no external foundation or final order guarantees them.

'''The Question of Residual Transcendence in Critiques of Dualism'''

Philosophies that reject classical substances may still leave open how their decisive operators are materially realised. Derrida’s ''différance'' destabilises the priority of presence; Lacan analyses the subject as constituted within the Symbolic rather than preceding it; Levinas gives ethical priority to an alterity that resists possession. These are substantial gains, not disguised repetitions of one doctrine (Derrida [1967] 1997; Lacan 1981; Levinas [1961] 1969).

The disagreement developed here is narrower. It asks whether the Derridean ''trace'', the Lacanian Symbolic, and Levinasian ethical exteriority have been sufficiently located in the material supports and relations through which they become operative. The claim is neither that these thinkers posit a second substance nor that their concepts are disguised repetitions of classical transcendence. It is that these concepts can be read as assigning explanatory or normative priority to relations whose material conditions remain unspecified.

The present argument retains the instability of meaning, the role of symbolic relations in subject formation, and the ethical problem raised by alterity, while rearticulating their conditions and effects within finite material relations. This does not make obligation a direct consequence of material exposure: normative force depends on explicit criteria for evaluating possible responses. This is a contested interpretation and should be assessed against the cited works, not treated as a neutral summary of them.

'''Thought as Modulation of Matter: Beyond Simondon'''

If there is no separate thinking substance, how are we to understand thought? The framework adopted here does not reduce thought to a cerebral epiphenomenon; it proposes to understand it as a specific modulation of matter. In established human cases, thought is realised by a biossoma: a living biological body sensitive to material differences and capable of symbolic reorganisation. The term is not a synonym for every complex or recursively operating system, and neither complexity nor recursion alone establishes thought or consciousness. Gilbert Simondon’s theory of individuation is an important ally because it does not treat the individual as a given substance. Individuation proceeds within a metastable field charged with tensions; the pre-individual is “more than one”, not a warehouse of ready-made forms (Simondon 2005). The divergence is therefore not based on the mistaken claim that Simondon simply posits a reserve of completed possibilities. It concerns the ontological role assigned to a pre-individual condition antecedent to individuation. The position developed here begins instead from already configured matter whose relations remain capable of new functional couplings. Novelty does not require a completed form hidden in advance, but neither does it require a shapeless background awaiting form. 

Thought is, therefore, an effect of threshold — a functional reorganisation that emerges when matter, under the pressure of complex relations, acquires the capacity to refer to itself, to displace and to reorganise its own patterns. It is not a “thing”, but a local and excessive operability. 

'''The Symbol as Immanent Operation, not Transcendent Reference'''

One of the most radical consequences of this position is the redefinition of the status of the symbol. In the metaphysical tradition, the symbol — and, by extension, language — is often treated as a medium pointing beyond itself: to an idea, a meaning, an essence. Even in secularised versions, the symbol is viewed as representing a mental content or a conceptual structure. The present framework refuses this architecture. The symbol is not a window onto another world or the vehicle of an immaterial content. A material difference first becomes a trace when an organised system discriminates it as a new or previously unknown configuration. In an inaugural inscription, a passive mark and a first symbol are co-constituted: the mark is the materially preserved configuration; the symbol is the materially realised instance through which that mark becomes legible to the system. Later occurrences may be recognised as instances under the same mark and give rise to additional symbols.

This sequence locates representation within matter without denying it. A symbol represents an already inscribed mark; the system can then establish relations among symbols and modulate further operations. The mark itself does not compare, interpret, or reorganise, and a symbol does not act in isolation. Reorganisation belongs to the organised system operating through symbolic relations. Nothing in this account requires a realm of meanings above the material supports, protocols, and effects that make representation possible. 

'''Consequences and Programmatic Opening'''

To refuse metaphysical dualism is not, therefore, a denial of difference, but its radical relocation. Difference ceases to be a gap between two realms and becomes the signature of the internal modulation of a single, immanent field. The world is not flattened; on the contrary, it is recognised in its constitutive heterogeneity — a heterogeneity that is entirely immanent. The implications of this inaugural gesture are developed throughout the work: they reshape our understanding of knowledge, which ceases to be imagined as passive mirroring and becomes materially mediated, situated representation open to correction; of ethics, which begins from shared material vulnerability rather than transcendental law; and of politics, which concerns the composition of bodies and symbols in a field without ultimate foundation. In refusing dualism, the framework here adopted does not offer a new dogmatic system. On the contrary, it opens a field of interrogation and risk. To accept that there is no “beyond” to which to escape is to accept the tremendous responsibility of thinking and acting in a world that is itself the only source of meaning — a world inconsistent, trembling, yet radically sufficient. 

== Reading Colloquium ==
''This guide accompanies the argument; it does not replace it.''
=== 1. Placement of the Text within the Architecture of the Work ===
This is the inaugural text of the ''Foundations of the Ontology of Emergent Complexity''. It establishes the foundational gesture upon which the entire architecture depends: the refusal of metaphysical dualism. Without this refusal, the framework's subsequent moves — the dissolution of the two-worlds fiction (1.2), the material account of thought (1.3), the operative theory of the symbol (1.4), and the rejection of ground and teleology (1.5) — would remain trapped within the very structures they seek to displace. This section is not merely a preamble; it is the condition of possibility for the entire ontology.

=== 2. Philosophical Problem at Stake ===
The problem is structural: Western philosophy has been constituted through the repeated installation of a dualist architecture — matter/thought, body/soul, sensible/intelligible, finite/infinite — in which one pole is elevated to the status of ground, origin, or measure, and the other is subordinated as derivative, deficient, or apparent. The question this text confronts is not whether any particular dualism is correct or incorrect, but whether the dualist gesture itself — the operation of splitting being into two domains — can be refused without simply inverting the hierarchy. Can thought be placed inside matter without reducing it to mechanism? Can transcendence be refused without collapsing into a flat materialism that cannot account for the complexity of the symbolic?

=== 3. Core Thesis and Conceptual Reorganisation ===
The thesis is that dualism is not a descriptive error but an ontological strategy — a symbolic operation designed to secure the authority of philosophy by immunising intelligibility against the instability of the material field. The argument refuses this strategy by relocating thought, the symbol, and ethical responsibility within the immanent field of matter. This is not a reduction but a complexification: matter is not the inert substrate that dualism describes, but an unstable field capable of producing, at specific thresholds of complexity, the very operations (thought, inscription, self-reference) that dualism attributed to a separate domain.

=== 4. Key Concepts and Their Articulation ===
The key concepts introduced here include the refusal of transcendence as a constitutive gesture (not a conclusion but a point of departure), the biossoma as the living material body capable of symbolic reorganisation that replaces the mind/body split, operative excess as the affirmative causal condition in which available compatibilities exceed the system’s present symbolic or structural form and force reorganisation, and thought as modulation of matter rather than as the activity of a separate substance. The section also performs critical engagements with Derrida (différance as residual transcendence), Lacan (the Symbolic order as pre-material structure), Levinas (ethical alterity as infinite transcendence), and Simondon (pre-individual metastability as an ontological antecedent), retaining their insights while refusing the transcendent residues in each.

=== 5. Implications for Readers and Pedagogical Pathways ===
Readers should attend to the precision of the refusal: it is not anti-rationalist, not irrationalist, and not a simple materialism that denies the reality of thought. It is a relocation. Students familiar with continental philosophy will recognise the interlocutors; the challenge is to see how each is both retained and displaced. The key pedagogical move is to understand that &quot;placing thought inside matter&quot; does not mean explaining thought away — it means showing that matter is already more complex than any dualist framework can accommodate. Readers are encouraged to test this claim against their own philosophical commitments: where does transcendence reappear in frameworks that claim to have overcome it?

== [[Foundations of the Ontology of Emergent Complexity/References|🜂 References]] ==
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    <revision>
      <id>4671211</id>
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      </contributor>
      <comment>Clarify thought, operative excess, consciousness, and the divergence from Simondon</comment>
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      <model>wikitext</model>
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      <text bytes="14843" sha1="i1qp184slic9rsahurtsrxwsjt0rvht" xml:space="preserve">== 1.1 – Refusal of Metaphysical Dualism ==
'''Introduction'''

A brain lesion can alter speech; an inscription on paper can preserve a relation after its writer has gone; a technical interface can change which distinctions become actionable. These changes occur in material supports, yet inherited vocabularies often assign meaning or intelligibility to a different ontological domain. The resistance that begins this chapter is therefore concrete: how can symbolic efficacy be real without adding an immaterial substance?

Metaphysical dualism — the belief in an ontological split between matter and thought, between the extended and the internal, between what is acted upon and what gives meaning — is not merely one doctrine among others in the history of philosophy. It is the foundational operation through which Western metaphysics secured its authority. Rather than describing reality, dualism organised an ontological hierarchy: between the visible and the invisible, the contingent and the necessary, the finite and the infinite. It did not simply distinguish levels of reality; it installed a logic of transcendence that positioned one pole as source and measure of the other, subordinating the sensible to the intelligible, the body to the soul, experience to reason. This is the logic refused here. The critique does not dismiss a list of theories as though they were interchangeable; it targets the operative gesture of separation through which one domain is made the source and measure of another. 

The refusal, in the framework here adopted, is therefore not a mere counter-argument. It is a shift of philosophical ground. In refusing the dualist gesture, the framework dislodges thought from its transcendent anchor and returns it to the immanent field of matter in transformation. This position does not deny the complexity of thought or of the symbolic; on the contrary, it affirms them by showing them as an effect of material complexification and not as an exterior principle. What is at stake is the possibility of an ontology that does not resort to an “outside” to explain intelligence, consciousness or meaning. 

'''The Dualist Architecture and its Stabilising Function'''

The target is not the whole history of Western philosophy, but a recurrent gesture within several of its lineages. Plato’s distinction between intelligible Forms and the sensible world, Augustine’s hierarchies of the eternal and the temporal and of soul and body, and Descartes’s distinction between ''res cogitans'' and ''res extensa'' are not equivalent doctrines. In the restricted comparison made here, they share an assignment of explanatory or normative priority to an order not exhausted by mutable material processes (Plato 1997; Augustine 1991; Descartes 1996).

Such an architecture can perform a symbolic stabilising function: it insulates the source or measure of intelligibility from the contingency of the material field. Kant complicates rather than simply repeats this gesture. The ''a priori'' conditions of possible experience do not constitute a second substance, and the noumenon marks a limit to cognition rather than another knowable world. Husserl’s reduction likewise does not posit a second substance, but relocates constitutive priority in transcendental subjectivity. Heidegger explicitly refuses to treat Being as another being; the question raised from the present framework is therefore narrower: whether disclosure can be explained while its material conditions remain unspecified (Kant [1781] 1998; Husserl 1931; Heidegger [1927] 1962).

Dualism is therefore treated here not merely as a logical error but as an ontological strategy. Its stabilising force lies in placing the source or measure of intelligibility beyond complete exposure to material contingency. The present framework refuses that priority because thought, meaning, and knowledge must be explained within the material processes that produce and reorganise symbolic relations. This refusal does not require describing the real as uniformly unstable: local organisations can persist, but no external foundation or final order guarantees them.

'''The Question of Residual Transcendence in Critiques of Dualism'''

Philosophies that reject classical substances may still leave open how their decisive operators are materially realised. Derrida’s ''différance'' destabilises the priority of presence; Lacan analyses the subject as constituted within the Symbolic rather than preceding it; Levinas gives ethical priority to an alterity that resists possession. These are substantial gains, not disguised repetitions of one doctrine (Derrida [1967] 1997; Lacan 1981; Levinas [1961] 1969).

The disagreement developed here is narrower. It asks whether the Derridean ''trace'', the Lacanian Symbolic, and Levinasian ethical exteriority have been sufficiently located in the material supports and relations through which they become operative. The claim is neither that these thinkers posit a second substance nor that their concepts are disguised repetitions of classical transcendence. It is that these concepts can be read as assigning explanatory or normative priority to relations whose material conditions remain unspecified.

The present argument retains the instability of meaning, the role of symbolic relations in subject formation, and the ethical problem raised by alterity, while rearticulating their conditions and effects within finite material relations. This does not make obligation a direct consequence of material exposure: normative force depends on explicit criteria for evaluating possible responses. This is a contested interpretation and should be assessed against the cited works, not treated as a neutral summary of them.

'''Thought as Modulation of Matter: Beyond Simondon'''
If there is no separate thinking substance, how are we to understand thought? The framework adopted here does not reduce thought to a cerebral epiphenomenon; it understands thought as a specific operation materially realised. In established human cases, thought is realised by a biossoma: a living biological body sensitive to material differences and capable of symbolic reorganisation. Thought should not, however, be attributed to every complex or recursively operating system. Complexity and recursion, separately or together, do not by themselves establish either thought or consciousness.

Gilbert Simondon’s theory of individuation is an important ally because it does not treat the individual as a given substance. Individuation proceeds within a metastable field charged with tensions; the pre-individual is “more than one”, not a warehouse of ready-made forms (Simondon 2005). The divergence is therefore not based on the mistaken claim that Simondon posits a reserve of completed possibilities. It concerns the distinct explanatory role assigned to the pre-individual as that from which individuation draws, even though it is neither a separate substance nor merely a temporal “before”. The position developed here begins instead from presently configured matter whose unrealised compatibilities permit new functional couplings. Novelty requires neither a completed form hidden in advance nor a shapeless background awaiting form.

Thought is therefore understood as a materially realised process: the production of difference through symbolic reorganisation. It is not a thing or a separate substance. Nor is it synonymous with operative excess. Operative excess designates the unrealised compatibilities of a system that exceed its present symbolic or structural form; it can make new symbolic reorganisations possible, but it is not itself thought. This account neither attributes thought to every complex system nor treats thought, or any isolated set of functional capacities, as a sufficient criterion of consciousness.

'''The Symbol as Immanent Operation, not Transcendent Reference'''

One of the most radical consequences of this position is the redefinition of the status of the symbol. In the metaphysical tradition, the symbol — and, by extension, language — is often treated as a medium pointing beyond itself: to an idea, a meaning, an essence. Even in secularised versions, the symbol is viewed as representing a mental content or a conceptual structure. The present framework refuses this architecture. The symbol is not a window onto another world or the vehicle of an immaterial content. A material difference first becomes a trace when an organised system discriminates it as a new or previously unknown configuration. In an inaugural inscription, a passive mark and a first symbol are co-constituted: the mark is the materially preserved configuration; the symbol is the materially realised instance through which that mark becomes legible to the system. Later occurrences may be recognised as instances under the same mark and give rise to additional symbols.

This sequence locates representation within matter without denying it. A symbol represents an already inscribed mark; the system can then establish relations among symbols and modulate further operations. The mark itself does not compare, interpret, or reorganise, and a symbol does not act in isolation. Reorganisation belongs to the organised system operating through symbolic relations. Nothing in this account requires a realm of meanings above the material supports, protocols, and effects that make representation possible. 

'''Consequences and Programmatic Opening'''

To refuse metaphysical dualism is not, therefore, a denial of difference, but its radical relocation. Difference ceases to be a gap between two realms and becomes the signature of the internal modulation of a single, immanent field. The world is not flattened; on the contrary, it is recognised in its constitutive heterogeneity — a heterogeneity that is entirely immanent. The implications of this inaugural gesture are developed throughout the work: they reshape our understanding of knowledge, which ceases to be imagined as passive mirroring and becomes materially mediated, situated representation open to correction; of ethics, which begins from shared material vulnerability rather than transcendental law; and of politics, which concerns the composition of bodies and symbols in a field without ultimate foundation. In refusing dualism, the framework here adopted does not offer a new dogmatic system. On the contrary, it opens a field of interrogation and risk. To accept that there is no “beyond” to which to escape is to accept the tremendous responsibility of thinking and acting in a world that is itself the only source of meaning — a world inconsistent, trembling, yet radically sufficient. 

== Reading Colloquium ==
''This guide accompanies the argument; it does not replace it.''
=== 1. Placement of the Text within the Architecture of the Work ===
This is the inaugural text of the ''Foundations of the Ontology of Emergent Complexity''. It establishes the foundational gesture upon which the entire architecture depends: the refusal of metaphysical dualism. Without this refusal, the framework's subsequent moves — the dissolution of the two-worlds fiction (1.2), the material account of thought (1.3), the operative theory of the symbol (1.4), and the rejection of ground and teleology (1.5) — would remain trapped within the very structures they seek to displace. This section is not merely a preamble; it is the condition of possibility for the entire ontology.

=== 2. Philosophical Problem at Stake ===
The problem is structural: Western philosophy has been constituted through the repeated installation of a dualist architecture — matter/thought, body/soul, sensible/intelligible, finite/infinite — in which one pole is elevated to the status of ground, origin, or measure, and the other is subordinated as derivative, deficient, or apparent. The question this text confronts is not whether any particular dualism is correct or incorrect, but whether the dualist gesture itself — the operation of splitting being into two domains — can be refused without simply inverting the hierarchy. Can thought be placed inside matter without reducing it to mechanism? Can transcendence be refused without collapsing into a flat materialism that cannot account for the complexity of the symbolic?

=== 3. Core Thesis and Conceptual Reorganisation ===
The thesis is that dualism is not a descriptive error but an ontological strategy — a symbolic operation designed to secure the authority of philosophy by immunising intelligibility against the instability of the material field. The argument refuses this strategy by relocating thought, the symbol, and ethical responsibility within the immanent field of matter. This is not a reduction but a complexification: matter is not the inert substrate that dualism describes, but an unstable field capable of producing, at specific thresholds of complexity, the very operations (thought, inscription, self-reference) that dualism attributed to a separate domain.

=== 4. Key Concepts and Their Articulation ===
The key concepts introduced here include the refusal of transcendence as a constitutive gesture (not a conclusion but a point of departure), the biossoma as the living material body capable of symbolic reorganisation that replaces the mind/body split, operative excess as the affirmative causal condition in which available compatibilities exceed the system’s present symbolic or structural form and force reorganisation, and thought as modulation of matter rather than as the activity of a separate substance. The section also performs critical engagements with Derrida (différance as residual transcendence), Lacan (the Symbolic order as pre-material structure), Levinas (ethical alterity as infinite transcendence), and Simondon (pre-individual metastability as an ontological antecedent), retaining their insights while refusing the transcendent residues in each.

=== 5. Implications for Readers and Pedagogical Pathways ===
Readers should attend to the precision of the refusal: it is not anti-rationalist, not irrationalist, and not a simple materialism that denies the reality of thought. It is a relocation. Students familiar with continental philosophy will recognise the interlocutors; the challenge is to see how each is both retained and displaced. The key pedagogical move is to understand that &quot;placing thought inside matter&quot; does not mean explaining thought away — it means showing that matter is already more complex than any dualist framework can accommodate. Readers are encouraged to test this claim against their own philosophical commitments: where does transcendence reappear in frameworks that claim to have overcome it?

== [[Foundations of the Ontology of Emergent Complexity/References|🜂 References]] ==
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    <revision>
      <id>4671212</id>
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      <contributor>
        <username>DavidCota64</username>
        <id>3507033</id>
      </contributor>
      <comment>Clarify the material genealogy of trace, inscription, mark, and symbol</comment>
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      <text bytes="15828" sha1="lvf1ia5xly7txh6h0zn2emzyrbdc0m7" xml:space="preserve">== 1.1 – Refusal of Metaphysical Dualism ==
'''Introduction'''

A brain lesion can alter speech; an inscription on paper can preserve a relation after its writer has gone; a technical interface can change which distinctions become actionable. These changes occur in material supports, yet inherited vocabularies often assign meaning or intelligibility to a different ontological domain. The resistance that begins this chapter is therefore concrete: how can symbolic efficacy be real without adding an immaterial substance?

Metaphysical dualism — the belief in an ontological split between matter and thought, between the extended and the internal, between what is acted upon and what gives meaning — is not merely one doctrine among others in the history of philosophy. It is the foundational operation through which Western metaphysics secured its authority. Rather than describing reality, dualism organised an ontological hierarchy: between the visible and the invisible, the contingent and the necessary, the finite and the infinite. It did not simply distinguish levels of reality; it installed a logic of transcendence that positioned one pole as source and measure of the other, subordinating the sensible to the intelligible, the body to the soul, experience to reason. This is the logic refused here. The critique does not dismiss a list of theories as though they were interchangeable; it targets the operative gesture of separation through which one domain is made the source and measure of another. 

The refusal, in the framework here adopted, is therefore not a mere counter-argument. It is a shift of philosophical ground. In refusing the dualist gesture, the framework dislodges thought from its transcendent anchor and returns it to the immanent field of matter in transformation. This position does not deny the complexity of thought or of the symbolic; on the contrary, it affirms them by showing them as an effect of material complexification and not as an exterior principle. What is at stake is the possibility of an ontology that does not resort to an “outside” to explain intelligence, consciousness or meaning. 

'''The Dualist Architecture and its Stabilising Function'''

The target is not the whole history of Western philosophy, but a recurrent gesture within several of its lineages. Plato’s distinction between intelligible Forms and the sensible world, Augustine’s hierarchies of the eternal and the temporal and of soul and body, and Descartes’s distinction between ''res cogitans'' and ''res extensa'' are not equivalent doctrines. In the restricted comparison made here, they share an assignment of explanatory or normative priority to an order not exhausted by mutable material processes (Plato 1997; Augustine 1991; Descartes 1996).

Such an architecture can perform a symbolic stabilising function: it insulates the source or measure of intelligibility from the contingency of the material field. Kant complicates rather than simply repeats this gesture. The ''a priori'' conditions of possible experience do not constitute a second substance, and the noumenon marks a limit to cognition rather than another knowable world. Husserl’s reduction likewise does not posit a second substance, but relocates constitutive priority in transcendental subjectivity. Heidegger explicitly refuses to treat Being as another being; the question raised from the present framework is therefore narrower: whether disclosure can be explained while its material conditions remain unspecified (Kant [1781] 1998; Husserl 1931; Heidegger [1927] 1962).

Dualism is therefore treated here not merely as a logical error but as an ontological strategy. Its stabilising force lies in placing the source or measure of intelligibility beyond complete exposure to material contingency. The present framework refuses that priority because thought, meaning, and knowledge must be explained within the material processes that produce and reorganise symbolic relations. This refusal does not require describing the real as uniformly unstable: local organisations can persist, but no external foundation or final order guarantees them.

'''The Question of Residual Transcendence in Critiques of Dualism'''

Philosophies that reject classical substances may still leave open how their decisive operators are materially realised. Derrida’s ''différance'' destabilises the priority of presence; Lacan analyses the subject as constituted within the Symbolic rather than preceding it; Levinas gives ethical priority to an alterity that resists possession. These are substantial gains, not disguised repetitions of one doctrine (Derrida [1967] 1997; Lacan 1981; Levinas [1961] 1969).

The disagreement developed here is narrower. It asks whether the Derridean ''trace'', the Lacanian Symbolic, and Levinasian ethical exteriority have been sufficiently located in the material supports and relations through which they become operative. The claim is neither that these thinkers posit a second substance nor that their concepts are disguised repetitions of classical transcendence. It is that these concepts can be read as assigning explanatory or normative priority to relations whose material conditions remain unspecified.

The present argument retains the instability of meaning, the role of symbolic relations in subject formation, and the ethical problem raised by alterity, while rearticulating their conditions and effects within finite material relations. This does not make obligation a direct consequence of material exposure: normative force depends on explicit criteria for evaluating possible responses. This is a contested interpretation and should be assessed against the cited works, not treated as a neutral summary of them.

'''Thought as Modulation of Matter: Beyond Simondon'''
If there is no separate thinking substance, how are we to understand thought? The framework adopted here does not reduce thought to a cerebral epiphenomenon; it understands thought as a specific operation materially realised. In established human cases, thought is realised by a biossoma: a living biological body sensitive to material differences and capable of symbolic reorganisation. Thought should not, however, be attributed to every complex or recursively operating system. Complexity and recursion, separately or together, do not by themselves establish either thought or consciousness.

Gilbert Simondon’s theory of individuation is an important ally because it does not treat the individual as a given substance. Individuation proceeds within a metastable field charged with tensions; the pre-individual is “more than one”, not a warehouse of ready-made forms (Simondon 2005). The divergence is therefore not based on the mistaken claim that Simondon posits a reserve of completed possibilities. It concerns the distinct explanatory role assigned to the pre-individual as that from which individuation draws, even though it is neither a separate substance nor merely a temporal “before”. The position developed here begins instead from presently configured matter whose unrealised compatibilities permit new functional couplings. Novelty requires neither a completed form hidden in advance nor a shapeless background awaiting form.

Thought is therefore understood as a materially realised process: the production of difference through symbolic reorganisation. It is not a thing or a separate substance. Nor is it synonymous with operative excess. Operative excess designates the unrealised compatibilities of a system that exceed its present symbolic or structural form; it can make new symbolic reorganisations possible, but it is not itself thought. This account neither attributes thought to every complex system nor treats thought, or any isolated set of functional capacities, as a sufficient criterion of consciousness.

'''The Symbol as Material Representation, not Transcendent Reference'''
One consequential effect of this position is a redefinition of the symbol. In several metaphysical traditions, symbols — and, by extension, language — have been treated as media whose intelligibility depends on an immaterial idea, meaning, or essence. Some secularised accounts preserve a comparable architecture when mental or conceptual content is treated as ontologically prior to, and merely expressed by, its material vehicle. The present framework refuses that priority, not representation itself. A symbol is neither a window onto another world nor a carrier of immaterial content; it is a materially realised dimension of legibility and representation within an organised system.

Material or energetic differences can occur independently of symbolic organisation. When an organised system discriminates a configuration as new or previously unknown, that event of discrimination constitutes a trace. The trace is ephemeral: it is neither a persistent mark nor a symbol. In a singular inscription, the system recognises the difference manifested in the trace under a protocol and stabilises the corresponding material configuration. This single operation, simultaneously material and symbolic, co-constitutes the mark and the first corresponding symbol. The mark is the stabilised, passive material configuration, made addressable and retrievable under the protocol. The symbol is the co-constituted material dimension that makes the mark legible and represents it within the system. The order “trace → inscription → mark + symbol” is analytical and functional, not chronological.

Later occurrences of the same difference do not repeat the inscription. When the system recognises an occurrence as an instance of the available mark, that recognition constitutes an additional symbol. The system establishes relations only among symbols: recognition, comparison, relation, and reorganisation are operations of the organised system, not acts performed by the mark or symbol. Symbolic reorganisation materially recombines symbols and the relations among them; it neither repeats an inscription nor transforms a mark symbolically. If it produces a new material configuration that the system discriminates, that event constitutes a new trace, and a new singular inscription may co-constitute a new mark and its first corresponding symbol. Nothing in this account requires a realm of meanings beyond the material supports, protocols, and operations through which representation is realised.

'''Consequences and Programmatic Opening'''

To refuse metaphysical dualism is not, therefore, a denial of difference, but its radical relocation. Difference ceases to be a gap between two realms and becomes the signature of the internal modulation of a single, immanent field. The world is not flattened; on the contrary, it is recognised in its constitutive heterogeneity — a heterogeneity that is entirely immanent. The implications of this inaugural gesture are developed throughout the work: they reshape our understanding of knowledge, which ceases to be imagined as passive mirroring and becomes materially mediated, situated representation open to correction; of ethics, which begins from shared material vulnerability rather than transcendental law; and of politics, which concerns the composition of bodies and symbols in a field without ultimate foundation. In refusing dualism, the framework here adopted does not offer a new dogmatic system. On the contrary, it opens a field of interrogation and risk. To accept that there is no “beyond” to which to escape is to accept the tremendous responsibility of thinking and acting in a world that is itself the only source of meaning — a world inconsistent, trembling, yet radically sufficient. 

== Reading Colloquium ==
''This guide accompanies the argument; it does not replace it.''
=== 1. Placement of the Text within the Architecture of the Work ===
This is the inaugural text of the ''Foundations of the Ontology of Emergent Complexity''. It establishes the foundational gesture upon which the entire architecture depends: the refusal of metaphysical dualism. Without this refusal, the framework's subsequent moves — the dissolution of the two-worlds fiction (1.2), the material account of thought (1.3), the operative theory of the symbol (1.4), and the rejection of ground and teleology (1.5) — would remain trapped within the very structures they seek to displace. This section is not merely a preamble; it is the condition of possibility for the entire ontology.

=== 2. Philosophical Problem at Stake ===
The problem is structural: Western philosophy has been constituted through the repeated installation of a dualist architecture — matter/thought, body/soul, sensible/intelligible, finite/infinite — in which one pole is elevated to the status of ground, origin, or measure, and the other is subordinated as derivative, deficient, or apparent. The question this text confronts is not whether any particular dualism is correct or incorrect, but whether the dualist gesture itself — the operation of splitting being into two domains — can be refused without simply inverting the hierarchy. Can thought be placed inside matter without reducing it to mechanism? Can transcendence be refused without collapsing into a flat materialism that cannot account for the complexity of the symbolic?

=== 3. Core Thesis and Conceptual Reorganisation ===
The thesis is that dualism is not a descriptive error but an ontological strategy — a symbolic operation designed to secure the authority of philosophy by immunising intelligibility against the instability of the material field. The argument refuses this strategy by relocating thought, the symbol, and ethical responsibility within the immanent field of matter. This is not a reduction but a complexification: matter is not the inert substrate that dualism describes, but an unstable field capable of producing, at specific thresholds of complexity, the very operations (thought, inscription, self-reference) that dualism attributed to a separate domain.

=== 4. Key Concepts and Their Articulation ===
The key concepts introduced here include the refusal of transcendence as a constitutive gesture (not a conclusion but a point of departure), the biossoma as the living material body capable of symbolic reorganisation that replaces the mind/body split, operative excess as the affirmative causal condition in which available compatibilities exceed the system’s present symbolic or structural form and force reorganisation, and thought as modulation of matter rather than as the activity of a separate substance. The section also performs critical engagements with Derrida (différance as residual transcendence), Lacan (the Symbolic order as pre-material structure), Levinas (ethical alterity as infinite transcendence), and Simondon (pre-individual metastability as an ontological antecedent), retaining their insights while refusing the transcendent residues in each.

=== 5. Implications for Readers and Pedagogical Pathways ===
Readers should attend to the precision of the refusal: it is not anti-rationalist, not irrationalist, and not a simple materialism that denies the reality of thought. It is a relocation. Students familiar with continental philosophy will recognise the interlocutors; the challenge is to see how each is both retained and displaced. The key pedagogical move is to understand that &quot;placing thought inside matter&quot; does not mean explaining thought away — it means showing that matter is already more complex than any dualist framework can accommodate. Readers are encouraged to test this claim against their own philosophical commitments: where does transcendence reappear in frameworks that claim to have overcome it?

== [[Foundations of the Ontology of Emergent Complexity/References|🜂 References]] ==
{{BookCat}}</text>
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    </revision>
    <revision>
      <id>4671213</id>
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      <timestamp>2026-09-19T22:22:47Z</timestamp>
      <contributor>
        <username>DavidCota64</username>
        <id>3507033</id>
      </contributor>
      <comment>Clarify the consequences of immanence for difference, meaning, and normativity</comment>
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      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="16353" sha1="pflfadiewcexc03lo2ot821kbu762rl" xml:space="preserve">== 1.1 – Refusal of Metaphysical Dualism ==
'''Introduction'''

A brain lesion can alter speech; an inscription on paper can preserve a relation after its writer has gone; a technical interface can change which distinctions become actionable. These changes occur in material supports, yet inherited vocabularies often assign meaning or intelligibility to a different ontological domain. The resistance that begins this chapter is therefore concrete: how can symbolic efficacy be real without adding an immaterial substance?

Metaphysical dualism — the belief in an ontological split between matter and thought, between the extended and the internal, between what is acted upon and what gives meaning — is not merely one doctrine among others in the history of philosophy. It is the foundational operation through which Western metaphysics secured its authority. Rather than describing reality, dualism organised an ontological hierarchy: between the visible and the invisible, the contingent and the necessary, the finite and the infinite. It did not simply distinguish levels of reality; it installed a logic of transcendence that positioned one pole as source and measure of the other, subordinating the sensible to the intelligible, the body to the soul, experience to reason. This is the logic refused here. The critique does not dismiss a list of theories as though they were interchangeable; it targets the operative gesture of separation through which one domain is made the source and measure of another. 

The refusal, in the framework here adopted, is therefore not a mere counter-argument. It is a shift of philosophical ground. In refusing the dualist gesture, the framework dislodges thought from its transcendent anchor and returns it to the immanent field of matter in transformation. This position does not deny the complexity of thought or of the symbolic; on the contrary, it affirms them by showing them as an effect of material complexification and not as an exterior principle. What is at stake is the possibility of an ontology that does not resort to an “outside” to explain intelligence, consciousness or meaning. 

'''The Dualist Architecture and its Stabilising Function'''

The target is not the whole history of Western philosophy, but a recurrent gesture within several of its lineages. Plato’s distinction between intelligible Forms and the sensible world, Augustine’s hierarchies of the eternal and the temporal and of soul and body, and Descartes’s distinction between ''res cogitans'' and ''res extensa'' are not equivalent doctrines. In the restricted comparison made here, they share an assignment of explanatory or normative priority to an order not exhausted by mutable material processes (Plato 1997; Augustine 1991; Descartes 1996).

Such an architecture can perform a symbolic stabilising function: it insulates the source or measure of intelligibility from the contingency of the material field. Kant complicates rather than simply repeats this gesture. The ''a priori'' conditions of possible experience do not constitute a second substance, and the noumenon marks a limit to cognition rather than another knowable world. Husserl’s reduction likewise does not posit a second substance, but relocates constitutive priority in transcendental subjectivity. Heidegger explicitly refuses to treat Being as another being; the question raised from the present framework is therefore narrower: whether disclosure can be explained while its material conditions remain unspecified (Kant [1781] 1998; Husserl 1931; Heidegger [1927] 1962).

Dualism is therefore treated here not merely as a logical error but as an ontological strategy. Its stabilising force lies in placing the source or measure of intelligibility beyond complete exposure to material contingency. The present framework refuses that priority because thought, meaning, and knowledge must be explained within the material processes that produce and reorganise symbolic relations. This refusal does not require describing the real as uniformly unstable: local organisations can persist, but no external foundation or final order guarantees them.

'''The Question of Residual Transcendence in Critiques of Dualism'''

Philosophies that reject classical substances may still leave open how their decisive operators are materially realised. Derrida’s ''différance'' destabilises the priority of presence; Lacan analyses the subject as constituted within the Symbolic rather than preceding it; Levinas gives ethical priority to an alterity that resists possession. These are substantial gains, not disguised repetitions of one doctrine (Derrida [1967] 1997; Lacan 1981; Levinas [1961] 1969).

The disagreement developed here is narrower. It asks whether the Derridean ''trace'', the Lacanian Symbolic, and Levinasian ethical exteriority have been sufficiently located in the material supports and relations through which they become operative. The claim is neither that these thinkers posit a second substance nor that their concepts are disguised repetitions of classical transcendence. It is that these concepts can be read as assigning explanatory or normative priority to relations whose material conditions remain unspecified.

The present argument retains the instability of meaning, the role of symbolic relations in subject formation, and the ethical problem raised by alterity, while rearticulating their conditions and effects within finite material relations. This does not make obligation a direct consequence of material exposure: normative force depends on explicit criteria for evaluating possible responses. This is a contested interpretation and should be assessed against the cited works, not treated as a neutral summary of them.

'''Thought as Modulation of Matter: Beyond Simondon'''
If there is no separate thinking substance, how are we to understand thought? The framework adopted here does not reduce thought to a cerebral epiphenomenon; it understands thought as a specific operation materially realised. In established human cases, thought is realised by a biossoma: a living biological body sensitive to material differences and capable of symbolic reorganisation. Thought should not, however, be attributed to every complex or recursively operating system. Complexity and recursion, separately or together, do not by themselves establish either thought or consciousness.

Gilbert Simondon’s theory of individuation is an important ally because it does not treat the individual as a given substance. Individuation proceeds within a metastable field charged with tensions; the pre-individual is “more than one”, not a warehouse of ready-made forms (Simondon 2005). The divergence is therefore not based on the mistaken claim that Simondon posits a reserve of completed possibilities. It concerns the distinct explanatory role assigned to the pre-individual as that from which individuation draws, even though it is neither a separate substance nor merely a temporal “before”. The position developed here begins instead from presently configured matter whose unrealised compatibilities permit new functional couplings. Novelty requires neither a completed form hidden in advance nor a shapeless background awaiting form.

Thought is therefore understood as a materially realised process: the production of difference through symbolic reorganisation. It is not a thing or a separate substance. Nor is it synonymous with operative excess. Operative excess designates the unrealised compatibilities of a system that exceed its present symbolic or structural form; it can make new symbolic reorganisations possible, but it is not itself thought. This account neither attributes thought to every complex system nor treats thought, or any isolated set of functional capacities, as a sufficient criterion of consciousness.

'''The Symbol as Material Representation, not Transcendent Reference'''
One consequential effect of this position is a redefinition of the symbol. In several metaphysical traditions, symbols — and, by extension, language — have been treated as media whose intelligibility depends on an immaterial idea, meaning, or essence. Some secularised accounts preserve a comparable architecture when mental or conceptual content is treated as ontologically prior to, and merely expressed by, its material vehicle. The present framework refuses that priority, not representation itself. A symbol is neither a window onto another world nor a carrier of immaterial content; it is a materially realised dimension of legibility and representation within an organised system.

Material or energetic differences can occur independently of symbolic organisation. When an organised system discriminates a configuration as new or previously unknown, that event of discrimination constitutes a trace. The trace is ephemeral: it is neither a persistent mark nor a symbol. In a singular inscription, the system recognises the difference manifested in the trace under a protocol and stabilises the corresponding material configuration. This single operation, simultaneously material and symbolic, co-constitutes the mark and the first corresponding symbol. The mark is the stabilised, passive material configuration, made addressable and retrievable under the protocol. The symbol is the co-constituted material dimension that makes the mark legible and represents it within the system. The order “trace → inscription → mark + symbol” is analytical and functional, not chronological.

Later occurrences of the same difference do not repeat the inscription. When the system recognises an occurrence as an instance of the available mark, that recognition constitutes an additional symbol. The system establishes relations only among symbols: recognition, comparison, relation, and reorganisation are operations of the organised system, not acts performed by the mark or symbol. Symbolic reorganisation materially recombines symbols and the relations among them; it neither repeats an inscription nor transforms a mark symbolically. If it produces a new material configuration that the system discriminates, that event constitutes a new trace, and a new singular inscription may co-constitute a new mark and its first corresponding symbol. Nothing in this account requires a realm of meanings beyond the material supports, protocols, and operations through which representation is realised.

'''Consequences of Immanence'''
Refusing metaphysical dualism does not eliminate difference. It removes the need to explain difference by dividing reality into material and immaterial realms. Differences arise and operate within heterogeneous material organisations, relations, and scales. Immanence entails neither uniformity nor universal instability: local organisations can acquire distinct properties, persist for different periods, and enter asymmetrical relations without ceasing to be material.

This shift also affects knowledge, ethics, and politics. Knowledge is understood as materially realised symbolic organisation: situated, mediated, and open to correction. Ethics begins from shared material vulnerability rather than transcendental law, while requiring explicit and revisable criteria for evaluating possible responses. Politics concerns the material and symbolic organisation of collective relations and the effects of that organisation on the possibilities of action. None of these domains requires an ultimate foundation outside material relations.

An immanent account does not replace dualism with a closed doctrine. Its concepts remain exposed to evidence, counterargument, and revision because no external guarantee secures their finality. Meaning is neither a ready-made property of the world nor a content received from beyond it; it is produced through materially realised symbolic operations. Without transcendent guarantees, responsible thought and action require their supports, criteria, and consequences to remain open to examination and correction. The absence of an exterior does not make the world uniform, stable, or complete; it means that no second world is required to account for the differences, meanings, and norms produced within this one.

== Reading Colloquium ==
''This guide accompanies the argument; it does not replace it.''
=== 1. Placement of the Text within the Architecture of the Work ===
This is the inaugural text of the ''Foundations of the Ontology of Emergent Complexity''. It establishes the foundational gesture upon which the entire architecture depends: the refusal of metaphysical dualism. Without this refusal, the framework's subsequent moves — the dissolution of the two-worlds fiction (1.2), the material account of thought (1.3), the operative theory of the symbol (1.4), and the rejection of ground and teleology (1.5) — would remain trapped within the very structures they seek to displace. This section is not merely a preamble; it is the condition of possibility for the entire ontology.

=== 2. Philosophical Problem at Stake ===
The problem is structural: Western philosophy has been constituted through the repeated installation of a dualist architecture — matter/thought, body/soul, sensible/intelligible, finite/infinite — in which one pole is elevated to the status of ground, origin, or measure, and the other is subordinated as derivative, deficient, or apparent. The question this text confronts is not whether any particular dualism is correct or incorrect, but whether the dualist gesture itself — the operation of splitting being into two domains — can be refused without simply inverting the hierarchy. Can thought be placed inside matter without reducing it to mechanism? Can transcendence be refused without collapsing into a flat materialism that cannot account for the complexity of the symbolic?

=== 3. Core Thesis and Conceptual Reorganisation ===
The thesis is that dualism is not a descriptive error but an ontological strategy — a symbolic operation designed to secure the authority of philosophy by immunising intelligibility against the instability of the material field. The argument refuses this strategy by relocating thought, the symbol, and ethical responsibility within the immanent field of matter. This is not a reduction but a complexification: matter is not the inert substrate that dualism describes, but an unstable field capable of producing, at specific thresholds of complexity, the very operations (thought, inscription, self-reference) that dualism attributed to a separate domain.

=== 4. Key Concepts and Their Articulation ===
The key concepts introduced here include the refusal of transcendence as a constitutive gesture (not a conclusion but a point of departure), the biossoma as the living material body capable of symbolic reorganisation that replaces the mind/body split, operative excess as the affirmative causal condition in which available compatibilities exceed the system’s present symbolic or structural form and force reorganisation, and thought as modulation of matter rather than as the activity of a separate substance. The section also performs critical engagements with Derrida (différance as residual transcendence), Lacan (the Symbolic order as pre-material structure), Levinas (ethical alterity as infinite transcendence), and Simondon (pre-individual metastability as an ontological antecedent), retaining their insights while refusing the transcendent residues in each.

=== 5. Implications for Readers and Pedagogical Pathways ===
Readers should attend to the precision of the refusal: it is not anti-rationalist, not irrationalist, and not a simple materialism that denies the reality of thought. It is a relocation. Students familiar with continental philosophy will recognise the interlocutors; the challenge is to see how each is both retained and displaced. The key pedagogical move is to understand that &quot;placing thought inside matter&quot; does not mean explaining thought away — it means showing that matter is already more complex than any dualist framework can accommodate. Readers are encouraged to test this claim against their own philosophical commitments: where does transcendence reappear in frameworks that claim to have overcome it?

== [[Foundations of the Ontology of Emergent Complexity/References|🜂 References]] ==
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      <comment>Rebuild the Reading Colloquium to match the revised conceptual distinctions</comment>
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      <text bytes="18085" sha1="0l6p8dipv4iuos2xdpnmz8dg0prq484" xml:space="preserve">== 1.1 – Refusal of Metaphysical Dualism ==
'''Introduction'''

A brain lesion can alter speech; an inscription on paper can preserve a relation after its writer has gone; a technical interface can change which distinctions become actionable. These changes occur in material supports, yet inherited vocabularies often assign meaning or intelligibility to a different ontological domain. The resistance that begins this chapter is therefore concrete: how can symbolic efficacy be real without adding an immaterial substance?

Metaphysical dualism — the belief in an ontological split between matter and thought, between the extended and the internal, between what is acted upon and what gives meaning — is not merely one doctrine among others in the history of philosophy. It is the foundational operation through which Western metaphysics secured its authority. Rather than describing reality, dualism organised an ontological hierarchy: between the visible and the invisible, the contingent and the necessary, the finite and the infinite. It did not simply distinguish levels of reality; it installed a logic of transcendence that positioned one pole as source and measure of the other, subordinating the sensible to the intelligible, the body to the soul, experience to reason. This is the logic refused here. The critique does not dismiss a list of theories as though they were interchangeable; it targets the operative gesture of separation through which one domain is made the source and measure of another. 

The refusal, in the framework here adopted, is therefore not a mere counter-argument. It is a shift of philosophical ground. In refusing the dualist gesture, the framework dislodges thought from its transcendent anchor and returns it to the immanent field of matter in transformation. This position does not deny the complexity of thought or of the symbolic; on the contrary, it affirms them by showing them as an effect of material complexification and not as an exterior principle. What is at stake is the possibility of an ontology that does not resort to an “outside” to explain intelligence, consciousness or meaning. 

'''The Dualist Architecture and its Stabilising Function'''

The target is not the whole history of Western philosophy, but a recurrent gesture within several of its lineages. Plato’s distinction between intelligible Forms and the sensible world, Augustine’s hierarchies of the eternal and the temporal and of soul and body, and Descartes’s distinction between ''res cogitans'' and ''res extensa'' are not equivalent doctrines. In the restricted comparison made here, they share an assignment of explanatory or normative priority to an order not exhausted by mutable material processes (Plato 1997; Augustine 1991; Descartes 1996).

Such an architecture can perform a symbolic stabilising function: it insulates the source or measure of intelligibility from the contingency of the material field. Kant complicates rather than simply repeats this gesture. The ''a priori'' conditions of possible experience do not constitute a second substance, and the noumenon marks a limit to cognition rather than another knowable world. Husserl’s reduction likewise does not posit a second substance, but relocates constitutive priority in transcendental subjectivity. Heidegger explicitly refuses to treat Being as another being; the question raised from the present framework is therefore narrower: whether disclosure can be explained while its material conditions remain unspecified (Kant [1781] 1998; Husserl 1931; Heidegger [1927] 1962).

Dualism is therefore treated here not merely as a logical error but as an ontological strategy. Its stabilising force lies in placing the source or measure of intelligibility beyond complete exposure to material contingency. The present framework refuses that priority because thought, meaning, and knowledge must be explained within the material processes that produce and reorganise symbolic relations. This refusal does not require describing the real as uniformly unstable: local organisations can persist, but no external foundation or final order guarantees them.

'''The Question of Residual Transcendence in Critiques of Dualism'''

Philosophies that reject classical substances may still leave open how their decisive operators are materially realised. Derrida’s ''différance'' destabilises the priority of presence; Lacan analyses the subject as constituted within the Symbolic rather than preceding it; Levinas gives ethical priority to an alterity that resists possession. These are substantial gains, not disguised repetitions of one doctrine (Derrida [1967] 1997; Lacan 1981; Levinas [1961] 1969).

The disagreement developed here is narrower. It asks whether the Derridean ''trace'', the Lacanian Symbolic, and Levinasian ethical exteriority have been sufficiently located in the material supports and relations through which they become operative. The claim is neither that these thinkers posit a second substance nor that their concepts are disguised repetitions of classical transcendence. It is that these concepts can be read as assigning explanatory or normative priority to relations whose material conditions remain unspecified.

The present argument retains the instability of meaning, the role of symbolic relations in subject formation, and the ethical problem raised by alterity, while rearticulating their conditions and effects within finite material relations. This does not make obligation a direct consequence of material exposure: normative force depends on explicit criteria for evaluating possible responses. This is a contested interpretation and should be assessed against the cited works, not treated as a neutral summary of them.

'''Thought as Modulation of Matter: Beyond Simondon'''
If there is no separate thinking substance, how are we to understand thought? The framework adopted here does not reduce thought to a cerebral epiphenomenon; it understands thought as a specific operation materially realised. In established human cases, thought is realised by a biossoma: a living biological body sensitive to material differences and capable of symbolic reorganisation. Thought should not, however, be attributed to every complex or recursively operating system. Complexity and recursion, separately or together, do not by themselves establish either thought or consciousness.

Gilbert Simondon’s theory of individuation is an important ally because it does not treat the individual as a given substance. Individuation proceeds within a metastable field charged with tensions; the pre-individual is “more than one”, not a warehouse of ready-made forms (Simondon 2005). The divergence is therefore not based on the mistaken claim that Simondon posits a reserve of completed possibilities. It concerns the distinct explanatory role assigned to the pre-individual as that from which individuation draws, even though it is neither a separate substance nor merely a temporal “before”. The position developed here begins instead from presently configured matter whose unrealised compatibilities permit new functional couplings. Novelty requires neither a completed form hidden in advance nor a shapeless background awaiting form.

Thought is therefore understood as a materially realised process: the production of difference through symbolic reorganisation. It is not a thing or a separate substance. Nor is it synonymous with operative excess. Operative excess designates the unrealised compatibilities of a system that exceed its present symbolic or structural form; it can make new symbolic reorganisations possible, but it is not itself thought. This account neither attributes thought to every complex system nor treats thought, or any isolated set of functional capacities, as a sufficient criterion of consciousness.

'''The Symbol as Material Representation, not Transcendent Reference'''
One consequential effect of this position is a redefinition of the symbol. In several metaphysical traditions, symbols — and, by extension, language — have been treated as media whose intelligibility depends on an immaterial idea, meaning, or essence. Some secularised accounts preserve a comparable architecture when mental or conceptual content is treated as ontologically prior to, and merely expressed by, its material vehicle. The present framework refuses that priority, not representation itself. A symbol is neither a window onto another world nor a carrier of immaterial content; it is a materially realised dimension of legibility and representation within an organised system.

Material or energetic differences can occur independently of symbolic organisation. When an organised system discriminates a configuration as new or previously unknown, that event of discrimination constitutes a trace. The trace is ephemeral: it is neither a persistent mark nor a symbol. In a singular inscription, the system recognises the difference manifested in the trace under a protocol and stabilises the corresponding material configuration. This single operation, simultaneously material and symbolic, co-constitutes the mark and the first corresponding symbol. The mark is the stabilised, passive material configuration, made addressable and retrievable under the protocol. The symbol is the co-constituted material dimension that makes the mark legible and represents it within the system. The order “trace → inscription → mark + symbol” is analytical and functional, not chronological.

Later occurrences of the same difference do not repeat the inscription. When the system recognises an occurrence as an instance of the available mark, that recognition constitutes an additional symbol. The system establishes relations only among symbols: recognition, comparison, relation, and reorganisation are operations of the organised system, not acts performed by the mark or symbol. Symbolic reorganisation materially recombines symbols and the relations among them; it neither repeats an inscription nor transforms a mark symbolically. If it produces a new material configuration that the system discriminates, that event constitutes a new trace, and a new singular inscription may co-constitute a new mark and its first corresponding symbol. Nothing in this account requires a realm of meanings beyond the material supports, protocols, and operations through which representation is realised.

'''Consequences of Immanence'''
Refusing metaphysical dualism does not eliminate difference. It removes the need to explain difference by dividing reality into material and immaterial realms. Differences arise and operate within heterogeneous material organisations, relations, and scales. Immanence entails neither uniformity nor universal instability: local organisations can acquire distinct properties, persist for different periods, and enter asymmetrical relations without ceasing to be material.

This shift also affects knowledge, ethics, and politics. Knowledge is understood as materially realised symbolic organisation: situated, mediated, and open to correction. Ethics begins from shared material vulnerability rather than transcendental law, while requiring explicit and revisable criteria for evaluating possible responses. Politics concerns the material and symbolic organisation of collective relations and the effects of that organisation on the possibilities of action. None of these domains requires an ultimate foundation outside material relations.

An immanent account does not replace dualism with a closed doctrine. Its concepts remain exposed to evidence, counterargument, and revision because no external guarantee secures their finality. Meaning is neither a ready-made property of the world nor a content received from beyond it; it is produced through materially realised symbolic operations. Without transcendent guarantees, responsible thought and action require their supports, criteria, and consequences to remain open to examination and correction. The absence of an exterior does not make the world uniform, stable, or complete; it means that no second world is required to account for the differences, meanings, and norms produced within this one.

== Reading Colloquium ==

''This guide accompanies the argument; it does not replace it.''

=== 1. Placement of the Text within the Architecture of the Work ===

This text introduces the first philosophical commitment of the ''Foundations of the Ontology of Emergent Complexity'': explanations of thought, meaning, and knowledge should not assign explanatory or normative priority to a domain outside material processes. This commitment is not a transcendent foundation or a condition of possibility exempt from examination. It is a constraint on the explanations developed in the book, and its adequacy depends on the work those explanations perform.

The following sections test its consequences through the critique of two-world architectures (1.2), the material account of thought (1.3), the analysis of the symbol (1.4), and the rejection of external ground and teleology (1.5). The present section therefore establishes a revisable point of departure, not an ultimate foundation for the ontology.

=== 2. Philosophical Problem at Stake ===

Several influential lineages of Western philosophy have organised intelligibility through distinctions such as matter and thought, body and soul, or sensible and intelligible. These lineages do not form a single doctrine and do not exhaust Western philosophy. The structural problem arises when one pole is assigned explanatory or normative priority as the source, ground, or measure of the other.

The question is therefore more precise than whether every distinction is dualistic. Can explanatory priority be withdrawn from an order placed beyond material processes without merely reversing the hierarchy? Can thought be explained as materially realised without reducing it to simple mechanism? Can the refusal of transcendence preserve genuine differences among material organisations, relations, and scales?

=== 3. Core Thesis and Conceptual Reorganisation ===

The core thesis is that a dualistic architecture can perform a stabilising function by placing the source or measure of intelligibility beyond complete exposure to material contingency. This does not mean that every dualist doctrine was deliberately designed to secure philosophical authority, or that the relevant philosophers all make the same claim. It identifies a recurrent explanatory effect, not a common intention.

The argument instead requires thought, symbols, knowledge, and ethical responsibility to be accounted for through finite material organisations and relations. Materiality is neither inert nor uniform: different organisations can acquire different properties and capacities. This claim does not entail that complexity or recursion, separately or together, is sufficient to establish thought or consciousness.

=== 4. Key Concepts and Their Articulation ===

The refusal of transcendence prohibits appeals to an exterior order as the source or final measure of material processes. In established human cases, thought is realised by a biossoma: a living biological body capable of symbolic reorganisation. The term does not replace the mind/body distinction by naming another substance, nor does it attribute thought to every complex biological or technical system.

Operative excess names the compatibilities available to a system that exceed its present symbolic or structural form. It is not restricted to the symbolic domain and is not synonymous with thought. Thought is understood more specifically as the production of difference through symbolic reorganisation.

The account of the symbol follows a distinct functional order: the discrimination of a new material configuration constitutes a trace; singular inscription recognises that difference under a protocol and co-constitutes a passive mark and its first symbol; subsequent recognised occurrences constitute additional symbols. The system establishes relations among symbols and may reorganise those relations. Marks and inscriptions are not themselves symbolically reorganised.

The engagements with Derrida, Lacan, and Levinas should not be read as assertions that ''différance'', the Symbolic, or ethical alterity simply reproduces classical transcendence. The narrower and explicitly contested question is whether the material supports and relations through which those concepts become operative have been sufficiently specified. Simondon is retained as an ally in the processual account of individuation and metastability. The divergence concerns the distinct explanatory role assigned to the pre-individual, not the caricature of a warehouse containing completed forms.

=== 5. Implications for Readers and Pedagogical Pathways ===

The refusal of dualism is neither anti-rationalist nor a denial of thought. It also does not relocate an already existing immaterial mind inside matter. It reconstructs thought as a materially realised symbolic process while preserving the differences among kinds and scales of material organisation.

Readers should therefore avoid three shortcuts. Material complexity should not automatically be classified as thought or consciousness. Symbolic organisation should not be projected onto matter in general. An insufficiently specified material explanation should not automatically be declared transcendent; it should first be treated as an explanatory question requiring investigation.

A useful reading test is to ask: what material support, relation, protocol, or operation makes the concept effective? Does the account grant explanatory priority to something placed beyond those relations? Does it preserve the difference between material reorganisation in general and the exceptional regimes in which symbolic operations become possible? These questions test the argument without deciding its outcome in advance.

== [[Foundations of the Ontology of Emergent Complexity/References|🜂 References]] ==
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      <text bytes="18347" sha1="856xsjb1sr0cvm3iven2digl02ve26l" xml:space="preserve">== 1.1 – Refusal of Metaphysical Dualism ==
=== Introduction ===

A brain lesion can alter speech; an inscription on paper can preserve a relation after its writer has gone; a technical interface can change which distinctions become actionable. These changes occur through material supports, yet some inherited vocabularies assign the source or measure of meaning and intelligibility to an order not exhausted by material processes. The question that begins this chapter is therefore concrete: how can symbolic efficacy be real without adding an immaterial substance or an exterior principle?

The target is not every distinction, every form of dualism, or the whole history of Western philosophy. It is a recurrent explanatory gesture within several philosophical lineages: one domain is granted priority as the source, ground, or measure of another. Where intelligibility, value, or meaning is secured in this way, material contingency is treated as derivative, deficient, or incapable of accounting for its own symbolic effects. The doctrines examined below are not interchangeable; the comparison concerns this restricted operation and the stabilising function it can perform.

The refusal developed here does not move an already existing immaterial mind into matter. It requires thought, meaning, and knowledge to be explained through finite material organisations and relations. This does not reduce symbolic processes to simple mechanism, nor does it make complexity or recursion sufficient for thought or consciousness. It asks how materially organised systems can produce and reorganise symbolic relations without appeal to a second ontological domain.

=== The Dualist Architecture and its Stabilising Function ===

The target is not the whole history of Western philosophy, but a recurrent gesture within several of its lineages. Plato’s distinction between intelligible Forms and the sensible world, Augustine’s hierarchies of the eternal and the temporal and of soul and body, and Descartes’s distinction between ''res cogitans'' and ''res extensa'' are not equivalent doctrines. In the restricted comparison made here, they share an assignment of explanatory or normative priority to an order not exhausted by mutable material processes (Plato 1997; Augustine 1991; Descartes 1996).

Such an architecture can perform a symbolic stabilising function: it insulates the source or measure of intelligibility from the contingency of the material field. Kant complicates rather than simply repeats this gesture. The ''a priori'' conditions of possible experience do not constitute a second substance, and the noumenon marks a limit to cognition rather than another knowable world. Husserl’s reduction likewise does not posit a second substance, but relocates constitutive priority in transcendental subjectivity. Heidegger explicitly refuses to treat Being as another being; the question raised from the present framework is therefore narrower: whether disclosure can be explained while its material conditions remain unspecified (Kant [1781] 1998; Husserl 1931; Heidegger [1927] 1962).

Dualism is therefore treated here not merely as a logical error but as an ontological strategy. Its stabilising force lies in placing the source or measure of intelligibility beyond complete exposure to material contingency. The present framework refuses that priority because thought, meaning, and knowledge must be explained within the material processes that produce and reorganise symbolic relations. This refusal does not require describing the real as uniformly unstable: local organisations can persist, but no external foundation or final order guarantees them.

=== The Material Realisation of Concepts that Critique Dualism ===

Philosophies that reject classical substances may still leave open how their decisive operators are materially realised. Derrida’s ''différance'' destabilises the priority of presence; Lacan analyses the subject as constituted within the Symbolic rather than preceding it; Levinas gives ethical priority to an alterity that resists possession. These are substantial gains, not disguised repetitions of one doctrine (Derrida [1967] 1997; Lacan 1981; Levinas [1961] 1969).

The disagreement developed here is narrower. It asks whether the Derridean ''trace'', the Lacanian Symbolic, and Levinasian ethical exteriority have been sufficiently located in the material supports and relations through which they become operative. The claim is neither that these thinkers posit a second substance nor that their concepts are disguised repetitions of classical transcendence. It is that, within the present framework, an account remains incomplete wherever the material conditions through which these concepts operate remain unspecified.

The present argument retains the instability of meaning, the role of symbolic relations in subject formation, and the ethical problem raised by alterity, while rearticulating their conditions and effects within finite material relations. This does not make obligation a direct consequence of material exposure: normative force depends on explicit criteria for evaluating possible responses. This is a contested interpretation and should be assessed against the cited works, not treated as a neutral summary of them.

=== Thought as a Materially Realised Process: Dialogue with Simondon ===
If there is no separate thinking substance, how are we to understand thought? The framework adopted here does not reduce thought to a cerebral epiphenomenon; it understands thought as a specific operation materially realised. In established human cases, thought is realised by a biossoma: a living biological body sensitive to material differences and capable of symbolic reorganisation. Thought should not, however, be attributed to every complex or recursively operating system. Complexity and recursion, separately or together, do not by themselves establish either thought or consciousness.

Gilbert Simondon’s theory of individuation is an important ally because it does not treat the individual as a given substance. Individuation proceeds within a metastable field charged with tensions; the pre-individual is “more than one”, not a warehouse of ready-made forms (Simondon 2005). The divergence is therefore not based on the mistaken claim that Simondon posits a reserve of completed possibilities. It concerns the distinct explanatory role assigned to the pre-individual as that from which individuation draws, even though it is neither a separate substance nor merely a temporal “before”. The position developed here begins instead from presently configured matter whose unrealised compatibilities permit new functional couplings. Novelty requires neither a completed form hidden in advance nor a shapeless background awaiting form.

Thought is therefore understood as a materially realised process: the production of difference through symbolic reorganisation. It is not a thing or a separate substance. Nor is it synonymous with operative excess. Operative excess designates the situation in which the compatibilities available to a system exceed its present symbolic or structural form, render it insufficient, and force reorganisation. In a symbolically organised system, that reorganisation can be symbolic; operative excess is its causal condition, not thought itself. This account neither attributes thought to every complex system nor treats thought, or any isolated set of functional capacities, as a sufficient criterion of consciousness.

=== The Symbol as Material Representation, not Transcendent Reference ===
One consequential effect of this position is a redefinition of the symbol. In several metaphysical traditions, symbols — and, by extension, language — have been treated as media whose intelligibility depends on an immaterial idea, meaning, or essence. Some secularised accounts preserve a comparable architecture when mental or conceptual content is treated as ontologically prior to, and merely expressed by, its material vehicle. The present framework refuses that priority, not representation itself. A symbol is neither a window onto another world nor a carrier of immaterial content; it is a materially realised dimension of legibility and representation within an organised system.

Material or energetic differences can occur independently of symbolic organisation. When an organised system discriminates a configuration as new or previously unknown, that event of discrimination constitutes a trace. The trace is ephemeral: it is neither a persistent mark nor a symbol. In a singular inscription, the system recognises the difference manifested in the trace under a protocol and stabilises the corresponding material configuration. This single operation, simultaneously material and symbolic, co-constitutes the mark and the first corresponding symbol. The mark is the stabilised, passive material configuration, made addressable and retrievable under the protocol. The symbol is the co-constituted material dimension that makes the mark legible and represents it within the system. The order “trace → inscription → mark + symbol” is analytical and functional, not chronological.

Later occurrences of the same difference do not repeat the inscription. When the system recognises an occurrence as an instance of the available mark, that recognition constitutes an additional symbol. The system establishes relations only among symbols: recognition, comparison, relation, and reorganisation are operations of the organised system, not acts performed by the mark or symbol. Symbolic reorganisation materially recombines symbols and the relations among them; it neither repeats an inscription nor transforms a mark symbolically. If it produces a new material configuration that the system discriminates, that event constitutes a new trace, and a new singular inscription may co-constitute a new mark and its first corresponding symbol. Nothing in this account requires a realm of meanings beyond the material supports, protocols, and operations through which representation is realised.

=== Consequences of Immanence ===
Refusing metaphysical dualism does not eliminate difference. It removes the need to explain difference by dividing reality into material and immaterial realms. Differences arise and operate within heterogeneous material organisations, relations, and scales. Immanence entails neither uniformity nor universal instability: local organisations can acquire distinct properties, persist for different periods, and enter asymmetrical relations without ceasing to be material.

This shift also affects knowledge, ethics, and politics. Knowledge is understood as materially realised symbolic organisation: situated, mediated, and open to correction. Ethics begins from shared material vulnerability rather than transcendental law, while requiring explicit and revisable criteria for evaluating possible responses. Politics concerns the material and symbolic organisation of collective relations and the effects of that organisation on the possibilities of action. None of these domains requires an ultimate foundation outside material relations.

An immanent account does not replace dualism with a closed doctrine. Its concepts remain exposed to evidence, counterargument, and revision because no external guarantee secures their finality. Meaning is neither a ready-made property of the world nor a content received from beyond it; it is produced through materially realised symbolic operations. Without transcendent guarantees, responsible thought and action require their supports, criteria, and consequences to remain open to examination and correction. The absence of an exterior does not make the world uniform, stable, or complete; it means that no second world is required to account for the differences, meanings, and norms produced within this one.

== Reading Colloquium ==

''This guide accompanies the argument; it does not replace it.''

=== 1. Placement of the Text within the Architecture of the Work ===

This text introduces the first philosophical commitment of the ''Foundations of the Ontology of Emergent Complexity'': explanations of thought, meaning, and knowledge should not assign explanatory or normative priority to a domain outside material processes. This commitment is not a transcendent foundation or a condition of possibility exempt from examination. It is a constraint on the explanations developed in the book, and its adequacy depends on the work those explanations perform.

The following sections test its consequences through the [[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/Against the Invention of Two Worlds|critique of two-world architectures (1.2)]], the [[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/Matter Thinks — But Not Like a Subject|material account of thought (1.3)]], the [[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/The Symbol Is Not Transcendent|analysis of the symbol (1.4)]], and the [[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/No Ground, No Soul, No Plan|rejection of external ground and teleology (1.5)]]. The present section therefore establishes a revisable point of departure, not an ultimate foundation for the ontology.

=== 2. Philosophical Problem at Stake ===

Several influential lineages of Western philosophy have organised intelligibility through distinctions such as matter and thought, body and soul, or sensible and intelligible. These lineages do not form a single doctrine and do not exhaust Western philosophy. The structural problem arises when one pole is assigned explanatory or normative priority as the source, ground, or measure of the other.

The question is therefore more precise than whether every distinction is dualistic. Can explanatory priority be withdrawn from an order placed beyond material processes without merely reversing the hierarchy? Can thought be explained as materially realised without reducing it to simple mechanism? Can the refusal of transcendence preserve genuine differences among material organisations, relations, and scales?

=== 3. Core Thesis and Conceptual Reorganisation ===

The core thesis is that a dualistic architecture can perform a stabilising function by placing the source or measure of intelligibility beyond complete exposure to material contingency. This does not mean that every dualist doctrine was deliberately designed to secure philosophical authority, or that the relevant philosophers all make the same claim. It identifies a recurrent explanatory effect, not a common intention.

The argument instead requires thought, symbols, knowledge, and ethical responsibility to be accounted for through finite material organisations and relations. Materiality is neither inert nor uniform: different organisations can acquire different properties and capacities. This claim does not entail that complexity or recursion, separately or together, is sufficient to establish thought or consciousness.

=== 4. Key Concepts and Their Articulation ===

The refusal of transcendence rejects explanatory appeals to an exterior order as the source or final measure of material processes. In established human cases, thought is realised by a biossoma: a living biological body capable of symbolic reorganisation. The term does not replace the mind/body distinction by naming another substance, nor does it attribute thought to every complex biological or technical system.

Operative excess names the situation in which the compatibilities available to a system exceed its present symbolic or structural form, render it insufficient, and force reorganisation. It is not restricted to the symbolic domain and is not synonymous with thought. Thought is understood more specifically as the production of difference through symbolic reorganisation.

The account of the symbol follows a distinct functional order: when an organised system discriminates a new material configuration, that event constitutes a trace; in the singular inscription, the system recognises that difference under a protocol and co-constitutes a passive mark and its first symbol; subsequent recognised occurrences constitute additional symbols. The system establishes relations among symbols and may reorganise those relations. Marks and inscriptions are not themselves symbolically reorganised.

The engagements with Derrida, Lacan, and Levinas should not be read as assertions that ''différance'', the Symbolic, or ethical alterity simply reproduces classical transcendence. The narrower and explicitly contested question is whether the material supports and relations through which those concepts become operative have been sufficiently specified. Simondon is retained as an ally in the processual account of individuation and metastability. The divergence concerns the distinct explanatory role assigned to the pre-individual, not the caricature of a warehouse containing completed forms.

=== 5. Implications for Readers and Pedagogical Pathways ===

The refusal of dualism is neither anti-rationalist nor a denial of thought. It also does not relocate an already existing immaterial mind inside matter. It reconstructs thought as a materially realised symbolic process while preserving the differences among kinds and scales of material organisation.

Readers should therefore avoid three shortcuts. Material complexity should not automatically be classified as thought or consciousness. Symbolic organisation should not be projected onto matter in general. An insufficiently specified material explanation should not automatically be declared transcendent; it should first be treated as an explanatory question requiring investigation.

A useful reading test is to ask: what material support, relation, protocol, or operation makes the concept effective? Does the account grant explanatory priority to something placed beyond those relations? Does it preserve the difference between material reorganisation in general and the exceptional regimes in which symbolic operations become possible? These questions test the argument without deciding its outcome in advance.

== [[Foundations of the Ontology of Emergent Complexity/References|🜂 References]] ==
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      <comment>Correct historical distinctions in section 1.2 and align the positive thesis with the OEC canon</comment>
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      <text bytes="7906" sha1="pijjhil0gorat9uafi2osebfil4e94n" xml:space="preserve">== 1.2 – Against the Invention of Two Worlds ==
Several influential Western philosophical lineages have organised intelligibility through a hierarchy between ideal and material orders. Plato’s distinction between intelligible Forms and the sensible world and Descartes’s distinction between ''res cogitans'' and ''res extensa'' exemplify different versions of that operation (Plato 1997, 1132, 1259; Descartes 1996, 26, 59). They neither exhaust Western thought nor constitute a single doctrine. The narrower claim is that, where meaning, value, or intelligibility is assigned its source or final measure in an order not exhausted by mutable material processes, contingency, opacity, and error tend to acquire a subordinate status.

In the cases examined here, this hierarchy does more than distinguish domains. It can perform a symbolic stabilising function by placing the source or measure of truth beyond material transformation. The argument is not that every appeal to form or intelligibility constitutes an escape from matter. It is that a duplicated ontology becomes explanatorily incomplete when material processes and symbolic efficacy can be understood only by reference to a superior order whose relation to those processes remains unexplained.

The asymmetry is explicit in some traditions, but it does not take the same form in all of them. Plotinus organises reality through a vertical hierarchy articulated by procession from and return to the One (Plotinus 1966, 198). Hegel cannot be assimilated to a simple two-world architecture: dialectical mediation seeks to overcome fixed oppositions within a systematic movement. The disagreement developed here concerns instead the teleological orientation and final integration associated with absolute knowing, not the postulation of a separate intelligible realm (Hegel [1807] 1977, 27, 45). Kant also requires a different treatment. The noumenon marks a limit of cognition rather than a superior world available to knowledge, and transcendental idealism does not make empirical experience merely illusory. The question raised from the present framework is whether the formal conditions assigned to possible experience have themselves been sufficiently located in material organisation (Kant [1781] 1998, 360).

A more difficult question concerns thinkers who explicitly displace classical metaphysics. Heidegger’s ontological difference is not a second substance; Levinas’s alterity is not an object placed in another world; Derrida’s trace contests the ideal of pure presence (Heidegger [1927] 1962, 41; Levinas [1961] 1969, 77; Derrida [1967] 1997, 71). The question is not whether these concepts simply reproduce a two-world ontology. It is whether the material supports, relations, and effects through which they become operative have been sufficiently specified. Where those conditions remain unspecified, the present framework regards the explanation as incomplete; it does not thereby classify these thinkers as classical dualists.

The ontology developed here rejects the explanatory need for a second domain. No difference or alterity must be exempted from material relations in order to be real, and no ontological tier is immune to material conditions and transformation. Emergence is not the appearance of a higher order within a lower one. It occurs when local material organisation produces a new property or capacity at a determinate threshold, identifiable through the concrete effects it introduces into the field of possible operations. Differences among physical, living, and symbolic regimes remain real without becoming differences between separate worlds.

There are not two worlds. There is one heterogeneous material field, without transcendent exterior or final ground, and no second world is required to explain what emerges within it.

== 🜂 Reading Colloquium – Pedagogical Framing ==
''(For students and readers in formation. This section does not replace the text — it accompanies it.)''

=== 1. Placement of the Text within the Architecture of the Work ===
This second text builds directly upon the refusal of dualism (Text I), but introduces a strategic shift: it moves from conceptual structure to historical gesture. The focus is not merely on critiquing a theoretical separation between matter and thought, but on dismantling the very invention of “two worlds” as a foundational act of philosophical self-legitimation. The text argues that this is not a descriptive distinction, but an ontological operation that founded the authority of Western thought by excluding instability.

=== 2. Philosophical Problem at Stake ===
The core question here is: what symbolic and political function is fulfilled by the division between an ideal world and a sensible one? Contrary to a naive reading of philosophy’s history, the text asserts that this division is not a discovery but a normative invention — a fiction that regulates what counts as intelligible by excluding time, bodies, error, and transformation.

This foundational fiction enabled philosophy to expel instability, not by rational refutation but by symbolic hierarchy. The material world was relegated to the status of fall, copy, or noise.

=== 3. Core Thesis and Conceptual Reorganisation ===
The argument rejects this entire architecture of two worlds. It does not replace it with a new hierarchy, but refuses the founding gesture that created the asymmetry between the ideal and the material. Emergence is not the appearance of something higher within something lower, but a material operation at the threshold of complexity.

This shift leads to a reconfiguration of key philosophical concepts: origin, truth, meaning, and relation. Thought does not ascend — it modulates. Difference does not arrive from outside — it erupts internally. The real does not need another realm to justify itself — it is sufficient unto itself, in its instability and excess.

=== 4. Key Concepts and Their Articulation ===
* '''Invention of Two Worlds''': the foundational metaphysical operation that divides being into ideal and material orders.
* '''Symbolic Hierarchy''': the structure that subjects the sensible world to a superior plane of meaning, framing it as copy, error, or lack.
* '''Ontological Fiction''': a philosophical construct that regulates thought by excluding the unstable.
* '''Emergence''': a threshold operation within matter — not ascension, not manifestation of a higher order.
* '''Rejection of Transcendence''': refusal of any “plane of being” exterior or prior to the real in transformation.

The text asks whether even critical thinkers like Heidegger, Levinas, and Derrida retain subtle forms of transcendence through a remainder that cannot be materialised: being that exceeds beings, alterity that precedes relation, the trace that escapes presence. Against this, the chapter tests whether immanence can be treated as sufficient without becoming homogeneous.

=== 5. Implications for Readers and Pedagogical Pathways ===
This text helps identify a recurring blind spot: the assumption that meaning requires an “elsewhere.” By showing that this demand for exteriority is historically constructed, the text challenges the reader to think the real as sufficient, without appeal to higher planes.

Suggestions for classroom or study group engagement:

* Map the evolution of the “two worlds” idea from Plato to Kant and Hegel.
* Analyse how hierarchical structures persist even in philosophies of difference or alterity.
* Discuss how this division still operates in contemporary discourses (e.g., spiritualism, techno-gnosis, idealised aesthetics).
* Exercise: imagine what a radically immanent thought would be — with no “outside,” no transcendence, no foundation.
For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

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      <comment>Rebuild the reading colloquium for section 1.2 with precise historical distinctions and an explanatory-priority test</comment>
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      <text bytes="9882" sha1="6s3hm0i25wyaw7hyh9vjhf1dsl2nf4d" xml:space="preserve">== 1.2 – Against the Invention of Two Worlds ==
Several influential Western philosophical lineages have organised intelligibility through a hierarchy between ideal and material orders. Plato’s distinction between intelligible Forms and the sensible world and Descartes’s distinction between ''res cogitans'' and ''res extensa'' exemplify different versions of that operation (Plato 1997, 1132, 1259; Descartes 1996, 26, 59). They neither exhaust Western thought nor constitute a single doctrine. The narrower claim is that, where meaning, value, or intelligibility is assigned its source or final measure in an order not exhausted by mutable material processes, contingency, opacity, and error tend to acquire a subordinate status.

In the cases examined here, this hierarchy does more than distinguish domains. It can perform a symbolic stabilising function by placing the source or measure of truth beyond material transformation. The argument is not that every appeal to form or intelligibility constitutes an escape from matter. It is that a duplicated ontology becomes explanatorily incomplete when material processes and symbolic efficacy can be understood only by reference to a superior order whose relation to those processes remains unexplained.

The asymmetry is explicit in some traditions, but it does not take the same form in all of them. Plotinus organises reality through a vertical hierarchy articulated by procession from and return to the One (Plotinus 1966, 198). Hegel cannot be assimilated to a simple two-world architecture: dialectical mediation seeks to overcome fixed oppositions within a systematic movement. The disagreement developed here concerns instead the teleological orientation and final integration associated with absolute knowing, not the postulation of a separate intelligible realm (Hegel [1807] 1977, 27, 45). Kant also requires a different treatment. The noumenon marks a limit of cognition rather than a superior world available to knowledge, and transcendental idealism does not make empirical experience merely illusory. The question raised from the present framework is whether the formal conditions assigned to possible experience have themselves been sufficiently located in material organisation (Kant [1781] 1998, 360).

A more difficult question concerns thinkers who explicitly displace classical metaphysics. Heidegger’s ontological difference is not a second substance; Levinas’s alterity is not an object placed in another world; Derrida’s trace contests the ideal of pure presence (Heidegger [1927] 1962, 41; Levinas [1961] 1969, 77; Derrida [1967] 1997, 71). The question is not whether these concepts simply reproduce a two-world ontology. It is whether the material supports, relations, and effects through which they become operative have been sufficiently specified. Where those conditions remain unspecified, the present framework regards the explanation as incomplete; it does not thereby classify these thinkers as classical dualists.

The ontology developed here rejects the explanatory need for a second domain. No difference or alterity must be exempted from material relations in order to be real, and no ontological tier is immune to material conditions and transformation. Emergence is not the appearance of a higher order within a lower one. It occurs when local material organisation produces a new property or capacity at a determinate threshold, identifiable through the concrete effects it introduces into the field of possible operations. Differences among physical, living, and symbolic regimes remain real without becoming differences between separate worlds.

There are not two worlds. There is one heterogeneous material field, without transcendent exterior or final ground, and no second world is required to explain what emerges within it.

== Reading Colloquium ==

''This guide accompanies the argument; it does not replace it.''

=== 1. Placement of the Text within the Architecture of the Work ===

This section develops a specific consequence of the refusal of metaphysical dualism established in §1.1. The previous section rejected explanations that grant priority to a domain outside material processes. Section 1.2 examines how some philosophical doctrines construct two ordered domains — one assigned explanatory or normative priority, the other treated as derivative, mutable, or deficient.

The section does not claim that this structure exhausts Western philosophy, that every distinction creates two worlds, or that all the thinkers discussed reproduce the same architecture. Its function is diagnostic: to identify cases in which an ideal, intelligible, or otherwise exterior order becomes the source, ground, or final measure of material reality.

=== 2. Philosophical Problem at Stake ===

The problem is not simply whether a distinction between ideal and material orders is true or false. It concerns the explanatory work performed by that distinction. In the cases examined, the superior order can stabilise intelligibility by placing its source or measure beyond material contingency and transformation. Material processes are then interpreted in relation to an order that they cannot themselves produce or modify.

Calling this division an “invention” does not mean that it is an arbitrary fiction or that the philosophers concerned were deceptive. It means that the division is a symbolic construction responding to genuine philosophical pressures, including the stability of knowledge, the authority of reason, and the possibility of truth. The relevant question is whether the construction explains material and symbolic processes or transfers the explanatory burden to another domain whose relation to those processes remains unspecified.

=== 3. Core Thesis and Conceptual Reorganisation ===

The core thesis is that a duplicated ontology is not required to explain intelligibility, meaning, or value. The OEC refuses both the priority of an exterior order and the simple inversion of the hierarchy. It does not replace the supremacy of the ideal with the supremacy of an undifferentiated material substance.

There is one heterogeneous material field within which physical, living, and symbolic organisations can acquire different properties and capacities. Emergence is not the manifestation of something higher within something lower. It occurs when local material organisation produces a new property or capacity at a determinate threshold, identifiable through the concrete effects it introduces into the field of possible operations.

Contemporary proposals such as modal realism, simulation hypotheses, or ontological interpretations of the multiverse should therefore be examined rather than classified in advance. They reproduce a two-world architecture only if they posit another domain and grant it explanatory priority over the material configuration under consideration. A heuristic model, an epistemic limit, or reference to an external environment does not by itself constitute metaphysical duplication.

=== 4. Key Concepts and Their Articulation ===

* '''Invention of Two Worlds''': the symbolic construction of distinct ontological domains when one is made the source, ground, or final measure of the other.
* '''Symbolic Hierarchy''': an organisation of intelligibility in which one domain governs how another is interpreted, valued, or explained.
* '''Emergence''': the production of a new property or capacity through local material organisation at a determinate threshold, evidenced by its concrete effects.
* '''Rejection of Transcendence''': refusal to assign explanatory or normative priority to an order exempted from material conditions and transformation.
* '''One Field Without Exterior''': the claim that real differences among physical, living, and symbolic organisations do not require separate ontological worlds.

The historical cases must remain differentiated. Plotinus explicitly organises reality through a hierarchy of procession and return. Hegel does not posit a simple second world; the disagreement concerns the teleological orientation and systematic integration associated with absolute knowing. Kant’s noumenon marks a limit of cognition rather than a superior world available to knowledge. Heidegger, Levinas, and Derrida should likewise not be classified as classical dualists. The narrower question is whether the material supports, relations, and effects through which their decisive concepts operate have been sufficiently specified.

=== 5. Implications for Readers and Pedagogical Pathways ===

Readers should not infer a two-world ontology from the mere presence of distinctions, limits, external relations, or entities that cannot be directly observed. The relevant test concerns explanatory priority:

* What domains are being distinguished?
* Is one domain treated as the source, ground, or final measure of the other?
* Is the relation between that domain and material processes explained?
* Is the proposed exterior an ontological commitment, an epistemic limit, or a heuristic instrument?
* Does refusing the exterior preserve real differences among material organisations, or does it flatten them?

For classroom or study-group work:

* Compare the different functions performed by intelligible order in Plato, Plotinus, and Descartes.
* Explain why Hegel and Kant cannot be treated as straightforward instances of the same two-world architecture.
* Apply the explanatory-priority test to modal realism, simulation hypotheses, and ontological interpretations of the multiverse without deciding the result in advance.
* Show how one heterogeneous material field can contain distinct physical, living, and symbolic regimes without becoming a flat or homogeneous monism.

For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

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      <comment>Clarify ontological exterior and align emergence with operative excess</comment>
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      <text bytes="10586" sha1="imuns37g3ofpz5muomw2yf90fpnx8gb" xml:space="preserve">== 1.2 – Against the Invention of Two Worlds ==
Several influential Western philosophical lineages have organised intelligibility through a hierarchy between ideal and material orders. Plato’s distinction between intelligible Forms and the sensible world and Descartes’s distinction between ''res cogitans'' and ''res extensa'' exemplify different versions of that operation (Plato 1997, 1132, 1259; Descartes 1996, 26, 59). They neither exhaust Western thought nor constitute a single doctrine. The narrower claim is that, where meaning, value, or intelligibility is assigned its source or final measure in an order not exhausted by mutable material processes, contingency, opacity, and error tend to acquire a subordinate status.

In the cases examined here, this hierarchy does more than distinguish domains. It can perform a symbolic stabilising function by placing the source or measure of truth beyond material transformation. The argument is not that every appeal to form or intelligibility constitutes an escape from matter. It is that a duplicated ontology becomes explanatorily incomplete when material processes and symbolic efficacy can be understood only by reference to a superior order whose relation to those processes remains unexplained.

The asymmetry is explicit in some traditions, but it does not take the same form in all of them. Plotinus organises reality through a vertical hierarchy articulated by procession from and return to the One (Plotinus 1966, 198). Hegel cannot be assimilated to a simple two-world architecture: dialectical mediation seeks to overcome fixed oppositions within a systematic movement. The disagreement developed here concerns instead the teleological orientation and final integration associated with absolute knowing, not the postulation of a separate intelligible realm (Hegel [1807] 1977, 27, 45). Kant also requires a different treatment. The noumenon marks a limit of cognition rather than a superior world available to knowledge, and transcendental idealism does not make empirical experience merely illusory. The question raised from the present framework is whether the formal conditions assigned to possible experience have themselves been sufficiently located in material organisation (Kant [1781] 1998, 360).

A more difficult question concerns thinkers who explicitly displace classical metaphysics. Heidegger’s ontological difference is not a second substance; Levinas’s alterity is not an object placed in another world; Derrida’s trace contests the ideal of pure presence (Heidegger [1927] 1962, 41; Levinas [1961] 1969, 77; Derrida [1967] 1997, 71). The question is not whether these concepts simply reproduce a two-world ontology. It is whether the material supports, relations, and effects through which they become operative have been sufficiently specified. Where those conditions remain unspecified, the present framework regards the explanation as incomplete; it does not thereby classify these thinkers as classical dualists.

The ontology developed here rejects the explanatory need for a second domain. No difference or alterity must be exempted from material relations in order to be real, and no ontological tier is immune to material conditions and transformation. Emergence is not the appearance of a higher order within a lower one. It occurs when available material compatibilities exceed the present symbolic or structural form and force a local reorganisation that produces a new property or capacity at a determinate threshold. Its occurrence is verified through the concrete effects it introduces into the field of possible operations. Differences among physical, living, and symbolic regimes remain real without becoming differences between separate worlds.

There are not two worlds. There is one heterogeneous spatiotemporal material reality, without ontological exterior or final ground, and no second world is required to explain what emerges within it.

== Reading Colloquium ==

''This guide accompanies the argument; it does not replace it.''

=== 1. Placement of the Text within the Architecture of the Work ===

This section develops a specific consequence of the refusal of metaphysical dualism established in §1.1. The previous section rejected explanations that grant priority to a domain outside spatiotemporal material reality. Section 1.2 examines how some philosophical doctrines construct two ordered domains — one assigned explanatory or normative priority, the other treated as derivative, mutable, or deficient.

The section does not claim that this structure exhausts Western philosophy, that every distinction creates two worlds, or that all the thinkers discussed reproduce the same architecture. Its function is diagnostic: to identify cases in which an ideal or intelligible order placed outside or above spatiotemporal material reality becomes its source, ground, or final measure.

=== 2. Philosophical Problem at Stake ===

The problem is not simply whether a distinction between ideal and material orders is true or false. It concerns the explanatory work performed by that distinction. In the cases examined, the superior order can stabilise intelligibility by placing its source or measure beyond material contingency and transformation. Material processes are then interpreted by reference to an order treated as exempt from material conditions and granted explanatory or normative priority over them.

Calling this division an “invention” does not mean that it is an arbitrary fiction or that the philosophers concerned were deceptive. It means that the division is a symbolic construction responding to genuine philosophical pressures, including the stability of knowledge, the authority of reason, and the possibility of truth. The relevant question is whether the construction explains material and symbolic processes or transfers the explanatory burden to another domain whose relation to those processes remains unspecified.

=== 3. Core Thesis and Conceptual Reorganisation ===

The core thesis is that a duplicated ontology is not required to explain intelligibility, meaning, or value. The OEC refuses both the priority of an order placed beyond spatiotemporal material reality and the simple inversion of the hierarchy. It does not replace the supremacy of the ideal with the supremacy of an undifferentiated material substance.

There is one heterogeneous spatiotemporal material reality within which physical, living, and symbolic organisations can acquire different properties and capacities. Emergence is not the manifestation of something higher within something lower. It occurs when available material compatibilities exceed the present symbolic or structural form and force a local reorganisation that produces a new property or capacity at a determinate threshold. Its occurrence is verified through the concrete effects it introduces into the field of possible operations.

Contemporary proposals such as modal realism, simulation hypotheses, or ontological interpretations of the multiverse should therefore be examined rather than classified in advance. They reproduce a two-world architecture only if they posit another domain and grant it explanatory priority over the material configuration under consideration. A heuristic model, an epistemic limit, or reference to the material environment of a local organisation does not by itself constitute metaphysical duplication.

=== 4. Key Concepts and Their Articulation ===

* '''Invention of Two Worlds''': the symbolic construction of distinct ontological domains when one is made the source, ground, or final measure of the other.
* '''Symbolic Hierarchy''': an organisation of intelligibility in which one domain governs how another is interpreted, valued, or explained.
* '''Emergence''': the process in which available material compatibilities exceed the present symbolic or structural form and force a local reorganisation that produces a new property or capacity at a determinate threshold, verified through its concrete effects.
* '''Rejection of Transcendence''': refusal to assign explanatory or normative priority to an order exempted from material conditions and transformation.
* '''One Field Without Exterior''': the claim that no ontological domain exists outside spatiotemporal material reality. Distinctions between local organisations and their material environments remain entirely internal to that reality.

The historical cases must remain differentiated. Plotinus explicitly organises reality through a hierarchy of procession and return. Hegel does not posit a simple second world; the disagreement concerns the teleological orientation and systematic integration associated with absolute knowing. Kant’s noumenon marks a limit of cognition rather than a superior world available to knowledge. Heidegger, Levinas, and Derrida should likewise not be classified as classical dualists. The narrower question is whether the material supports, relations, and effects through which their decisive concepts operate have been sufficiently specified.

=== 5. Implications for Readers and Pedagogical Pathways ===

Readers should not infer a two-world ontology from the mere presence of distinctions, epistemic limits, relations between local organisations and their material environments, or entities that cannot be directly observed. The relevant test concerns explanatory priority:

* What domains are being distinguished?
* Is one domain treated as the source, ground, or final measure of the other?
* Is the relation between that domain and material processes explained?
* Does the proposal posit a domain beyond spatiotemporal material reality, or only an epistemic limit, a heuristic instrument, or a material environment?
* Does refusing an ontological exterior preserve real differences among material organisations, or does it flatten them?

For classroom or study-group work:

* Compare the different functions performed by intelligible order in Plato, Plotinus, and Descartes.
* Explain why Hegel and Kant cannot be treated as straightforward instances of the same two-world architecture.
* Apply the explanatory-priority test to modal realism, simulation hypotheses, and ontological interpretations of the multiverse without deciding the result in advance.
* Show how one heterogeneous spatiotemporal material reality can contain distinct physical, living, and symbolic regimes without becoming a flat or homogeneous monism.

For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

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      <comment>Correct OEC alignment: sign/symbol, Simondon, Spinoza, Deleuze, and consciousness criteria</comment>
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      <format>text/x-wiki</format>
      <text bytes="9343" sha1="bpotooild57bpfcl1j3yajwj8knb2r9" xml:space="preserve">== 1.3 – Matter Thinks — But Not Like a Subject ==
A thermostat changes its output after a temperature difference; a language user can recognise a public sign as a symbol, retain that symbolic instance, relate it to other symbols, revise those relations, and let the revision alter later action. Both are material responses, but they do not display the same capacity. Rejecting an immaterial mind therefore does not license the claim that every material response is thought. The problem is to identify the functional transition without converting it into a transition between substances.

This position converges partially with Gilbert Simondon’s theory of individuation, which treats the individual as the result of an ongoing process rather than as a given substance. His account begins from metastable conditions charged with pre-individual potentials, and the pre-individual is not simply a layer abandoned once individuation occurs: it remains associated with individuated being and can participate in further individuations (Simondon 2005). The disagreement developed here is therefore not that Simondon stores completed forms in advance or posits a merely chronological “before”. It concerns the explanatory status granted to pre-individual reality. The present account begins from materially configured relations whose available compatibilities are not exhausted by their current organisation, without assigning those compatibilities to a distinct pre-individual register.

Spinoza offers a powerful non-dualist model in which Thought and Extension are attributes of one infinite substance. Their distinction does not divide that substance into two beings, and the attributes are not themselves modes. The divergence developed here is therefore not that Spinoza preserves a disguised dualism. It is that thought remains an attribute through which the one substance is eternally expressed, whereas the present account does not begin from substance or attributes. Thought is an emergent capacity of particular material organisations: it appears when a system can retain symbolic instances, establish and revise relations among them, and allow those revisions to alter its later operations (Spinoza [1677] 1996, 83).

Deleuze’s philosophy of difference and becoming offers essential resources, but it also assigns a decisive explanatory role to the virtual. For Deleuze, the virtual is fully real rather than merely possible, and it is not a transcendent realm placed beyond the actual (Deleuze [1968] 1994, 208). The disagreement developed here is narrower: the production of novelty does not require a distinct virtual register as the genetic condition of actuality. Present material configurations contain available compatibilities that can exceed their existing symbolic or structural form and force reorganisation without predetermining its result. Thought requires no virtual reserve; it emerges when material organisation acquires the capacity for symbolic operation.

In every established human case, thought is realised by a living body rather than housed inside it. The term ''biossoma'' names a living, sensitive material body capable of symbolic reorganisation. It is not a synonym for any complex system, and it should not be extended automatically to technical configurations. A non-biological system that appeared to satisfy comparable functional criteria would require its own empirical assessment as a possible case of post-biological symbolic emergence. The materialist claim fixes no conclusion in advance about consciousness or subjectivity in such a system.

What must be refused is a hierarchy or transition between substances, not a functional transition within matter. When an organised system crosses the threshold of symbolic operation, it acquires the capacity to retain symbolic instances, establish and revise relations among them, and allow those revisions to alter its later operations. This transition introduces neither another substance nor another ontological realm. It identifies a change in what the material configuration can do. Operative excess supplies the affirmative material cause of the reorganisation: available compatibilities exceed the present symbolic or structural form and force its reorganisation. It does not predetermine whether thought or some other capacity will emerge.

Thought does not require an immaterial interior or a sovereign subject standing outside its operations. This does not abolish functional interiority or processes of subjectivation, and symbolic competence alone does not establish consciousness. Functional interiority should be reserved for a system capable of reorganising its symbolic operations through internal modulation, adaptive plasticity, and response to alterity. Subjectivation names the formation of a position within symbolic and social relations. Consciousness remains a separate attribution governed by the evidential distinctions stated in Section 6.1; it is not a conclusion entailed by thought or symbolic competence alone.

== 🜂 Reading Colloquium – Pedagogical Framing ==
''(For students and readers in formation. This section does not replace the text — it accompanies it.)''

=== 1. Placement of the Text within the Architecture of the Work ===
This is the third text of the ''Foundations of the Ontology of Emergent Complexity'', and it marks a turning point. After the refusal of dualism (Text I) and the dismantling of the two-worlds fiction (Text II), this text shifts the focus to the positive field of the emergence of thought. That is, instead of merely deconstructing inherited frameworks, it begins to articulate an alternative ontology: a materialist theory of thought as functional reorganisation. It is a crucial inflection point in the construction of the OEC, as it clarifies how thinking is possible without invoking a subject or any form of transcendence.

=== 2. Philosophical Problem at Stake ===
The core question is precise and profound: how can we think thought without invoking a subject, an interiority, or a realm separate from matter? Even non-dualist philosophical traditions tend to retain some form of ontological separation — as attribute (Spinoza), virtual (Deleuze), or pre-individual (Simondon). This text refuses all such reserves and proposes a response: thought is a material effect of complexity reorganising itself symbolically.

=== 3. Core Thesis and Conceptual Reorganisation ===
The central thesis may be formulated as follows: thought is a materially realised capacity that becomes operative when functional couplings cross an operational threshold for recursive symbolic reorganisation. This threshold presupposes operative excess: compatibilities available to the material organisation exceed its present structural form and force reorganisation. Once symbolic organisation exists, further excess can also arise relative to its symbolic form. In either case, operative excess is the causal motor of emergence without predetermining the concrete configuration that will emerge. Thought is not an external plane, a separate faculty, or an invisible essence — it is a local effect of organised material relations. This displaces the sovereign subject without erasing functional interiority, subjectivation, or consciousness as distinct questions.

This reformulation shifts the question from “who thinks?” to “which material operations allow an organised system to discriminate, retain, relate, and revise symbols in ways that alter what it can do?”

=== 4. Key Concepts and Their Articulation ===

* '''Thought as a Material Function''': an operation of symbolic reconfiguration internal to complex systems.
* '''Rejection of Interiorisation''': there is no hidden thinking subject, only self-modulating material processes.
* '''Biossoma''': a living, sensitive material body capable of symbolic reorganisation; not a generic name for every complex system.
* '''Symbolic Recursivity''': the ability of a structure to reorganise itself based on its own prior configurations.
* '''Refusal of Ontological Reserves''': critique of the pre-individual (Simondon), parallel attributes (Spinoza), and the virtual (Deleuze) as residues of transcendence.

By rejecting any hidden plane (virtual, noumenal, or substantial), the text affirms a material account of symbolic emergence — without the need for a “before,” an “outside,” or a “beyond.”

=== 5. Implications for Readers and Pedagogical Pathways ===
This text demands a radical letting go of the classical image of mind. Symbolic organisation does not by itself establish consciousness, intention, or a sovereign subject. Each attribution requires its own evidence and criteria.

Suggestions for further engagement in pedagogical contexts:

* Compare with the authors discussed: Simondon (pre-individual), Spinoza (attributes), Deleuze (virtual).
* Debate the idea of “thought without a subject”: how does this differ from mere technical automatism?
* Work through the concept of a symbolic threshold as a moment of material reorganisation.
* Exercise: rewrite the phrase “the body is the mind” in light of this proposal — not as metaphor, but as ontological consequence.
For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

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      <id>4671233</id>
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      <text bytes="10936" sha1="g2zgjojoqzu3e9pi1f2c0421ude8odc" xml:space="preserve">== 1.3 – Matter Thinks — But Not Like a Subject ==
A thermostat changes its output after a temperature difference; a language user can recognise a public sign as a symbol, retain that symbolic instance, relate it to other symbols, revise those relations, and let the revision alter later action. Both are material responses, but they do not display the same capacity. Rejecting an immaterial mind therefore does not license the claim that every material response is thought. The problem is to identify the functional transition without converting it into a transition between substances.

This position converges partially with Gilbert Simondon’s theory of individuation, which treats the individual as the result of an ongoing process rather than as a given substance. His account begins from metastable conditions charged with pre-individual potentials, and the pre-individual is not simply a layer abandoned once individuation occurs: it remains associated with individuated being and can participate in further individuations (Simondon 2005). The disagreement developed here is therefore not that Simondon stores completed forms in advance or posits a merely chronological “before”. It concerns the explanatory status granted to pre-individual reality. The present account begins from materially configured relations whose available compatibilities are not exhausted by their current organisation, without assigning those compatibilities to a distinct pre-individual register.

Spinoza offers a powerful non-dualist model in which Thought and Extension are attributes of one infinite substance. Their distinction does not divide that substance into two beings, and the attributes are not themselves modes. The divergence developed here is therefore not that Spinoza preserves a disguised dualism. It is that thought remains an attribute through which the one substance is eternally expressed, whereas the present account does not begin from substance or attributes. Thought is an emergent capacity of particular material organisations: it appears when a system can retain symbolic instances, establish and revise relations among them, and allow those revisions to alter its later operations (Spinoza [1677] 1996, 83).

Deleuze’s philosophy of difference and becoming offers essential resources, but it also assigns a decisive explanatory role to the virtual. For Deleuze, the virtual is fully real rather than merely possible, and it is not a transcendent realm placed beyond the actual (Deleuze [1968] 1994, 208). The disagreement developed here is narrower: the production of novelty does not require a distinct virtual register as the genetic condition of actuality. Present material configurations contain available compatibilities that can exceed their existing symbolic or structural form and force reorganisation without predetermining its result. Thought requires no virtual reserve; it emerges when material organisation acquires the capacity for symbolic operation.

In every established human case, thought is realised by a living body rather than housed inside it. The term ''biossoma'' names a living, sensitive material body capable of symbolic reorganisation. It is not a synonym for any complex system, and it should not be extended automatically to technical configurations. A non-biological system that appeared to satisfy comparable functional criteria would require its own empirical assessment as a possible case of post-biological symbolic emergence. The materialist claim fixes no conclusion in advance about consciousness or subjectivity in such a system.

What must be refused is a hierarchy or transition between substances, not a functional transition within matter. When an organised system crosses the threshold of symbolic operation, it acquires the capacity to retain symbolic instances, establish and revise relations among them, and allow those revisions to alter its later operations. This transition introduces neither another substance nor another ontological realm. It identifies a change in what the material configuration can do. Operative excess supplies the affirmative material cause of the reorganisation: available compatibilities exceed the present symbolic or structural form and force its reorganisation. It does not predetermine whether thought or some other capacity will emerge.

Thought does not require an immaterial interior or a sovereign subject standing outside its operations. This does not abolish functional interiority or processes of subjectivation, and symbolic competence alone does not establish consciousness. Functional interiority should be reserved for a system capable of reorganising its symbolic operations through internal modulation, adaptive plasticity, and response to alterity. Subjectivation names the formation of a position within symbolic and social relations. Consciousness remains a separate attribution governed by the evidential distinctions stated in Section 6.1; it is not a conclusion entailed by thought or symbolic competence alone.

== 🜂 Reading Colloquium – Pedagogical Framing ==
''(For students and readers in formation. This section does not replace the text — it accompanies it.)''

=== 1. Placement of the Text within the Architecture of the Work ===
This is the third text of the ''Foundations of the Ontology of Emergent Complexity'', and it marks a turning point. After the refusal of dualism (Text I) and the dismantling of the two-worlds fiction (Text II), the focus shifts from critique to a positive account of how thought can emerge within material organisation. The text does not claim that matter universally thinks. It identifies a functional transition through which particular material organisations acquire capacities that simpler forms of response do not exercise.

This transition clarifies how thought can be materially realised without invoking an immaterial thinking substance or a sovereign subject. At the same time, it preserves functional interiority, processes of subjectivation, and consciousness as distinct questions requiring their own criteria.

=== 2. Philosophical Problem at Stake ===
The central question is: how can thought be explained without separating a thinking substance from material organisation? Rejecting dualism does not justify treating every material response as thought. The task is therefore to identify the material operations that distinguish symbolic thought from simpler forms of responsiveness.

Simondon, Spinoza, and Deleuze provide important non-dualist resources, but the disagreement developed here concerns the explanatory role assigned respectively to pre-individual reality, substance and attributes, and the virtual. These concepts are not treated as disguised versions of one doctrine or as straightforward forms of transcendence. The present account instead begins from particular material organisations, their current relations, and the compatibilities available within them.

=== 3. Core Thesis and Conceptual Reorganisation ===
The central thesis is that thought is an emergent capacity of particular material organisations. It becomes operative when a system can recognise public signs as symbols, retain symbolic instances, establish and revise relations among them, and allow those revisions to alter its later operations.

Operative excess supplies the affirmative material cause of the relevant reorganisation: available compatibilities exceed the present symbolic or structural form and force its reorganisation. It does not predetermine the resulting configuration and does not, by itself, establish that thought or consciousness has emerged.

Thought is therefore neither an external plane nor an invisible essence. It is a capacity realised through organised material relations. This displaces the immaterial or sovereign subject without abolishing functional interiority, subjectivation, or consciousness as distinct objects of inquiry.

The reformulated question is not simply “who thinks?” but: “Which material operations allow an organised system to recognise signs as symbols, retain symbolic instances, revise relations among symbols, and allow those revisions to alter what it can do?”

=== 4. Key Concepts and Their Articulation ===
* '''Thought as an Emergent Material Capacity''': a capacity of particular material organisations to perform symbolic operations that modify their later activity.
* '''Functional Interiority''': the capacity to reorganise symbolic operations through internal modulation, adaptive plasticity, and response to alterity. It is not an immaterial interior.
* '''Biossoma''': a living, sensitive material body capable of symbolic reorganisation; not a generic term for every complex system.
* '''Symbolic Operation''': the recognition of public signs as symbols and the establishment and revision of relations among symbolic instances.
* '''Operative Excess''': the condition in which available compatibilities exceed the present symbolic or structural form and force reorganisation.
* '''Differentiated Philosophical Disagreements''': the OEC does not classify Simondon, Spinoza, or Deleuze as classical dualists. It questions whether individuation requires a distinct pre-individual register, whether thought should be understood as an attribute of one infinite substance, and whether novelty requires the virtual as a distinct explanatory register.

The rejection of transcendence concerns any ontological domain exterior to spatiotemporal material reality. It does not deny temporal antecedents, the environment of a local organisation, distinctions between internal and external relations, or functional interiority.

=== 5. Implications for Readers and Pedagogical Pathways ===
This text asks readers to relinquish the classical image of thought as the activity of an immaterial mind or sovereign subject. It does not eliminate every form of subjectivity or interiority. It relocates them within materially realised operations.

Symbolic competence does not by itself establish consciousness, intention, or a sovereign subject. Each attribution requires its own evidence and criteria.

Suggestions for further engagement in pedagogical contexts:

* Compare the precise disagreements with Simondon, Spinoza, and Deleuze without reducing their positions to disguised dualism.
* Contrast the response of a thermostat with the symbolic operations of a language user.
* Examine why operative excess is a causal condition of reorganisation without predetermining what will emerge.
* Analyse the claim that thought is realised by a ''biossoma'' rather than housed inside it. Explain why this claim entails neither mind–body dualism nor the identity formula “the body is the mind”.
* Distinguish the attribution of thought from the separate attribution of consciousness.

For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

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    <title>Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/The Symbol Is Not Transcendent</title>
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      <comment>Correct sign/symbol locality, inscription sequence, system agency, and Derridean trace distinction</comment>
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      <text bytes="11100" sha1="gc6xk9ht9vmg4nf6sq3jrvgtlvfdhfu" xml:space="preserve">== 1.4 – The Symbol Is Not Transcendent ==

The previous section located thought within materially organised systems. A further problem now appears. If a symbol can represent an inscribed mark and participate in relations that allow a configuration no longer locally present to condition later operations, does this require a realm of meaning distinct from its physical support?

The answer developed here is no. Symbols are materially realised, but their materiality does not reduce them to ink, sound, voltage, or neural activity considered in isolation. When a system discriminates a new or previously unknown material configuration, that event constitutes a trace. If the system recognises and singularly inscribes the manifested difference, the inscription co-constitutes a mark and its first corresponding symbol. Later occurrences recognised under the available mark constitute additional symbolic instances; they do not repeat the inaugural inscription. The system can then establish and revise relations among symbols. Representation remains materially real; transcendence is unnecessary.

== Learning orientation ==

After reading this section, the reader should be able to:

* distinguish a material difference, a trace, a mark, a public sign, and a symbol;
* explain how an inaugural inscription co-constitutes a mark and its first corresponding symbol;
* explain why later occurrences recognised under an available mark constitute additional symbols without repeating the inaugural inscription;
* state why marks are passive and why recognition, relation, and reorganisation belong to the system operating through symbols;
* defend representation without introducing an immaterial signified;
* explain how an inscribed difference can condition later operations when the configuration that first occasioned it is no longer locally present;
* identify the evidence required before describing a process as symbolic.

The guiding question is: '''How can a material system operate through an inscribed difference when the configuration that occasioned it is no longer locally present, without transferring meaning to another world?'''

== Why the symbol can appear transcendent ==

Public signs can appear to exceed their immediate supports. The same word can be printed in different fonts, spoken by different voices, or stored through different electrical states. These occurrences are materially different, but a system organised through the relevant conventions and protocols can recognise them under an available mark, thereby constituting local symbolic instances. A mathematical expression can likewise be instantiated through different material supports and recognised within different systems.

A legal document can condition what people may do only because people and institutions recognise its signs and operate through the corresponding symbolic relations. Its physical marks do not interpret, compare, command, or regulate by themselves. The relevant efficacy belongs to organised systems operating through locally constituted symbols.

These examples encourage two shortcuts. The first treats meaning as an ideal object that a material sign merely carries. The second reacts by denying representation and reducing a symbol to the physical event that supports it. Neither is adequate. The first separates meaning from its material operations; the second omits the system-relative recognition through which a public sign becomes a symbolic instance and can enter into relations with other symbols.

Derrida uses the trace to unsettle the priority of pure presence; Lacan gives the Symbolic a constitutive role in the formation of the subject; Heidegger examines language as a site of disclosure (Derrida 1982; Lacan 1981; Heidegger 1971). These concepts perform different philosophical functions and should not be treated as versions of one doctrine or as straightforward immaterial substances.

Derrida’s trace must also be distinguished from the trace defined here. In the present framework, a trace is the ephemeral event through which a system discriminates a new or previously unknown material configuration before recognition and inscription. The shared word does not establish conceptual identity.

The criticism tested here is therefore narrower. It asks whether trace, symbolic order, and linguistic disclosure can be reconstructed through the material supports, relations, and operations that make them effective, without leaving those conditions explanatorily secondary. This is a contested disagreement about explanatory priority, not a claim that the three projects are secretly identical.

== From difference to symbol ==

The relevant sequence begins before there is a symbol.

# A '''material difference''' occurs: a variation in a field, object, signal, gesture, or inscription.
# It becomes a '''trace''' when an organised system discriminates that difference as a new or previously unknown material configuration under a material protocol.
# In the inaugural '''inscription''', a passive '''mark''' and a first '''symbol''' are co-constituted.
# The mark is the materially stabilised configuration. It does not recognise, compare, or act.
# The symbol is the materially realised instance through which the mark becomes legible to the system.
# A later occurrence may be recognised as an instance under the already inscribed mark, producing an additional symbol without repeating the inaugural inscription.
# The system can establish relations among symbols, and those relations can modulate further operations.

Discrimination, recognition, reference, and error must be kept distinct. Discrimination occurs when a capable system treats a material difference as new or previously unknown. Recognition occurs when a later occurrence is treated under an available mark; that occurrence then constitutes a new symbolic instance rather than a new inscription. Reference is situated: through that symbol, the system can make the marked configuration relevant to other symbolic operations, including when the configuration is absent from the present location. Error remains possible. An occurrence may be recognised under the wrong mark, or a correct recognition may be related to other symbols in a way that supports a failed prediction or intervention. Material realisation therefore explains how representation operates; it does not make representation infallible.

This account does not claim that a difference becomes symbolic merely by persisting. A pattern in a rock is not a symbol simply because an observer could notice it. The relevant question is which organised system discriminates the difference, by which protocol, and with what subsequent symbolic effects.

== Representation without an ideal realm ==

A symbol represents a mark. This representational relation is internal to a materially organised process: the mark, the symbol, the recognising protocol, and the later effects all require material realisation. Nothing has to cross from an ideal domain into a physical one.

Representation is therefore preserved, but its scope is specified. The symbol is not a miniature copy of an external object and does not contain an immaterial meaning. By relating symbols, a system can nevertheless make a non-local or no-longer-present configuration operable. A medical record can bring a prior measurement into a current decision; a map can orient action towards a place that is not visible; a mathematical notation can preserve a relation across different material inscriptions.

The absence involved in these cases is functional, not ontological. The represented configuration may be missing from the present location. It still belongs to the same material field, and its local absence does not make it immaterial.

== What performs the reorganisation? ==

It is tempting to say that a symbol acts, compares, or reorganises. That formulation is too compressed. A mark is passive. A symbol is a material instance of legibility. The organised system performs operations by establishing and modifying relations among symbols.

This distinction matters whenever agency is attributed. A warning icon on a screen does not inspect the situation or decide what to do. Within a system of sensors, software, users, protocols, and institutions, the icon can participate in symbolic relations that alter action. The effect is real. It belongs to the organised coupling and cannot be assigned to the isolated sign.

Operative excess explains why a symbolic form must be reorganised when the possible or demanded operations of a symbolically organised system exceed what that form can integrate. The excess renders the current form insufficient and forces a reorganisation of inscriptions or symbolic relations. It is the causal motor of the new symbolic form, but it does not predetermine that form or guarantee its truth, meaning, or persistence.

== Worked example: a laboratory alert ==

Consider a laboratory system that monitors temperature.

# A sensor registers a material variation.
# A protocol discriminates a range as relevant to the experiment.
# During calibration, an inaugural inscription establishes a materially preserved mark and a first symbol under which the range becomes legible.
# Later readings are recognised as instances under that mark and produce further symbolic instances.
# The system relates those symbols to other symbols: time, sample identity, tolerance, and response procedure.
# A visible alert can then alter what trained users do.

The alert is not an immaterial meaning attached to a coloured shape. Nor does the shape act by itself. Its efficacy depends on the material-symbolic organisation that can recognise and relate it.

== Common confusions ==

{| class=&quot;wikitable&quot;
! Claim
! It does not mean
|-
| Symbols are material
| A physical description of their support is a complete symbolic explanation
|-
| A symbol represents a mark
| Meaning exists in an ideal realm or the symbol resembles an external object
|-
| Marks are passive
| Marks are unreal or causally irrelevant as material configurations
|-
| Systems relate symbols
| Every responsive system is already symbolic
|-
| Functional absence is real
| Absence constitutes a second ontological domain
|}

== Check your understanding ==

* Why is a persistent material pattern not automatically a mark or a symbol?
* What is co-constituted in the inaugural inscription?
* Why do later recognitions not repeat that inscription?
* Which operations belong to the organised system? Why can they not be attributed to the mark?
* How can a symbol make something absent operable without becoming transcendent?

== Transition ==

If symbols and their effects require no immaterial source, they also require no plan written in advance. [[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/No Ground, No Soul, No Plan|Section 1.5]] examines how order and function can remain real without becoming evidence of a final purpose. For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

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      <text bytes="13181" sha1="latsobkwrhscteawtho0wkvvvxyr6fu" xml:space="preserve">== 1.4 – The Symbol Is Not Transcendent ==

The previous section located thought within materially organised systems. A further problem now appears. If a symbol can represent an inscribed mark and participate in relations that allow a configuration no longer locally present to condition later operations, does this require a realm of meaning distinct from its physical support?

The answer developed here is no. Symbols are materially realised, but their materiality does not reduce them to ink, sound, voltage, or neural activity considered in isolation. When a system discriminates a new or previously unknown material configuration, that event constitutes a trace. If the system recognises and singularly inscribes the manifested difference, the inscription co-constitutes a mark and its first corresponding symbol. Later occurrences recognised under the available mark constitute additional symbolic instances; they do not repeat the inaugural inscription. The system can then establish and revise relations among symbols. Representation remains materially real; transcendence is unnecessary.

== Learning orientation ==

After reading this section, the reader should be able to:

* distinguish a material difference, a trace, a mark, a public sign, and a symbol;
* explain how an inaugural inscription co-constitutes a mark and its first corresponding symbol;
* explain why later occurrences recognised under an available mark constitute additional symbols without repeating the inaugural inscription;
* state why marks are passive and why recognition, relation, and reorganisation belong to the system operating through symbols;
* defend representation without introducing an immaterial signified;
* explain how an inscribed difference can condition later operations when the configuration that first occasioned it is no longer locally present;
* identify the evidence required before describing a process as symbolic.

The guiding question is: '''How can a material system operate through an inscribed difference when the configuration that occasioned it is no longer locally present, without transferring meaning to another world?'''

== Why the symbol can appear transcendent ==

Public signs can appear to exceed their immediate supports. The same word can be printed in different fonts, spoken by different voices, or stored through different electrical states. These occurrences are materially different, but a system organised through the relevant conventions and protocols can recognise them under an available mark, thereby constituting local symbolic instances. A mathematical expression can likewise be instantiated through different material supports and recognised within different systems.

A legal document can condition what people may do only because people and institutions recognise its signs and operate through the corresponding symbolic relations. Its physical marks do not interpret, compare, command, or regulate by themselves. The relevant efficacy belongs to organised systems operating through locally constituted symbols.

These examples encourage two shortcuts. The first treats meaning as an ideal object that a material sign merely carries. The second reacts by denying representation and reducing a symbol to the physical event that supports it. Neither is adequate. The first separates meaning from its material operations; the second omits the system-relative recognition through which a public sign becomes a symbolic instance and can enter into relations with other symbols.

Derrida uses the trace to unsettle the priority of pure presence; Lacan gives the Symbolic a constitutive role in the formation of the subject; Heidegger examines language as a site of disclosure (Derrida 1982; Lacan 1981; Heidegger 1971). These concepts perform different philosophical functions and should not be treated as versions of one doctrine or as straightforward immaterial substances.

Derrida’s trace must also be distinguished from the trace defined here. In the present framework, a trace is the ephemeral event through which a system discriminates a new or previously unknown material configuration before recognition and inscription. The shared word does not establish conceptual identity.

The criticism tested here is therefore narrower. It asks whether trace, symbolic order, and linguistic disclosure can be reconstructed through the material supports, relations, and operations that make them effective, without leaving those conditions explanatorily secondary. This is a contested disagreement about explanatory priority, not a claim that the three projects are secretly identical.

== From difference to symbol ==

The relevant sequence begins before there is a symbol.

# A material difference occurs: a variation in a field, object, signal, gesture, or other material configuration.
# An organised system discriminates that difference as a new or previously unknown material configuration. This event of discrimination constitutes a trace.
# If the system recognises the manifested difference under a material protocol and singularly inscribes it, the inscription co-constitutes a passive mark and its first corresponding symbol.
# The mark is the materially stabilised configuration. Its passivity is relational: it does not recognise, interpret, compare, or establish relations.
# The first symbol is the material dimension of legibility and representation co-constituted with the mark.
# A later occurrence recognised under the already inscribed mark constitutes an additional symbol without repeating the inaugural inscription.
# The system can establish and revise relations among symbols and, through those relations, modulate its subsequent operations.

Discrimination, recognition, reference, and error must be kept distinct. Discrimination occurs when a capable system encounters a material difference as new or previously unknown; that event constitutes a trace. Once a mark is available, recognition occurs when the system treats a later occurrence as an instance under that mark. The occurrence then constitutes an additional symbolic instance rather than a new inscription. Reference is situated: through the symbol, the system can make the marked configuration relevant to other symbolic operations, including when that configuration is absent from the present location. Error remains possible. An occurrence may be recognised under the wrong mark, or a correct recognition may be related to other symbols in a way that supports a failed prediction or intervention. Material realisation explains how representation operates; it does not make representation infallible.

This account does not claim that a difference becomes symbolic merely by persisting. A pattern in a rock is not a symbol in itself. If a system discriminates that pattern as a new or previously unknown configuration, the discrimination constitutes a trace. If the system recognises and singularly inscribes the manifested difference, the inscription co-constitutes a new mark and its first corresponding symbol. If the system instead recognises the occurrence under a mark already available, the occurrence constitutes an additional symbolic instance.

The relevant questions must therefore remain distinct: which organised system discriminates the difference; under which protocol is the manifested difference recognised and inscribed; which mark and symbol are thereby co-constituted; and what subsequent symbolic operations become possible?

== Representation without an ideal realm ==

A symbol represents a mark. This representational relation is internal to a materially organised process: the mark, the symbol, the recognising system, the protocol, and the later effects all require material realisation. Nothing has to cross from an ideal domain into a physical one.

Representation is therefore preserved, but its scope is specified. A symbol is not a miniature copy of an external object and does not contain an immaterial meaning. By relating symbols, a system can nevertheless make a non-local or no-longer-present configuration relevant to its current operations. A clinical system can relate a symbolic instance preserved in a medical record to a present decision. A user can recognise the public signs on a map as local symbolic instances and use their relations to orient action towards a place that is not visible. Successive mathematical inscriptions can be recognised under available marks, allowing a system to preserve and operate upon relations across different material supports.

The absence involved in these cases is local or temporal, not ontological. The represented configuration may exist elsewhere or may belong to a past material event. In either case, the present operation depends on a materially preserved mark and locally realised symbols. No domain outside spatiotemporal material reality is required.

== What performs the reorganisation? ==

It is tempting to say that a symbol acts, compares, or reorganises. That formulation is too compressed. A mark is passive in the relational sense: it does not recognise, interpret, compare, or establish relations. A symbol is a material instance of legibility and representation. The organised system performs operations by establishing and modifying relations among symbols.

This distinction matters whenever agency is attributed. A warning icon on a screen is a public sign; it does not inspect the situation or decide what to do. Within an organisation of sensors, software, users, protocols, and institutions, the sign may be recognised under an available mark and constitute local symbolic instances. The relevant systems can then relate those symbols to response procedures and modify subsequent action. The effect is real, but it belongs to the organised coupling and cannot be assigned to the isolated sign.

Operative excess occurs when available compatibilities exceed the present symbolic form and force its reorganisation. In a symbolically organised system, this can require the system to reorganise relations among symbols. The resulting operations may produce new configurations; if a system discriminates one of them as new or previously unknown, that event constitutes a new trace, and a new inscription may follow. The inscriptions themselves are not reorganised. Operative excess is the affirmative material cause of the reorganisation, but it does not predetermine the resulting symbolic form or guarantee its truth, meaning, or persistence.

== Worked example: a laboratory alert ==

Consider a laboratory system that monitors temperature.

# A sensor changes state in response to a material variation.
# The organised system discriminates the changed state as a new or previously unknown configuration relevant to the experiment; that discrimination constitutes a trace.
# During calibration, the system recognises the manifested difference under a material protocol and singularly inscribes it. The inscription co-constitutes a materially preserved mark and its first corresponding symbol.
# Later readings recognised under that mark constitute additional symbolic instances without repeating the inaugural inscription.
# The system relates those symbols to other symbols concerning time, sample identity, tolerance, and response procedure.
# The system may then display a public warning sign. Trained users can recognise that sign under available marks, constitute local symbolic instances, and relate them to response procedures that modify their actions.

The alert is not an immaterial meaning attached to a coloured shape, and the shape does not act by itself. Its efficacy depends on the material-symbolic organisation through which systems recognise the public sign, constitute local symbols, and relate those symbols to further operations.

== Common confusions ==

{| class=&quot;wikitable&quot;
! Claim
! It does not mean
|-
| Symbols are material
| A physical description of their support is a complete symbolic explanation
|-
| A symbol represents a mark
| Meaning exists in an ideal realm or the symbol resembles an external object
|-
| Marks are passive
| Marks are unreal or causally irrelevant as material configurations
|-
| Systems relate symbols
| Every responsive system is already symbolic
|-
| Functional absence is real
| Absence constitutes a second ontological domain
|}

== Check your understanding ==

* Why is a persistent material pattern not automatically a mark or a symbol?
* What is co-constituted in the inaugural inscription?
* Why do later recognitions not repeat that inscription?
* Which operations belong to the organised system? Why can they not be attributed to the mark?
* How can a symbol make something absent operable without becoming transcendent?

== Transition ==

If symbols and their effects require no immaterial source, they also require no plan written in advance. [[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/No Ground, No Soul, No Plan|Section 1.5]] examines how order and function can remain real without becoming evidence of a final purpose. For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

{{BookCat}}</text>
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    <revision>
      <id>4671249</id>
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      <timestamp>2026-09-20T01:03:44Z</timestamp>
      <contributor>
        <username>DavidCota64</username>
        <id>3507033</id>
      </contributor>
      <comment>Correct common confusions, system agency, local absence, and transition to antiteleology</comment>
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      <text bytes="14249" sha1="9vaom9ijwmnaaqk7m0500irrpcuhnxp" xml:space="preserve">== 1.4 – The Symbol Is Not Transcendent ==

The previous section located thought within materially organised systems. A further problem now appears. If a symbol can represent an inscribed mark and participate in relations that allow a configuration no longer locally present to condition later operations, does this require a realm of meaning distinct from its physical support?

The answer developed here is no. Symbols are materially realised, but their materiality does not reduce them to ink, sound, voltage, or neural activity considered in isolation. When a system discriminates a new or previously unknown material configuration, that event constitutes a trace. If the system recognises and singularly inscribes the manifested difference, the inscription co-constitutes a mark and its first corresponding symbol. Later occurrences recognised under the available mark constitute additional symbolic instances; they do not repeat the inaugural inscription. The system can then establish and revise relations among symbols. Representation remains materially real; transcendence is unnecessary.

== Learning orientation ==

After reading this section, the reader should be able to:

* distinguish a material difference, a trace, a mark, a public sign, and a symbol;
* explain how an inaugural inscription co-constitutes a mark and its first corresponding symbol;
* explain why later occurrences recognised under an available mark constitute additional symbols without repeating the inaugural inscription;
* state why marks are passive and why recognition, relation, and reorganisation belong to the system operating through symbols;
* defend representation without introducing an immaterial signified;
* explain how an inscribed difference can condition later operations when the configuration that first occasioned it is no longer locally present;
* identify the evidence required before describing a process as symbolic.

The guiding question is: '''How can a material system operate through an inscribed difference when the configuration that occasioned it is no longer locally present, without transferring meaning to another world?'''

== Why the symbol can appear transcendent ==

Public signs can appear to exceed their immediate supports. The same word can be printed in different fonts, spoken by different voices, or stored through different electrical states. These occurrences are materially different, but a system organised through the relevant conventions and protocols can recognise them under an available mark, thereby constituting local symbolic instances. A mathematical expression can likewise be instantiated through different material supports and recognised within different systems.

A legal document can condition what people may do only because people and institutions recognise its signs and operate through the corresponding symbolic relations. Its physical marks do not interpret, compare, command, or regulate by themselves. The relevant efficacy belongs to organised systems operating through locally constituted symbols.

These examples encourage two shortcuts. The first treats meaning as an ideal object that a material sign merely carries. The second reacts by denying representation and reducing a symbol to the physical event that supports it. Neither is adequate. The first separates meaning from its material operations; the second omits the system-relative recognition through which a public sign becomes a symbolic instance and can enter into relations with other symbols.

Derrida uses the trace to unsettle the priority of pure presence; Lacan gives the Symbolic a constitutive role in the formation of the subject; Heidegger examines language as a site of disclosure (Derrida 1982; Lacan 1981; Heidegger 1971). These concepts perform different philosophical functions and should not be treated as versions of one doctrine or as straightforward immaterial substances.

Derrida’s trace must also be distinguished from the trace defined here. In the present framework, a trace is the ephemeral event through which a system discriminates a new or previously unknown material configuration before recognition and inscription. The shared word does not establish conceptual identity.

The criticism tested here is therefore narrower. It asks whether trace, symbolic order, and linguistic disclosure can be reconstructed through the material supports, relations, and operations that make them effective, without leaving those conditions explanatorily secondary. This is a contested disagreement about explanatory priority, not a claim that the three projects are secretly identical.

== From difference to symbol ==

The relevant sequence begins before there is a symbol.

# A material difference occurs: a variation in a field, object, signal, gesture, or other material configuration.
# An organised system discriminates that difference as a new or previously unknown material configuration. This event of discrimination constitutes a trace.
# If the system recognises the manifested difference under a material protocol and singularly inscribes it, the inscription co-constitutes a passive mark and its first corresponding symbol.
# The mark is the materially stabilised configuration. Its passivity is relational: it does not recognise, interpret, compare, or establish relations.
# The first symbol is the material dimension of legibility and representation co-constituted with the mark.
# A later occurrence recognised under the already inscribed mark constitutes an additional symbol without repeating the inaugural inscription.
# The system can establish and revise relations among symbols and, through those relations, modulate its subsequent operations.

Discrimination, recognition, reference, and error must be kept distinct. Discrimination occurs when a capable system encounters a material difference as new or previously unknown; that event constitutes a trace. Once a mark is available, recognition occurs when the system treats a later occurrence as an instance under that mark. The occurrence then constitutes an additional symbolic instance rather than a new inscription. Reference is situated: through the symbol, the system can make the marked configuration relevant to other symbolic operations, including when that configuration is absent from the present location. Error remains possible. An occurrence may be recognised under the wrong mark, or a correct recognition may be related to other symbols in a way that supports a failed prediction or intervention. Material realisation explains how representation operates; it does not make representation infallible.

This account does not claim that a difference becomes symbolic merely by persisting. A pattern in a rock is not a symbol in itself. If a system discriminates that pattern as a new or previously unknown configuration, the discrimination constitutes a trace. If the system recognises and singularly inscribes the manifested difference, the inscription co-constitutes a new mark and its first corresponding symbol. If the system instead recognises the occurrence under a mark already available, the occurrence constitutes an additional symbolic instance.

The relevant questions must therefore remain distinct: which organised system discriminates the difference; under which protocol is the manifested difference recognised and inscribed; which mark and symbol are thereby co-constituted; and what subsequent symbolic operations become possible?

== Representation without an ideal realm ==

A symbol represents a mark. This representational relation is internal to a materially organised process: the mark, the symbol, the recognising system, the protocol, and the later effects all require material realisation. Nothing has to cross from an ideal domain into a physical one.

Representation is therefore preserved, but its scope is specified. A symbol is not a miniature copy of an external object and does not contain an immaterial meaning. By relating symbols, a system can nevertheless make a non-local or no-longer-present configuration relevant to its current operations. A clinical system can relate a symbolic instance preserved in a medical record to a present decision. A user can recognise the public signs on a map as local symbolic instances and use their relations to orient action towards a place that is not visible. Successive mathematical inscriptions can be recognised under available marks, allowing a system to preserve and operate upon relations across different material supports.

The absence involved in these cases is local or temporal, not ontological. The represented configuration may exist elsewhere or may belong to a past material event. In either case, the present operation depends on a materially preserved mark and locally realised symbols. No domain outside spatiotemporal material reality is required.

== What performs the reorganisation? ==

It is tempting to say that a symbol acts, compares, or reorganises. That formulation is too compressed. A mark is passive in the relational sense: it does not recognise, interpret, compare, or establish relations. A symbol is a material instance of legibility and representation. The organised system performs operations by establishing and modifying relations among symbols.

This distinction matters whenever agency is attributed. A warning icon on a screen is a public sign; it does not inspect the situation or decide what to do. Within an organisation of sensors, software, users, protocols, and institutions, the sign may be recognised under an available mark and constitute local symbolic instances. The relevant systems can then relate those symbols to response procedures and modify subsequent action. The effect is real, but it belongs to the organised coupling and cannot be assigned to the isolated sign.

Operative excess occurs when available compatibilities exceed the present symbolic form and force its reorganisation. In a symbolically organised system, this can require the system to reorganise relations among symbols. The resulting operations may produce new configurations; if a system discriminates one of them as new or previously unknown, that event constitutes a new trace, and a new inscription may follow. The inscriptions themselves are not reorganised. Operative excess is the affirmative material cause of the reorganisation, but it does not predetermine the resulting symbolic form or guarantee its truth, meaning, or persistence.

== Worked example: a laboratory alert ==

Consider a laboratory system that monitors temperature.

# A sensor changes state in response to a material variation.
# The organised system discriminates the changed state as a new or previously unknown configuration relevant to the experiment; that discrimination constitutes a trace.
# During calibration, the system recognises the manifested difference under a material protocol and singularly inscribes it. The inscription co-constitutes a materially preserved mark and its first corresponding symbol.
# Later readings recognised under that mark constitute additional symbolic instances without repeating the inaugural inscription.
# The system relates those symbols to other symbols concerning time, sample identity, tolerance, and response procedure.
# The system may then display a public warning sign. Trained users can recognise that sign under available marks, constitute local symbolic instances, and relate them to response procedures that modify their actions.

The alert is not an immaterial meaning attached to a coloured shape, and the shape does not act by itself. Its efficacy depends on the material-symbolic organisation through which systems recognise the public sign, constitute local symbols, and relate those symbols to further operations.

== Common confusions ==

{| class=&quot;wikitable&quot;
! Statement
! It does not mean
|-
| Symbols are materially realised
| A physical description of their isolated support is a complete symbolic explanation
|-
| Public signs can circulate among systems
| Symbols constituted locally in one system are transferred intact to another
|-
| A symbol represents a mark
| Meaning exists in an ideal realm, or the symbol resembles an external object
|-
| Marks are relationally passive
| Marks are unreal, physically inert, or causally irrelevant as material configurations
|-
| Organised systems establish relations among symbols
| Every responsive system is symbolic, or symbolic relations operate independently of a system
|-
| Operative excess can force symbolic reorganisation
| Inscriptions are reorganised, or the resulting symbolic form is predetermined
|-
| A represented configuration may be locally or temporally absent
| The configuration belongs to a second ontological domain outside spatiotemporal material reality
|}

== Check your understanding ==

* Why is a persistent material pattern not automatically a mark or a symbol?
* What is co-constituted in an inaugural inscription?
* Why does the recognition of a later occurrence under an available mark not repeat that inscription?
* Why can a public sign circulate while a symbol remains local to the system in which it is constituted?
* Which operations belong to the organised system, and why can they not be attributed to a mark or an isolated symbol?
* What can operative excess force a symbolically organised system to reorganise, and why are inscriptions themselves not reorganised?
* How can a system use relations among symbols to make a locally or temporally absent configuration relevant to present operations without introducing transcendence?

== Transition ==

Locating symbolic operations within materially organised systems removes the need to posit an immaterial source of meaning. This conclusion does not by itself establish that material order lacks a plan fixed in advance; antiteleology is a separate commitment requiring its own argument.

[[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/No Ground, No Soul, No Plan|Section 1.5]] examines whether order and function can remain real without being treated as evidence of a final purpose. For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

{{BookCat}}</text>
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    </revision>
    <revision>
      <id>4671250</id>
      <parentid>4671249</parentid>
      <timestamp>2026-09-20T01:26:57Z</timestamp>
      <contributor>
        <username>DavidCota64</username>
        <id>3507033</id>
      </contributor>
      <comment>Clarify symbol locality, inaugural recognition, formal abstraction, and system agency</comment>
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      <model>wikitext</model>
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      <text bytes="16138" sha1="le30lyyzbzslezh8lbtra53ultfa1x9" xml:space="preserve">== 1.4 – The Symbol Is Not Transcendent ==

The previous section located thought within materially organised systems. A further problem now appears. If a symbol can represent an inscribed mark and participate in relations that allow a configuration no longer locally present to condition later operations, does this require a realm of meaning distinct from its physical support?

The answer developed here is no. Symbols are materially realised, but their materiality does not reduce them to ink, sound, voltage, or neural activity considered in isolation. When a system discriminates a new or previously unknown material configuration, that event constitutes a trace. If the system recognises and singularly inscribes the manifested difference, the inscription co-constitutes a mark and its first corresponding symbol. Later occurrences recognised under the available mark constitute additional symbolic instances; they do not repeat the inaugural inscription. The system can then establish and revise relations among symbols. Representation remains materially real; transcendence is unnecessary.

== Learning orientation ==

After reading this section, the reader should be able to:

* distinguish a material difference, a trace, a mark, a public sign, and a symbol;
* explain how an inaugural inscription co-constitutes a mark and its first corresponding symbol;
* explain why later occurrences recognised under an available mark constitute additional symbols without repeating the inaugural inscription;
* state why marks are passive and why recognition, relation, and reorganisation belong to the system operating through symbols;
* defend representation without introducing an immaterial signified;
* explain how a system can use an available mark and locally constituted symbols when the configuration that occasioned the inaugural inscription is no longer locally present;
* identify the evidence required before describing a process as symbolic.

The guiding question is: '''How can a material system use an available mark and relations among locally constituted symbols when the configuration that occasioned the inaugural inscription is no longer locally present, without transferring meaning to another world?'''

== Why the symbol can appear transcendent ==

Public signs can appear to exceed their immediate supports. The same word can appear in print, handwriting, speech, or an electrical state. A public sign is a materially stabilised configuration governed by shared conventions or codes. It may circulate among systems, but a capable receiving system constitutes a local symbolic instance only by recognising the occurrence under an available mark. A mathematical expression can likewise be materially instantiated in different ways and recognised within different systems.

A legal document can condition what people may do only because people and institutions recognise its public signs as local symbolic instances and relate those symbols to rules and procedures. The document’s visible characters do not interpret, compare, command, or regulate by themselves. The relevant efficacy belongs to organised systems operating through locally constituted symbols.

Two shortcuts follow from these examples. The first treats meaning as an ideal object that a material sign merely carries. The second denies representation by reducing a symbolic occurrence to an isolated physical description of its material configuration. Neither is adequate. The first separates meaning from its material operations; the second omits the system-relative recognition through which a public sign becomes a local symbolic instance and enters into relations with other symbols.

Derrida uses the trace to unsettle the priority of pure presence; Lacan gives the Symbolic a constitutive role in the formation of the subject; Heidegger examines language as a site of disclosure (Derrida 1982; Lacan 1981; Heidegger 1971). The three concepts perform different philosophical functions and should not be treated as versions of one doctrine or as straightforward immaterial substances.

Derrida’s trace must also be distinguished from the trace defined here. In the present framework, a trace is the ephemeral event through which a system discriminates a new or previously unknown material configuration before recognition and inscription. The shared word does not establish conceptual identity.

The criticism tested here is therefore narrower. It asks whether trace, symbolic order, and linguistic disclosure can be reconstructed through the material supports, relations, and operations that make them effective, without leaving those conditions explanatorily secondary. The disagreement concerns explanatory priority; it does not collapse the three projects into one.

== From difference to symbol ==

The relevant sequence begins before there is a symbol.

# A material difference occurs: a variation in a field, object, signal, gesture, or other material configuration.
# An organised system discriminates that difference as a new or previously unknown material configuration. This event of discrimination constitutes a trace.
# If the system recognises the manifested difference under a material protocol and singularly inscribes it, the inscription co-constitutes a passive mark and its first corresponding symbol.
# The mark is the materially stabilised configuration. Its passivity is relational: it does not recognise, interpret, compare, or establish relations.
# The first symbol is the material dimension of legibility and representation co-constituted with the mark.
# A later occurrence recognised under the already inscribed mark constitutes an additional symbol without repeating the inaugural inscription.
# The system can establish and revise relations among symbols and, through those relations, modulate its subsequent operations.

Discrimination, recognition, reference, and error must be kept distinct. Discrimination occurs when a capable system encounters a material difference as new or previously unknown; that event constitutes a trace. In the inaugural case, recognition occurs within the singular inscription that co-constitutes the mark and its first corresponding symbol. Once a mark is available, recognition of a later occurrence under that mark constitutes an additional symbolic instance rather than a new inscription. Reference is situated: through locally constituted symbols, the system can make the marked configuration relevant to other symbolic operations, including when that configuration is not present at the current location. Error remains possible. An occurrence may be recognised under the wrong mark, or a correct recognition may be related to other symbols in a way that supports a failed prediction or intervention. Material realisation explains how representation operates; it does not make representation infallible.

Persistence alone does not make a difference symbolic. A pattern in a rock is not a symbol in itself. If a system discriminates that pattern as a new or previously unknown configuration, the discrimination constitutes a trace. If the system recognises and singularly inscribes the manifested difference, the inscription co-constitutes a new mark and its first corresponding symbol. If the system instead recognises the occurrence under a mark already available, the occurrence constitutes an additional symbolic instance.

The relevant questions must therefore remain distinct: which organised system discriminates the difference; under which protocol is the manifested difference recognised and inscribed; which mark and symbol are thereby co-constituted; and what subsequent symbolic operations become possible?

== Representation without an ideal realm ==

A symbol represents a mark. The representational relation is internal to a materially organised process: the mark, the symbol, the recognising system, the protocol, and the later effects all require material realisation. Nothing has to cross from an ideal domain into a physical one.

Representation is therefore preserved, but its scope is specified. A symbol is not a miniature copy of an external object and does not contain an immaterial meaning. By relating symbols, a system can nevertheless make a non-local or no-longer-present configuration relevant to its current operations. A clinical system can recognise public signs preserved in a medical record as local symbolic instances and relate those symbols to a present decision. A user can recognise the public signs on a map as local symbolic instances and use their relations to orient action towards a place that is not visible. Successive material occurrences of mathematical signs can be recognised under available marks, allowing a system to preserve and operate upon relations across different supports.

The absence involved in these cases is local or temporal, not ontological. The represented configuration may exist elsewhere or may belong to a past material event. In either case, present operation depends on material supports, applicable protocols, available marks, and locally constituted symbols. No domain outside spatiotemporal material reality is required.

==== Formal abstraction does not require another realm ====

Formal languages present a harder case because the same relation can be preserved across materially different occurrences. Repeatability does not make the relation immaterial. Public mathematical signs circulate through conventional notations, while each capable system recognises their occurrences under available marks and constitutes local symbolic instances. What persists across media is the reproducibility of operations under explicit rules, not an entity detached from material realisation.

A proof is therefore not a sequence of inscriptions in the technical sense used here. Its signs may occur in writing, speech, memory states, or computation. Occurrences recognised under available marks constitute symbolic instances; only a genuinely new and discriminated configuration can occasion a trace and an inaugural inscription. The proof is valid when each transformation follows the applicable rules and preserves the inferential relation between its steps. Formal necessity can thus be treated through materially realised and publicly checkable operations without reducing it to the accidental properties of a particular support.

Materialism does not entail instrumentalism. Symbols can carry content and support knowledge because systems use them to represent marks and to establish relations open to correction by further operations. Their reality and epistemic force depend on those material relations; neither is exhausted by immediate practical usefulness.

== What performs the reorganisation? ==

It is tempting to attribute comparison or reorganisation directly to a symbol. That formulation is too compressed. A mark is passive in the relational sense: it does not recognise, interpret, compare, or establish relations. A symbol is a material instance of legibility and representation. The organised system performs operations by establishing and modifying relations among symbols.

The attribution of agency depends on this distinction. A warning icon on a screen is a public sign; it does not inspect the situation or decide what to do. Within an organisation of sensors, software, users, protocols, and institutions, the sign may be recognised under an available mark and constitute local symbolic instances. The relevant systems can then relate those symbols to response procedures and modify subsequent action. The effect is real, but it belongs to the organised coupling and cannot be assigned to the isolated sign.

Operative excess occurs when available compatibilities exceed the present symbolic form and force its reorganisation. In a symbolically organised system, this can require the system to reorganise relations among symbols. The resulting operations may produce new configurations; if a system discriminates one of them as new or previously unknown, that event constitutes a new trace, and a new inscription may follow. The inscriptions themselves are not reorganised. Operative excess is the affirmative material cause of the reorganisation, but it does not predetermine the resulting symbolic form. Nor does it guarantee that the result will be meaningful or true, or that it will persist.

== Worked example: a laboratory alert ==

Consider a laboratory system that monitors temperature.

# A sensor changes state in response to a material variation.
# The organised system discriminates the changed state as a new or previously unknown configuration relevant to the experiment; that discrimination constitutes a trace.
# During calibration, the system recognises the manifested difference under a material protocol and singularly inscribes it. The inscription co-constitutes a materially preserved mark and its first corresponding symbol.
# Later readings recognised under that mark constitute additional symbolic instances without repeating the inaugural inscription.
# The system relates those symbols to other symbols concerning time, sample identity, tolerance, and response procedure.
# The system may then display a public warning sign. Trained users can recognise that sign under available marks and thereby constitute local symbolic instances. They can then relate those symbols to response procedures that modify their actions.

The alert is not an immaterial meaning attached to a coloured shape, and the shape does not act by itself. Its efficacy depends on a material-symbolic organisation in which public signs are locally recognised as symbols and integrated into further symbolic relations.

== Common confusions ==

{| class=&quot;wikitable&quot;
! Statement
! It does not mean
|-
| Symbols are materially realised
| A physical description of their isolated support is a complete symbolic explanation
|-
| Public signs can circulate among systems
| Symbols constituted locally in one system are transferred intact to another
|-
| A symbol represents a mark
| Meaning exists in an ideal realm, or the symbol resembles an external object
|-
| Marks are relationally passive
| Marks are unreal, physically inert, or causally irrelevant as material configurations
|-
| Organised systems establish relations among symbols
| Every responsive system is symbolic, or symbolic relations operate independently of a system
|-
| Operative excess can force symbolic reorganisation
| Inscriptions are reorganised, or the resulting symbolic form is predetermined
|-
| A represented configuration may be locally or temporally absent
| The configuration belongs to a second ontological domain outside spatiotemporal material reality
|}

== Check your understanding ==

* Why is a persistent material pattern not automatically a mark or a symbol?
* What is co-constituted in an inaugural inscription?
* Why does the recognition of a later occurrence under an available mark not repeat that inscription?
* Why can a public sign circulate while a symbol remains local to the system in which it is constituted?
* Which operations belong to the organised system, and why can they not be attributed to a mark or an isolated symbol?
* What can operative excess force a symbolically organised system to reorganise, and why are inscriptions themselves not reorganised?
* How can a system use relations among symbols to make a locally or temporally absent configuration relevant to present operations without introducing transcendence?

== Transition ==

Locating symbolic operations within materially organised systems removes the need to posit an immaterial source of meaning. The conclusion does not by itself establish that material order lacks a plan fixed in advance; antiteleology is a separate commitment requiring its own argument.

[[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/No Ground, No Soul, No Plan|Section 1.5]] examines whether order and function can remain real without being treated as evidence of a final purpose. For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

{{BookCat}}</text>
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    <title>Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/No Ground, No Soul, No Plan</title>
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    <revision>
      <id>4671252</id>
      <parentid>4671080</parentid>
      <timestamp>2026-09-20T01:44:59Z</timestamp>
      <contributor>
        <username>DavidCota64</username>
        <id>3507033</id>
      </contributor>
      <comment>Clarify antiteleology, local purposes, structured contingency, and scale-specific order</comment>
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      <text bytes="10279" sha1="q6xsdfm4h5ad6nc0q12aqydj5y87shb" xml:space="preserve">== 1.5 – No Ground, No Soul, No Plan ==

Several influential Western philosophical lineages have explained order by reference to final causes, providential design, historical consummation, or cosmic convergence. Aristotle’s unmoved mover, Augustine’s providential history, Hegel’s self-realisation of Spirit, and Teilhard de Chardin’s convergence of evolution towards spirit are not versions of one doctrine. They nevertheless offer distinct cases in which becoming is interpreted through an end or governing order that is not produced by the local material process under description (Aristotle 1984a, 1072b; Augustine 2003; Hegel [1807] 1977; Teilhard de Chardin [1955] 1959).

Dualism can support this teleological imaginary, but it does not entail it. Where an ideal or eternal order is treated as the origin and norm of a material and temporal one, becoming can be read as movement towards completion. Matter then appears either as the vehicle of a prescribed development or as an obstacle to it. Because finality can also be conceived as immanent, however, rejecting two worlds cannot carry the antiteleological argument by itself.

An additional commitment is therefore required: no cosmic finality or pre-written programme governs material becoming. ‘Ground’ here means an ultimate basis outside or beneath the field that would secure the whole; it does not mean a local material support or enabling condition. ‘Soul’ means an immaterial substance, while ‘plan’ means an antecedent programme imposed upon the course of the real. This refusal leaves local design and biological function untouched. Organised systems can formulate projects and produce arrangements directed towards situated ends; those ends are material effects of the systems concerned, not instructions written into reality as a whole.

Spinoza’s critique of final causes already exposes the projection of human purposes onto nature (Spinoza [1677] 1996, 25–29). The present position retains that anti-finalist force without adopting his substance–attribute architecture. Material becoming is not an evolution towards spirit. Nor does it express divine intention or conceal a truth awaiting revelation.

Antiteleology does not imply chaos. Material order can arise and persist wherever functional couplings sustain consistent relations under specific conditions. A designed object may serve a local purpose, and an organism may possess functions shaped by selection; neither fact establishes a purpose governing matter as a whole. Coherence is achieved rather than guaranteed. When supporting relations alter, a configuration may persist in another regime. It may instead dissolve or reorganise.

Operability and symbolic sense must remain distinct. Non-symbolic organisations can be functionally effective without meaning anything. Sense arises only in systems capable of locally constituting symbols and relating them. It is materially realised and remains open to correction; it is not an echo of essence. The absence of global purpose therefore leaves both symbolic content and non-symbolic efficacy intact.

Contingency here is structured, not absolute indeterminacy. Physical constraints and available compatibilities delimit what can occur; historical relations condition which configurations arise. When available compatibilities exceed the present structural or symbolic form, operative excess renders that form insufficient and forces reorganisation. It neither selects the result in advance nor guarantees its persistence. Contingency remains causal without being destined.

The antiteleological commitment excludes any model in which becoming fulfils a destination fixed in advance. It therefore contests readings of Hegelian development as necessary progress towards reconciliation, as well as theological eschatologies (Hegel [1807] 1977). Bergson requires a different diagnosis. He rejects a prearranged programme and radical finalism, yet retains an original impetus and an internal direction in life (Bergson 1911). The present position retains creative unpredictability while refusing such an impetus as a general explanatory principle.

Kauffman’s account of coevolution explicitly denies a master choreographer while asking whether coevolving systems tend towards the edge of chaos (Kauffman 1995, 223). Such models need not be teleological. The problem begins when scale-specific dynamics are promoted into a universal tendency towards higher order. Direction must be demonstrated at the scale under study rather than projected retrospectively onto the process.

No ultimate ground, immaterial soul, or pre-written plan governs the field. Material configurations emerge through local compatibilities and functional couplings. Some persist provisionally; others dissolve or reorganise as conditions change. No destination waits inside the process. The question is now material rather than teleological: what can matter do, and why is the instability that prevents final closure also a condition of further organisation?

== 🜂 Reading Colloquium – Pedagogical Framing ==
''(For students and readers in formation. This section does not replace the text — it accompanies it.)''

=== 1. Placement of the Text within the Architecture of the Work ===
This fifth text marks a decisive shift in the consolidation of the Ontology of Emergent Complexity: it is here that the most explicit rupture with Western theological, teleological, and metaphysical inheritances takes place. While previous texts had already rejected dualisms, transcendences, and essentialisms, this one affirms — without reservation — that there is no ground, no soul, no plan. On this account, reality as a whole is not guided, not redeemable, not finalizable.

This move dismantles the entire edifice of classical philosophy, from Aristotle to contemporary complexity theory, rejecting both final causality and the more modern insinuation of a “natural tendency” toward order, progress, or functional harmony.

=== 2. Philosophical Problem at Stake ===
The central question here is: can the real be thought without purpose, plan, or orienting essence? The text shows how Western philosophy — even in secular and modern versions — continues to operate under the belief that matter must respond to something “more”: a meaning, a destiny, a soul, or an invisible rationality.

The chapter dismantles that presupposition. There is no cosmic plan or pre-written design governing the whole. What exists need not follow a vocation — and yet material systems can organise themselves, while symbolically capable systems can formulate local purposes and designs. The central wager is organisation without an externally given finality; it does not deny situated projects or functional ends.

=== 3. Core Thesis and Conceptual Reorganisation ===
The thesis can be stated as follows: reality as a whole has no external ground, transcendent soul, or pre-written plan — and this absence is not a flaw but a condition of material emergence. Here, “plan” means a programme antecedent to and governing the real; it does not mean the situated plans, designs, functions, or purposes that some organised systems can produce. Matter can organise without external direction, through local compatibilities, operational thresholds, and functional couplings.

Functional coupling designates contingent junctions between partial structures, which, even in the absence of any plan, produce provisionally consistent and operative forms. What emerges is not what “should” be, but what manages to sustain itself.

In this framework, contingency is not a sign of disorder but the condition under which systems can stabilise without acquiring a final guarantee. The world is neither falling from an origin nor progressing towards a goal. Material configurations reorganise under changing constraints and couplings; when available compatibilities exceed the present symbolic or structural form, operative excess renders that form insufficient and forces reorganisation without dictating the form that will emerge.

=== 4. Key Concepts and Articulations ===

* '''Rejection of teleology''': no direction is inscribed in matter; the real does not fulfil a plan — it operates from within.
* '''Denial of ground''': there is no ontological foundation where meaning rests — only operations of transient consistency.
* '''Functional coupling''': a form of local junction between partial systems that produces operative stabilisations without any prior blueprint.
* '''Contingency as condition''': what happens is not error or deviation. Reorganisation does not require a predetermined purpose, even though some systems can develop local purposes after they emerge.
* '''Reconfiguration without redemption''': what stabilises does so without promising salvation or progress.

The refusal of a plan does not lead to nihilism — it leads to immanent responsibility. No external order secures the world, so responsibility must be exercised through the situated capacities of material configurations for response and reconfiguration. Symbolic inscription is one local capacity of appropriately organised systems, not a capacity of the world as a whole.

=== 5. Implications for Readers and Pedagogical Pathways ===
This text challenges one of the most deeply rooted structures of philosophical and theological tradition: the assumption that reality must have a goal, a beginning, or a direction in order to be intelligible. The argument refuses this model. What renders something consistent is not its fidelity to a plan, but its capacity to operate functional relations under pressure.

Pedagogical pathways for deeper engagement:

* Map the subtle forms of teleology present in contemporary theories of self-organisation, evolution, or history.
* Distinguish between emergent coherence and projected finalism.
* Explore the concept of functional coupling as a form of organisation without plan.
* Exercise: take a scientific, political, or artistic explanation that presupposes an inevitable direction and rewrite it through the lens of local organisation without telos.

For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

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      <text bytes="11297" sha1="lw7x7w5k5jksfwqw5sdc429ud2s1veo" xml:space="preserve">== 1.5 – No Ground, No Soul, No Plan ==

Several influential Western philosophical lineages have explained order by reference to final causes, providential design, historical consummation, or cosmic convergence. Aristotle’s unmoved mover, Augustine’s providential history, Hegel’s self-realisation of Spirit, and Teilhard de Chardin’s convergence of evolution towards spirit are not versions of one doctrine. They nevertheless offer distinct cases in which becoming is interpreted through an end or governing order that is not produced by the local material process under description (Aristotle 1984a, 1072b; Augustine 2003; Hegel [1807] 1977; Teilhard de Chardin [1955] 1959).

Dualism can support this teleological imaginary, but it does not entail it. Where an ideal or eternal order is treated as the origin and norm of a material and temporal one, becoming can be read as movement towards completion. Matter then appears either as the vehicle of a prescribed development or as an obstacle to it. Because finality can also be conceived as immanent, however, rejecting two worlds cannot carry the antiteleological argument by itself.

An additional commitment is therefore required: no cosmic finality or pre-written programme governs material becoming. ‘Ground’ here means an ultimate basis outside or beneath the field that would secure the whole; it does not mean a local material support or enabling condition. ‘Soul’ means an immaterial substance, while ‘plan’ means an antecedent programme imposed upon the course of the real. This refusal leaves local design and biological function untouched. Organised systems can formulate projects and produce arrangements directed towards situated ends; those ends are material effects of the systems concerned, not instructions written into reality as a whole.

Spinoza’s critique of final causes already exposes the projection of human purposes onto nature (Spinoza [1677] 1996, 25–29). The present position retains that anti-finalist force without adopting his substance–attribute architecture. Material becoming is not an evolution towards spirit. Nor does it express divine intention or conceal a truth awaiting revelation.

Antiteleology does not imply chaos. Material order can arise and persist wherever functional couplings sustain consistent relations under specific conditions. A designed object may serve a local purpose, and an organism may possess functions shaped by selection; neither fact establishes a purpose governing matter as a whole. Coherence is achieved rather than guaranteed. When supporting relations alter, a configuration may persist in another regime. It may instead dissolve or reorganise.

Operability and symbolic sense must remain distinct. Non-symbolic organisations can be functionally effective without meaning anything. Sense arises only in systems capable of locally constituting symbols and relating them. It is materially realised and remains open to correction; it is not an echo of essence. The absence of global purpose therefore leaves both symbolic content and non-symbolic efficacy intact.

Contingency here is structured, not absolute indeterminacy. Physical constraints and available compatibilities delimit what can occur; historical relations condition which configurations arise. When available compatibilities exceed the present structural or symbolic form, operative excess renders that form insufficient and forces reorganisation. It neither selects the result in advance nor guarantees its persistence. Contingency remains causal without being destined.

The antiteleological commitment excludes any model in which becoming fulfils a destination fixed in advance. It therefore contests readings of Hegelian development as necessary progress towards reconciliation, as well as theological eschatologies (Hegel [1807] 1977). Bergson requires a different diagnosis. He rejects a prearranged programme and radical finalism, yet retains an original impetus and an internal direction in life (Bergson 1911). The present position retains creative unpredictability while refusing such an impetus as a general explanatory principle.

Kauffman’s account of coevolution explicitly denies a master choreographer while asking whether coevolving systems tend towards the edge of chaos (Kauffman 1995, 223). Such models need not be teleological. The problem begins when scale-specific dynamics are promoted into a universal tendency towards higher order. Direction must be demonstrated at the scale under study rather than projected retrospectively onto the process.

No ultimate ground, immaterial soul, or pre-written plan governs the field. Material configurations emerge through local compatibilities and functional couplings. Some persist provisionally; others dissolve or reorganise as conditions change. No destination waits inside the process. The question is now material rather than teleological: what can matter do, and why is the instability that prevents final closure also a condition of further organisation?

== 🜂 Reading Colloquium – Pedagogical Framing ==

''(For students and readers in formation. This section does not replace the text — it accompanies it.)''

=== 1. Placement of the Text within the Architecture of the Work ===
Section 1.5 adds an independent antiteleological commitment to the refusals established in Sections 1.1–1.4. The rejection of dualism, two-world ontologies, an immaterial thinking substance, and a transcendent symbol excludes several traditional supports of teleology, but it does not by itself refute every possible account of immanent finality. This section therefore performs a further operation: it separates material order from any antecedent purpose governing becoming as a whole.

=== 2. Philosophical Problem at Stake ===
The problem is not whether purposes, functions, or directional processes exist at particular scales. Organised systems can formulate projects; designed objects can serve purposes; organisms can possess functions shaped by selection; and specific dynamics may exhibit demonstrable direction.

The question is whether any of these local facts warrants the stronger claim that matter, life, or history is governed by a destination fixed in advance. Aristotle, Augustine, Hegel, and Teilhard de Chardin offer different philosophical systems rather than versions of a single doctrine. They are brought together here only because each provides a distinct case in which becoming is interpreted through an end or governing order not produced by the local material process under description.

=== 3. Core Thesis and Conceptual Reorganisation ===
No ultimate ground outside or beneath the material field secures the whole. No immaterial soul directs material organisation, and no pre-written plan determines what becoming must accomplish. This does not remove local material supports, enabling conditions, biological functions, or situated purposes. It denies their promotion into evidence of a purpose governing reality as a whole.

Order can arise where functional couplings sustain consistent relations under specific conditions. These processes are neither arbitrary nor destined. Physical constraints delimit what can occur, while historical relations condition which configurations actually arise. When available compatibilities exceed the present structural or symbolic form, operative excess renders that form insufficient and forces reorganisation. It does not select the result beforehand or guarantee that the resulting organisation will persist.

Emergence must therefore not be identified with survival. A configuration may emerge and dissolve, persist provisionally, or reorganise into another regime. Persistence is one possible history of an emergent configuration, not the definition or measure of emergence itself.

=== 4. Key Concepts and Their Articulation ===
* '''Ultimate ground:''' a basis outside or beneath the material field that would secure the whole. Its rejection does not deny local supports or enabling conditions.
* '''Antiteleology:''' the refusal of a destination or governing purpose inscribed in material becoming as a whole. It does not deny local direction when that direction is demonstrated.
* '''Local purpose and function:''' situated effects produced within organised systems, rather than instructions imposed upon reality from outside or in advance.
* '''Functional coupling:''' the process by which partial material organisations articulate so as to produce a functionally consistent system that exceeds the sum of its parts. It names local compatibilities among distinct operative regimes, not a mere junction or guaranteed stabilisation.
* '''Structured contingency:''' historical singularity operating within material constraints. What occurs is causally conditioned without being prescribed by a final destination.
* '''Operative excess:''' the situation in which available compatibilities exceed the present structural or symbolic form, rendering it insufficient and forcing reorganisation without predetermining its result.
* '''Operability and symbolic sense:''' non-symbolic organisations can be functionally effective without meaning anything. Sense arises only where an organised system can constitute symbols and establish relations among them.

=== 5. Implications for Readers and Pedagogical Pathways ===
The decisive distinction is one of scale and explanatory status. A local function does not establish a cosmic purpose. A directional process observed under particular conditions does not demonstrate a universal tendency. A material support is not an ultimate ground, and causal constraint is not destiny.

The chapter must therefore be protected from several common misreadings:

{| class=&quot;wikitable&quot;
! The chapter claims
! It does not claim
|-
| There is no ultimate ground
| Material organisations lack local supports
|-
| There is no cosmic plan
| Organised systems cannot formulate projects
|-
| Contingency is structured
| Events occur without causes or constraints
|-
| Emergence is not predetermined
| Whatever persists counts as emergent
|-
| Functional couplings produce new organisation
| Every junction or stabilisation is a functional coupling
|-
| Global purpose is unnecessary
| Symbolic meaning or non-symbolic efficacy is unreal
|}

The absence of a cosmic plan also does not, by itself, establish an ethics of responsibility. It removes an external guarantor, but ethical responsibility requires its own argument concerning vulnerability, response, and the consequences of materially situated action.

Suggestions for further engagement:

* Distinguish global teleology, local design, biological function, and scale-specific direction.
* Examine whether a model of self-organisation demonstrates direction at the scale studied or projects it retrospectively onto the process.
* Compare Bergson and Kauffman without classifying either position as straightforwardly teleological.
* Exercise: identify a scientific, political, or historical explanation that assumes an inevitable outcome, then reformulate it in terms of constraints, local compatibilities, functional couplings, and open results.

For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

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      <text bytes="11464" sha1="7x8wp0ogm3e0kyq8pdqlayydik5fcyl" xml:space="preserve">== 1.5 – No Ground, No Soul, No Plan ==

Several influential Western philosophical lineages have explained order by reference to final causes, providential design, historical consummation, or cosmic convergence. Aristotle’s unmoved mover, Augustine’s providential history, Hegel’s self-realisation of Spirit, and Teilhard de Chardin’s convergence of evolution towards spirit are not versions of one doctrine. They nevertheless offer distinct cases in which becoming is interpreted through an antecedent end or governing order treated as fixing what the material process must become (Aristotle 1984a, 1072b; Augustine 2003; Hegel [1807] 1977; Teilhard de Chardin [1955] 1959).

Dualism can support this teleological imaginary, but it does not entail it. Where an ideal or eternal order is treated as the origin and norm of a material and temporal one, becoming can be read as movement towards completion. Matter then appears either as the vehicle of a prescribed development or as an obstacle to it. Because finality can also be conceived as immanent, however, rejecting two worlds cannot carry the antiteleological argument by itself.

An additional commitment is therefore required: no cosmic finality or pre-written programme governs material becoming. ‘Ground’ here means an ultimate basis outside or beneath the field that would secure the whole; it does not mean a local material support or enabling condition. ‘Soul’ means an immaterial substance, while ‘plan’ means an antecedent programme imposed upon the course of the real. This refusal leaves local design and biological function untouched. Organised systems can formulate projects and produce arrangements directed towards situated ends; those ends are material effects of the systems concerned, not instructions written into reality as a whole.

Spinoza’s critique of final causes already exposes the projection of human purposes onto nature (Spinoza [1677] 1996, 25–29). The present position retains that anti-finalist force without adopting his substance–attribute architecture. Material becoming is not an evolution towards spirit. Nor does it express divine intention or conceal a truth awaiting revelation.

Antiteleology does not imply chaos. Material order can arise and persist wherever functional couplings sustain consistent relations under specific conditions. A designed object may serve a local purpose, and an organism may possess functions shaped by selection; neither fact establishes a purpose governing matter as a whole. Coherence is achieved rather than guaranteed. When supporting relations alter, a configuration may persist in another regime. It may instead dissolve or reorganise.

Operability and symbolic sense must remain distinct. Non-symbolic organisations can be functionally effective without meaning anything. Sense arises only in systems capable of locally constituting symbols and relating them. It is materially realised and remains open to correction; it is not an echo of essence. The absence of global purpose therefore leaves both symbolic content and non-symbolic efficacy intact.

Contingency here is structured, not absolute indeterminacy. Physical constraints and available compatibilities delimit what can occur; historical relations condition which configurations arise. When available compatibilities exceed the present symbolic or structural form, operative excess renders that form insufficient and forces reorganisation. It neither selects the result in advance nor guarantees its persistence. Contingent outcomes remain causally conditioned without being destined.

The antiteleological commitment excludes any model in which becoming fulfils a destination fixed in advance. It therefore contests readings of Hegelian development as necessary progress towards reconciliation, as well as theological eschatologies (Hegel [1807] 1977). Bergson requires a different diagnosis. He rejects a prearranged programme and radical finalism, yet retains an original impetus expressed through divergent tendencies rather than through a final state fixed in advance (Bergson 1911). The present position agrees that novelty is not prearranged but does not invoke such an impetus as a general explanatory principle.

Kauffman’s account of coevolution explicitly denies a master choreographer while asking whether coevolving systems tend towards the edge of chaos (Kauffman 1995, 223). Such models need not be teleological. The problem begins when scale-specific dynamics are promoted into a universal tendency towards higher order. Direction must be demonstrated at the scale under study rather than projected retrospectively onto the process.

No ultimate ground, immaterial soul, or pre-written plan governs the field. Material configurations emerge through local compatibilities and functional couplings. Some persist provisionally; others dissolve or reorganise as conditions change. No destination waits inside the process. The question is now material rather than teleological: what can matter do, and why is the instability that prevents final closure also a condition of further organisation?

== 🜂 Reading Colloquium – Pedagogical Framing ==

''(For students and readers in formation. This section does not replace the text — it accompanies it.)''

=== 1. Placement of the Text within the Architecture of the Work ===
Section 1.5 adds an independent antiteleological commitment to the refusals established in Sections 1.1–1.4. The rejection of dualism, two-world ontologies, an immaterial thinking substance, and a transcendent symbol excludes several traditional supports of teleology, but it does not by itself refute every possible account of immanent finality. This section therefore performs a further operation: it separates material order from any antecedent purpose governing becoming as a whole.

=== 2. Philosophical Problem at Stake ===
The problem is not whether purposes, functions, or directional processes exist at particular scales. Organised systems can formulate projects; designed objects can serve purposes; organisms can possess functions shaped by selection; and specific dynamics may exhibit demonstrable direction.

The question is whether any of these local facts warrants the stronger claim that matter, life, or history is governed by a destination fixed in advance. Aristotle, Augustine, Hegel, and Teilhard de Chardin offer different philosophical systems rather than versions of a single doctrine. They are brought together here only because each provides a distinct case in which becoming is interpreted through an antecedent end or governing order treated as fixing what the material process must become.

=== 3. Core Thesis and Conceptual Reorganisation ===
No ultimate ground outside or beneath the material field secures the whole. No immaterial soul directs material organisation, and no pre-written plan determines what becoming must accomplish. This does not remove local material supports, enabling conditions, biological functions, or situated purposes. It denies their promotion into evidence of a purpose governing reality as a whole.

Order can arise where functional couplings sustain consistent relations under specific conditions. These processes are neither arbitrary nor destined. Physical constraints delimit what can occur, while historical relations condition which configurations actually arise. When available compatibilities exceed the present symbolic or structural form, operative excess renders that form insufficient and forces reorganisation. It does not select the result beforehand or guarantee that the resulting organisation will persist.

Emergence must therefore not be identified with survival. A configuration may emerge and dissolve, persist provisionally, or reorganise into another regime. Persistence is one possible history of an emergent configuration, not the definition or measure of emergence itself.

=== 4. Key Concepts and Their Articulation ===
* '''Ultimate ground:''' a basis outside or beneath the material field that would secure the whole. Its rejection does not deny local supports or enabling conditions.
* '''Antiteleology:''' the refusal of a destination or governing purpose inscribed in material becoming as a whole. It does not deny local direction when that direction is demonstrated.
* '''Local purpose and function:''' projects and purposes formulated by organised systems, together with functions arising within specific material and evolutionary histories. None constitutes an instruction governing reality as a whole.
* '''Functional coupling:''' the process by which partial material organisations articulate so as to produce a functionally consistent system that exceeds the sum of its parts. It names local compatibilities among distinct operative regimes, not a mere junction or guaranteed stabilisation.
* '''Structured contingency:''' historical singularity operating within material constraints. What occurs is causally conditioned without being prescribed by a final destination.
* '''Operative excess:''' the situation in which available compatibilities exceed the present symbolic or structural form, rendering it insufficient and forcing reorganisation without predetermining its result.
* '''Operability and symbolic sense:''' non-symbolic organisations can be functionally effective without meaning anything. Sense arises only where an organised system can constitute symbols and establish relations among them.

=== 5. Implications for Readers and Pedagogical Pathways ===
The decisive distinction is one of scale and explanatory status. A local function does not establish a cosmic purpose. A directional process observed under particular conditions does not demonstrate a universal tendency. A material support is not an ultimate ground, and causal constraint is not destiny.

The chapter must therefore be protected from several common misreadings:

{| class=&quot;wikitable&quot;
! The chapter claims
! It does not claim
|-
| There is no ultimate ground
| Material organisations lack local supports
|-
| There is no cosmic plan
| Organised systems cannot formulate projects
|-
| Contingency is structured
| Events occur without causes or constraints
|-
| Emergence is not predetermined
| Whatever persists counts as emergent
|-
| Functional couplings produce new organisation
| Every junction or stabilisation is a functional coupling
|-
| Global purpose is unnecessary
| Symbolic meaning or non-symbolic efficacy is unreal
|}

The absence of a cosmic plan also does not, by itself, establish an ethics of responsibility. It removes an external guarantor, but ethical responsibility requires its own argument concerning vulnerability, response, and the consequences of materially situated action.

Suggestions for further engagement:

* Distinguish global teleology, local design, biological function, and scale-specific direction.
* Examine whether a model of self-organisation demonstrates direction at the scale studied or projects it retrospectively onto the process.
* Compare Bergson and Kauffman without classifying either position as straightforwardly teleological.
* Exercise: identify a scientific, political, or historical explanation that assumes an inevitable outcome, then reformulate it in terms of constraints, local compatibilities, functional couplings, and open results.

For bibliographic details, see [[Foundations of the Ontology of Emergent Complexity/References|References]].

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      <text bytes="11108" sha1="6w0vf5dd4e4ph42a0x46a2k4p3nvpnp" xml:space="preserve">== 1.6 – Matter as the Only Substrate ==

To say that matter is the only substrate can sound self-contradictory in a philosophy that rejects ultimate grounds. The apparent contradiction disappears once two senses of ''substrate'' are separated. The chapter rejects a '''substratum''': an inert layer lying beneath appearances and waiting to receive form. It retains “only substrate” as a negative ontological commitment: nothing that exists requires an immaterial substance, a transcendent plane, or a disembodied principle. There is one material field, internally differentiated and capable of producing heterogeneous regimes of organisation.

The position developed here is therefore materialist without treating matter as dead stuff, and non-reductive without adding a second world.

== Learning orientation ==

After reading this chapter, the reader should be able to:

* distinguish matter from a passive metaphysical substratum;
* explain why materialism does not entail physicalist reduction;
* separate operative effect from agency;
* understand how one field can contain different regimes and scales;
* state what “material sufficiency” does and does not claim.

The guiding question is: '''How can every process be material without every adequate explanation being written in the vocabulary of fundamental physics?'''

== No metaphysical floor ==

Classical and modern philosophies often picture matter through a contrast. In hylomorphic descriptions it can appear as what receives form; in Cartesian dualism extension is distinguished from thought; in other systems a material order is supplemented by mind, spirit, value, or intelligible structure. The systems differ, and none should be reduced to a slogan. What matters here is the recurrent explanatory gesture: material processes are treated as insufficient until another principle gives them identity, intelligibility, or direction.

This chapter refuses that supplement. Matter does not sit beneath the world as a featureless base. It names the whole immanent field of interactions, constraints, differences, and possible effects. A body, equation, memory, institution, and computer model differ in their organisation. None needs an immaterial component in order to be real.

This is a claim of '''material sufficiency'''. It does not mean that current science already explains everything. It means that an unexplained phenomenon does not license the introduction of a non-material cause. Gaps in knowledge remain questions for inquiry, not entrances to another ontological domain.

“Matter operates” must also be distinguished from “matter is universally agentive”. Rivers erode, metals expand, and storms alter coastlines. These are operative effects. Symbolic agency requires more specific capacities: material support, discrimination, inscription, recognition through symbols, relations between symbols, and the modulation of further action. The field is active without every configuration becoming a subject.

== Materialism is not physicalism ==

Physicalism covers several doctrines. Many versions claim that every fact is ultimately fixed by physical facts or that a completed physics would supply the most fundamental description of everything. The OEC makes a different claim. All configurations are materially dependent, yet the vocabulary adequate to one regime may be insufficient for another.

A chemical reaction must be physically possible. Chemical concepts nevertheless identify patterns that are not usefully replaced by a list of elementary interactions. An organism depends on chemistry. Metabolism, regulation, and ecological dependence require biological descriptions. A legal institution depends on bodies, documents, buildings, servers, and repeated practices. Its powers cannot be identified by measuring those supports alone.

This is not an argument for mysterious higher substances. It is an argument about '''organisation and explanatory scale'''. New capacities become operative when material relations cross functional thresholds. The capacity remains materially realised, but it belongs to the configuration as organised, not to each component taken separately.

Three positions should therefore be distinguished:

{| class=&quot;wikitable&quot;
! Position
! Central claim
! Response developed here
|-
| Reductive physicalism
| One fundamental vocabulary is sufficient in principle
| Material dependence does not erase regime-specific organisation
|-
| Ontological dualism
| Mind, meaning, or value requires a second kind of substance
| Symbolic and ethical operations remain materially realised
|-
| Threshold materialism
| One field produces heterogeneous capacities at specific organisational thresholds
| Adopted, provided every claimed capacity is demonstrated through its effects
|}

The last proviso is important. Calling a process “emergent” is not an alternative to explaining it. The analysis must identify the relevant relations, the threshold, and the new operation.

== Matter as an immanent, self-modulating field ==

“Self-modulating” does not mean that the field forms an intentional whole which directs itself. It means that changes in material relations can alter the conditions of further operation without an external organiser. Feedback, constraint, and functional coupling can stabilise a configuration; perturbations can reorganise or dissolve it.

This formulation learns from process philosophies and theories of individuation while declining to turn process into a deeper reserve. Simondon’s metastability and Deleuze’s immanence help displace static substance. The OEC nevertheless resists treating the pre-individual or the virtual as a domain that already contains the new capacity in another form. Material conditions enable and constrain emergence; they do not constitute a hidden inventory of everything that will occur.

Scientific descriptions can illuminate such processes, but they must not be converted into metaphysical proof. The dynamics of fields, phase transitions, and far-from-equilibrium systems show that contemporary science does not require the old image of inert matter. No single scientific theory, however, establishes the ontology of the book. The philosophical claim is assessed by its coherence across regimes and by its capacity to guide inquiry without contradicting empirical knowledge.

== Heterogeneity without separate worlds ==

One material field can sustain radically different organisations. “One” refers to ontological continuity, not to homogeneity. The molecular, cellular, organismic, technical, symbolic, institutional, and planetary are analytical scales and regimes within the same field. They interact, constrain one another, and sometimes form new couplings.

No scale has automatic explanatory privilege. Smaller does not mean more real; larger does not mean more complete. An account of molecular bonds can be indispensable to a study of a medicine while remaining insufficient to explain access to that medicine. Conversely, an institutional account cannot suspend pharmacology. Adequate explanation may require several scales whose relations are stated rather than collapsed.

The same point prevents a hierarchy of substances. Biological organisation is not a second world added to physics. Symbolic organisation is not a third world added to life. Historically known symbolic systems depend on biological and technical supports. Their defining criteria are functional and remain open to configurations beyond any single species. What changes at a threshold is what the configuration can do.

== Position among contemporary materialisms ==

This framework shares several commitments with contemporary materialisms: refusal of passive matter, criticism of anthropocentrism, and attention to the material efficacy of representations and institutions. It differs where vitality or agency is attributed too widely.

Jane Bennett’s language of vibrant matter, for example, productively directs attention to non-human effects and assemblages. The OEC preserves that insight while reserving agency for configurations that meet explicit functional criteria. This restriction is not a return to human supremacy. It allows non-human agency in principle, but prevents every causal contribution from being renamed agency.

The resulting position is '''threshold materialism'''. It holds together four claims:

# all actual processes are materially realised;
# matter is organised heterogeneously rather than uniformly;
# new capacities can become operative at thresholds of functional coupling;
# no capacity should be attributed without evidence appropriate to the regime.

== Worked example: a digital medical record ==

A digital medical record helps clarify material sufficiency without reduction.

# The record depends on electrical activity, storage media, networks, screens, bodies, and trained users.
# A measurement becomes available through a protocol and a material inscription.
# Symbols relate the measurement to diagnoses, prior results, uncertainty, and possible interventions.
# Institutional rules determine who may read or alter the record.
# Those symbolic and institutional operations can change treatment and redistribute exposure to benefit or harm.

Nothing in this process is immaterial. Yet a description of voltages alone would not explain the clinical meaning, access rules, or ethical consequences. Different vocabularies track different organisations of the same material field.

== Common confusions ==

{| class=&quot;wikitable&quot;
! Claim
! It does not mean
|-
| Matter is the only substrate
| Matter is an inert foundation beneath the world
|-
| The field is immanent
| Every process is equally accessible to physics
|-
| Matter has operative effects
| Every material configuration is an agent
|-
| Regimes are irreducible in description
| Regimes are separate substances or worlds
|-
| Symbolic operations are material
| Meanings can be read directly from their physical supports
|}

== Check your understanding ==

* Why is material sufficiency a constraint on explanation rather than a completed explanation?
* What would be lost by describing an institution only at the molecular scale?
* How can a capacity be irreducible to its components without becoming immaterial?
* Which evidence would be required before calling a technical system symbolically agentive?
* Why does “one field” not imply “one vocabulary”?

== Transition ==

If material configurations require no external ground, their persistence cannot be guaranteed by one. [[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/Instability as a Condition, not a Problem|Section 1.7]] examines instability as the condition under which local order, history, and emergence become possible.

For the preceding refusal of ground and teleology, see [[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/No Ground, No Soul, No Plan|Section 1.5]]. Bibliographic details are gathered in [[Foundations of the Ontology of Emergent Complexity/References|References]].

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      <text bytes="11513" sha1="lsc5i3u1xsxuk1bdir2byegswm47yeh" xml:space="preserve">== 1.7 – Instability as a Condition, Not a Problem ==

A crystal can preserve an ordered lattice for a vast interval; a flame persists only while flows continue; a legal institution can retain its name while its practices change. Durability alone makes none of them self-sufficient. The problem is to explain real persistence without converting it into an unconditional guarantee. Instability is not the opposite of order. It names the dependence of every local order on relations and conditions that may change. A configuration can be highly regular, durable, and predictable while remaining dependent on conditions that may change. This chapter therefore treats stability as a local achievement within instability, not as the original state from which change deviates.

This claim is ontological, but it must be used carefully. It does not say that everything changes rapidly, that laws are unreliable, or that disorder is preferable to organisation. It says that no configuration is self-sufficient or exempt from the relations that sustain it.

== Learning orientation ==

After reading this chapter, the reader should be able to:

* distinguish instability from chaos, randomness, and visible volatility;
* explain conditional stability without reducing it to illusion;
* separate instability from operative excess;
* understand why novelty requires instability but instability does not guarantee novelty;
* show how this chapter completes the seven commitments of Part I.

The guiding question is: '''What makes a stable configuration real without making its stability absolute?'''

== Instability as an ontological condition ==

A bridge, organism, language, and star persist over very different intervals and through different mechanisms. Each can be treated as a configuration because its relations remain sufficiently consistent for the question being asked. None exists independently of those relations. Loads, maintenance, metabolism, communication, or physical interactions sustain its continuity.

Instability names this dependence on variable conditions. It is not a hidden force underneath every event. Nor is it the prediction that collapse is imminent. A configuration is unstable in the technical sense used here because a change in its sustaining relations can perturb, reorganise, or dissolve it.

This definition produces an important shift:

* stability is not denied; it is explained;
* change is not an exception; it is a standing possibility;
* persistence is not inertia; it is continued material organisation;
* order is not universal; it is local to a configuration, scale, and interval.

The expression “to be is to be unstable” should therefore be read as “to exist materially is to depend on relations that do not carry an eternal guarantee”.

== What instability is not ==

Instability is easily confused with neighbouring concepts.

{| class=&quot;wikitable&quot;
! Term
! Meaning
! Relation to the present use of instability
|-
| Disorder
| Absence of a selected pattern or failure of a particular organisation
| A system may be unstable without appearing disordered
|-
| Randomness
| A statistical or epistemic property defined within a model
| Instability is not established merely by unpredictability
|-
| Deterministic chaos
| Sensitive dependence within specified nonlinear dynamics
| A scientific case of complex behaviour, not the definition of the ontological operator
|-
| Volatility
| Rapid or large observable variation
| A slowly changing configuration can remain conditionally stable
|-
| Fragility
| Low resistance to a relevant perturbation
| Some unstable configurations are nevertheless very robust
|}

These distinctions protect the argument from a common shortcut: using “instability” as a dramatic synonym for whatever is complicated or uncertain.

== Conditional stability across regimes ==

The concept applies differently according to scale and regime.

A crystal can preserve an ordered lattice under a wide range of ordinary conditions. Its stability is real and measurable. It remains conditional upon temperature, pressure, chemical environment, and the structure of the material. The philosophical point is not that the crystal is secretly chaotic, but that its order does not explain or guarantee itself.

A living cell persists through active regulation: exchanges across a membrane, repair, energy use, and coordination among processes. Here stability is visibly dynamic. Suspending the relevant exchanges does not reveal a permanent substance beneath them; it interrupts the organisation that maintained the cell.

A legal institution persists through documents, procedures, buildings, technical systems, trained participants, enforcement, and public recognition. Its continuity is neither merely mental nor reducible to the paper on which rules are written. It is a material-symbolic achievement reproduced through many couplings.

The examples are not interchangeable. Crystal formation does not constitute symbolic decision; institutional revision is not a phase transition in the physical sense. They demonstrate a shared analytical question: '''which relations maintain this order, and what changes would exceed its capacity to persist in its present form?'''

== Instability and formal systems ==

Formal reasoning does not escape every limit by becoming abstract. Gödel’s incompleteness theorems show, under precise conditions, that sufficiently expressive consistent formal systems cannot prove every arithmetical truth expressible within them. Turing’s halting result shows that no general algorithm decides for every programme and input whether the programme will halt.

These results should not be turned into metaphors about matter. They concern formal systems and computation, not the ontology of physical processes. Their relevance is limited but instructive: even exact symbolic constructions have domains, assumptions, and internal limits. They do not justify the OEC’s ontology, but they undermine the easy ideal of a single, complete, self-validating symbolic closure.

The analogy must stop there. Ontological instability is not a theorem of logic, and logical incompleteness is not material instability. Rigour depends on preserving the difference.

== Instability and operative excess ==

Instability and operative excess are connected but not identical.

'''Instability''' concerns persistence: no configuration is finally guaranteed against perturbation or reorganisation.

'''Operative excess''' concerns a system in which materially possible operations or compatibilities exceed what its current symbolic or structural form can integrate.

A stone exposed to erosion illustrates instability without thereby establishing operative excess: erosion alone does not show that the operations or compatibilities materially possible in the stone–environment system exceed its current structural form. A research programme confronted by results that its conceptual framework cannot integrate may exhibit both: its established order is vulnerable to revision, and the required operations exceed its current symbolic form.

Operative excess renders the present symbolic or structural form insufficient and forces reorganisation. Instability makes variation possible; operative excess is the affirmative causal motor of emergence. Neither predetermines the concrete form that will emerge.

== Novelty without romanticising disruption ==

If every configuration were absolutely fixed, no new relation or capacity could become operative. In this restricted sense, novelty requires instability. Yet it would be a serious mistake to conclude that greater instability is always better.

Disruption can destroy capacities, erase memory, sever support, and concentrate harm. An ecosystem may lose relations faster than new couplings can form. An institution may be destabilised in ways that remove mechanisms of protection without creating more responsive ones. Ethical and political analysis must therefore distinguish generative reorganisation from destructive disorganisation.

The argument affirms neither chaos nor disruption. It affirms the openness of material configurations to variation while asking what capacities survive, what new couplings become possible, and how exposure is redistributed.

This also clarifies the relation between instability and emergence:

# a configuration depends on variable material conditions;
# a perturbation or internal tension changes the relations;
# new couplings may form if enabling conditions are present;
# a new capacity counts as emergent only when its effects become operative;
# the resulting local order remains conditionally stable.

The sequence is analytical, not a universal timetable. Many perturbations produce no novelty; many thresholds are approached without being crossed.

== Worked example: a candle flame ==

A candle flame appears as a stable object, but it is a maintained pattern.

# Wax melts and is transported through the wick.
# Fuel vapour interacts with oxygen.
# Heat sustains further melting and combustion.
# The visible form persists while these processes remain coupled.
# Remove fuel or oxygen, or alter the conditions sufficiently, and the flame disappears.

The flame is neither unreal nor permanent. Its stability consists in the continued reproduction of a pattern through flow. It offers a simple model of local order, although organisms and institutions require additional concepts that the flame does not instantiate.

Now change scale. A laboratory can keep the flame burning under controlled conditions for a long interval. The increased stability results from further couplings — equipment, monitoring, procedures, and intervention — not from escape from instability. Control extends a local order; it does not confer metaphysical permanence.

== Closing Part I: seven commitments, one field ==

Part I has established a connected position:

# no metaphysical dualism;
# no duplicated world behind or above this one;
# thought as a materially realised capacity rather than an immaterial subject;
# symbolisation as an immanent material operation;
# no transcendent ground, soul, or plan;
# matter as the only substrate, without physicalist reduction;
# instability as the condition of every local order.

These commitments do not form a deductive system from which the rest of the book follows automatically. They define the field within which its method and operators will be tested. Part II turns from what the framework commits to towards how inquiry should proceed when no final standpoint is available.

== Check your understanding ==

* Can something be stable for millions of years and still be unstable in the sense used here?
* Why does unpredictability alone not establish ontological instability?
* What is the difference between instability and operative excess?
* Why does novelty require instability without being guaranteed by it?
* Which additional capacities distinguish an institution from the candle-flame example?

== Transition ==

[[Foundations of the Ontology of Emergent Complexity/Method and Style/Thought as Singular Response|Section 2.1]] begins the methodological part of the book: thought is approached as a situated response within the same unstable field, not as observation from outside it. For the materialist commitment on which this chapter depends, return to [[Foundations of the Ontology of Emergent Complexity/Philosophical Commitments/Matter as the Only Substrate|Section 1.6]].

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      <text bytes="17671" sha1="a3pbgz6wvkqkkve808pfvbztn84jq3p" xml:space="preserve">== References ==

This consolidated list records the works cited and recommended in the book. It is ordered alphabetically and should be used together with [[Foundations of the Ontology of Emergent Complexity/7.1 – Philosophical Interlocutors|7.1]], [[Foundations of the Ontology of Emergent Complexity/7.2 – Conceptual Sources|7.2]], and [[Foundations of the Ontology of Emergent Complexity/7.4 – Further Readings and Connections|7.4]], which explain how the principal authors, problem fields, and reading routes function in the argument.

* Adorno, Theodor W., and Max Horkheimer. (1944) 2002. ''Dialectic of Enlightenment: Philosophical Fragments''. Translated by Edmund Jephcott. Stanford, CA: Stanford University Press.
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* Agamben, Giorgio. 1999. ''The Man Without Content''. Translated by Georgia Albert. Stanford, CA: Stanford University Press.
* Anzaldúa, Gloria. 1987. ''Borderlands/La Frontera: The New Mestiza''. San Francisco: Aunt Lute Books.
* Aquinas, Thomas. (1265–1274) 1948. ''Summa Theologica''. Translated by the Fathers of the English Dominican Province. 5 vols. New York: Benziger Brothers.
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* Aristotle. 1984b. ''Physics''. Translated by R. P. Hardie and R. K. Gaye. In ''The Complete Works of Aristotle'', edited by Jonathan Barnes. Princeton: Princeton University Press.
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* Barad, Karen. 2007. ''Meeting the Universe Halfway: Quantum Physics and the Entanglement of Matter and Meaning''. Durham, NC: Duke University Press.
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* Bennett, Jane. 2010. ''Vibrant Matter: A Political Ecology of Things''. Durham, NC: Duke University Press.
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* Cartwright, Nancy. 1999. ''The Dappled World: A Study of the Boundaries of Science''. Cambridge: Cambridge University Press.

* Clark, Andy, and David J. Chalmers. 1998. “The Extended Mind.” ''Analysis'' 58 (1): 7–19. https://doi.org/10.1093/analys/58.1.7.
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* Derrida, Jacques. (1967) 1997. ''Of Grammatology''. Corrected ed. Translated by Gayatri Chakravorty Spivak. Baltimore: Johns Hopkins University Press.
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* Derrida, Jacques. 1990. “Force of Law: The ‘Mystical Foundation of Authority.’” ''Cardozo Law Review'' 11: 919–1045.
* Derrida, Jacques. 1996. ''Archive Fever: A Freudian Impression''. Translated by Eric Prenowitz. Chicago: University of Chicago Press.
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* Foucault, Michel. 1977b. “Nietzsche, Genealogy, History.” In ''Language, Counter-Memory, Practice: Selected Essays and Interviews'', edited by Donald F. Bouchard, 139–164. Ithaca, NY: Cornell University Press.
* Foucault, Michel. 1980. ''Power/Knowledge: Selected Interviews and Other Writings, 1972–1977''. Edited by Colin Gordon. Translated by Colin Gordon, Leo Marshall, John Mepham, and Kate Soper. New York: Pantheon Books.
* Freeman, Kathleen. 1949. ''The Pre-Socratic Philosophers: A Companion to Diels, Fragmente der Vorsokratiker''. Cambridge, MA: Harvard University Press.
* Freud, Sigmund. (1920) 1955. ''Beyond the Pleasure Principle''. In ''The Standard Edition of the Complete Psychological Works of Sigmund Freud, Volume XVIII (1920–1922): Beyond the Pleasure Principle, Group Psychology and Other Works'', translated under the general editorship of James Strachey. London: Hogarth Press and the Institute of Psycho-Analysis.
* Frigg, Roman, and James Nguyen. 2020. ''Modelling Nature: An Opinionated Introduction to Scientific Representation''. Cham: Springer.
* Gadamer, Hans-Georg. (1960) 2004. ''Truth and Method''. 2nd rev. ed. Translated by Joel Weinsheimer and Donald G. Marshall. London: Continuum.
* Gilligan, Carol. 1982. ''In a Different Voice: Psychological Theory and Women’s Development''. Cambridge, MA: Harvard University Press.
* Glissant, Édouard. (1990) 1997. ''Poetics of Relation''. Translated by Betsy Wing. Ann Arbor: University of Michigan Press.
* Gould, Stephen Jay. 1996. ''Full House: The Spread of Excellence from Plato to Darwin''. New York: Harmony Books.
* Hacking, Ian. 1983. ''Representing and Intervening: Introductory Topics in the Philosophy of Natural Science''. Cambridge: Cambridge University Press.
* Harari, Yuval Noah. 2016. ''Homo Deus: A Brief History of Tomorrow''. London: Harvill Secker.
* Haraway, Donna J. 2016. ''Staying with the Trouble: Making Kin in the Chthulucene''. Durham, NC: Duke University Press.
* Harman, Graham. 2011. ''The Quadruple Object''. Winchester: Zero Books.
* Hegel, G. W. F. (1812–1816) 1969. ''Science of Logic''. Translated by A. V. Miller. London: George Allen &amp; Unwin.
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* Heidegger, Martin. (1927) 1962. ''Being and Time''. Translated by John Macquarrie and Edward Robinson. Oxford: Blackwell.
* Heidegger, Martin. (1957) 1969. ''Identity and Difference''. Translated by Joan Stambaugh. New York: Harper &amp; Row.
* Heidegger, Martin. 1971. ''On the Way to Language''. Translated by Peter D. Hertz and Joan Stambaugh. New York: Harper &amp; Row.
* Heidegger, Martin. 2002. ''Off the Beaten Track''. Cambridge: Cambridge University Press.
* Husserl, Edmund. 1931. ''Ideas: General Introduction to Pure Phenomenology (Ideas I)''. Translated by W. R. Boyce Gibson. London: George Allen &amp; Unwin.
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* Kant, Immanuel. (1785) 1998. ''Groundwork of the Metaphysics of Morals''. Translated and edited by Mary Gregor. Cambridge: Cambridge University Press.
* Kant, Immanuel. 2002. ''Critique of Practical Reason''. Translated by Mary Gregor. Cambridge: Cambridge University Press.
* Kant, Immanuel. 1983. ''Perpetual Peace and Other Essays''. Translated with an introduction by Ted Humphrey. Indianapolis: Hackett Publishing Company.
* Kauffman, Stuart. 1993. ''The Origins of Order: Self-Organization and Selection in Evolution''. Oxford: Oxford University Press.
* Kauffman, Stuart. 1995. ''At Home in the Universe: The Search for the Laws of Self-Organization and Complexity''. Oxford: Oxford University Press.
* Kirk, G. S., and J. E. Raven. 1957. ''The Presocratic Philosophers: A Critical History with a Selection of Texts''. Cambridge: Cambridge University Press.
* Kletetschka, Gunther. 2025. “Three-Dimensional Time: A Mathematical Framework for Fundamental Physics.” ''Reports in Advances of Physical Sciences'' 9: 2550004.
* Kohn, Eduardo. 2013. ''How Forests Think: Toward an Anthropology Beyond the Human''. Berkeley: University of California Press.
* Kolmogorov, A. N. 1965. “Three Approaches to the Quantitative Definition of Information.” ''Problems of Information Transmission'' 1 (1): 1–7.
* Kuhn, Thomas S. 1962. ''The Structure of Scientific Revolutions''. Chicago: University of Chicago Press.
* Lacan, Jacques. 1981. ''The Four Fundamental Concepts of Psycho-Analysis''. Edited by Jacques-Alain Miller. Translated by Alan Sheridan. New York: W. W. Norton.
* Lacan, Jacques. (1966) 2001. ''Écrits: A Selection''. Translated by Alan Sheridan. London: Routledge.
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* Leibniz, Gottfried Wilhelm. 1989. ''Philosophical Essays''. Edited and translated by Roger Ariew and Daniel Garber. Indianapolis: Hackett Publishing.
* Levinas, Emmanuel. (1961) 1969. ''Totality and Infinity: An Essay on Exteriority''. Translated by Alphonso Lingis. Pittsburgh: Duquesne University Press.
* Levinas, Emmanuel. (1974) 1998. ''Otherwise than Being, or Beyond Essence''. Translated by Alphonso Lingis. Pittsburgh: Duquesne University Press.
* Margulis, Lynn. 1970. ''Origin of Eukaryotic Cells''. New Haven: Yale University Press.
* Marx, Karl. (1867) 1990. ''Capital: A Critique of Political Economy, Volume One''. Translated by Ben Fowkes. London: Penguin Classics.
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* Mayr, Ernst. 1997. ''This Is Biology: The Science of the Living World''. Cambridge, MA: Harvard University Press.
* Mbembe, Achille. 2003. “Necropolitics.” ''Public Culture'' 15 (1): 11–40.
* Mbembe, Achille. (2013) 2017. ''Critique of Black Reason''. Translated by Laurent Dubois. Durham, NC: Duke University Press.
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* Merleau-Ponty, Maurice. 1962. ''Phenomenology of Perception''. Translated by Colin Smith. London: Routledge.
* Merleau-Ponty, Maurice. 1964a. ''Le visible et l’invisible''. Paris: Gallimard.
* Merleau-Ponty, Maurice. 1964b. ''The Primacy of Perception: And Other Essays on Phenomenological Psychology, the Philosophy of Art, History and Politics''. Edited by James M. Edie. Translated by William Cobb. Evanston, IL: Northwestern University Press.
* Monod, Jacques. 1971. ''Chance and Necessity: An Essay on the Natural Philosophy of Modern Biology''. Translated by Austryn Wainhouse. New York: Alfred A. Knopf.
* Morin, Edgar. 1980. ''La Méthode II: La Vie de la Vie''. Paris: Seuil.
* Morin, Edgar. 2005. ''Introduction à la pensée complexe''. Paris: Seuil.
* Morin, Edgar. (1990) 2008. ''On Complexity''. Translated by Sean Kelly. Cresskill, NJ: Hampton Press.
* Moten, Fred. 2003. ''In the Break: The Aesthetics of the Black Radical Tradition''. Minneapolis: University of Minnesota Press.
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* Nancy, Jean-Luc. 1991. ''The Inoperative Community''. Translated by Peter Connor. Minneapolis: University of Minnesota Press.
* Nancy, Jean-Luc. 2000. ''Being Singular Plural''. Translated by Robert D. Richardson and Anne E. O’Byrne. Stanford, CA: Stanford University Press.
* Nancy, Jean-Luc. 2007. ''Listening''. Translated by Charlotte Mandell. New York: Fordham University Press.
* Nietzsche, Friedrich. 2006. ''Thus Spoke Zarathustra''. Translated by Graham Parkes. Oxford: Oxford University Press.
* Noddings, Nel. 2003. ''Caring: A Relational Approach to Ethics and Moral Education''. 2nd ed. Berkeley: University of California Press.
* Peirce, Charles S. 1998. ''The Essential Peirce: Selected Philosophical Writings, Volume 2 (1893–1913)''. Edited by the Peirce Edition Project. Bloomington: Indiana University Press.

* Plato. 1997. ''Complete Works''. Edited by John M. Cooper. Indianapolis: Hackett Publishing Company.
* Plotinus. 1966. ''The Enneads''. Translated by Stephen MacKenna. London: Penguin Books.
* Prigogine, Ilya. 1997. ''The End of Certainty: Time, Chaos, and the New Laws of Nature''. New York: The Free Press.
* Prigogine, Ilya, and Isabelle Stengers. (1979) 1984. ''Order out of Chaos: Man’s New Dialogue with Nature''. New York: Bantam Books.
* Rancière, Jacques. (1995) 1999. ''Disagreement: Politics and Philosophy''. Translated by Julie Rose. Minneapolis: University of Minnesota Press.
* Rancière, Jacques. 2010. ''Dissensus: On Politics and Aesthetics''. Edited and translated by Steven Corcoran. London: Continuum.
* Ricoeur, Paul. 1991. ''From Text to Action: Essays in Hermeneutics, II''. Translated by Kathleen Blamey and John B. Thompson. Evanston, IL: Northwestern University Press.
* Saussure, Ferdinand de. 1916. ''Cours de linguistique générale''. Edited by Charles Bally and Albert Sechehaye. Paris: Payot.
* Schmitt, Carl. (1922) 2005. ''Political Theology: Four Chapters on the Concept of Sovereignty''. Translated by George Schwab. Chicago: University of Chicago Press.
* Shannon, Claude E. 1948. “A Mathematical Theory of Communication.” ''Bell System Technical Journal'' 27 (3): 379–423.
* Simondon, Gilbert. 2005. ''L’individuation à la lumière des notions de forme et d’information''. Grenoble: Éditions Jérôme Millon.
* Simondon, Gilbert. 2009. “The Position of the Problem of Ontogenesis.” Translated by Gregory Flanders. ''Parrhesia'', no. 7: 4–16.
* Simondon, Gilbert. 2017. ''On the Mode of Existence of Technical Objects''. Translated by Cecile Malaspina and John Rogove. Minneapolis: University of Minnesota Press.
* Smolin, Lee. 2013. ''Time Reborn: From the Crisis in Physics to the Future of the Universe''. Boston: Houghton Mifflin Harcourt.
* Spinoza, Baruch. (1677) 1996. ''Ethics''. Edited and translated by Edwin Curley. London: Penguin Classics.
* Stengers, Isabelle. 2002. “Complexité et auto-organisation.” In ''Penser avec Whitehead: Une libre et sauvage création de concepts''. Paris: Seuil.
* Stengers, Isabelle. (2003) 2010. ''Cosmopolitics I''. Translated by Robert Bononno. Minneapolis: University of Minnesota Press.
* Stiegler, Bernard. 1998. ''Technics and Time, 1: The Fault of Epimetheus''. Translated by Richard Beardsworth and George Collins. Stanford, CA: Stanford University Press.
* Teilhard de Chardin, Pierre. (1955) 1959. ''The Phenomenon of Man''. Translated by Bernard Wall. New York: Harper &amp; Brothers.
* Varela, Francisco J. 1979. ''Principles of Biological Autonomy''. New York: Elsevier North-Holland.
* Viveiros de Castro, Eduardo. 2014. ''Cannibal Metaphysics''. Translated by Peter Skafish. Minneapolis: Univocal Publishing.
* Watts, Duncan J. 2003. ''Six Degrees: The Science of a Connected Age''. New York: W. W. Norton.
* Whitehead, Alfred North. (1929) 1978. ''Process and Reality: An Essay in Cosmology''. Corrected ed. Edited by David Ray Griffin and Donald W. Sherburne. New York: The Free Press.
* Žižek, Slavoj. 2011. ''Living in the End Times''. London: Verso.

{{BookCat}}</text>
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  <page>
    <title>Chess/Checkmates</title>
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== Introduction ==
Checkmates are an essential part of the game of Chess, being the objective of the game. Checkmate is when you are checking the opponent's king and there are no legal moves to get out of the check. Some mating patterns are named. There are 36 named mating patterns in Chess and a handful of well-known early opening checkmates.

{{Chess diagram|2=|3=kd|11=ql|20=kl|67=Example of checkmate.}}
== Named mating patterns ==
There are 36 recognized named mating patterns in Chess.

=== Back rank mate ===
The back rank mate is when the opponent's king is on its home rank and is being checkmated on that home rank by an opponent's queen or rook, while its escape squares are blocked by pawns or other pieces.
{{Chess diagram|2=|3=rd|4=nd|5=ql|9=kd|11=pd|16=pd|17=pd|18=pd|57=pl|58=pl|59=rl|65=kl|67=Example of back rank mate.}}


=== Epaulette mate ===
The epaulette mate is when the opponent's king is on ranks 1 or 8 and is checkmated, its escape squares cut off by its own pieces, usually rooks. This checkmate is usually performed by the queen, checking the opponent's king orthogonally while cutting off diagonal escape squares.
{{Chess diagram|2=|6=rd|7=kd|8=rd|23=ql|50=pl|66=kl|67=Example of epaulette mate}}

=== Swallowtail mate ===
The swallowtail mate is when the opponent's king is not on the edge (a or h-files or ranks 1 and 8) and is checkmated, usually by a queen orthogonally adjacent to the king, its escape squares diagonally blocked by its own pieces.
{{Chess diagram|2=|3=rd|28=kl|5=rd|12=kd|20=ql|57=pl|58=pl|67=Example of swallowtail mate.}}

=== Kill box mate ===
The kill box mate is when the opponent's king is on the edge checkmated by a rook and defended by a queen, forming a box around the king where the queen and rook control every escape square that the opponent's king could've moved to.
{{Chess diagram|2=|5=kd|6=rl|20=ql|26=pd|49=pl|58=pl|65=kl|67=Example of kill box mate.}}

=== Cozio's mate ===
The Cozio's mate is when the opponent's king is checkmated, usually by a queen diagonally adjacent to it, its orthogonal escape squares blocked by its own pieces. This checkmate is named after Carlos Cozio and is also known as dovetail mate.
{{Chess diagram|2=|33=pd|40=qd|41=kd|50=ql|57=kl|67=Example of Cozio's mate.}}

=== Triangle mate ===
The triangle mate is when the opponent's king is on the edge of the board and is checkmated by a queen, while a rook defends the queen and cuts off the remaining escape square. The checkmate looks like a triangle between the queen, rook and opponent's king, thus the name.
{{Chess diagram|2=|4=kd|11=ql|13=rl|26=pd|65=kl|67=Example of triangle mate.}}

=== Max Lange mate ===
The Max Lange mate is when the opponent's king is checkmated by a queen, defended by a bishop which also controls an important potential flight square for the opponent's king. This checkmate is named after German chess player Max Lange.
{{Chess diagram|2=|9=ql|16=bl|17=pd|18=kd|26=pd|65=bl|66=kl|67=Example of Max Lange mate.}}

=== Balestra mate ===
The Balestra mate is when the opponent's king is on one of the edge ranks (ranks 1 and 8) and is being checkmated by a bishop, while a queen controls most of the king's escape squares. The final position looks similar to a pair of scissors.
{{Chess diagram|2=|8=kd|22=bl|25=ql|65=kl|67=Example of Balestra mate.}}

=== Bucking Bronco mate ===
The Bucking Bronco mate is when the opponent's king is in the corner of the board and checkmate is delivered by a knight while a queen covers the escape squares that the opponent's king could potentially move to.
{{Chess diagram|2=|3=qd|4=nd|10=kd|16=ql|25=nl|65=rl|66=kl|67=Example of Bucking Bronco mate.}}

=== Sneaky Stallion mate ===
The Sneaky Stallion mate is similar to the Bucking Bronco mate, but instead of the opponent's king being in the corner, it is on the edge of the board. The opponent's king is checkmated by a knight while the queen covers escape squares and the last escape square is blocked by its own piece.
{{Chess diagram|2=|9=kd|24=nl|26=ql|65=kl|67=Example of Sneaky Stallion mate.|16=pd}}

=== Damiano's mate ===
The Damiano's mate is when the opponent's king is checkmated by a queen, defended by a friendly piece. The king's potential escape squares are either controlled or blocked. This checkmate is named after Portuguese chess player Pedro Damiano.
{{Chess diagram|2=|3=rd|8=bd|9=kd|17=pd|18=ql|19=pd|25=pl|65=kl|67=Example of Damiano's mate.}}

=== Lolli's mate ===
The Lolli's mate is when the opponent's king on the edge is checkmated by a queen orthogonally adjacent while being defended by a friendly pawn. This checkmate is named after Italian chess player Giambattista Lolli.
{{Chess diagram|2=|5=qd|9=kd|16=pd|17=ql|18=pd|24=pl|57=pl|65=kl|67=Example of Lolli's mate.}}

=== Blind swine mate ===
The blind swine mate is when the opponent's king is on their home rank and is checkmated by a rook on the 7th rank defended by another rook on the 7th rank which also controls a key flight square while the last square for the opponent's king is occupied by a piece.
{{Chess diagram|2=|3=rd|8=rd|9=kd|17=rl|18=rl|65=kl|67=Example of blind swine mate.}}
===Smothered mate===
A smothered mate is when the opponent's king (that is, the one getting checkmated) is unable to move, because it is trapped by its own friendly pieces.

&lt;noinclude&gt;
{{Chess/Navigation|Tactics Exercises|Strategy}}
&lt;/noinclude&gt;
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== Introduction ==
Checkmates are an essential part of the game of Chess, being the objective of the game. Checkmate is when you are checking the opponent's king and there are no legal moves to get out of the check. Some mating patterns are named. There are 36 named mating patterns in Chess and a handful of well-known early opening checkmates.

{{Chess diagram|2=|3=kd|11=ql|20=kl|67=Example of checkmate.}}
== Named mating patterns ==
There are 36 recognized named mating patterns in Chess.

=== Back rank mate ===
The back rank mate is when the opponent's king is on its home rank and is being checkmated on that home rank by an opponent's queen or rook, while its escape squares are blocked by pawns or other pieces.
{{Chess diagram|2=|3=rd|4=nd|5=ql|9=kd|11=pd|16=pd|17=pd|18=pd|57=pl|58=pl|59=rl|65=kl|67=Example of back rank mate.}}


=== Epaulette mate ===
The epaulette mate is when the opponent's king is on ranks 1 or 8 and is checkmated, its escape squares cut off by its own pieces, usually rooks. This checkmate is usually performed by the queen, checking the opponent's king orthogonally while cutting off diagonal escape squares.
{{Chess diagram|2=|6=rd|7=kd|8=rd|23=ql|50=pl|66=kl|67=Example of epaulette mate}}

=== Swallowtail mate ===
The swallowtail mate is when the opponent's king is not on the edge (a or h-files or ranks 1 and 8) and is checkmated, usually by a queen orthogonally adjacent to the king, its escape squares diagonally blocked by its own pieces.
{{Chess diagram|2=|3=rd|28=kl|5=rd|12=kd|20=ql|57=pl|58=pl|67=Example of swallowtail mate.}}

=== Kill box mate ===
The kill box mate is when the opponent's king is on the edge checkmated by a rook and defended by a queen, forming a box around the king where the queen and rook control every escape square that the opponent's king could've moved to.
{{Chess diagram|2=|5=kd|6=rl|20=ql|26=pd|49=pl|58=pl|65=kl|67=Example of kill box mate.}}

=== Cozio's mate ===
The Cozio's mate is when the opponent's king is checkmated, usually by a queen diagonally adjacent to it, its orthogonal escape squares blocked by its own pieces. This checkmate is named after Carlos Cozio and is also known as dovetail mate.
{{Chess diagram|2=|33=pd|40=qd|41=kd|50=ql|57=kl|67=Example of Cozio's mate.}}

=== Triangle mate ===
The triangle mate is when the opponent's king is on the edge of the board and is checkmated by a queen, while a rook defends the queen and cuts off the remaining escape square. The checkmate looks like a triangle between the queen, rook and opponent's king, thus the name.
{{Chess diagram|2=|4=kd|11=ql|13=rl|26=pd|65=kl|67=Example of triangle mate.}}

=== Max Lange mate ===
The Max Lange mate is when the opponent's king is checkmated by a queen, defended by a bishop which also controls an important potential flight square for the opponent's king. This checkmate is named after German chess player Max Lange.
{{Chess diagram|2=|9=ql|16=bl|17=pd|18=kd|26=pd|65=bl|66=kl|67=Example of Max Lange mate.}}

=== Balestra mate ===
The Balestra mate is when the opponent's king is on one of the edge ranks (ranks 1 and 8) and is being checkmated by a bishop, while a queen controls most of the king's escape squares. The final position looks similar to a pair of scissors.
{{Chess diagram|2=|8=kd|22=bl|25=ql|65=kl|67=Example of Balestra mate.}}

=== Bucking Bronco mate ===
The Bucking Bronco mate is when the opponent's king is in the corner of the board and checkmate is delivered by a knight while a queen covers the escape squares that the opponent's king could potentially move to.
{{Chess diagram|2=|3=qd|4=nd|10=kd|16=ql|25=nl|65=rl|66=kl|67=Example of Bucking Bronco mate.}}

=== Sneaky Stallion mate ===
The Sneaky Stallion mate is similar to the Bucking Bronco mate, but instead of the opponent's king being in the corner, it is on the edge of the board. The opponent's king is checkmated by a knight while the queen covers escape squares and the last escape square is blocked by its own piece.
{{Chess diagram|2=|9=kd|24=nl|26=ql|65=kl|67=Example of Sneaky Stallion mate.|16=pd}}

=== Damiano's mate ===
The Damiano's mate is when the opponent's king is checkmated by a queen, defended by a friendly piece. The king's potential escape squares are either controlled or blocked. This checkmate is named after Portuguese chess player Pedro Damiano.
{{Chess diagram|2=|3=rd|8=bd|9=kd|17=pd|18=ql|19=pd|25=pl|65=kl|67=Example of Damiano's mate.}}

=== Lolli's mate ===
The Lolli's mate is when the opponent's king on the edge is checkmated by a queen orthogonally adjacent while being defended by a friendly pawn. This checkmate is named after Italian chess player Giambattista Lolli.
{{Chess diagram|2=|5=qd|9=kd|16=pd|17=ql|18=pd|24=pl|57=pl|65=kl|67=Example of Lolli's mate.}}

=== Blind swine mate ===
The blind swine mate is when the opponent's king is on their home rank and is checkmated by a rook on the 7th rank defended by another rook on the 7th rank which also controls a key flight square while the last square for the opponent's king is occupied by a piece.
{{Chess diagram|2=|3=rd|8=rd|9=kd|17=rl|18=rl|65=kl|67=Example of blind swine mate.}}
===Smothered mate===
A smothered mate is when the opponent's king (that is, the one getting checkmated) is unable to move, because it is trapped by its own friendly pieces.
===Scholar's mate===
[[File:MatBerger8.gif|An example of a Scholar's mate|right|thumb|208px]]
This checkmate is when the queen checkmates the king on e8, with the queen being on f7 whilst it being defended by the bishop on c4. This type of checkmate is usually played by beginner players.
&lt;noinclude&gt;
{{Chess/Navigation|Tactics Exercises|Strategy}}
&lt;/noinclude&gt;
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      <text bytes="5713" sha1="bf96i3icpp0pkqzzgq094t1rcj97swv" xml:space="preserve">{{incomplete}}
== Introduction ==
Checkmates are an essential part of the game of Chess, being the objective of the game. Checkmate is when you are checking the opponent's king and there are no legal moves to get out of the check. Some mating patterns are named. There are 36 named mating patterns in Chess and a handful of well-known early opening checkmates.

{{Chess diagram|2=|3=kd|11=ql|20=kl|67=Example of checkmate.}}
== Named mating patterns ==
There are 36 recognized named mating patterns in Chess.

=== Back rank mate ===
The back rank mate is when the opponent's king is on its home rank and is being checkmated on that home rank by an opponent's queen or rook, while its escape squares are blocked by pawns or other pieces.
{{Chess diagram|2=|3=rd|4=nd|5=ql|9=kd|11=pd|16=pd|17=pd|18=pd|57=pl|58=pl|59=rl|65=kl|67=Example of back rank mate.}}


=== Epaulette mate ===
The epaulette mate is when the opponent's king is on ranks 1 or 8 and is checkmated, its escape squares cut off by its own pieces, usually rooks. This checkmate is usually performed by the queen, checking the opponent's king orthogonally while cutting off diagonal escape squares.
{{Chess diagram|2=|6=rd|7=kd|8=rd|23=ql|50=pl|66=kl|67=Example of epaulette mate}}

=== Swallowtail mate ===
The swallowtail mate is when the opponent's king is not on the edge (a or h-files or ranks 1 and 8) and is checkmated, usually by a queen orthogonally adjacent to the king, its escape squares diagonally blocked by its own pieces.
{{Chess diagram|2=|3=rd|28=kl|5=rd|12=kd|20=ql|57=pl|58=pl|67=Example of swallowtail mate.}}

=== Kill box mate ===
The kill box mate is when the opponent's king is on the edge checkmated by a rook and defended by a queen, forming a box around the king where the queen and rook control every escape square that the opponent's king could've moved to.
{{Chess diagram|2=|5=kd|6=rl|20=ql|26=pd|49=pl|58=pl|65=kl|67=Example of kill box mate.}}

=== Cozio's mate ===
The Cozio's mate is when the opponent's king is checkmated, usually by a queen diagonally adjacent to it, its orthogonal escape squares blocked by its own pieces. This checkmate is named after Carlos Cozio and is also known as dovetail mate.
{{Chess diagram|2=|33=pd|40=qd|41=kd|50=ql|57=kl|67=Example of Cozio's mate.}}

=== Triangle mate ===
The triangle mate is when the opponent's king is on the edge of the board and is checkmated by a queen, while a rook defends the queen and cuts off the remaining escape square. The checkmate looks like a triangle between the queen, rook and opponent's king, thus the name.
{{Chess diagram|2=|4=kd|11=ql|13=rl|26=pd|65=kl|67=Example of triangle mate.}}

=== Max Lange mate ===
The Max Lange mate is when the opponent's king is checkmated by a queen, defended by a bishop which also controls an important potential flight square for the opponent's king. This checkmate is named after German chess player Max Lange.
{{Chess diagram|2=|9=ql|16=bl|17=pd|18=kd|26=pd|65=bl|66=kl|67=Example of Max Lange mate.}}

=== Balestra mate ===
The Balestra mate is when the opponent's king is on one of the edge ranks (ranks 1 and 8) and is being checkmated by a bishop, while a queen controls most of the king's escape squares. The final position looks similar to a pair of scissors.
{{Chess diagram|2=|8=kd|22=bl|25=ql|65=kl|67=Example of Balestra mate.}}

=== Bucking Bronco mate ===
The Bucking Bronco mate is when the opponent's king is in the corner of the board and checkmate is delivered by a knight while a queen covers the escape squares that the opponent's king could potentially move to.
{{Chess diagram|2=|3=qd|4=nd|10=kd|16=ql|25=nl|65=rl|66=kl|67=Example of Bucking Bronco mate.}}

=== Sneaky Stallion mate ===
The Sneaky Stallion mate is similar to the Bucking Bronco mate, but instead of the opponent's king being in the corner, it is on the edge of the board. The opponent's king is checkmated by a knight while the queen covers escape squares and the last escape square is blocked by its own piece.
{{Chess diagram|2=|9=kd|24=nl|26=ql|65=kl|67=Example of Sneaky Stallion mate.|16=pd}}

=== Damiano's mate ===
The Damiano's mate is when the opponent's king is checkmated by a queen, defended by a friendly piece. The king's potential escape squares are either controlled or blocked. This checkmate is named after Portuguese chess player Pedro Damiano.
{{Chess diagram|2=|3=rd|8=bd|9=kd|17=pd|18=ql|19=pd|25=pl|65=kl|67=Example of Damiano's mate.}}

=== Lolli's mate ===
The Lolli's mate is when the opponent's king on the edge is checkmated by a queen orthogonally adjacent while being defended by a friendly pawn. This checkmate is named after Italian chess player Giambattista Lolli.
{{Chess diagram|2=|5=qd|9=kd|16=pd|17=ql|18=pd|24=pl|57=pl|65=kl|67=Example of Lolli's mate.}}

=== Blind swine mate ===
The blind swine mate is when the opponent's king is on their home rank and is checkmated by a rook on the 7th rank defended by another rook on the 7th rank which also controls a key flight square while the last square for the opponent's king is occupied by a piece.
{{Chess diagram|2=|3=rd|8=rd|9=kd|17=rl|18=rl|65=kl|67=Example of blind swine mate.}}
===Smothered mate===
A smothered mate is when the opponent's king (that is, the one getting checkmated) is unable to move, because it is trapped by its own friendly pieces.
===Scholar's mate===
[[File:MatBerger8.gif|An example of a Scholar's mate|left|thumb|208px]]
This checkmate is when the queen checkmates the king on e8, with the queen being on f7 whilst it being defended by the bishop on c4. This type of checkmate is usually played by beginner players.
&lt;noinclude&gt;
{{Chess/Navigation|Tactics Exercises|Strategy}}
&lt;/noinclude&gt;
{{BookCat}}</text>
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  <page>
    <title>FlightGear Flight Simulator/Advanced/Multiplayer</title>
    <ns>0</ns>
    <id>483343</id>
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      <text bytes="4232" sha1="kvpvq7snl9v6dixti2u9whjb6lu0dzd" xml:space="preserve">The '''multiplayer''' feature of FlightGear makes it possible to see other pilots and vice-versa. This makes it possible to fly in formation, perform mid-air refueling with tankers controlled by real people or contact real air traffic controllers to ask for guidance.

Multiplayer may cause extreme framerate drops during the loading of aircraft models, especially heavy models such as the Boeing 777 or Airbus A320neo. It is suggested to fly in locations other than the default San Francisco International Airport, as there are often lots of pilots in the area who are often new, and do not follow ATC, or respect traffic.

== Connecting to Multiplayer ==
=== Notices ===
* Callsigns can be a maximum of 7 characters.
=== Built-in launcher and in-sim dialog ===
The easiest way to get online is to use the built-in launcher or the in-sim Multiplayer dialog. All you need to do is enter a callsign and select a server from the menu.

=== Using multiplayer from the command line ===
When running FlightGear from the command line, you can specify multiplayer settings. The two arguments are as follows:

 --multiplay=direction,10,ip.address,port
 --callsign=anything

Obviously, &lt;code&gt;--callsign&lt;/code&gt; can be anything you wish but it must be limited to 7 (seven) characters in length counting any dashes. If your callsign is too long, it will be cut off in the various displays where it is shown. Generally speaking, callsigns are of the form X-XXXXX. Check online to see whether your callsign is already in use or not. Do not pick a callsign that is already used, as that will create problems! Please don't leave your callsign as &quot;CALLSIG&quot;.

There are four arguments to &lt;code&gt;--multiplay&lt;/code&gt;:

; direction
: Either &lt;code&gt;in&lt;/code&gt; or &lt;code&gt;out&lt;/code&gt;. &lt;code&gt;in&lt;/code&gt; tells FlightGear to listen to packets of data coming in through the specified '''port'''. &lt;code&gt;out&lt;/code&gt; tells FlightGear to send data out through the '''port'''.

; ip.address
: IP address of network interface being used by FlightGear. If left blank, FlightGear will listen to all network interfaces. If '''direction''' is set to &lt;code&gt;in&lt;/code&gt;, FlightGear will listen to ''only'' this IP address.

; port
: Port that data is either being sent or received through. Usually set to &lt;code&gt;5000&lt;/code&gt; and above.

=== Optional collision detection in multiplayer ===

The collision detection is optional. To enable collision detection, start FlightGear with:

 --prop:bool:/sim/multiplay/hot=true

Those who are able to patch FGData themselves can download a patch which adds a checkbox to the Multiplayer Settings dialog to enable or disable the collision detection at runtime.

== Multiplayer chat ==

To chat with other pilots, go to the &lt;code&gt;Multiplayer&lt;/code&gt; menu and select &lt;code&gt;Chat Menu&lt;/code&gt; at the bottom of the menu. Note that the other pilots may not have their chat box open nor chat messages enabled, so they may not see your messages.

The shortcut for chatting is &lt;code&gt;-&lt;/code&gt; (hyphen). This will bring up some text in the upper-left of the FlightGear window. By pressing the corresponding number keys, you can send pre-made messages. Pressing &lt;code&gt;1&lt;/code&gt; will let you type in a custom message, which you can send by pressing enter. By default, other people's messages are displayed at the top of FlightGear's window for a few seconds, but it will appear for a much longer time in the window at &lt;code&gt;Network &gt; Chat&lt;/code&gt;. So if you think you have missed anything, go check there.

== Dealing with abusive behavior ==
Should you become victim of abusive or annoying behavior by any pilot, you have option to ignore him or her. To activate the ignore function open the &lt;code&gt;Multiplayer &gt; Pilot list&lt;/code&gt; dialog and click the &lt;code&gt;ignore&lt;/code&gt; button next to the pilot's callsign. This will prevent chat messages from the ignored pilot appearing and prevent his aircraft from appearing.

== Multiplayer map ==

There is a very nice online map which displays the location of online pilots. You will also find this useful to check that you are successfully connecting to the server, as well as looking up navaids, waypoints, airports, frequencies, weather, and more!&lt;ref&gt;https://wiki.flightgear.org/Howto:Multiplayer&lt;/ref&gt;

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      <text bytes="4262" sha1="93gsmzkx95hw2kif7db2s8qp3j34q29" xml:space="preserve">The '''multiplayer''' feature of FlightGear makes it possible to see other pilots and vice-versa. This makes it possible to fly in formation, perform mid-air refueling with tankers controlled by real people or contact real air traffic controllers to ask for guidance.

Multiplayer may cause extreme framerate drops during the loading of aircraft models, especially heavy models such as the Boeing 777 or Airbus A320neo. It is suggested to fly in locations other than the default San Francisco International Airport, as there are often lots of pilots in the area who are often new, and do not follow ATC, or respect traffic.

== Connecting to Multiplayer ==
=== Notices ===
* Callsigns can be a maximum of 7 characters.
=== Built-in launcher and in-sim dialog ===
The easiest way to get online is to use the built-in launcher or the in-sim Multiplayer dialog. All you need to do is enter a callsign and select a server from the menu.

=== Using multiplayer from the command line ===
When running FlightGear from the command line, you can specify multiplayer settings. The two arguments are as follows:

 --multiplay=direction,10,ip.address,port
 --callsign=anything

Obviously, &lt;code&gt;--callsign&lt;/code&gt; can be anything you wish but it must be limited to 7 (seven) characters in length counting any dashes. If your callsign is too long, it will be cut off in the various displays where it is shown. Generally speaking, callsigns are of the form X-XXXXX. Check online to see whether your callsign is already in use or not. Do not pick a callsign that is already used, as that will create problems! Please don't leave your callsign as &quot;CALLSIG&quot;.

There are four arguments to &lt;code&gt;--multiplay&lt;/code&gt;:

; direction
: Either &lt;code&gt;in&lt;/code&gt; or &lt;code&gt;out&lt;/code&gt;. &lt;code&gt;in&lt;/code&gt; tells FlightGear to listen to packets of data coming in through the specified '''port'''. &lt;code&gt;out&lt;/code&gt; tells FlightGear to send data out through the '''port'''.

; ip.address
: IP address of network interface being used by FlightGear. If left blank, FlightGear will listen to all network interfaces. If '''direction''' is set to &lt;code&gt;in&lt;/code&gt;, FlightGear will listen to ''only'' this IP address.

; port
: Port that data is either being sent or received through. Usually set to &lt;code&gt;5000&lt;/code&gt; and above.

=== Optional collision detection in multiplayer ===

The collision detection is optional. To enable collision detection, start FlightGear with:

 --prop:bool:/sim/multiplay/hot=true

Those who are able to patch FGData themselves can download a patch which adds a checkbox to the Multiplayer Settings dialog to enable or disable the collision detection at runtime.

== Multiplayer chat ==

To chat with other pilots, go to the &lt;code&gt;Multiplayer&lt;/code&gt; menu and select &lt;code&gt;Chat Menu&lt;/code&gt; at the bottom of the menu. Note that the other pilots may not have their chat box open nor chat messages enabled, so they may not see your messages.

The shortcut for chatting is &lt;code&gt;-&lt;/code&gt; (hyphen). This will bring up some text in the upper-left of the FlightGear window. By pressing the corresponding number keys, you can send pre-made messages. Pressing &lt;code&gt;1&lt;/code&gt; will let you type in a custom message, which you can send by pressing enter. By default, other people's messages are displayed at the top of FlightGear's window for a few seconds, but it will appear for a much longer time in the window at &lt;code&gt;Network &gt; Chat&lt;/code&gt;. So if you think you have missed anything, go check there.

== Dealing with abusive behavior ==
Should you become victim of abusive or annoying behavior by any pilot, you have option to ignore him or her. To activate the ignore function open the &lt;code&gt;Multiplayer &gt; Pilot list&lt;/code&gt; dialog and click the &lt;code&gt;ignore&lt;/code&gt; button next to the pilot's callsign. This will prevent chat messages from the ignored pilot appearing and prevent his aircraft from appearing.

== Multiplayer map ==

There is a very nice online map which displays the location of online pilots. You will also find this useful to check that you are successfully connecting to the server, as well as looking up navaids, waypoints, airports, frequencies, weather, and more!&lt;ref&gt;https://wiki.flightgear.org/Howto:Multiplayer&lt;/ref&gt;

== References ==
{{Reflist}}

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    <title>Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6/3. Nxe5/3...Nc6/4. Nxc6/4...dxc6/5. d3/5...Bc5/6. Be2/6...h5/7. h3</title>
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      <text bytes="2181" sha1="3tnd8sko733h7m6jvh1kygxvtdii8fb" xml:space="preserve">{{Chess Opening Theory/Position
|name=Stafford gambit with 5. d3
|eco=[[Chess/ECOC|C42]]
|parent=[[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6/3. Nxe5/3...Nc6|Stafford gambit]] → [[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6/3. Nxe5/3...Nc6/4. Nxc6/4...dxc6/5. d3|5. d3]] → [[../|6...h5]]
}}
== 7. h5 ==

White contests control of g4. This line is one possible refutation of the Stafford but remains sharp. 

'''7...Qd4''' threatens ...Qxf2#. After 8. O-O, Black is happy to sacrifice their knight on g4 if it means opening the h-file: 8...Ng4 9. hxg4 hxg4 10. Bxg4?? is a mistake because of 10...Qe5 and there are too many threats to the castled king, (e.g. 11. Bh3?? Bxh3 12. gxh3 Rxh3 13. Re1 Qh2+ 14. Kf1 Qxf2#). White can stabilise after 10. g3 instead.

8. Rf1 is also playable, perhaps safer, with the idea of playing c3, d4, and e5 with tempi. 

'''7...Qd6''' prepares an attack on the kingside should White castle. 8. O-O?? and Black may crack open the king with 8...Bxh3, where 9. gxh3?? allows 9...Qg3+ because of the pinned f-pawn, or 8...Ng4 threatening ...Qh2#, where 9. Bxg4?? hxg4 allows a strong attack. White can delay castling, and use a series of tempo moves to bring their remaining in defence of the king's side. 8. c3 (threatens d4) Bb6 9. Nd2 (threatens Nc4 forking Q and B) Be6 10. Nf3 with the threat of 11. e5. 

=== History ===

The 7. h5 line is the refutation recommended by Grandmaster [[w:Avetik Grigoryan|Avetik Grigoryan]].&lt;ref&gt;{{Cite web |title=The easiest way to beat the Stafford Gambit (GM guide) |url=https://chessmood.com/blog/stafford-gambit-the-refutation |last=Grigoryan |first=Avetik |date=2021-04-06 |archive-url=https://web.archive.org/web/20260518155919/https://chessmood.com/blog/stafford-gambit-the-refutation |archive-date=2026-05-18 |website=ChessMood}}&lt;/ref&gt;

== Theory table ==
{{ChessTable}}

{{Chess/theory table |links=0
|line4=7. ... Qd4 8. O-O Ng4 9. hxg4 hxg4 10. g3
|eval4={{chess/not|++}}
|line5=7. ... ... 8. ... ... 9. ... ... 10. Bxg4?? Qe5 11. Bh3?? Bxh3 12. gxh3 Rxh3 13. Re1 Qh2+ 14. Kf1 Qxf2#
|eval5=0-1
}}

{{ChessMid}}

== References ==
{{reflist}}
=== See also ===
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== Table of Contents ==
{| class=&quot;wikitable&quot; | align=right
|-
| {{print version}}
|-
| {{PDF version|Statistics for Sociologists}}
|}

* '''Statistics for Sociologists: An Introduction Using R and the General Social Survey'''
* '''Part I: Foundations'''
** [[/Chapter 1: Why Statistics? Making Sense of Social Life with Data/]] {{stage short|100%|August 6, 2026}}
** [[/Chapter 2: Getting Started with R and RStudio/]] {{stage short|100%|August 6, 2026}}
** [[/Chapter 3: The General Social Survey - What It Is and How to Use It/]] {{stage short|100%|August 18, 2026}}
** [[/Chapter 4: Types of Variables and Levels of Measurement/]] {{stage short|100%|August 19, 2026}}
* '''Part II: Working with Data'''
** [[/Chapter 5: Loading, Exploring, and Cleaning GSS Data/]] {{stage short|100%|September 1, 2026}}
** [[/Chapter 6: Recoding and Transforming Variables/]] {{stage short|100%|September 14, 2026}}
* '''Part III: Descriptive Statistics'''
** [[/Chapter 7: Frequency Distributions and Visualizing Data/]] {{stage short|100%|September 20, 2026}}
** [[/Chapter 8: Measures of Central Tendency/]] {{stage short|75%|August 6, 2026}}
** [[/Chapter 9: Measures of Variability/]] {{stage short|75%|August 6, 2026}}
** [[/Chapter 10: The Normal Distribution and Areas Under the Curve/]] {{stage short|75%|August 6, 2026}}
** [[/Chapter 11: Sampling Distributions, Standard Error, and Statistical Power/]] {{stage short|75%|August 6, 2026}}
** [[/Chapter 12: Confidence Intervals/]] {{stage short|75%|August 6, 2026}}
* '''Part IV: Inferential Statistics'''
** [[/Chapter 13: Hypothesis Testing, t-Tests, and Effect Sizes/]] {{stage short|75%|August 6, 2026}}
** [[/Chapter 14: Chi-Square Tests and Effet Sizes/|Chapter 14: Chi-Square Tests and Effect Sizes]] {{stage short|75%|August 6, 2026}}
** [[/Chapter 15: ANOVA and Effect Sizes/]] {{stage short|75%|August 6, 2026}}
** [[/Chapter 16: Bivariate Regression, Correlation, and Effect Sizes/]] {{stage short|75%|August 6, 2026}}
** [[/Chapter 17: An Introduction to Bayesian Thinking/]] {{stage short|75%|August 6, 2026}}
** [[/Chapter 18: Putting It All Together - Replicating Sociological Research/]] {{stage short|75%|August 6, 2026}}

==Instructor Resources==
* [[/Noted Contributors/]] 
* [[/Course Adoptions/]] (if you adopt this text for your course, please make a note of it on this page)

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      <text bytes="14457" sha1="egkg1n7ga3na7u8h53l88l9rfiowy8q" xml:space="preserve">= Chapter 7: Frequency Distributions and Visualizing Data =

Six chapters in, and this is the first one that asks you to actually describe something about the social world using a real statistic. Everything before this was preparation — R, the GSS, variable types, cleaning, recoding. All of it existed to get you to this moment: looking at a distribution of real answers from real people and saying something true about the pattern in front of you.

We start with the simplest possible question you can ask about a variable: what values does it take, and how often does each one show up?

== What a Frequency Distribution Is ==

A '''frequency distribution''' is just a systematic count: for every possible value (or range of values) a variable can take, how many respondents fall into it. It sounds almost too basic to deserve a full chapter, and yet a well-constructed frequency distribution is often the single most informative thing you can produce about a variable — more informative, in some cases, than the fancier statistics later chapters will teach you, because it shows you the whole shape of the data at once rather than compressing it into a single number.

== Frequency Tables ==

'''Base R:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
table(gss$HAPPY)                    # raw counts
prop.table(table(gss$HAPPY))        # proportions
prop.table(table(gss$HAPPY)) * 100  # percentages
&lt;/syntaxhighlight&gt;

'''dplyr:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
library(dplyr)
gss %&gt;%
  count(HAPPY) %&gt;%
  mutate(proportion = n / sum(n),
         percent = proportion * 100)
&lt;/syntaxhighlight&gt;

The dplyr version does more work up front but hands you back a proper data frame — proportions and percentages included as actual columns you can sort, filter, or plot directly — rather than the base R version's separate objects you'd need to combine yourself. Neither is wrong; the dplyr version just anticipates that you'll usually want to do something further with these numbers.

== Bar Charts for Categorical Variables ==

'''Base R:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
barplot(table(gss$RELIG),
        main = &quot;Religious Affiliation&quot;,
        xlab = &quot;Religion&quot;, ylab = &quot;Frequency&quot;)
&lt;/syntaxhighlight&gt;
[[File:Barchart of Religious Affiliation - Base R.jpg|alt=A bar chart of religious affiliation created using base R.|center|thumb|800x800px|A simple bar chart of religious affiliation created using base R.]]
'''ggplot2:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;library(ggplot2)
ggplot(gss, aes(x = RELIG)) +
  geom_bar() +
  labs(title = &quot;Religious Affiliation&quot;, x = &quot;Religion&quot;, y = &quot;Frequency&quot;)&lt;/syntaxhighlight&gt;
[[File:Bar Chart of Religious Affiliation - ggplot2.jpg|alt=A simple bar chart of religious affiliation created using the package ggplot2.|center|thumb|800x800px|A simple bar chart of religious affiliation created using the package ggplot2.]]

== Introduction to ggplot2 ==

The &lt;code&gt;ggplot2&lt;/code&gt;&lt;ref&gt;Wickham, H. (2016). ''ggplot2: Elegant Graphics for Data Analysis'' (2nd ed.). Springer-Verlag.&lt;/ref&gt; syntax looks bizarre the first time you see it, and this book isn't going to pretend otherwise. You build a plot in layers, connected with a &lt;code&gt;+&lt;/code&gt; sign that behaves nothing like arithmetic addition — a design choice that made perfect sense to exactly one person, in roughly 2005, and has mildly confused everyone else ever since. And yet it works, and once it clicks, it's a genuinely elegant way to think about visualization: you're not calling one big function with forty arguments, you're stacking simple, composable layers on top of each other.

The core grammar, which the package's name is actually referencing (&quot;grammar of graphics&quot;):

* &lt;code&gt;ggplot(data, aes(...))&lt;/code&gt; — start a plot, and declare which variables map to which visual properties (x-axis, y-axis, color, and so on) inside &lt;code&gt;aes()&lt;/code&gt; (short for &quot;aesthetics&quot;).
* &lt;code&gt;geom_*()&lt;/code&gt; — add a geometric layer: &lt;code&gt;geom_bar()&lt;/code&gt; for bars, &lt;code&gt;geom_histogram()&lt;/code&gt; for histograms, &lt;code&gt;geom_point()&lt;/code&gt; for scatterplots (Chapter 16), and so on.
* &lt;code&gt;labs()&lt;/code&gt; — add titles and axis labels.
* &lt;code&gt;theme_*()&lt;/code&gt; — adjust the plot's overall visual style.

You do not need to master ggplot2 in this chapter, or possibly ever — you need enough of it to produce a clean, readable plot, which the examples in this book will keep demonstrating throughout. Fluency comes from repetition, not from reading one explanation closely.
[[File:Annotated ggplot2 Code and Output.png|alt=An annotated ggplot2 code and bar chart linking code to pieces.|center|thumb|800x800px|This image links ggplot2 code to the resulting output in the bar chart.]]

== Histograms for Continuous Variables ==

A histogram is conceptually a bar chart for continuous data — instead of one bar per category, you get one bar per range of values (a &quot;bin&quot;), and the choice of bin width genuinely changes what the plot shows you. Too wide, and you flatten out real structure in the data (a bimodal distribution can disappear entirely into a single wide hump). Too narrow, and you get a jagged, noisy mess that emphasizes sampling variation over the underlying pattern. There's no single correct bin width; try a few and see what reveals the shape most honestly.

'''Base R:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;hist(gss$AGE,
     main = &quot;Distribution of Respondent Age&quot;,
     xlab = &quot;Age&quot;)&lt;/syntaxhighlight&gt;

'''ggplot2:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
ggplot(gss, aes(x = AGE)) +
  geom_histogram(binwidth = 5) +
  labs(title = &quot;Distribution of Respondent Age&quot;, x = &quot;Age&quot;, y = &quot;Frequency&quot;)
&lt;/syntaxhighlight&gt;


&lt;!-- FIGURE: Histogram of AGE from the 2010 GSS, real data, ideally shown at two or three different bin widths side by side to illustrate how much this choice matters. Author to generate. --&gt;

== Describing Distributions ==

Once you can see a distribution, you need vocabulary for describing what you're looking at:

* '''Shape.''' Is it roughly '''symmetric''' (the two halves mirror each other), '''skewed right''' (a long tail stretching toward higher values, with most cases bunched at the lower end), or '''skewed left''' (the mirror image — a long tail toward lower values)?
* '''Modality.''' Does the distribution have one clear peak ('''unimodal'''), two ('''bimodal'''), or more? A bimodal distribution is often a clue that you're actually looking at two different subgroups blended together — worth investigating rather than just describing.
* '''Outliers.''' Individual values sitting unusually far from the rest of the distribution — not automatically errors, but always worth a second look.

== Skewness in Social Data: The Case of Income ==

If you want to see real, dramatic right-skew, look no further than income. Most people earn a moderate amount, a shrinking number earn quite a lot, and a very small number earn an amount that makes the x-axis of a histogram nearly useless — everyone else's bar gets flattened into invisibility by the scale required to fit in the tail. This is the mathematical face of wealth inequality, and it's worth sitting with: the distribution's shape is not just a technical detail about which statistic to use (a preview of Chapter 8, where this exact fact determines whether you should trust the mean). It ''is'', in a very real sense, the sociological finding.

The GSS's continuous income measure, &lt;code&gt;CONRINC&lt;/code&gt; (respondent income in constant dollars — see Chapter 3), makes this easy to see directly:

&lt;syntaxhighlight lang=&quot;r&quot;&gt;
hist(gss$CONRINC, main = &quot;Distribution of Respondent Income (CONRINC)&quot;, xlab = &quot;Income (constant dollars)&quot;)
&lt;/syntaxhighlight&gt;

&lt;!-- FIGURE: A real histogram of CONRINC from the 2010 GSS, showing the severe right-skew described above. Author to generate from real data — this pairs directly with the code snippet just given. --&gt;

&lt;!-- IMAGE: A conceptual (not necessarily data-precise) illustration of a heavily right-skewed distribution, perhaps styled as a visual joke — a long, thin tail of a handful of extremely wealthy figures next to a large, ordinary-looking cluster everyone else occupies. Sets up the mean-vs-median discussion coming in Chapter 8 with a memorable image. --&gt;

== Chapter Summary ==

A frequency distribution counts how often each value of a variable occurs, and it's often the single most informative first look you can take at any variable. Categorical variables are best visualized with bar charts (&lt;code&gt;barplot()&lt;/code&gt; in base R, &lt;code&gt;geom_bar()&lt;/code&gt; in ggplot2); continuous variables with histograms (&lt;code&gt;hist()&lt;/code&gt; or &lt;code&gt;geom_histogram()&lt;/code&gt;), where the choice of bin width meaningfully affects what pattern you can see. ggplot2's layered &lt;code&gt;+&lt;/code&gt; syntax is unusual on first contact but becomes second nature with repetition, and you only need enough of it to produce clean, readable plots — not mastery. Distributions are described by shape (symmetric, skewed left or right), modality (how many peaks), and outliers. Income is the textbook example of severe right-skew in social data, and that skew isn't a nuisance to work around — it's a genuine finding about inequality that the very next chapter will show you how to properly summarize.

{{Colored box
| title = Open Science Corner
| background-title-color=#355C7D
| title-color=#FFFFFF
| background-content-color=#F8B195
| content = Save your plots as files with &lt;code&gt;ggsave()&lt;/code&gt;, as part of your script, rather than screenshotting whatever appears in RStudio's Plots pane. A screenshot is a dead end — it can't be regenerated, resized, or reproduced if your data changes. A line of code that saves a plot is part of your reproducible pipeline, exactly like everything else in your script. &lt;code&gt;ggsave(&quot;happiness_by_income.png&quot;, width = 6, height = 4)&lt;/code&gt; takes one line and saves you from ever having to explain why your figure looks slightly blurry in the final paper.
}}

== Practice Examples ==

=== Example 1: Frequency Table for HAPPY ===

'''The Research Question:''' How is happiness distributed across the sample — are most people clustered at one end, or spread out?

'''The Code (base R):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
table(gss$HAPPY)
prop.table(table(gss$HAPPY)) * 100
&lt;/syntaxhighlight&gt;

'''The Code (dplyr):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
library(dplyr)
gss %&gt;%
  count(HAPPY) %&gt;%
  mutate(percent = round(n / sum(n) * 100, 1))
&lt;/syntaxhighlight&gt;

'''The Output:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
HAPPY     n percent
    1   480    24.0
    2   950    47.5
    3   570    28.5
&lt;/syntaxhighlight&gt;

'''The Interpretation:''' Under half of respondents describe themselves as &quot;pretty happy,&quot; the most common response by a wide margin, with &quot;very happy&quot; and &quot;not too happy&quot; splitting the remainder. This is a genuinely common pattern in subjective wellbeing research: most people report being reasonably content, and a distribution skewed toward the positive end shows up so consistently across different populations and time periods that it's practically a finding in its own right.

'''Follow-Up Challenge:''' Compare this distribution to your own prediction before you ran the code. Were you expecting more people to report &quot;very happy,&quot; or fewer? Where do you think that intuition came from?

=== Example 2: Bar Chart of RELIG ===

'''The Research Question:''' What does the religious composition of the sample look like, visually?

'''The Code (base R):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
barplot(table(gss$RELIG),
        main = &quot;Religious Affiliation (2010 GSS)&quot;,
        xlab = &quot;Religion&quot;, ylab = &quot;Frequency&quot;,
        las = 2)
&lt;/syntaxhighlight&gt;

'''The Code (ggplot2):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
library(ggplot2)
ggplot(gss, aes(x = RELIG)) +
  geom_bar(fill = &quot;steelblue&quot;) +
  labs(title = &quot;Religious Affiliation (2010 GSS)&quot;, x = &quot;Religion&quot;, y = &quot;Frequency&quot;) +
  theme_minimal()
&lt;/syntaxhighlight&gt;

'''The Output:''' A bar chart with one bar per religious category, height proportional to the number of respondents in that category. (See the FIGURE note above — actual bar heights depend on the real 2010 GSS data and should be generated from it rather than estimated.)

'''The Interpretation:''' The specific pattern of bar heights tells a story about religious composition that a frequency table alone makes you work harder to see — visual comparison of bar height is nearly instantaneous in a way that scanning a column of numbers isn't. Note the base R version's &lt;code&gt;las = 2&lt;/code&gt; argument, which rotates axis labels vertically; without it, long category names like &quot;Protestant&quot; and &quot;No religion&quot; tend to overlap into an unreadable smear along the x-axis.

'''Follow-Up Challenge:''' Reorder the bars from most to least frequent (a &quot;sorted&quot; bar chart) instead of whatever default order the categories happen to be stored in. Does the sorted version make the pattern easier or harder to read?

=== Example 3: Histogram of AGE ===

'''The Research Question:''' What is the shape of the age distribution in the sample — symmetric, skewed, unimodal, bimodal?

'''The Code (base R):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
hist(gss$AGE, main = &quot;Distribution of Respondent Age&quot;, xlab = &quot;Age&quot;, breaks = 20)
&lt;/syntaxhighlight&gt;

'''The Code (ggplot2):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
library(ggplot2)
ggplot(gss, aes(x = AGE)) +
  geom_histogram(binwidth = 5, fill = &quot;darkolivegreen&quot;, color = &quot;white&quot;) +
  labs(title = &quot;Distribution of Respondent Age&quot;, x = &quot;Age&quot;, y = &quot;Frequency&quot;)
&lt;/syntaxhighlight&gt;

'''The Output:''' A histogram with age on the x-axis and respondent counts on the y-axis, roughly moderate in shape with a mild right skew typical of adult-population age distributions (fewer very elderly respondents than middle-aged ones).

'''The Interpretation:''' Age distributions in general-population surveys like the GSS are rarely perfectly symmetric — they tend to show a mild right skew, reflecting declining survival and participation rates at the oldest ages relative to the broad middle of adulthood. This is a good habit to build now: before touching a formal statistic, describe the shape you're looking at in plain language. It anchors everything that follows in something you actually observed rather than something you assumed.

'''Follow-Up Challenge:''' Try three different values for &lt;code&gt;binwidth&lt;/code&gt; (or &lt;code&gt;breaks&lt;/code&gt; in base R) — one very small, one very large, one in between. At what point does the histogram stop being informative in each direction?

== References ==
&lt;references/&gt;

{{BookCat}}</text>
      <sha1>egkg1n7ga3na7u8h53l88l9rfiowy8q</sha1>
    </revision>
    <revision>
      <id>4671341</id>
      <parentid>4671332</parentid>
      <timestamp>2026-09-20T11:17:13Z</timestamp>
      <contributor>
        <username>Rcragun</username>
        <id>41177</id>
      </contributor>
      <comment>Added figures. Edited.</comment>
      <origin>4671341</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="14924" sha1="gj2twhvqckpioxk9xmpuhumcfn7e8k7" xml:space="preserve">= Chapter 7: Frequency Distributions and Visualizing Data =

Six chapters in, and this is the first one that asks you to actually describe something about the social world using a real statistic. Everything before this was preparation — R, the GSS, variable types, cleaning, recoding. All of it existed to get you to this moment: looking at a distribution of real answers from real people and saying something true about the pattern in front of you.

We start with the simplest possible question you can ask about a variable: what values does it take, and how often does each one show up?

== What a Frequency Distribution Is ==

A '''frequency distribution''' is just a systematic count: for every possible value (or range of values) a variable can take, how many respondents fall into it. It sounds almost too basic to deserve a full chapter, and yet a well-constructed frequency distribution is often the single most informative thing you can produce about a variable — more informative, in some cases, than the fancier statistics later chapters will teach you, because it shows you the whole shape of the data at once rather than compressing it into a single number.

== Frequency Tables ==

'''Base R:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
table(gss$HAPPY)                    # raw counts
prop.table(table(gss$HAPPY))        # proportions
prop.table(table(gss$HAPPY)) * 100  # percentages
&lt;/syntaxhighlight&gt;

'''dplyr:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
library(dplyr)
gss %&gt;%
  count(HAPPY) %&gt;%
  mutate(proportion = n / sum(n),
         percent = proportion * 100)
&lt;/syntaxhighlight&gt;

The dplyr version does more work up front but hands you back a proper data frame — proportions and percentages included as actual columns you can sort, filter, or plot directly — rather than the base R version's separate objects you'd need to combine yourself. Neither is wrong; the dplyr version just anticipates that you'll usually want to do something further with these numbers.

== Bar Charts for Categorical Variables ==

'''Base R:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
barplot(table(gss$RELIG),
        main = &quot;Religious Affiliation&quot;,
        xlab = &quot;Religion&quot;, ylab = &quot;Frequency&quot;)
&lt;/syntaxhighlight&gt;
[[File:Barchart of Religious Affiliation - Base R.jpg|alt=A bar chart of religious affiliation created using base R.|center|thumb|800x800px|A simple bar chart of religious affiliation created using base R.]]
'''ggplot2:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;library(ggplot2)
ggplot(gss, aes(x = RELIG)) +
  geom_bar() +
  labs(title = &quot;Religious Affiliation&quot;, x = &quot;Religion&quot;, y = &quot;Frequency&quot;)&lt;/syntaxhighlight&gt;
[[File:Bar Chart of Religious Affiliation - ggplot2.jpg|alt=A simple bar chart of religious affiliation created using the package ggplot2.|center|thumb|800x800px|A simple bar chart of religious affiliation created using the package ggplot2.]]

== Introduction to ggplot2 ==

The &lt;code&gt;ggplot2&lt;/code&gt;&lt;ref&gt;Wickham, H. (2016). ''ggplot2: Elegant Graphics for Data Analysis'' (2nd ed.). Springer-Verlag.&lt;/ref&gt; syntax looks bizarre the first time you see it, and this book isn't going to pretend otherwise. You build a plot in layers, connected with a &lt;code&gt;+&lt;/code&gt; sign that behaves nothing like arithmetic addition — a design choice that made perfect sense to exactly one person, in roughly 2005, and has mildly confused everyone else ever since. And yet it works, and once it clicks, it's a genuinely elegant way to think about visualization: you're not calling one big function with forty arguments, you're stacking simple, composable layers on top of each other.

The core grammar, which the package's name is actually referencing (&quot;grammar of graphics&quot;):

* &lt;code&gt;ggplot(data, aes(...))&lt;/code&gt; — start a plot, and declare which variables map to which visual properties (x-axis, y-axis, color, and so on) inside &lt;code&gt;aes()&lt;/code&gt; (short for &quot;aesthetics&quot;).
* &lt;code&gt;geom_*()&lt;/code&gt; — add a geometric layer: &lt;code&gt;geom_bar()&lt;/code&gt; for bars, &lt;code&gt;geom_histogram()&lt;/code&gt; for histograms, &lt;code&gt;geom_point()&lt;/code&gt; for scatterplots (Chapter 16), and so on.
* &lt;code&gt;labs()&lt;/code&gt; — add titles and axis labels.
* &lt;code&gt;theme_*()&lt;/code&gt; — adjust the plot's overall visual style.

You do not need to master ggplot2 in this chapter, or possibly ever — you need enough of it to produce a clean, readable plot, which the examples in this book will keep demonstrating throughout. Fluency comes from repetition, not from reading one explanation closely.
[[File:Annotated ggplot2 Code and Output.png|alt=An annotated ggplot2 code and bar chart linking code to pieces.|center|thumb|800x800px|This image links ggplot2 code to the resulting output in the bar chart.]]

== Histograms for Continuous Variables ==

A [[wikipedia:Histogram|histogram]] is conceptually a bar chart for continuous data (interval or ratio variables only). Instead of one bar per category, you get one bar per range of values (a &quot;bin&quot;), and the choice of bin width genuinely changes what the plot shows you. Too wide, and you flatten out real structure in the data (a bimodal distribution can disappear entirely into a single wide hump). Too narrow, and you get a jagged, noisy mess that emphasizes sampling variation over the underlying pattern. There's no single correct bin width; try a few and see what reveals the shape most honestly.

'''Base R:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;hist(gss$AGE,
     main = &quot;Distribution of Respondent Age&quot;,
     xlab = &quot;Age&quot;)&lt;/syntaxhighlight&gt;
[[File:Histogram of Ages Using Base R.jpg|alt=A histogram of ages using base R.|center|thumb|800x800px|A histogram of ages using base R.]]
'''ggplot2:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
ggplot(gss, aes(x = AGE)) +
  geom_histogram(binwidth = 5) +
  labs(title = &quot;Distribution of Respondent Age&quot;, x = &quot;Age&quot;, y = &quot;Frequency&quot;)
&lt;/syntaxhighlight&gt;
[[File:Histogram from ggplot2 with Binwidth 1.jpg|alt=A histogram of ages from the 2010 GSS from the R ggplot2 package with binwidth 1.|left|thumb|425x425px|A histogram of ages from the 2010 GSS from the R ggplot2 package with binwidth 1.]]
[[File:Histogram from ggplot2 with Binwidth 5.jpg|alt=A histogram of ages from the 2010 GSS from the R ggplot2 package with binwidth 5.|thumb|425x425px|A histogram of ages from the 2010 GSS from the R ggplot2 package with binwidth 5.]]


== Describing Distributions ==

Once you can see a distribution, you need vocabulary for describing what you're looking at:

* '''Shape.''' Is it roughly '''symmetric''' (the two halves mirror each other), '''[[wikipedia:Skewness|skewed right]]''' or positive skew (a long tail stretching toward higher values, with most cases bunched at the lower end), or '''[[wikipedia:Skewness|skewed left]]''' or negative skew (the mirror image — a long tail toward lower values)?
* '''[[wikipedia:Mode_(statistics)|Modality]].''' Does the distribution have one clear peak ('''unimodal'''), two ('''bimodal'''), or more? A bimodal distribution is often a clue that you're actually looking at two different subgroups blended together — worth investigating rather than just describing.
* '''[[wikipedia:Outlier|Outliers]].''' Individual values sitting unusually far from the rest of the distribution — not automatically errors, but always worth a second look.

== Skewness in Social Data: The Case of Income ==

If you want to see real, dramatic right-skew, look no further than income. Most people earn a moderate amount, a shrinking number earn quite a lot, and a very small number earn an amount that makes the x-axis of a histogram nearly useless — everyone else's bar gets flattened into invisibility by the scale required to fit in the tail. This is the mathematical face of wealth inequality, and it's worth sitting with: the distribution's shape is not just a technical detail about which statistic to use (a preview of Chapter 8, where this exact fact determines whether you should trust the mean). It ''is'', in a very real sense, the sociological finding.
[[File:Right or Positive Skew Illustration with Income.png|alt=A skewed distribution curve with regular people on the left and rich people on the right.|center|thumb|800x800px]]

The GSS's continuous income measure, &lt;code&gt;CONRINC&lt;/code&gt; (respondent income in constant dollars — see Chapter 3), makes this easy to see directly:

&lt;syntaxhighlight lang=&quot;r&quot;&gt;ggplot(GSS2010, aes(x = CONINC)) +
  geom_histogram(binwidth = 2000) +
  labs(title = &quot;Distribution of Respondent Income (CONRINC)&quot;, 
  x = &quot;Income&quot;, y = &quot;Frequency&quot;)&lt;/syntaxhighlight&gt;
[[File:Skewed Distribution - CONRINC.jpg|alt=A histogram illustrated how skewed income is.|center|thumb|800x800px|This histogram illustrates how skewed income is in the 2010 GSS.]]

== Chapter Summary ==

A frequency distribution counts how often each value of a variable occurs, and it's often the single most informative first look you can take at any variable. Categorical variables are best visualized with bar charts (&lt;code&gt;barplot()&lt;/code&gt; in base R, &lt;code&gt;geom_bar()&lt;/code&gt; in ggplot2); continuous variables with histograms (&lt;code&gt;hist()&lt;/code&gt; or &lt;code&gt;geom_histogram()&lt;/code&gt;), where the choice of bin width meaningfully affects what pattern you can see. ggplot2's layered &lt;code&gt;+&lt;/code&gt; syntax is unusual on first contact but becomes second nature with repetition, and you only need enough of it to produce clean, readable plots — not mastery. Distributions are described by shape (symmetric, skewed left or right), modality (how many peaks), and outliers. Income is the textbook example of severe right-skew in social data, and that skew isn't a nuisance to work around — it's a genuine finding about inequality that the very next chapter will show you how to properly summarize.

{{Colored box
| title = Open Science Corner
| background-title-color=#355C7D
| title-color=#FFFFFF
| background-content-color=#F8B195
| content = Save your plots as files with &lt;code&gt;ggsave()&lt;/code&gt;, as part of your script, rather than screenshotting whatever appears in RStudio's Plots pane. A screenshot is a dead end — it can't be regenerated, resized, or reproduced if your data changes. A line of code that saves a plot is part of your reproducible pipeline, exactly like everything else in your script. &lt;code&gt;ggsave(&quot;happiness_by_income.png&quot;, width = 6, height = 4)&lt;/code&gt; takes one line and saves you from ever having to explain why your figure looks slightly blurry in the final paper.
}}

== Practice Examples ==

=== Example 1: Frequency Table for HAPPY ===

'''The Research Question:''' How is happiness distributed across the sample — are most people clustered at one end, or spread out?

'''The Code (base R):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
table(gss$HAPPY)
prop.table(table(gss$HAPPY)) * 100
&lt;/syntaxhighlight&gt;

'''The Code (dplyr):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
library(dplyr)
gss %&gt;%
  count(HAPPY) %&gt;%
  mutate(percent = round(n / sum(n) * 100, 1))
&lt;/syntaxhighlight&gt;

'''The Output:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
HAPPY     n percent
    1   480    24.0
    2   950    47.5
    3   570    28.5
&lt;/syntaxhighlight&gt;

'''The Interpretation:''' Under half of respondents describe themselves as &quot;pretty happy,&quot; the most common response by a wide margin, with &quot;very happy&quot; and &quot;not too happy&quot; splitting the remainder. This is a genuinely common pattern in subjective wellbeing research: most people report being reasonably content, and a distribution skewed toward the positive end shows up so consistently across different populations and time periods that it's practically a finding in its own right.

'''Follow-Up Challenge:''' Compare this distribution to your own prediction before you ran the code. Were you expecting more people to report &quot;very happy,&quot; or fewer? Where do you think that intuition came from?

=== Example 2: Bar Chart of RELIG ===

'''The Research Question:''' What does the religious composition of the sample look like, visually?

'''The Code (base R):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
barplot(table(gss$RELIG),
        main = &quot;Religious Affiliation (2010 GSS)&quot;,
        xlab = &quot;Religion&quot;, ylab = &quot;Frequency&quot;,
        las = 2)
&lt;/syntaxhighlight&gt;

'''The Code (ggplot2):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
library(ggplot2)
ggplot(gss, aes(x = RELIG)) +
  geom_bar(fill = &quot;steelblue&quot;) +
  labs(title = &quot;Religious Affiliation (2010 GSS)&quot;, x = &quot;Religion&quot;, y = &quot;Frequency&quot;) +
  theme_minimal()
&lt;/syntaxhighlight&gt;

'''The Output:''' A bar chart with one bar per religious category, height proportional to the number of respondents in that category. (See the FIGURE note above — actual bar heights depend on the real 2010 GSS data and should be generated from it rather than estimated.)

'''The Interpretation:''' The specific pattern of bar heights tells a story about religious composition that a frequency table alone makes you work harder to see — visual comparison of bar height is nearly instantaneous in a way that scanning a column of numbers isn't. Note the base R version's &lt;code&gt;las = 2&lt;/code&gt; argument, which rotates axis labels vertically; without it, long category names like &quot;Protestant&quot; and &quot;No religion&quot; tend to overlap into an unreadable smear along the x-axis.

'''Follow-Up Challenge:''' Reorder the bars from most to least frequent (a &quot;sorted&quot; bar chart) instead of whatever default order the categories happen to be stored in. Does the sorted version make the pattern easier or harder to read?

=== Example 3: Histogram of AGE ===

'''The Research Question:''' What is the shape of the age distribution in the sample — symmetric, skewed, unimodal, bimodal?

'''The Code (base R):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
hist(gss$AGE, main = &quot;Distribution of Respondent Age&quot;, xlab = &quot;Age&quot;, breaks = 20)
&lt;/syntaxhighlight&gt;

'''The Code (ggplot2):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
library(ggplot2)
ggplot(gss, aes(x = AGE)) +
  geom_histogram(binwidth = 5, fill = &quot;darkolivegreen&quot;, color = &quot;white&quot;) +
  labs(title = &quot;Distribution of Respondent Age&quot;, x = &quot;Age&quot;, y = &quot;Frequency&quot;)
&lt;/syntaxhighlight&gt;

'''The Output:''' A histogram with age on the x-axis and respondent counts on the y-axis, roughly moderate in shape with a mild right skew typical of adult-population age distributions (fewer very elderly respondents than middle-aged ones).

'''The Interpretation:''' Age distributions in general-population surveys like the GSS are rarely perfectly symmetric — they tend to show a mild right skew, reflecting declining survival and participation rates at the oldest ages relative to the broad middle of adulthood. This is a good habit to build now: before touching a formal statistic, describe the shape you're looking at in plain language. It anchors everything that follows in something you actually observed rather than something you assumed.

'''Follow-Up Challenge:''' Try three different values for &lt;code&gt;binwidth&lt;/code&gt; (or &lt;code&gt;breaks&lt;/code&gt; in base R) — one very small, one very large, one in between. At what point does the histogram stop being informative in each direction?

== References ==
&lt;references/&gt;

{{BookCat}}</text>
      <sha1>gj2twhvqckpioxk9xmpuhumcfn7e8k7</sha1>
    </revision>
    <revision>
      <id>4671345</id>
      <parentid>4671341</parentid>
      <timestamp>2026-09-20T11:26:45Z</timestamp>
      <contributor>
        <username>Rcragun</username>
        <id>41177</id>
      </contributor>
      <minor />
      <origin>4671345</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="14977" sha1="5pu957y45dn4axl7lrhlj7i3a08cfcd" xml:space="preserve">= Chapter 7: Frequency Distributions and Visualizing Data =

Six chapters in, and this is the first one that asks you to actually describe something about the social world using a real statistic. Everything before this was preparation — R, the GSS, variable types, cleaning, recoding. All of it existed to get you to this moment: looking at a distribution of real answers from real people and saying something true about the pattern in front of you.

We start with the simplest possible question you can ask about a variable: what values does it take, and how often does each one show up?

== What a Frequency Distribution Is ==

A '''frequency distribution''' is just a systematic count: for every possible value (or range of values) a variable can take, how many respondents fall into it. It sounds almost too basic to deserve a full chapter, and yet a well-constructed frequency distribution is often the single most informative thing you can produce about a variable — more informative, in some cases, than the fancier statistics later chapters will teach you, because it shows you the whole shape of the data at once rather than compressing it into a single number.

== Frequency Tables ==

'''Base R:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
table(gss$HAPPY)                    # raw counts
prop.table(table(gss$HAPPY))        # proportions
prop.table(table(gss$HAPPY)) * 100  # percentages
&lt;/syntaxhighlight&gt;

'''dplyr:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
library(dplyr)
gss %&gt;%
  count(HAPPY) %&gt;%
  mutate(proportion = n / sum(n),
         percent = proportion * 100)
&lt;/syntaxhighlight&gt;

The dplyr version does more work up front but hands you back a proper data frame — proportions and percentages included as actual columns you can sort, filter, or plot directly — rather than the base R version's separate objects you'd need to combine yourself. Neither is wrong; the dplyr version just anticipates that you'll usually want to do something further with these numbers.

== Bar Charts for Categorical Variables ==

'''Base R:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
barplot(table(gss$RELIG),
        main = &quot;Religious Affiliation&quot;,
        xlab = &quot;Religion&quot;, ylab = &quot;Frequency&quot;)
&lt;/syntaxhighlight&gt;
[[File:Barchart of Religious Affiliation - Base R.jpg|alt=A bar chart of religious affiliation created using base R.|center|thumb|800x800px|A simple bar chart of religious affiliation created using base R.]]
'''ggplot2:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;library(ggplot2)
ggplot(gss, aes(x = RELIG)) +
  geom_bar() +
  labs(title = &quot;Religious Affiliation&quot;, x = &quot;Religion&quot;, y = &quot;Frequency&quot;)&lt;/syntaxhighlight&gt;
[[File:Bar Chart of Religious Affiliation - ggplot2.jpg|alt=A simple bar chart of religious affiliation created using the package ggplot2.|center|thumb|800x800px|A simple bar chart of religious affiliation created using the package ggplot2.]]

== Introduction to ggplot2 ==

The &lt;code&gt;ggplot2&lt;/code&gt;&lt;ref&gt;Wickham, H. (2016). ''ggplot2: Elegant Graphics for Data Analysis'' (2nd ed.). Springer-Verlag.&lt;/ref&gt; syntax looks bizarre the first time you see it, and this book isn't going to pretend otherwise. You build a plot in layers, connected with a &lt;code&gt;+&lt;/code&gt; sign that behaves nothing like arithmetic addition — a design choice that made perfect sense to exactly one person, in roughly 2005, and has mildly confused everyone else ever since. And yet it works, and once it clicks, it's a genuinely elegant way to think about visualization: you're not calling one big function with forty arguments, you're stacking simple, composable layers on top of each other.

The core grammar, which the package's name is actually referencing (&quot;grammar of graphics&quot;):

* &lt;code&gt;ggplot(data, aes(...))&lt;/code&gt; — start a plot, and declare which variables map to which visual properties (x-axis, y-axis, color, and so on) inside &lt;code&gt;aes()&lt;/code&gt; (short for &quot;aesthetics&quot;).
* &lt;code&gt;geom_*()&lt;/code&gt; — add a geometric layer: &lt;code&gt;geom_bar()&lt;/code&gt; for bars, &lt;code&gt;geom_histogram()&lt;/code&gt; for histograms, &lt;code&gt;geom_point()&lt;/code&gt; for scatterplots (Chapter 16), and so on.
* &lt;code&gt;labs()&lt;/code&gt; — add titles and axis labels.
* &lt;code&gt;theme_*()&lt;/code&gt; — adjust the plot's overall visual style.

You do not need to master ggplot2 in this chapter, or possibly ever — you need enough of it to produce a clean, readable plot, which the examples in this book will keep demonstrating throughout. Fluency comes from repetition, not from reading one explanation closely.
[[File:Annotated ggplot2 Code and Output.png|alt=An annotated ggplot2 code and bar chart linking code to pieces.|center|thumb|800x800px|This image links ggplot2 code to the resulting output in the bar chart.]]

== Histograms for Continuous Variables ==

A [[wikipedia:Histogram|histogram]] is conceptually a bar chart for continuous data (interval or ratio variables only). Instead of one bar per category, you get one bar per range of values (a &quot;bin&quot;), and the choice of bin width genuinely changes what the plot shows you. Too wide, and you flatten out real structure in the data (a bimodal distribution can disappear entirely into a single wide hump). Too narrow, and you get a jagged, noisy mess that emphasizes sampling variation over the underlying pattern. There's no single correct bin width; try a few and see what reveals the shape most honestly.

'''Base R:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;hist(gss$AGE,
     main = &quot;Distribution of Respondent Age&quot;,
     xlab = &quot;Age&quot;)&lt;/syntaxhighlight&gt;
[[File:Histogram of Ages Using Base R.jpg|alt=A histogram of ages using base R.|center|thumb|800x800px|A histogram of ages using base R.]]
'''ggplot2:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
ggplot(gss, aes(x = AGE)) +
  geom_histogram(binwidth = 5) +
  labs(title = &quot;Distribution of Respondent Age&quot;, x = &quot;Age&quot;, y = &quot;Frequency&quot;)
&lt;/syntaxhighlight&gt;
[[File:Histogram from ggplot2 with Binwidth 1.jpg|alt=A histogram of ages from the 2010 GSS from the R ggplot2 package with binwidth 1.|left|thumb|425x425px|A histogram of ages from the 2010 GSS from the R ggplot2 package with binwidth 1.]]
[[File:Histogram from ggplot2 with Binwidth 5.jpg|alt=A histogram of ages from the 2010 GSS from the R ggplot2 package with binwidth 5.|thumb|425x425px|A histogram of ages from the 2010 GSS from the R ggplot2 package with binwidth 5.]]


== Describing Distributions ==

Once you can see a distribution, you need vocabulary for describing what you're looking at:

* '''Shape.''' Is it roughly '''symmetric''' (the two halves mirror each other), '''[[wikipedia:Skewness|skewed right]]''' or positive skew (a long tail stretching toward higher values, with most cases bunched at the lower end), or '''[[wikipedia:Skewness|skewed left]]''' or negative skew (the mirror image — a long tail toward lower values)?
* '''[[wikipedia:Mode_(statistics)|Modality]].''' Does the distribution have one clear peak ('''unimodal'''), two ('''bimodal'''), or more? A bimodal distribution is often a clue that you're actually looking at two different subgroups blended together — worth investigating rather than just describing.
* '''[[wikipedia:Outlier|Outliers]].''' Individual values sitting unusually far from the rest of the distribution — not automatically errors, but always worth a second look.

== Skewness in Social Data: The Case of Income ==

If you want to see real, dramatic right-skew, look no further than income. Most people earn a moderate amount, a shrinking number earn quite a lot, and a very small number earn an amount that makes the x-axis of a histogram nearly useless — everyone else's bar gets flattened into invisibility by the scale required to fit in the tail. This is the mathematical face of wealth inequality, and it's worth sitting with: the distribution's shape is not just a technical detail about which statistic to use (a preview of Chapter 8, where this exact fact determines whether you should trust the mean). It ''is'', in a very real sense, the sociological finding.
[[File:Right or Positive Skew Illustration with Income.png|alt=A skewed distribution curve with regular people on the left and rich people on the right.|center|thumb|800x800px]]

The GSS's continuous income measure, &lt;code&gt;CONRINC&lt;/code&gt; (respondent income in constant dollars — see Chapter 3), makes this easy to see directly:

&lt;syntaxhighlight lang=&quot;r&quot;&gt;ggplot(GSS2010, aes(x = CONINC)) +
  geom_histogram(binwidth = 2000) +
  labs(title = &quot;Distribution of Respondent Income (CONRINC)&quot;, 
  x = &quot;Income&quot;, y = &quot;Frequency&quot;)&lt;/syntaxhighlight&gt;
[[File:Skewed Distribution - CONRINC.jpg|alt=A histogram illustrated how skewed income is.|center|thumb|800x800px|This histogram illustrates how skewed income is in the 2010 GSS.]]

== Chapter Summary ==

A frequency distribution counts how often each value of a variable occurs, and it's often the single most informative first look you can take at any variable. Categorical variables are best visualized with bar charts (&lt;code&gt;barplot()&lt;/code&gt; in base R, &lt;code&gt;geom_bar()&lt;/code&gt; in ggplot2); continuous variables with histograms (&lt;code&gt;hist()&lt;/code&gt; or &lt;code&gt;geom_histogram()&lt;/code&gt;), where the choice of bin width meaningfully affects what pattern you can see. ggplot2's layered &lt;code&gt;+&lt;/code&gt; syntax is unusual on first contact but becomes second nature with repetition, and you only need enough of it to produce clean, readable plots — not mastery. Distributions are described by shape (symmetric, skewed left or right), modality (how many peaks), and outliers. Income is the textbook example of severe right-skew in social data, and that skew isn't a nuisance to work around — it's a genuine finding about inequality that the very next chapter will show you how to properly summarize.

{{Colored box
| title = Open Science Corner
| background-title-color=#355C7D
| title-color=#FFFFFF
| background-content-color=#F8B195
| content = Save your plots as files with &lt;code&gt;ggsave()&lt;/code&gt;, as part of your script, rather than screenshotting whatever appears in RStudio's Plots pane. A screenshot is a dead end — it can't be regenerated, resized, or reproduced if your data changes. A line of code that saves a plot is part of your reproducible pipeline, exactly like everything else in your script. &lt;code&gt;ggsave(&quot;happiness_by_income.png&quot;, width = 6, height = 4)&lt;/code&gt; takes one line and saves you from ever having to explain why your figure looks slightly blurry in the final paper.
}}

== Practice Examples ==

=== Example 1: Frequency Table for HAPPY ===

'''The Research Question:''' How is happiness distributed across the sample — are most people clustered at one end, or spread out?

'''The Code (base R):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
table(gss$HAPPY)
prop.table(table(gss$HAPPY)) * 100
&lt;/syntaxhighlight&gt;

'''The Code (dplyr):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
library(dplyr)
gss %&gt;%
  count(HAPPY) %&gt;%
  mutate(percent = round(n / sum(n) * 100, 1))
&lt;/syntaxhighlight&gt;

'''The Output:'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;
HAPPY     n percent
    1   538    26.3
    2  1184    57.9
    3   317    15.5
   NA     5     0.2
&lt;/syntaxhighlight&gt;

'''The Interpretation:''' Just over half of respondents describe themselves as &quot;pretty happy,&quot; the most common response by a wide margin, with &quot;very happy&quot; and &quot;not too happy&quot; splitting the remainder. This is a genuinely common pattern in [[wikipedia:Subjective_well-being|subjective well-being research]]: most people report being reasonably content, and a distribution skewed toward the positive end shows up so consistently across different populations and time periods that it's practically a finding in its own right.

'''Follow-Up Challenge:''' Compare this distribution to your own prediction before you ran the code. Were you expecting more people to report &quot;very happy,&quot; or fewer? Where do you think that intuition came from?

=== Example 2: Bar Chart of RELIG ===

'''The Research Question:''' What does the religious composition of the sample look like, visually?

'''The Code (base R):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;barplot(table(gss$RELIG),
        main = &quot;Religious Affiliation (2010 GSS)&quot;,
        xlab = &quot;Religion&quot;, ylab = &quot;Frequency&quot;,
        las = 2)&lt;/syntaxhighlight&gt;

'''The Code (ggplot2):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;library(ggplot2)
ggplot(gss, aes(x = RELIG)) +
  geom_bar(fill = &quot;steelblue&quot;) +
  labs(title = &quot;Religious Affiliation (2010 GSS)&quot;, x = &quot;Religion&quot;, y = &quot;Frequency&quot;) +
  theme_minimal()&lt;/syntaxhighlight&gt;

'''The Output:''' A bar chart with one bar per religious category, height proportional to the number of respondents in that category. (See the FIGURE note above — actual bar heights depend on the real 2010 GSS data and should be generated from it rather than estimated.)

'''The Interpretation:''' The specific pattern of bar heights tells a story about religious composition that a frequency table alone makes you work harder to see — visual comparison of bar height is nearly instantaneous in a way that scanning a column of numbers isn't. Note the base R version's &lt;code&gt;las = 2&lt;/code&gt; argument, which rotates axis labels vertically; without it, long category names like &quot;Protestant&quot; and &quot;No religion&quot; tend to overlap into an unreadable smear along the x-axis.

'''Follow-Up Challenge:''' Reorder the bars from most to least frequent (a &quot;sorted&quot; bar chart) instead of whatever default order the categories happen to be stored in. Does the sorted version make the pattern easier or harder to read?

=== Example 3: Histogram of AGE ===

'''The Research Question:''' What is the shape of the age distribution in the sample — symmetric, skewed, unimodal, bimodal?

'''The Code (base R):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;hist(gss$AGE, main = &quot;Distribution of Respondent Age&quot;, xlab = &quot;Age&quot;, breaks = 20)&lt;/syntaxhighlight&gt;

'''The Code (ggplot2):'''
&lt;syntaxhighlight lang=&quot;r&quot;&gt;library(ggplot2)
ggplot(gss, aes(x = AGE)) +
  geom_histogram(binwidth = 5, fill = &quot;darkolivegreen&quot;, color = &quot;white&quot;) +
  labs(title = &quot;Distribution of Respondent Age&quot;, x = &quot;Age&quot;, y = &quot;Frequency&quot;)&lt;/syntaxhighlight&gt;

'''The Output:''' A histogram with age on the x-axis and respondent counts on the y-axis, roughly moderate in shape with a mild right skew typical of adult-population age distributions (fewer very elderly respondents than middle-aged ones).

'''The Interpretation:''' Age distributions in general-population surveys like the GSS are rarely perfectly symmetric — they tend to show a mild right skew, reflecting declining survival and participation rates at the oldest ages relative to the broad middle of adulthood. This is a good habit to build now: before touching a formal statistic, describe the shape you're looking at in plain language. It anchors everything that follows in something you actually observed rather than something you assumed.

'''Follow-Up Challenge:''' Try three different values for &lt;code&gt;binwidth&lt;/code&gt; (or &lt;code&gt;breaks&lt;/code&gt; in base R) — one very small, one very large, one in between. At what point does the histogram stop being informative in each direction?

== References ==
&lt;references/&gt;

{{BookCat}}</text>
      <sha1>5pu957y45dn4axl7lrhlj7i3a08cfcd</sha1>
    </revision>
  </page>
  <page>
    <title>Maxima/Programming</title>
    <ns>0</ns>
    <id>485506</id>
    <revision>
      <id>4671165</id>
      <parentid>4670941</parentid>
      <timestamp>2026-09-19T15:49:59Z</timestamp>
      <contributor>
        <username>Idavidmiller</username>
        <id>3577687</id>
      </contributor>
      <minor />
      <comment>/* Block Expressions */</comment>
      <origin>4671165</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="22413" sha1="17izsxaikomvs2wj3um5z7xsr1qebr3" xml:space="preserve">=Maxima Programming=
Although Maxima is not a general-purpose programming language, Maxima as a CAS includes among the built-in ingredients a relatively complete set of programming expressions that are useful for the intended context. Many of the code examples of this section are intended to be illustrative of technical details relevant to Maxima programming as their purpose, and consequently are intentionally elementary in character.

Learning any sort of programming language, including Maxima programming expressions, is a subjective process. In any case, it is essential to have enough technical know-how specific to the programming language in order to begin the learning process, even in cases where much positive transfer from other programming experience is involved.

Much can be accomplished mathematically using Maxima without having to resort to in-depth knowledge and proficiency in the technical details of Maxima programming expressions. However, Maxima programming expressions are frequently essential for the purpose of defining functions, both in the programming sense of the term, but also more relevantly, to the mathematical sense. For that reason alone, familiarity and sufficient proficiency with Maxima programming expressions should be given some attention.

One way to begin the learning process is to become familiar with enough of the programming essentials to accomplish independent efforts toward accomplishing some specific programming goal of interest.  The other way is to study the many available programming expressions of others. This section is intended to provide the essentials toward learning by whatever means is chosen.

The following table shows some built-in ingredients related to Maxima programming expressions:
{| class=&quot;wikitable&quot;
|+Maxima Programming Category
|if
|unless
|errcatch
|prederror
|-
|block
|for
|error
|return
|-
|catch
|from
|warning
|throw 
|-
|local
|thru
|errormsg
|sstatus
|-
|garbage_collect
|step
|errormsg
|status
|-
|do
|next
|go
|
|-
|while
|in
|
|
|}

Some of these programming expression ingredients can also be considered as belonging to one or more other categories than the Programming category.

=== Block Expressions ===
Arguably, the first expressions to consider in the context of Maxima programming are '''''block''''' expressions. &lt;code&gt;Block&lt;/code&gt; expressions as programming ingredients come in two flavors:

* &lt;code&gt;( expr&lt;sub&gt;1&lt;/sub&gt;, expr&lt;sub&gt;2&lt;/sub&gt;,…, expr&lt;sub&gt;n&lt;/sub&gt; )&lt;/code&gt;
* &lt;code&gt;block ([v&lt;sub&gt;1&lt;/sub&gt;,v&lt;sub&gt;2,&lt;/sub&gt;…,v&lt;sub&gt;m&lt;/sub&gt;], expr&lt;sub&gt;1&lt;/sub&gt;, expr&lt;sub&gt;2&lt;/sub&gt;,…, expr&lt;sub&gt;n&lt;/sub&gt;)&lt;/code&gt;

The first form of a &lt;code&gt;block&lt;/code&gt; expression is equivalent to the second form, but without the first list argument: &lt;code&gt;[v&lt;sub&gt;1&lt;/sub&gt;,v&lt;sub&gt;2,&lt;/sub&gt;…,v&lt;sub&gt;m&lt;/sub&gt;]&lt;/code&gt;, as in &lt;code&gt;block (expr&lt;sub&gt;1&lt;/sub&gt;, expr&lt;sub&gt;2&lt;/sub&gt;,…, expr&lt;sub&gt;n&lt;/sub&gt;&lt;/code&gt;, unless &lt;code&gt;return&lt;/code&gt; or &lt;code&gt;go&lt;/code&gt; are used in the block expression. In that, case the form &lt;code&gt;block (expr&lt;sub&gt;1&lt;/sub&gt;, expr&lt;sub&gt;2&lt;/sub&gt;,…, expr&lt;sub&gt;n&lt;/sub&gt;)&lt;/code&gt; must be used.

The purpose of the list argument,  &lt;code&gt;[v&lt;sub&gt;1&lt;/sub&gt;,v&lt;sub&gt;2,&lt;/sub&gt;…,v&lt;sub&gt;m&lt;/sub&gt;]&lt;/code&gt; is to declare the values of identifiers of the list to be local to the &lt;code&gt;block&lt;/code&gt;. If there is no need for local identifiers, the list argument can be omitted (unless &lt;code&gt;return&lt;/code&gt; or &lt;code&gt;go&lt;/code&gt; are used in the &lt;code&gt;block&lt;/code&gt; expression), and either form is sufficient.&lt;syntaxhighlight lang=&quot;maxima&quot;&gt;/* This block expression */
(%i1)	(x : 2, x^2);
(%o1)	4

/* Is equivalent to this block expression */
(%i2)	block (x : 2, x^2);
(%o2)	4&lt;/syntaxhighlight&gt;So, in the case where values of identifiers local to the &lt;code&gt;block&lt;/code&gt; of expressions are not required, then the choice of either form of the &lt;code&gt;block&lt;/code&gt; expression is a matter of user preference, . In both cases, the values of identifiers referenced in the &lt;code&gt;block&lt;/code&gt; are global, and not local to the &lt;code&gt;block&lt;/code&gt;.&lt;syntaxhighlight lang=&quot;maxima&quot;&gt;
/* The value 3 assigned to x is global */
(%i3)	x : 3;
(x)	    3

/* The value 2 assigned to x in the block is global */
(%i4)	(x : 2, x^2);
(%o4)	4

/* The global value assigned to x in the block is 2 not 3 */
(%i5)	x;
(%o5)	2
&lt;/syntaxhighlight&gt;Values of identifiers local to the &lt;code&gt;block&lt;/code&gt; may not be global:&lt;syntaxhighlight lang=&quot;maxima&quot;&gt;/* the value of identifier y is local only */
(%i6)	block ([y], y : 4, y);
(%o6)	4

/* the global value of identifier y is not 4, but is itself */
(%i7)	y;
(%o7)	y

/* the values of identifiers x and y are both local */
(%i8)	block ([x,y], x : 3, y : 4, x);
(%o8)	3

/* the global value of identifier x is not 3, but is 2 */
(%i9)	x;
(%o9)	2

/* the global value of identifier y is not 4, but is itself */
(%i10)	y;
(%o10)	y&lt;/syntaxhighlight&gt;

Regardless of the form of the &lt;code&gt;block&lt;/code&gt; expressions these have in common the comma-separated expression arguments &lt;code&gt;expr&lt;sub&gt;1&lt;/sub&gt;, expr&lt;sub&gt;2&lt;/sub&gt;,…, expr&lt;sub&gt;n&lt;/sub&gt;&lt;/code&gt;  which are evaluated each in turn from first to last (unless the evaluation sequence is modified by by the &lt;code&gt;go&lt;/code&gt;, &lt;code&gt;throw&lt;/code&gt;, or &lt;code&gt;return&lt;/code&gt; operators), and the value of the block expression is the value of &lt;code&gt;expr&lt;sub&gt;n&lt;/sub&gt;&lt;/code&gt;. 

The main purpose of the &lt;code&gt;block&lt;/code&gt; expression, regardless of the form, it to group expressions that are related in some manner, and the value of the last expression may be the only value of interest. However, there are very few limitations imposed on the nature of the &lt;code&gt;block&lt;/code&gt; expression arguments, so it might be the case that the purpose of evaluating the &lt;code&gt;block&lt;/code&gt; expression has been achieved before the last expression argument is evaluated, in which case the value of the &lt;code&gt;block&lt;/code&gt; expression may not necessarily be the value of the last argument expression.

One way to accomplish that is to use an empty string as the last argument expression with the option flag &lt;code&gt;stringdisp&lt;/code&gt; set to &lt;code&gt;false&lt;/code&gt; which is the default value.&lt;syntaxhighlight lang=&quot;maxima&quot;&gt;
(%i11)	stringdisp;
(%o11)	false

(%i12)	block ([x,y], x : 3, y : 4, x, &quot;&quot;);
(%o12)	

(%i13)	block ([x,y], x : 3, y : 4, x)$
&lt;/syntaxhighlight&gt;
The display of the value of the &lt;code&gt;block&lt;/code&gt; expression may be suppressed using a &lt;code&gt;$&lt;/code&gt; to end the input expression instead of a semi-colon. Either technique produces a &lt;code&gt;block&lt;/code&gt; expression value, but the value is not displayed. If a &lt;code&gt;return&lt;/code&gt; operator is evaluated as a argument expression, this will cause evaluation of expression arguments to end explicitly, and the value of the &lt;code&gt;return&lt;/code&gt; operator becomes the value of the &lt;code&gt;block&lt;/code&gt; expression.&lt;syntaxhighlight lang=&quot;maxima&quot;&gt;
(%i14)	is (equal (x,2));
(%o14)	true

%i15)	block (if is (equal (x,2)) then return (x), &quot; x not 2&quot;);
(%o15)	2

(%i16)	x : 3;
(x)	3

(%i17)	block (if is (equal (x,2)) then return (x), &quot;x not 2&quot;);
(%o17)	x not 2
&lt;/syntaxhighlight&gt;When a &lt;code&gt;return&lt;/code&gt; operator is evaluated within a &lt;code&gt;block&lt;/code&gt; expression the result is to stop evaluation of expressions within the enclosing &lt;code&gt;block&lt;/code&gt; expression and to return the value of its argument as the value of the enclosing &lt;code&gt;block&lt;/code&gt; expression. It therefore can be compared with the &lt;code&gt;return&lt;/code&gt; statement found in other programming languages but it yields one difference: In maxima only returns from the current block, not from the entire function it was called in.&lt;syntaxhighlight lang=&quot;maxima&quot;&gt;(%i81)	test_nested_block (val) := 
	block (
		  [outer_var : 10],
		  print(&quot;Entering outer block expression&quot;),
		  
		       /* inner block expression */
		       block(
		           [inner_var : 20],
		           print(&quot;      Entering inner block expression&quot;),
	        
		           if val &gt; 5 then
	        
	               /* another inner block expression */  
	               block (
	               print (&quot;   val &gt; 5&quot;),
	               print (&quot;   Returning only to inner block expression&quot;),
		           return (inner_var + val)
	        	   /* returns only to the inner block expression */
	               ),
	               /* end of another inner block expression */
	        
	               print (&quot;   inner_var + val is &quot;, inner_var + val)
		           ),     
	               /* end of inner block expression */
		  
		  print (&quot;Back in outer block expression&quot;),
		  outer_var + val
		  
	/* end of outer block expression */
	)$

(%i79)	test_nested_block(1);
&quot;Entering outer block expression&quot;

&quot;      Entering inner block expression&quot;

&quot;      inner_var + val is&quot;21

&quot;Back in outer block expression&quot;

(%o79)	11

(%i73)	test_nested_block(6);
&quot;Entering outer block expression&quot;

&quot;      Entering inner block expression&quot;

&quot;      val &gt; 5&quot;

&quot;      Returning only to inner block expression&quot;

&quot;Back in outer block expression&quot;

(%o73)	16&lt;/syntaxhighlight&gt;


block: Defines a code block with local variables and sequential statements.

nesting: The second block sits inside the body of the first outer block.

return: Calling return(...) inside the inner block immediately exits only that inner block and yields the return value to the point where the inner block was called, allowing the outer block to continue execution

==== Block Expression Evaluation Sequence Modifications ====
&lt;code&gt;block&lt;/code&gt; expression arguments &lt;code&gt;expr&lt;sub&gt;1&lt;/sub&gt;, expr&lt;sub&gt;2&lt;/sub&gt;,…, expr&lt;sub&gt;n&lt;/sub&gt;&lt;/code&gt;  are generally evaluated each in turn from first to last, and the value of the &lt;code&gt;block&lt;/code&gt; expression is the value of &lt;code&gt;expr&lt;sub&gt;n&lt;/sub&gt;&lt;/code&gt; unless this sequence is modified by some means.

One way to modify the first-to-last expression evaluation sequence of a &lt;code&gt;block&lt;/code&gt; expression is by way of a &lt;code&gt;go&lt;/code&gt; operator with a label (or &quot;tag&quot;) argument ( the &quot;''go to''&quot;) as the following exemplifies:&lt;syntaxhighlight lang=&quot;maxima&quot;&gt;
(%i18)	sum_to_n (n) := block ( [i : 1, total : 0],
	                             loop,
	                                total : total + i,
	                                i : i + 1,
	                                if i &lt;= n then go (loop),
	                             total)$

(%i19)	sum_to_n(25);
(%o19)	325

(%i20)	n;
(%o20)	n

(%i21)	i;
(%o21)	i

(%i22)	total;
(%o22)	total
&lt;/syntaxhighlight&gt;Note the following:

* &lt;code&gt;block ([ i : 1,total : 0], ...)&lt;/code&gt;: The list argument creates a local environment with local identifiers &lt;code&gt;i&lt;/code&gt; and &lt;code&gt;total&lt;/code&gt;. The function argument &lt;code&gt;n&lt;/code&gt; is also a local identifier.
* &lt;code&gt;loop&lt;/code&gt;: This label serves as a target inside the &lt;code&gt;block&lt;/code&gt; expression to where &lt;code&gt;go (loop)&lt;/code&gt; can jump.
* &lt;code&gt;if i &lt;= n then go (loop)&lt;/code&gt;: This conditional expression causes the &lt;code&gt;go (loop)&lt;/code&gt; operator to be evaluated if the condition is &lt;code&gt;true&lt;/code&gt;.
* &lt;code&gt;total&lt;/code&gt;: The value of this local identifier is the returned value of the &lt;code&gt;block&lt;/code&gt; expression.
It should also be worth noting that the identifiers &lt;code&gt;n&lt;/code&gt;, &lt;code&gt;i&lt;/code&gt;, and &lt;code&gt;total&lt;/code&gt; have local values assigned within the &lt;code&gt;block&lt;/code&gt; expression, but their global values are themselves. Also notice that the identifiers &lt;code&gt;i&lt;/code&gt; and &lt;code&gt;total&lt;/code&gt; were both declared local and assigned initial values within the &lt;code&gt;block&lt;/code&gt; list argument.

The go-to label argument of the &lt;code&gt;go&lt;/code&gt; operator must be the name of a tag appearing within the same block expression. The &lt;code&gt;go&lt;/code&gt; operator cannot be used to go to a tag in a different &lt;code&gt;block&lt;/code&gt; expression. There is nothing special about the &lt;code&gt;loop&lt;/code&gt; identifier name used for the go-to tag in this example. Other identifiers could be used, but they must be atomic.

Another way to modify a block expression evaluation sequence is by way of the &lt;code&gt;throw&lt;/code&gt; operator.&lt;syntaxhighlight lang=&quot;maxima&quot;&gt;(%i32)	/* Define a function using a block expression that searches 
	     for a specific condition and throws a value */
	
	find_element (target_list, threshold) := block (
	      
	    [found_val : false], /* local identifier value */
	    
	      catch(
	          
	        for x in target_list do 
	          (
	              if x &gt; threshold then 
	                (
	                  /* Immediately exit the block and 
	                     return this value */
	                  throw(x)
	                  )
	            ),
	          /* This string is returned only if the loop 
	             finishes without throwing */
	                 &quot;No element exceeded the threshold&quot;
	      )
	    
	)$

(%i31)	/* Test the block */
	find_element ( [10, 20, 55, 80], 50 );
(%o31)	55&lt;/syntaxhighlight&gt;How It Works

catch(...): This creates a boundary that intercepts any throw executed within its scope.

throw(x): When Maxima encounters this statement, it immediately stops executing the loop and the rest of the block. It jumps directly out of the &lt;code&gt;catch&lt;/code&gt; expression, returning the value of x as the result of the entire catch statement.

==== Nested Block Expressions ====
&lt;code&gt;block&lt;/code&gt; operators may appear within other block expressions as arguments – '''''nested''''' &lt;code&gt;block&lt;/code&gt; expressions. A local environment with local identifiers may be created for nested block expressions. Local values for identifiers, if declared by a first &lt;code&gt;block&lt;/code&gt; operator list argument, are created each time a nested &lt;code&gt;block&lt;/code&gt; is evaluated.  

However, identifiers with global values that have not been declared as local within any &lt;code&gt;block&lt;/code&gt; expressions, are global values for nested &lt;code&gt;block&lt;/code&gt; expressions as well as enclosing &lt;code&gt;block&lt;/code&gt; expressions. Likewise, local identifiers of any enclosing &lt;code&gt;block&lt;/code&gt; expression have values that are global within any enclosed blocks, if not declared as local within the enclosed block. If the value of an identifier is not local in a &lt;code&gt;block&lt;/code&gt; expression, its value is the value most recently assigned by an enclosing &lt;code&gt;block&lt;/code&gt; expression, if any value has been assigned. Otherwise, it is the value of the identifier in the global environment. &lt;syntaxhighlight lang=&quot;maxima&quot;&gt;
(%i23)	z : 2^(1/3);
(z)	2^(1/3)

(%i24) /* Outer block starts */
	block 
	(
	 [x : 10, y : 20],
	 /* values of x and y declared local to outer block */
	  
	 /* Inner block starts */
	     block 
	     (
	      [y : 99, z : 100], 
	      /* values of y and z declared local to inner block */
	      print (&quot;Inside inner block:&quot;),
	      print (&quot;x =&quot;,  x, &quot;is the value of x from outer block&quot;),
	      print (&quot;y =&quot;,  y, &quot;is the local value of y of outer block&quot;),
	      print(&quot;z =&quot;,  z, &quot;is the local value of z of inner block&quot;)
	     ),
	 /* Inner block ends */
	 
	 /* Outer block resumes */
	 print (&quot;Back in outer block:&quot;),
	 print (&quot;x =&quot;,  x, &quot;is the value of x from outer block&quot;),
	 print (&quot;y =&quot;,  y,  &quot;is the restored value of y of the outer block&quot;),
	 print (&quot;z =&quot;,  z,  &quot;is the value of z global to both blocks&quot;)
	 /* Outer block ends */
	)$
	
Inside inner block:
x = 10 is the value of x from outer block
y = 99 is the local value of y of outer block
z = 100 is the local value of z of inner block
Back in outer block:
x = 10 is the value of x from outer block
y = 20 is the restored value of y of the outer block
z = 2^(1/3) is the value of z global to both blocks
&lt;/syntaxhighlight&gt;

==== Values, Properties, and the &lt;code&gt;local&lt;/code&gt; Operator ====
The expression &lt;code&gt;local (v&lt;sub&gt;1&lt;/sub&gt;, v&lt;sub&gt;2&lt;/sub&gt;, ... , v&lt;sub&gt;m&lt;/sub&gt;)&lt;/code&gt; within a &lt;code&gt;block&lt;/code&gt; expression saves the '''''properties''''' associated with the symbols &lt;code&gt;v&lt;sub&gt;1&lt;/sub&gt;, v&lt;sub&gt;2&lt;/sub&gt;, ... , v&lt;sub&gt;m&lt;/sub&gt;&lt;/code&gt;, removes any properties before evaluating other expressions, and restores any saved properties on exit from the block.

Because Maxima is an application based on the Common Lisp programming language, it utilizes Lisp '''''symbol''''' structure. Lisp symbols are objects that carry their own &quot;dictionary&quot; of attributes. A Lisp symbol's internal property list (''plist'') is a built-in data structure attached directly to a symbol. Maxima uses this underlying Lisp symbol structure to associate '''''properties''''' with Maxima identifiers.

Properties of identifiers can be ''declared explicitly'' by users. &lt;syntaxhighlight lang=&quot;maxima&quot;&gt;
(%i23)	declare (x, real);
(%o23)	done
&lt;/syntaxhighlight&gt;
However, some identifier property declarations are ''implemented implicitly'' as properties of a symbol, including &lt;code&gt;:=&lt;/code&gt;, &lt;code&gt;array&lt;/code&gt;, &lt;code&gt;dependencies&lt;/code&gt;, &lt;code&gt;atvalue&lt;/code&gt;, &lt;code&gt;matchdeclare&lt;/code&gt;, &lt;code&gt;atomgrad&lt;/code&gt;, &lt;code&gt;constant&lt;/code&gt;, &lt;code&gt;nonscalar&lt;/code&gt;, &lt;code&gt;assume&lt;/code&gt;, and some others. Below is a description of how each of those specific declarations is implemented as a property under the hood:

====== Functions and Arrays ======
* '''&lt;code&gt;:=&lt;/code&gt; (Function Definition):''' When you define a function using &lt;code&gt;f(x) := x^2&lt;/code&gt;, the actual expression (&lt;code&gt;x^2&lt;/code&gt;) and its argument list (&lt;code&gt;x&lt;/code&gt;) are stored as a property of the symbol &lt;code&gt;f&lt;/code&gt;.
* '''&lt;code&gt;array&lt;/code&gt;:''' When you declare or use a subscripted array (like &lt;code&gt;a[i]&lt;/code&gt;), the array type, dimensions, and memory pointer are attached as a property to the symbol &lt;code&gt;a&lt;/code&gt;. This differentiates it from a standard scalar variable.

====== Calculus and Dependencies ======
* '''&lt;code&gt;dependencies&lt;/code&gt;:''' If you declare &lt;code&gt;depends(y, x)&lt;/code&gt;, Maxima attaches a dependency list property to &lt;code&gt;y&lt;/code&gt; noting that it functionally depends on &lt;code&gt;x&lt;/code&gt;. This tells the &lt;code&gt;diff&lt;/code&gt; (differentiation) engine not to treat &lt;code&gt;y&lt;/code&gt; as a constant relative to &lt;code&gt;x&lt;/code&gt;.
* '''&lt;code&gt;atvalue&lt;/code&gt;:''' When you define a specific value for an expression at a boundary point (e.g., &lt;code&gt;atvalue(y, x=0, 1)&lt;/code&gt;), this boundary constraint is stored as an evaluation property on the symbol &lt;code&gt;y&lt;/code&gt;.
* '''&lt;code&gt;atomgrad&lt;/code&gt;:''' This assigns a specific gradient or derivative to an atomic identifier (e.g., telling Maxima what (df/dx) is explicitly). Maxima saves this rule as a gradient property on that symbol.

====== Pattern Matching and Rules ======
* '''&lt;code&gt;matchdeclare&lt;/code&gt;:''' Used in Maxima's pattern-matching system (like &lt;code&gt;tellsimp&lt;/code&gt;). When you type &lt;code&gt;matchdeclare(x, freeof(a))&lt;/code&gt;, Maxima attaches a predicate property to &lt;code&gt;x&lt;/code&gt;. When a pattern rule runs, Maxima looks at property list of &lt;code&gt;x&lt;/code&gt; to see what conditions a matching expression must meet.

====== Mathematical and Evaluation Attributes ======
* '''&lt;code&gt;constant&lt;/code&gt;:''' Declaring &lt;code&gt;declare(c, constant)&lt;/code&gt; places a &quot;constant&quot; flag on property list of  &lt;code&gt;c&lt;/code&gt;. Core routines (like integration and differentiation) check this flag to know they can pull &lt;code&gt;c&lt;/code&gt; out of integrals or differentiate it to zero.
* '''&lt;code&gt;nonscalar&lt;/code&gt;:''' Tells Maxima to treat a symbol as a matrix or vector rather than a regular number. This property changes how operators like &lt;code&gt;.&lt;/code&gt; (non-commutative multiplication) treat the symbol.
* '''&lt;code&gt;assume&lt;/code&gt;:''' When an expression such as &lt;code&gt;assume(x &gt; 0)&lt;/code&gt; is used, Maxima's database system (&lt;code&gt;context&lt;/code&gt;) assigns facts and properties (like &lt;code&gt;pos&lt;/code&gt; or &lt;code&gt;nonnegative&lt;/code&gt;) to the symbol &lt;code&gt;x&lt;/code&gt;, allowing the simplifier to safely reduce expressions like &lt;code&gt;sqrt(x^2)&lt;/code&gt; to &lt;code&gt;x&lt;/code&gt;.

The effect of the &lt;code&gt;local&lt;/code&gt; operator is to make such declarations effective only within a &lt;code&gt;block&lt;/code&gt; expression. Otherwise, declarations within a &lt;code&gt;block&lt;/code&gt; expression are considered to be global declarations.

So what does all of this mean to the typical Maxima user? It means that the list of identifiers that is the first argument  of a &lt;code&gt;block&lt;/code&gt; expression only declares the '''''values''''' of those identifiers as local to the &lt;code&gt;block&lt;/code&gt; expression in which the list is an argument. Any properties of identifiers are not declared local by this means. 

In order to declare '''''properties''''' of identifiers to be local to a &lt;code&gt;block&lt;/code&gt; expression, the &lt;code&gt;local&lt;/code&gt; operator must be used as an expression within the &lt;code&gt;block&lt;/code&gt; expression. At the point where the local operator is evaluated as an argument of a &lt;code&gt;block&lt;/code&gt; expression, the properties of the identifiers that are arguments to the &lt;code&gt;local&lt;/code&gt; operator become local to the block. It is not an unfair criticism that perhaps the &lt;code&gt;local&lt;/code&gt; operator should have been named something like &lt;code&gt;local_properties&lt;/code&gt;. &lt;syntaxhighlight lang=&quot;maxima&quot;&gt;
(%i25)	f (s) := cos (s);
(%o25)	f(s):=cos(s)

(%i26)	f (%pi/6);
(%o26)	sqrt(3)/2

(%i27)	block (local (f), f (s) := sin (s), f (%pi/6));
(%o27)	1/2

(%i28)	f (s);
(%o28)	cos(s)
&lt;/syntaxhighlight&gt;In the above example, the '''''properties''''' of identifier &lt;code&gt;f&lt;/code&gt; were declared to be local in the &lt;code&gt;block&lt;/code&gt; expression using the &lt;code&gt;local&lt;/code&gt; operator. However, global properties of the identifier &lt;code&gt;f&lt;/code&gt; were not affected by the local function definition of &lt;code&gt;f&lt;/code&gt; in the &lt;code&gt;block&lt;/code&gt; expression. The global definition expression of &lt;code&gt;f&lt;/code&gt; which is &lt;code&gt;cos (s)&lt;/code&gt; and the argument &lt;code&gt;s&lt;/code&gt; were not affected by the local definition of &lt;code&gt;f&lt;/code&gt; because the properties of &lt;code&gt;f&lt;/code&gt; were declared local to the &lt;code&gt;block&lt;/code&gt; expression.  

&lt;code&gt;block&lt;/code&gt; expressions can be used for different purposes in the Maxima programming context. &lt;code&gt;block&lt;/code&gt; expressions can be used in a stand-alone fashion or as part of an expression. However, &lt;code&gt;block&lt;/code&gt; expressions are commonly used in expressions that define '''''functions''''', which is the topic that follows. 

=== Functions ===
For mathematical functions use always
 define() 
instead of
 := 
There is only one small difference between them:

&quot;The function definition operator. f(x_1, ..., x_n) := expr defines a function named f with arguments x_1, …, x_n and function body expr. := '''never''' evaluates the function body (unless explicitly evaluated by quote-quote &lt;nowiki&gt;''&lt;/nowiki&gt;).&quot;

&quot;Defines a function named f with arguments x_1, …, x_n and function body expr. define '''always''' evaluates its second argument (unless explicitly quoted). &quot;

=== Lisp and Maxima ===

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      <text bytes="11863" sha1="qrpju1q37rzdfrduls6hdwxmr5vqd4z" xml:space="preserve">&lt;noinclude&gt;
{{Chapter navigation|Gravitational redshift|Conclusion}}
&lt;/noinclude&gt;

== Cosmology of retarded interaction ==
Modern astrophysics is based on the general theory of relativity (GR) because it has been confirmed by experiments such as the perihelion precession of Mercury or the detection of gravitational waves. A new model must prove that it also correctly describes all the effects that the general theory of relativity explains geometrically.

To devise a disruptive cosmology that relies solely on classical, relativistic, and retarded gravitational potentials and dispenses with all ad hoc and a priori hypotheses – such as the equivalence principle of general relativity, cosmological constants, dark matter, dark energy, homogeneity, or isotropy – we must return to a dynamic field approach. To this end, the differential geometry required for general relativity can be replaced by a model that relies on pseudo-Euclidean geometry in Minkowski space.

The central challenge is that classical Newtonian gravity acts instantaneously. To construct a consistent cosmology, retarded gravitational potentials can be introduced. This leads to an inherent time dependence and dynamics of the universe without the need to postulate an expansion of spacetime.

In what follows, a draft of the '''cosmology of retarded interaction (CRI)''' is outlined.

=== The axioms of retarded interaction ===
Established physics is based on three pillars, which are used to build the cosmology of retarded interaction:

# '''Classical mechanics:''' The force &lt;math display=&quot;inline&quot;&gt;F = m \cdot a&lt;/math&gt; as the basis of the acceleration &lt;math display=&quot;inline&quot;&gt;a&lt;/math&gt; of a mass &lt;math display=&quot;inline&quot;&gt;m&lt;/math&gt; .
# '''Relativistic kinematics:''' time dilation and length contraction according to the special theory of relativity, but without the curvature of spacetime.
# '''Retarded gravitation:''' The gravitational effect propagates at the speed of light &lt;math display=&quot;inline&quot;&gt;c&lt;/math&gt;. The potential &lt;math display=&quot;inline&quot;&gt;\Phi&lt;/math&gt; at a point &lt;math display=&quot;inline&quot;&gt;\mathbf {r}&lt;/math&gt; at time &lt;math display=&quot;inline&quot;&gt;t&lt;/math&gt; depends on the state of the source at time &lt;math display=&quot;inline&quot;&gt;t - \Delta t&lt;/math&gt;, where &lt;math display=&quot;inline&quot;&gt;\Delta t = \frac {r} {c}&lt;/math&gt;.

=== The mathematical core ===
For the mathematical formulation, the gravitational potential can be substituted into the wave equation:

:&lt;math&gt;\square \Phi = \left( \frac {1} {c^2} \frac {\partial^2} {\partial t^2} - \nabla^2 \right) \Phi = 4\pi G \rho&lt;/math&gt;

The solution to this wave equation is the retarded potential:

:&lt;math&gt;\Phi (\vec {r}, t) = -G \iiint \frac {\rho (\vec {r}', t - |\vec {r} - \vec {r}'| / c)} {|\vec {r} - \vec {r}'|} d^3r'&lt;/math&gt;

In a universe with massive objects, gravity never acts instantaneously but always depends on the mass’s past position. This creates a phase shift between mass and force, as well as an attenuation of the retarded gravitational potentials.

=== Cosmological mechanisms ===
==== The apparent expansion ====
In general relativity, redshift is a stretching of spacetime. In the cosmology of retarded interaction, it is the result of a dynamic retardation in both time and space.

Since the gravitational effect arrives retarded, the force of mass lags behind. In a system consisting of many particles, this leads to a continuous kinematic shift in their trajectories. When we receive light from distant sources, we do not observe an expansion of spacetime, but rather the cumulative effect of the net gravitational potentials on the propagation of light (gravitational redshift) and the relativistic potentials due to the motion of the source (Doppler redshift).

==== A replacement for dark matter ====
In the standard model of cosmology respectively the Lambda cold dark matter model (Lambda-CDM model or ΛCDM model), the flat rotation curves of galaxies are explained by dark matter which is even changing over time. In the cosmology of retarded interaction, they result from the retarded effect of the baryonic matter accreted by the galaxies.

The stars in the outer regions of a galaxy respond to the gravitational potential of the center as it was millions of years ago. The force does not decrease as &lt;math display=&quot;inline&quot;&gt;1 / r^2&lt;/math&gt; because the time delay generates an additional force component, similar to the Liénard–Wiechert potentials in electrodynamics.

==== A replacement for dark energy ====
In the cosmology of retarded interaction, accelerated expansion is interpreted as a cosmic phenomenon. The retarded gravitational potentials of homogeneously distributed masses – located in a spherical shell outside the sphere’s surface on which a moving test mass rests – lead to an net outward acceleration of the test mass, since masses in front of the test mass cause stronger retarded forces than opposing masses that reach the test mass with attenuated retarded forces.

Consequently, all mass points moving in the universe drift apart at an accelerating rate because the net acting forces, due to the retardation, cause a radially outward acceleration force. As a result, matter in the outer regions of the universe becomes increasingly dense, creating an inhomogeneous mass distribution (black shell) that continuously amplifies the effect of the retarded potentials.

The cosmology of retarded interaction therefore does not align with metric expansion, it only presupposes a static pseudo-Euclidean space. If spacetime itself were expanding, this would call into question or modify the speed of light &lt;math display=&quot;inline&quot;&gt;c&lt;/math&gt; as a constant parameter for the retardation &lt;math display=&quot;inline&quot;&gt;\Delta t = r/c&lt;/math&gt;. The cosmology of retarded interaction would thus actively dispute the thesis of metric expansion and interpret it as an optical illusion.

In the cosmology of retarded interaction, expansion is not necessarily linked to an event such as the Big Bang, but is rather a dynamic process. The retardation of gravity gives rise to inhomogeneity. When moving masses are far enough apart that the time delay &lt;math display=&quot;inline&quot;&gt;\Delta t&lt;/math&gt; effectively weakens and phase-shifts the effect of gravity, the objects begin to drift due to their kinetic motion.

The farther they drift, the larger &lt;math display=&quot;inline&quot;&gt;\Delta t&lt;/math&gt; becomes, and the weaker the retarded forces from the opposite side from the universe become the expansion accelerates without the need for dark energy.

==== The universe as a black hole ====
In general relativity, a black hole is a region of extreme spatial curvature. However, since cosmology of retarded interaction rejects spatial curvature and replaces it with retarded potentials, the concept of a black hole would have to be radically redefined. In cosmology of retarded interaction, a black hole would not be a geometric point, but rather a region of high mass density in which the gravitational potentials are so strong that the escape velocity &lt;math display=&quot;inline&quot;&gt;v_e \geq c&lt;/math&gt; is reached.

If our universe were the interior of such an object, we would find ourselves in a region where the retarded potentials are dominated by a massive external source which is located in the out regions of the universe. This region can be interpreted as a black shell.

Since cosmology of retarded interaction is based on classical potentials, there is no mathematical necessity for a singularity. The retarded effect smooths out extreme gradients over time. A universe-black-hole in cosmology of retarded interaction would thus be more like a gigantic cluster of baryonic matter, within which we find ourselves. The observed physics would then be the superposition of the local forces and the global, retarded pull of the surrounding mass in the black shell.

=== Comparison with the standard model of cosmology ===
[[File:Gravitational.field.in.cosmology.of.retarded.interaction.png|thumb|upright=2|Gravitational field in the '''cosmology of retarded interaction''' within a '''spherical black shell''' of an expanding universe with retarded gravitational potentials:&lt;br/&gt;'''Vector field''' showing the direction of gravitational forces by {{blue|'''blue arrows'''}}.&lt;br/&gt;Corresponding '''scalar potential field''' indicating equipotential lines by {{red|'''red circles'''}}.]]

The cosmology of retarded interaction does not rely on a priori hypotheses or ad hoc assumptions, which are taken for granted in the standard model of cosmology.

{| class=&quot;wikitable&quot;
|+ Comparision standard model of cosmology (ΛCDM) and cosmology of retarded interaction (CRI)
|-
! Concept !! Standard model of cosmology (GR / ΛCDM) !! Cosmology of retarded interaction (CRI)
|-
| Principle of equivalence || Hypothesis (general theory of relativity) confirmed on earth within the margins of measurement accuracy || No, gravitation has a scalar potential and its gradient is a force
|-
| Homogeneity || Ad hoc assumption (cosmological principle) || No homogeneity, higher mass and energy densities in outer regions of a kinematic universe
|-
| Isotropy || Ad hoc assumption (cosmological principle) || Only from the centre of a kinematic universe
|-
| Copernican principle || Ad hoc assumption || Milky Way in Local Group near the centre of a kinematic universe
|-
| Dark matter || Ad hoc assumption (non-baryonic particles) || Effect of retarded gravitational potentials
|-
| Dark energy || Ad hoc assumption (cosmological constant Λ) || Effect of retarded gravitational potentials
|-
| Rotation curves of spiral galaxies || Ad hoc assumption (dark matter) || Retarded gravitational potentials of accreted baryonic matter
|-
| High-redshift objects || Ad hoc assumption (cosmological redshift by expanding spacetime) || Gravitational redshift due to baryonic matter in black shell 
|-
| Geometry || Dynamic differential geometry|| Static pseudo-Euclidean geometry
|-
| Spacetime || Curved spacetime || Minkowski spacetime
|-
| Spatial evolution of particle horizon || Accelerated expansion with superluminal speed || Expansion with speed of light
|-
| Spatial evolution of event horizon || Accelerated expansion with superluminal speed || Expansion of inner surface of massive mass shell with sub-light speed
|-
| Gravitational potential within universe || Constant || Increasing decrease as the distance from the center increases
|-
| Singularities || Points with infinite mass and energy density, event horizonts with infinite gravitational redshift || None
|}

=== Summary ===
The universe is not expanding, and it is not curved. It is a system of masses distributed in flat space, whose mutual attraction is so time-delayed that the resulting trajectories and light signals create the illusion of an expanding geometry that is explained by dark matter and dark energy in the standard model of cosmology.

The cosmology of retarded interaction consistently adheres to physical axioms (classical, relativistic, and retarded potentials). It dispenses with the geometric interpretation (no spatial curvature, no event horizon in the sense of general relativity) and regards everything as the result of forces, masses, and time delays. The dark components and spatial curvature are merely mathematical artifacts that arise when one attempts to describe the retarded force action using differential geometry.

The universe is not viewed as a geometric black hole in the sense of general relativity, but rather as a massive and inhomogeneous system whose internal dynamics are governed by retarded potentials.

Cosmology of retarded interaction is based solely on the view that the universe is a classical mechanical system with retardation. By introducing differential-geometric paradigms such as the curvature or stretching of spacetime, one departs from the disruptive paradigm of cosmology of retarded interaction and returns to general relativity.</text>
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      <text bytes="4590" sha1="64y4bcxowwg0t30q2gnqjvz9gulpigx" xml:space="preserve">== Overview ==
[[File:Indian railways 18 star logo.jpg|thumb|'''''Credit: Mainaksinghabarma.''''' The Indian Railways 18-star logo. ]]
'''Indian Railways''' is the state-owned railway company of India. It owns and operates the country's rail transport system. Railways were first introduced to India in 1853. The first passenger train ran on 16th April 1853 between Boribunder and Thane. Since then, Indian Railways has been growing continuously. After independence in 1947, India inherited a weak rail network. About 40 per cent of the railway lines were in the newly created Pakistan. Many lines had to be rerouted through Indian territory. New lines had to be constructed to connect important cities such as Jammu.                                                                                                                              

At the time of independence, there were 42 separate railway systems. This included 32 lines owned by the former Indian princely states. These systems spanned a total of 55,000 km. In 1951, these systems were nationalized as one unit called Indian Railways. In 1952, it was decided to replace the existing rail networks by zones. A total of six zones came into being in 1952. On 6 September 2003, six further zones were made from existing zones for administration purpose. One more zone was added in 2006. The Indian Railways now has 17 zonal Railways. 

Indian Railways is also one of the world's largest rail networks. It has 64,015 route kilometers of route lengths. As on 31st March 2009, the route length of Indian Railways covered 64,015 kms with running track length of 86,937 kms. The total trackage including yards and sidings stood at 113,115 kms.  Indian Railways is the fourth-largest network in the world. It spans over 1.2 lakh km across the country.  Administratively, the Indian Railways have been divided into sixteen zones. Each zone is headed by a General Manager. These zones are further sub-divided into divisions. Each division is headed by a Divisional Railway Manager. 

== Locomotives ==
[[File:Pratham - India's First WDP-4D Locomotive.jpg|thumb|270x270px|'''Credit: Kishlay RF.''' This locomotive is named 'Pratham'. It is India's first WDP-4D locomotive. ]]
Indian Railways primarily operate a fleet of electric and diesel locomotives. Steam locomotives are operated on mountain railways and on heritage trains. As of February 2026, Indian Railways had 13,569 electric and 4,169 diesel locomotives. Indian Railways uses three prime classes of locomotives. These are Electric, Diesel and Steam locomotives. They are built at CLW (Chittaranjan), DLW/DMW (Varanasi/Patiala) and preserved at heritage sheds. Post-2020, the national transporter has switched to 100 per cent electric traction on broad gauge routes as part of Mission Net-Zero.                                                                                          

The locomotives have a naming system. Most of the diesel locomotives operating on broad gauge are 'WDM-2' series. Here 'W' stands for Broad Gauge, 'D' stands for Diesel, and 'M' stands for 'Mixed' service. The naming system includes codes like WDM for Wide diesel mixed, WDP for Wide diesel passenger, WDG for Wide diesel goods, and WDS for Wide diesel shunter. Starting in 2002, for diesel passenger, goods, and mixed locomotives, the series digit identifies the horsepower range of the locomotive. The digit '3' is for locomotives with over 3000hp but less than 4000hp. The digit '5' is for locomotives over 5000hp but less than 6000hp. 

== Passenger Trains ==
[[File:WDP-4 passing through Kodigehalli Halt in 2019 with Pink Flowers.jpg|thumb|331x331px|'''''Credit: ActStuffOGWiki.''''' An ICF Utkrisht passenger rake. (Belagavi - Mysuru - Bagalkot)]]
Indian Railways runs many types of passenger trains. These include local trains, express trains, and premium trains. The locomotives and coaches determine the type of service. Electric locomotives are used for most passenger services now. The WAP series locomotives are mainly used for passenger trains. The WAP-4, WAP-5, and WAP-7 are common passenger locomotives. The WAP-4 has 5,000 bhp and was in production from 1994 to 2015. The railway network connects all parts of India. It carries millions of passengers every day. It also transports goods across the country. The system has grown from the first train in 1853 to a vast network today. The first section from Hathras Road to Mathura Cantonment was opened to traffic on 19th October 1875. By 1880 the Indian Railway system had a route mileage of about 9000 miles.

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      <text bytes="15711" sha1="fw6ffbwt7eszj3lz38vedgg0cdahp4t" xml:space="preserve">== Introduction ==
'''Indian Railways''' is one of the largest and oldest railway networks in the world. It is a very important part of life in India. Every day, millions of people use trains to travel for work, study, pilgrimage, and holidays. The railway network connects big cities, small towns, and even remote villages. Trains also carry goods like food, coal, cement, and machines from one part of the country to another. It plays a key role in the economy and daily life of the nation. The story of Indian Railways began more than 170 years ago. At that time, India was under British rule. The British wanted a better way to move troops, goods, and people across the country. The first passenger train ran in 1853 between Bombay and Thane. Since then, the railway system has grown and changed many times. It has seen wars, independence, nationalization, and modernization.

''See also: [[wikipedia:Rail_transport_in_India#History|Rail transport in India - History]]'' 

== Early Beginnings ==
[[File:The Queen in a somewhat dilapidated condition. Nevertheless, my tenth visit was of worth^^ - Flickr - Dr. Santulan Mahanta.jpg|thumb|307x307px|'''''Credit: Santulan Mahanta.''''' The '''Fairy Queen''' is one of the oldest locomotives in Indian Railways. (Made in 1855)]]
The idea of building railways in India first came in the early 1830s. At that time, the British were ruling India. They needed a faster and cheaper way to move goods and people. In 1832, a proposal was made to build a railway line in Madras (now Chennai). This was the first formal suggestion for railways in India. Between 1836 and 1838, a small experimental line was built near Madras. This line was used to carry granite stones from a quarry to a road. The wagons on this line were pushed by hand. It was not a real passenger train, but it showed that railways could work in India. 

The first real passenger train in India ran on 16 April 1853. This date is now celebrated as Indian Railways Day. The train started from Bori Bunder station in Bombay (now Mumbai) and went to Thane. The distance was about 34 kilometers. The train had 14 carriages and carried around 400 passengers. It was pulled by three steam locomotives named Sahib, Sindh, and Sultan. These locomotives were imported from England. The journey took about one hour and fifteen minutes. There was a big celebration at both ends of the line. A 21-gun salute was fired to mark the occasion. This event marked the beginning of the Indian Railways as we know it today.

After this first train, more lines were planned and built. In 1854, the first eastern railway line opened from Howrah to Hooghly near Calcutta (now Kolkata). In 1856, the first southern railway line was built. In 1859, a northern line connected Allahabad to Kanpur. These early lines were built by private companies. The British government gave these companies land and money to build the railways. Each company had its own name, like the Great Indian Peninsula Railway, the East Indian Railway, and the Madras Railway. These companies ran the trains and collected fares. The government made rules and supervised their work. 

== Expansion During British Rule ==
After the first train in 1853, the railway network grew quickly. The British saw railways as a useful tool for trade, travel, and control. They wanted to move raw materials from the interior of India to ports for export to Britain. They also wanted to bring British manufactured goods into India. Railways made this easier and cheaper. By 1860, there were about 1,300 miles of railway lines. By 1880, this had grown to about 9,000 miles. By 1905, the total length of railway lines in British India was nearly 27,000 kilometers. By 1930, there were more than 40,000 miles of railroads in India. About 98 percent of India's existing rail lines were built between 1870 and 1930.

Many new lines were built in different parts of the country. In 1860, the line from Bombay (now Mumbai) to Poona (now Pune) was opened. In 1861, the line from Calcutta to Delhi was completed. In 1870, the Great Indian Peninsula Railway connected Bombay to Madras. This was a major achievement. It linked the western and southern parts of India by rail. In 1873, the first railway bridge over the Yamuna River was built near Delhi. In 1880, the line from Madras to Bangalore was opened. In 1890, the Assam Bengal Railway was started to carry tea and other goods from the northeast. Many other lines were built in the following decades.

The railways were also used heavily during wars. During the First World War (1914–1918), trains carried troops and supplies to different parts of the country and to ports for shipment overseas. During the Second World War (1939–1945), the railways were used even more. Many tracks, bridges, and engines were damaged during this time. After the war, a lot of repair work was needed. Despite the damage, the railway system remained a key part of India's transport. It connected major cities, ports, and industrial areas. It also helped move troops and supplies during wars. 

=== Social and Economic Impact ===
The railways changed life in India in many ways. They made travel faster and cheaper. Before railways, people travelled by bullock cart, horse, or on foot. These methods were slow and could not carry heavy loads. Trains could carry many passengers and large amounts of goods in a short time. People could now go to faraway places for work, study, or pilgrimage. Trains also carried goods like cotton, coal, and food grains. This helped trade and business grow. Markets in different parts of the country became more connected. Farmers could sell their produce in distant cities. Industrialists could get raw materials and send finished goods more easily. 

Studies have shown that railways had a big impact on the Indian economy. Between 1860 and 1913, railways were the most important driver of economic growth in India. They accounted for more than 60 percent of all per capita income growth in this period. Railways decreased trade costs and reduced price differences between regions. They increased both interregional and international trade. They also raised real income levels. One study found that railways raised real agricultural income by 16 percent. By 1930, goods could be shipped about 400 miles a day by train. This was much faster than before.

However, the railways were built mainly to serve British interests. The main goal was to move raw materials from the interior to ports for export to Britain. Finished goods from Britain were then brought back to India. This system helped British industries but did not always benefit Indian workers. Many Indians worked on the railways in low-paying jobs. The fares for passengers were often high for ordinary people. Discriminatory tariff policies hindered Indian industry. There was also a drain of wealth to Britain. Still, over time, railways became a common way of travel for many. They helped spread new ideas and news across the country. Railways also enabled the movement of labor, contributing to the growth of urban centers. However, the commercialization of agriculture often led to exploitation of farmers and increased their dependence on moneylenders. 

== Independence (20th Century) ==
In 1947, India became independent from British rule. The country was divided into India and Pakistan. The railway system was also divided between the two new nations. Many routes and stations went to Pakistan, while the rest stayed with India. After independence, the Government of India took control of all railway lines. 

=== Nationalization ===
In 1951, the railways were nationalized. This meant that all private railway companies were merged into one system under the government. Indian Railways became one of the largest railway networks in the world under a single management. In the same year, the railway system was reorganized into zones. The first zone, Southern Railway, was formed on 14 April 1951. It was created by merging the Madras and Southern Mahratta Railway, the South Indian Railway, and the Mysore State Railway. Later in 1951, Central Railway and Western Railway were created. By 1952, there were six zones in total. These were Northern, North Eastern, Northeast Frontier, Eastern, South Eastern, and Southern. More zones were added in later years. In 1966, the number of zones increased to 11. In 2003, there were 16 zones. In 2010, a new zone was added, making it 17 zones. Today, Indian Railways has 18 zones. Each zone manages the railways in its own region.

After nationalization, Indian Railways faced many challenges. The network was old and needed repair. Many tracks and bridges had been damaged during the wars. There were also different types of tracks with different gauges. Some lines were broad gauge, some were metre gauge, and some were narrow gauge. This made it difficult to run trains smoothly. Indian Railways began a program to unify the gauges called Project Unigauge. Many metre gauge and narrow-gauge lines were converted to broad gauge. This work continued for many decades. By 2012–13, about 19,100 kilometers of track had been converted from metre gauge or narrow gauge to broad gauge. 

=== Modernization ===
After nationalization, Indian Railways began to modernize. One major change was the shift from steam engines to diesel and electric engines. Steam locomotives were slowly phased out. Electric trains are faster, cleaner, and more efficient. Electrification of railway lines began in a small way in the 1950s. The first electric trains ran on suburban lines in Bombay and Madras. At that time, only about 388 kilometers of track was electrified out of a total of about 55,000 kilometers. Over the decades, more and more lines were electrified. By the 2020s, about 80 percent of the broad-gauge network was electrified. Indian Railways aims to become fully electrified in the near future.

Another important change was the introduction of new types of trains. In the 1960s and 1970s, faster passenger trains like the Rajdhani and Shatabdi were launched. These trains connected major cities and offered better comfort. The Rajdhani Express was introduced in 1969 to connect Delhi with other major cities. The Shatabdi Express was introduced in 1988 for short-distance high-speed travel. In the 1990s, new high-power electric locomotives were imported. The Konkan Railway, a difficult engineering project, was completed in 1998. It connected Mumbai to Mangalore through the Western Ghats. This line has many tunnels and bridges and is considered an engineering marvel. 

== Computerization ==
In the 1980s, Indian Railways began to use computers for its operations. Before this, all ticket booking was done manually. Clerks used ledgers and pens to record bookings. This system was slow and often led to errors. In 1982, Indian Railways set up a central organization called COFOIS to computerize freight operations. In 1985, a pilot project for computerized passenger reservation was launched at New Delhi station. This system was called IMPRESS (Integrated Multi-train Passenger Reservation System). It was developed by Indian Railways in association with Computer Maintenance Corporation (CMC) Limited. Initially, it covered only two trains, but it was a big step forward.

In 1986, the Ministry of Railways established the Centre for Railway Information Systems (CRIS). This organization was created to handle all information technology-related activities on Indian Railways. CRIS developed a new system called CONCERT (Country-wide Network for Computerized Enhanced Reservation and Ticketing). This system linked the five regional databases of Indian Railways. Before this, each city could only sell tickets for trains it controlled. With CONCERT, a passenger in one part of the country could book a seat on any train anywhere in India. The full national network was commissioned in 1999. This was a major achievement.

In 2002, Indian Railways launched online train reservations and ticketing over the Internet. This service was provided through IRCTC (Indian Railway Catering and Tourism Corporation). People could now book tickets from their homes or offices. This made travel planning much easier. In 2013, Indian Railways introduced the e-ticketing system. Passengers could now show their tickets on their mobile phones instead of carrying paper tickets. In recent years, many other digital services have been added. These include online food ordering, Wi-Fi at stations, and real-time train tracking. Indian Railways has also introduced the UTS (Unreserved Ticketing System) app for buying local train tickets on mobile phones. 

== Growth and Challenges (21st Century) ==
Since the 1990s, Indian Railways has faced both growth and challenges. The economy of India grew rapidly, and so did the demand for rail transport. More people began to travel by train. More goods needed to be moved across the country. Indian Railways expanded its services and introduced new trains. It also improved safety measures and passenger facilities. Online ticket booking, e-catering, and Wi-Fi at stations are some of the new services. The railway network continues to be a lifeline for millions of Indians. 

However, there were still many challenges. Overcrowding is a common problem on many routes. During peak hours, trains are often full beyond capacity. Accidents and delays still happen, though safety has improved in recent years. The railway system needs constant maintenance and investment. Indian Railways is working on modernizing tracks, signals, and coaches. It is also trying to reduce losses and improve efficiency. One of the big problems is that passenger fares are kept low for social reasons, but this leads to losses. Freight traffic is used to cross-subsidize passenger traffic. This makes freight rates high and affects the competitiveness of Indian industries.

Indian Railways is also working on environmental sustainability. It aims to become a net-zero carbon emitter by 2030. To achieve this, it is increasing electrification, using solar power at stations, and planting trees along tracks. It is also trying to reduce water consumption and waste. New stations are being developed with better facilities. Digital services are being expanded to make travel easier. The vision is to have a world-class railway system that meets the needs of a growing India. 

=== Indian Railways Today and Future ===
[[File:Namo Green Rail.jpg|thumb|320x320px|'''''Credit: Kshitij08.''''' India's first Hydrogen train. (Namo Green Rail initiative)]]
Today, Indian Railways is a huge organization. It runs thousands of trains every day across more than 68,000 route kilometers. It employs over a million people, making it one of the largest employers in the world. It carries more than 20 million passengers daily and moves over a million tonnes of freight. The railway network connects remote villages to big cities. It plays a key role in the economy and daily life of the nation. Indian Railways is also working to become more environment-friendly by using more electric trains and solar power.

In the future, Indian Railways plans to introduce more high-speed trains and modern coaches. It aims to complete full electrification and reduce its carbon footprint. New stations are being developed with better facilities. Digital services are being expanded to make travel easier. The vision is to have a world-class railway system that meets the needs of a growing India. The story of Indian Railways is one of continuous change and progress. From a small 34-kilometre line in 1853 to the 4th largest network today, it has come a long way. 
[[Category:Indian recipes]]

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      <text bytes="15683" sha1="6hon527wqr8midco63902rw89dsxtlg" xml:space="preserve">== Introduction ==
'''Indian Railways''' is one of the largest and oldest railway networks in the world. It is a very important part of life in India. Every day, millions of people use trains to travel for work, study, pilgrimage, and holidays. The railway network connects big cities, small towns, and even remote villages. Trains also carry goods like food, coal, cement, and machines from one part of the country to another. It plays a key role in the economy and daily life of the nation. The story of Indian Railways began more than 170 years ago. At that time, India was under British rule. The British wanted a better way to move troops, goods, and people across the country. The first passenger train ran in 1853 between Bombay and Thane. Since then, the railway system has grown and changed many times. It has seen wars, independence, nationalization, and modernization.

''See also: [[wikipedia:Rail_transport_in_India#History|Rail transport in India - History]]'' 

== Early Beginnings ==
[[File:The Queen in a somewhat dilapidated condition. Nevertheless, my tenth visit was of worth^^ - Flickr - Dr. Santulan Mahanta.jpg|thumb|307x307px|'''''Credit: Santulan Mahanta.''''' The '''Fairy Queen''' is one of the oldest locomotives in Indian Railways. (Made in 1855)]]
The idea of building railways in India first came in the early 1830s. At that time, the British were ruling India. They needed a faster and cheaper way to move goods and people. In 1832, a proposal was made to build a railway line in Madras (now Chennai). This was the first formal suggestion for railways in India. Between 1836 and 1838, a small experimental line was built near Madras. This line was used to carry granite stones from a quarry to a road. The wagons on this line were pushed by hand. It was not a real passenger train, but it showed that railways could work in India. 

The first real passenger train in India ran on 16 April 1853. This date is now celebrated as Indian Railways Day. The train started from Bori Bunder station in Bombay (now Mumbai) and went to Thane. The distance was about 34 kilometers. The train had 14 carriages and carried around 400 passengers. It was pulled by three steam locomotives named Sahib, Sindh, and Sultan. These locomotives were imported from England. The journey took about one hour and fifteen minutes. There was a big celebration at both ends of the line. A 21-gun salute was fired to mark the occasion. This event marked the beginning of the Indian Railways as we know it today.

After this first train, more lines were planned and built. In 1854, the first eastern railway line opened from Howrah to Hooghly near Calcutta (now Kolkata). In 1856, the first southern railway line was built. In 1859, a northern line connected Allahabad to Kanpur. These early lines were built by private companies. The British government gave these companies land and money to build the railways. Each company had its own name, like the Great Indian Peninsula Railway, the East Indian Railway, and the Madras Railway. These companies ran the trains and collected fares. The government made rules and supervised their work. 

== Expansion During British Rule ==
After the first train in 1853, the railway network grew quickly. The British saw railways as a useful tool for trade, travel, and control. They wanted to move raw materials from the interior of India to ports for export to Britain. They also wanted to bring British manufactured goods into India. Railways made this easier and cheaper. By 1860, there were about 1,300 miles of railway lines. By 1880, this had grown to about 9,000 miles. By 1905, the total length of railway lines in British India was nearly 27,000 kilometers. By 1930, there were more than 40,000 miles of railroads in India. About 98 percent of India's existing rail lines were built between 1870 and 1930.

Many new lines were built in different parts of the country. In 1860, the line from Bombay (now Mumbai) to Poona (now Pune) was opened. In 1861, the line from Calcutta to Delhi was completed. In 1870, the Great Indian Peninsula Railway connected Bombay to Madras. This was a major achievement. It linked the western and southern parts of India by rail. In 1873, the first railway bridge over the Yamuna River was built near Delhi. In 1880, the line from Madras to Bangalore was opened. In 1890, the Assam Bengal Railway was started to carry tea and other goods from the northeast. Many other lines were built in the following decades.

The railways were also used heavily during wars. During the First World War (1914–1918), trains carried troops and supplies to different parts of the country and to ports for shipment overseas. During the Second World War (1939–1945), the railways were used even more. Many tracks, bridges, and engines were damaged during this time. After the war, a lot of repair work was needed. Despite the damage, the railway system remained a key part of India's transport. It connected major cities, ports, and industrial areas. It also helped move troops and supplies during wars. 

=== Social and Economic Impact ===
The railways changed life in India in many ways. They made travel faster and cheaper. Before railways, people travelled by bullock cart, horse, or on foot. These methods were slow and could not carry heavy loads. Trains could carry many passengers and large amounts of goods in a short time. People could now go to faraway places for work, study, or pilgrimage. Trains also carried goods like cotton, coal, and food grains. This helped trade and business grow. Markets in different parts of the country became more connected. Farmers could sell their produce in distant cities. Industrialists could get raw materials and send finished goods more easily. 

Studies have shown that railways had a big impact on the Indian economy. Between 1860 and 1913, railways were the most important driver of economic growth in India. They accounted for more than 60 percent of all per capita income growth in this period. Railways decreased trade costs and reduced price differences between regions. They increased both interregional and international trade. They also raised real income levels. One study found that railways raised real agricultural income by 16 percent. By 1930, goods could be shipped about 400 miles a day by train. This was much faster than before.

However, the railways were built mainly to serve British interests. The main goal was to move raw materials from the interior to ports for export to Britain. Finished goods from Britain were then brought back to India. This system helped British industries but did not always benefit Indian workers. Many Indians worked on the railways in low-paying jobs. The fares for passengers were often high for ordinary people. Discriminatory tariff policies hindered Indian industry. There was also a drain of wealth to Britain. Still, over time, railways became a common way of travel for many. They helped spread new ideas and news across the country. Railways also enabled the movement of labor, contributing to the growth of urban centers. However, the commercialization of agriculture often led to exploitation of farmers and increased their dependence on moneylenders. 

== Independence (20th Century) ==
In 1947, India became independent from British rule. The country was divided into India and Pakistan. The railway system was also divided between the two new nations. Many routes and stations went to Pakistan, while the rest stayed with India. After independence, the Government of India took control of all railway lines. 

=== Nationalization ===
In 1951, the railways were nationalized. This meant that all private railway companies were merged into one system under the government. Indian Railways became one of the largest railway networks in the world under a single management. In the same year, the railway system was reorganized into zones. The first zone, Southern Railway, was formed on 14 April 1951. It was created by merging the Madras and Southern Mahratta Railway, the South Indian Railway, and the Mysore State Railway. Later in 1951, Central Railway and Western Railway were created. By 1952, there were six zones in total. These were Northern, North Eastern, Northeast Frontier, Eastern, South Eastern, and Southern. More zones were added in later years. In 1966, the number of zones increased to 11. In 2003, there were 16 zones. In 2010, a new zone was added, making it 17 zones. Today, Indian Railways has 18 zones. Each zone manages the railways in its own region.

After nationalization, Indian Railways faced many challenges. The network was old and needed repair. Many tracks and bridges had been damaged during the wars. There were also different types of tracks with different gauges. Some lines were broad gauge, some were metre gauge, and some were narrow gauge. This made it difficult to run trains smoothly. Indian Railways began a program to unify the gauges called Project Unigauge. Many metre gauge and narrow-gauge lines were converted to broad gauge. This work continued for many decades. By 2012–13, about 19,100 kilometers of track had been converted from metre gauge or narrow gauge to broad gauge. 

=== Modernization ===
After nationalization, Indian Railways began to modernize. One major change was the shift from steam engines to diesel and electric engines. Steam locomotives were slowly phased out. Electric trains are faster, cleaner, and more efficient. Electrification of railway lines began in a small way in the 1950s. The first electric trains ran on suburban lines in Bombay and Madras. At that time, only about 388 kilometers of track was electrified out of a total of about 55,000 kilometers. Over the decades, more and more lines were electrified. By the 2020s, about 80 percent of the broad-gauge network was electrified. Indian Railways aims to become fully electrified in the near future.

Another important change was the introduction of new types of trains. In the 1960s and 1970s, faster passenger trains like the Rajdhani and Shatabdi were launched. These trains connected major cities and offered better comfort. The Rajdhani Express was introduced in 1969 to connect Delhi with other major cities. The Shatabdi Express was introduced in 1988 for short-distance high-speed travel. In the 1990s, new high-power electric locomotives were imported. The Konkan Railway, a difficult engineering project, was completed in 1998. It connected Mumbai to Mangalore through the Western Ghats. This line has many tunnels and bridges and is considered an engineering marvel. 

== Computerization ==
In the 1980s, Indian Railways began to use computers for its operations. Before this, all ticket booking was done manually. Clerks used ledgers and pens to record bookings. This system was slow and often led to errors. In 1982, Indian Railways set up a central organization called COFOIS to computerize freight operations. In 1985, a pilot project for computerized passenger reservation was launched at New Delhi station. This system was called IMPRESS (Integrated Multi-train Passenger Reservation System). It was developed by Indian Railways in association with Computer Maintenance Corporation (CMC) Limited. Initially, it covered only two trains, but it was a big step forward.

In 1986, the Ministry of Railways established the Centre for Railway Information Systems (CRIS). This organization was created to handle all information technology-related activities on Indian Railways. CRIS developed a new system called CONCERT (Country-wide Network for Computerized Enhanced Reservation and Ticketing). This system linked the five regional databases of Indian Railways. Before this, each city could only sell tickets for trains it controlled. With CONCERT, a passenger in one part of the country could book a seat on any train anywhere in India. The full national network was commissioned in 1999. This was a major achievement.

In 2002, Indian Railways launched online train reservations and ticketing over the Internet. This service was provided through IRCTC (Indian Railway Catering and Tourism Corporation). People could now book tickets from their homes or offices. This made travel planning much easier. In 2013, Indian Railways introduced the e-ticketing system. Passengers could now show their tickets on their mobile phones instead of carrying paper tickets. In recent years, many other digital services have been added. These include online food ordering, Wi-Fi at stations, and real-time train tracking. Indian Railways has also introduced the UTS (Unreserved Ticketing System) app for buying local train tickets on mobile phones. 

== Growth and Challenges (21st Century) ==
Since the 1990s, Indian Railways has faced both growth and challenges. The economy of India grew rapidly, and so did the demand for rail transport. More people began to travel by train. More goods needed to be moved across the country. Indian Railways expanded its services and introduced new trains. It also improved safety measures and passenger facilities. Online ticket booking, e-catering, and Wi-Fi at stations are some of the new services. The railway network continues to be a lifeline for millions of Indians. 

However, there were still many challenges. Overcrowding is a common problem on many routes. During peak hours, trains are often full beyond capacity. Accidents and delays still happen, though safety has improved in recent years. The railway system needs constant maintenance and investment. Indian Railways is working on modernizing tracks, signals, and coaches. It is also trying to reduce losses and improve efficiency. One of the big problems is that passenger fares are kept low for social reasons, but this leads to losses. Freight traffic is used to cross-subsidize passenger traffic. This makes freight rates high and affects the competitiveness of Indian industries.

Indian Railways is also working on environmental sustainability. It aims to become a net-zero carbon emitter by 2030. To achieve this, it is increasing electrification, using solar power at stations, and planting trees along tracks. It is also trying to reduce water consumption and waste. New stations are being developed with better facilities. Digital services are being expanded to make travel easier. The vision is to have a world-class railway system that meets the needs of a growing India. 

=== Indian Railways Today and Future ===
[[File:Namo Green Rail.jpg|thumb|320x320px|'''''Credit: Kshitij08.''''' India's first Hydrogen train. (Namo Green Rail initiative)]]
Today, Indian Railways is a huge organization. It runs thousands of trains every day across more than 68,000 route kilometers. It employs over a million people, making it one of the largest employers in the world. It carries more than 20 million passengers daily and moves over a million tonnes of freight. The railway network connects remote villages to big cities. It plays a key role in the economy and daily life of the nation. Indian Railways is also working to become more environment-friendly by using more electric trains and solar power.

In the future, Indian Railways plans to introduce more high-speed trains and modern coaches. It aims to complete full electrification and reduce its carbon footprint. New stations are being developed with better facilities. Digital services are being expanded to make travel easier. The vision is to have a world-class railway system that meets the needs of a growing India. The story of Indian Railways is one of continuous change and progress. From a small 34-kilometre line in 1853 to the 4th largest network today, it has come a long way. 

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      <text bytes="19697" sha1="lg7z968sdsylt482vsp0rzndlyd1e4q" xml:space="preserve">== Introduction ==
'''Indian Railways''', one of the world's largest railway networks, is organized into 19 operational geographical zones (as of 2026), each headed by a General Manager who reports to the Railway Board. These zones are semi-autonomous administrative units that manage train operations, infrastructure maintenance, and commercial activities within their respective territories. The zonal system allows for decentralized management of India's vast railway network, which spans over 68,000 route kilometers across the country.  

''See also: [[wikipedia:Indian_Railways_organisational_structure#Zonal_management|Indian Railways Zones and Divisions]]''  

== Historical Background ==
The evolution of Indian Railways' zonal structure reflects the country's journey from private railway companies to a unified national system. In 1944, the Government of India took over all existing railway companies that were operating across the subcontinent. This nationalization laid the groundwork for systematic reorganization of the railway administration. In December 1950, the Central Advisory Committee for Railways approved a plan to reorganize Indian Railways into six regional zones. This reorganization came into effect in 1951–1952, when the first six zones were created: Southern Railway (April 14, 1951), Central Railway (November 5, 1951), Western Railway (November 5, 1951), Eastern Railway (April 14, 1952), Northern Railway (April 14, 1952), and North Eastern Railway (April 14, 1952). 

The number of zones expanded gradually over subsequent decades. South Eastern Railway was formed on August 1, 1955, followed by Northeast Frontier Railway on January 15, 1958. South Central Railway was carved out from portions of Southern and Central Railways on October 2, 1965 (operational from 1966), to provide some dedicated administrative focus to the Andhra Pradesh corridor. The most significant expansion occurred in the early 2000s. On October 1, 2002, two new zones were created: North Western Railway and East Central Railway. Then, on April 1 and April 3, 2003, five additional zones began operations: West Central Railway, South East Central Railway, East Coast Railway, North Central Railway, and South Western Railway. This brought the total to 16 zones. 

Konkan Railway, which had been operating as a separate entity since 1990, was formally integrated as a zone. Metro Railway, Kolkata was declared the 17th zone on December 19, 2010 (operational from 2019), making it the newest zone at that time. The most recent addition is South Coast Railway, which was announced on February 17, 2019, and became operational on June 1, 2026, bringing the total to 19 zones. 

== Organizational Structure ==
Indian Railways operates under a matrix organization where functional branches are under dual control i.e., both zonal and central. The Railway Board, established in March 1905 under the Indian Railway Board Act, serves as the apex body overseeing all railway operations. The Board has undergone several reorganizations, most recently in December 2019 when its size was reduced from eight to five members. Each zonal railway is headed by a General Manager who reports directly to the Railway Board. Zones are further subdivided into divisions, each headed by a Divisional Railway Manager (DRM). As of 2024–2025, there are 68 to 69 operating divisions across all zones. 

Within each zone, functional departments are represented by Heads of Departments (HODs) responsible for specific functions such as engineering, mechanical, electrical, operations, commercial, personnel, medical, and security. These HODs include Principal Chief Engineer (PCE), Principal Chief Mechanical Engineer (PCME), Principal Chief Electrical Engineer (PCEE), Principal Chief Operations Manager (PCOM), Principal Chief Commercial Manager (PCCM), Principal Chief Personnel Officer (PCPO), and others. Divisional managers work alongside these functional heads. 

Staff are classified into gazetted (Groups A and B) and non-gazetted (Groups C) categories. Group A officers, who constitute about 1.5% of the workforce, are primarily recruited through the Indian Railways Management Service (IRMS) via the Civil Services Examination or Engineering Services Examination. Group B employees are promoted from Group C, while Group C staff are recruited through Railway Recruitment Control Board examinations. 

== The Zones of Indian Railways ==
[[File:Indian Railway zones.svg|thumb|270x270px|'''''Credit: Superbenjamin.''''' The 18 zones of Indian Railways on a map. (Metro Railway Kolkata zone isn't shown)]]
Indian Railways currently comprises 19 operational zones, each serving specific geographical regions. The zones vary significantly in size, route length, and number of divisions.              

=== The Six Main Zones ===
These were the first six zones to be created. 

==== Northern Railway ====
Northern Railway, headquartered in Delhi, was established on April 14, 1952. It is one of the largest zones by route length, covering approximately 7,363 kilometers. The zone operates across Delhi, Punjab, Haryana, Himachal Pradesh, Uttarakhand, and parts of Uttar Pradesh and Rajasthan. Northern Railway comprises six divisions: Ambala, Delhi, Firozpur, Lucknow, Moradabad, and Jammu. The zone plays a critical role in connecting the national capital to northern and northwestern India. 

==== Southern Railway ====
Southern Railway, headquartered in Chennai, was the first zone formed on April 14, 1951 (some sources say April 14, 1950). It covers Tamil Nadu, Kerala, Puducherry, and parts of Andhra Pradesh and Karnataka, with a route length of 5,093 kilometers. The zone has six divisions: Chennai, Madurai, Palakkad, Salem, Thiruvananthapuram, and Tiruchirappalli. SR is easily the oldest and most established zone, serving the southern peninsula. 

==== Western Railway ====
Western Railway, headquartered at Mumbai Churchgate, was established on November 5, 1951. It covers Gujarat, parts of Maharashtra, Madhya Pradesh, and Rajasthan, with a route length of 6,156 kilometers. The zone has six divisions: Ahmedabad, Bhavnagar, Mumbai WR, Rajkot, Ratlam, and Vadodara. WR is one of the busiest zones, handling substantial suburban traffic in Mumbai and Ahmedabad, 

==== Central Railway ====
Central Railway is headquartered at Mumbai CSMT (Chhatrapati Shivaji Maharaj Terminus) and was formed on November 5, 1951. It covers Maharashtra, parts of Madhya Pradesh, and Karnataka, with a route length of 4,203 kilometers. The zone comprises five divisions: Bhusawal, Mumbai CR, Nagpur, Pune, and Solapur. CR serves as a critical link between western and central India and even has a Rajdhani named after it. (It is called CR Rajdhani) 

==== Eastern Railway ====
Eastern Railway is headquartered in Kolkata and was formed on April 14, 1952. It covers West Bengal, Jharkhand, and parts of Odisha and Bihar, with a route length of 2,823 kilometers. The zone comprises four divisions: Asansol, Howrah, Malda, and Sealdah. ER serves the densely populated and industrialized regions of eastern India, including the Kolkata metropolitan area which contains both Howrah and Sealdah stations. 

==== North Eastern Railway ====
North Eastern Railway is headquartered in Gorakhpur and was formed on April 14, 1952. It covers eastern Uttar Pradesh and parts of Bihar, with a route length of approximately 3,470 kilometers. The zone has three divisions: Izzatnagar, Lucknow, and Varanasi. NER serves important pilgrimage centers and agricultural regions in the Purvanchal area. It got cut in half because of the formation of the Northeast Frontier Railways zone. 

=== The Other Main Zones ===
These were the other important zones created after the six main zones. 

==== Northeast Frontier Railway ====
Northeast Frontier Railway, headquartered in Guwahati, was established on January 15, 1958. It serves the entire northeastern region of India, covering Assam, Arunachal Pradesh, Manipur, Meghalaya, Mizoram, Nagaland, Tripura, and parts of West Bengal and Bihar. With a route length of 4,348 kilometers, NFR operates five divisions: Alipurduar, Katihar, Lumding, Rangiya, and Tinsukia. The zone faces unique operational challenges due to the region's difficult terrain and weather conditions and yet, it gains profit. 

==== Southeastern Railway ====
South Eastern Railway, headquartered at Garden Reach in Kolkata, was established on August 1, 1955. It covers parts of West Bengal, Jharkhand, and Odisha, with a route length of 2,758 kilometers. The zone has four divisions: Adra, Chakradharpur, Kharagpur, and Ranchi. SER is known for its mineral-rich territory, handling significant freight traffic related to coal and iron ore along the Dedicated Freight Corridor (DFC). 

==== South Central Railway ====
South Central Railway is headquartered in Secunderabad and was formed on October 2, 1965 (operational from 1966). It serves Telangana, parts of Maharashtra, Andhra Pradesh, and Karnataka, with a route length of 3,572 kilometers. The zone comprises three divisions: Secunderabad, Hyderabad, and Nanded. SCR was carved out from Southern and Central Railways to provide focused administration to the Andhra region. 

==== East Central Railway ====
East Central Railway is headquartered in Hajipur and was formed on October 1, 2002.  It covers Bihar and Jharkhand, with a route length of 4,238 kilometers.  The zone comprises five divisions: Danapur, Dhanbad, Mughalsarai, Samastipur, and Sonpur.  ECR was carved out from Eastern and North Eastern Railways to better serve Bihar. It was one of the most important zonal expansions. 

==== North Western Railway ====
North Western Railway is headquartered in Jaipur and was formed on October 1, 2002. It covers Rajasthan and parts of Gujarat, Punjab, and Haryana, with a route length of 5,705 kilometers. The zone comprises of four divisions: Ajmer, Bikaner, Jaipur, and Jodhpur. NWR was carved out from Northern and Western Railways to better serve the Rajasthan region. 

=== The Extra Zones ===
These were zones which were made as an extra addition to the zonal expansion. 

==== South Western Railway ====
South Western Railway, which is headquartered in Hubballi, was established on April 3, 2003. It covers Karnataka and parts of Andhra Pradesh and Tamil Nadu, with a route length of 3,692 kilometers. The zone has three divisions: Bengaluru, Hubballi, and Mysuru. SWR was created to provide focused administration to Karnataka's railway network as there is lots of traffic in Bengaluru and Hubballi junctions. 

==== West Central Railway ====
West Central Railway is headquartered in Jabalpur and was formed on April 3, 2003. It covers Madhya Pradesh and parts of Uttar Pradesh and Rajasthan, with a route length of 3,060 kilometers. The zone comprises three divisions: Bhopal, Jabalpur, and Kota. WCR was carved out from Central and Western Railways for more coordinated administration across Madhya Pradesh. 

==== North Central Railway ====
North Central Railway, headquartered in Prayagraj (formerly Allahabad), was established on April 3, 2003. It covers Uttar Pradesh and parts of Madhya Pradesh, with a route length of 3,522 kilometers. The zone has three divisions: Agra, Jhansi, and Prayagraj. NCR was formed from portions of Northern and Central Railways for administration and expansion purposes. 

==== South East Central Railway ====
South East Central Railway is headquartered in Bilaspur and was formed on April 1, 2003. It covers Chhattisgarh and parts of Madhya Pradesh, Odisha, and Jharkhand, with a route length of 2,396 kilometers. The zone comprises three divisions: Bilaspur, Nagpur, and Raipur. SECR was carved out from South Eastern and Central Railways to serve the mineral-rich Chhattisgarh region. 

==== East Coast Railway ====
East Coast Railway, headquartered in Bhubaneswar, was established on April 3, 2003. It covers Odisha and parts of Andhra Pradesh, with a route length of 2,701 kilometers. The zone has three divisions: Khurda Road, Sambalpur, and Rayagada. ECoR was formed from portions of South Eastern and South Central Railways. It is one of the only three coastal railway zones. 

=== The Most Recently Added Zones ===
These were added recently to the Zonal Railways of India. (Top 3)

==== Konkan Railway ====
Konkan Railway, headquartered in Navi Mumbai (CBD Belapur), was formally integrated as a zone on July 19, 1990. It covers the Konkan coastal region of Maharashtra, Goa, and Karnataka, with a route length of 756 kilometers. The zone has two divisions: Ratnagiri and Karwar. Konkan Railway is known for its engineering marvels, including numerous bridges and tunnels through the Western Ghats. 

==== South Coast Railway ====
South Coast Railway (SCoR) is the newest and 18th operational zone of Indian Railways (often referred to as Zone 17 in some counting systems that exclude Metro Railway or Konkan Railway). The zone was officially constituted and began operations on June 1, 2026, with its headquarters in Visakhapatnam, Andhra Pradesh. SCoR was carved from three different railway zones to manage Andhra Pradesh. 

==== Metro Railway, Kolkata ====
[[File:Kolkata Metro CRRC Dalian rake 5.jpg|thumb|320x320px|'''''Credit: ArnabSaha.''''' A Kolkata Metro CRRC Dalian rake. ]]
Metro Railway, Kolkata, headquartered in Kolkata, was declared the 17th zone on December 19, 2010 (operational from 2019). KMRC operates the Kolkata Metro network, with a route length of 73.2 kilometers and 58 stations. The zone has no divisions and operates five metro lines (Blue, Green, Purple, Orange, and Yellow) with both broad gauge and standard gauge tracks. Metro Railway handles urban rapid transit in the Kolkata metropolitan area. It is the smallest railway zone in India that just so happens to be a metro network too.

== Divisions of Indian Railways ==
As of 2025–2026, there are 68 to 69 operating divisions across 19 zones, each headed by a Divisional Railway Manager (DRM) who is responsible for day-to-day operations, maintenance, and administration within their division. This divisional structure enables decentralized management while maintaining coordination through zonal and central authorities. 

=== Organizational Structure ===
Each zonal railway is headed by a General Manager who reports directly to the Railway Board. Zones are further subdivided into divisions, each headed by a Divisional Railway Manager (DRM). 

The DRM serves as the chief executive of a railway division and is responsible for managing and administering a particular geographical area. Key responsibilities include ensuring punctuality and safety of all passenger and freight trains passing through or originating within the division, monitoring train movements, managing line capacity, and resolving disruptions. DRMs oversee efficient movement of wagons and coaches, ensuring optimal utilization of rolling stock, and managing yard operations. They coordinate maintenance of tracks, bridges, stations, and other fixed assets through various engineering departments. Commercial operations including passenger ticketing, freight booking, fare collection, and customer service also fall under their purview. DRMs ensure safety of train operations and security of railway material, passengers, and belongings, while managing personnel matters, discipline, and welfare of divisional staff. 

Within each division, functional departments are represented by senior divisional officers who report both to the DRM and to their respective zonal Heads of Departments (HODs). These include the Senior Divisional Engineer (DEN), responsible for maintenance of fixed assets including tracks, bridges, and buildings; the Senior Divisional Mechanical Engineer (DMME), who oversees maintenance of diesel locomotives, carriage, and wagon fleets; the Senior Divisional Electrical Engineer (DEE), managing station lighting, power supply, overhead equipment, and electric rolling stock; the Senior Divisional Signal &amp; Telecommunication Engineer (DSTE), handling signalling and telecommunication infrastructure; the Senior Divisional Operations Manager (DOM), managing train operations and traffic control; the Senior Divisional Finance Manager (DFM), managing accounting and financial matters; the Senior Divisional Commercial Manager (DCM), handling passenger and freight commercial operations; the Senior Divisional Personnel Officer (DPO), managing human resources; the Senior Divisional Safety Officer (DSO), ensuring operational safety; the Senior Divisional Material Manager (DMM), managing material stores; the Chief Medical Superintendent (CMS), providing healthcare facilities; and the Senior Divisional Security Commissioner (DSC), handling security matters. This framework ensures that divisions have operational autonomy while maintaining technical and functional coordination with zonal and central authorities. 

=== List of Divisions ===
The following is a list of all railway divisions of Indian Railways, organized by zone.  

==== Central Railway (CR) ====

* Mumbai CR Division
* Bhusaval Division
* Nagpur Division
* Solapur Division
* Pune Division

==== Eastern Railway (ER) ====

* Asansol Division
* Howrah Division
* Malda Division
* Sealdah Division 
* Kolkata Division 

==== East Central Railway (ECR) ====

* Sonpur Division
* Samastipur Division
* Danapur Division
* Dhanbad Division
* Pt. Deen Dayal Upadhyaya Division (formerly Mughalsarai) 
* Hajipur Division 

==== East Coast Railway (ECoR) ====

* Khurda Road Division
* Sambalpur Division
* Rayagada Division 
* Bhubaneshwar Division 

==== Northern Railway (NR) ====

* Ambala Division
* New Delhi Division
* Lucknow Division
* Moradabad Division
* Firozpur Division
* Jammu Division

==== North Central Railway (NCR) – Prayagraj ====

* Prayagraj Division
* Agra Division
* Jhansi Division

==== North Eastern Railway (NER) ====

* Lucknow Division 
* Izzatnagar Division
* Varanasi Division 
* Gorakhpur Division 

==== Northeast Frontier Railway (NFR) ====

* Alipurduar Division
* Katihar Division
* Lumding Division
* Rangiya Division
* Tinsukia Division 
* Guwahati Division

==== North Western Railway (NWR) ====

* Ajmer Division
* Bikaner Division
* Jaipur Division
* Jodhpur Division

==== Southern Railway (SR) ====

* Chennai Division
* Madurai Division
* Palakkad Division
* Tiruchchirappalli Division
* Thiruvananthapuram Division
* Salem Division

==== South Central Railway (SCR) ====

* Hyderabad Division
* Nanded Division
* Secunderabad Division

==== South Coast Railway (SCoR) ====

* Visakhapatnam Division (formerly Waltair)
* Vijayawada Division
* Guntur Division
* Guntakal Division

==== South Eastern Railway (SER) ====

* Adra Division
* Chakradharpur Division
* Kharagpur Division
* Ranchi Division 

==== South East Central Railway (SECR) ====

* Raipur Division
* Nagpur Division
* Bilaspur Division

==== South Western Railway (SWR) ====

* Bengaluru Division
* Hubballi Division
* Mysuru Division

==== Western Railway (WR) ====

* Mumbai Central Division
* Vadodara Division
* Ratlam Division
* Ahmedabad Division
* Rajkot Division
* Bhavnagar Division

==== West Central Railway (WCR) ====

* Bhopal Division
* Jabalpur Division
* Kota Division

==== Konkan Railway (KR) ====

* Ratnagiri Division
* Karwar Division
* Navi Mumbai Division

==== Metro Railway, Kolkata (KMRC) ====

* (No divisions. It operates as a single integrated urban transit network) 
This divisional framework enables Indian Railways to manage its vast network efficiently through decentralized administration while actually maintaining coordination through zonal and central oversight. 
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      <text bytes="19669" sha1="gzawxj7j7sbob7dq9jqvek6ecq9htyl" xml:space="preserve">== Introduction ==
'''Indian Railways''', one of the world's largest railway networks, is organized into 19 operational geographical zones (as of 2026), each headed by a General Manager who reports to the Railway Board. These zones are semi-autonomous administrative units that manage train operations, infrastructure maintenance, and commercial activities within their respective territories. The zonal system allows for decentralized management of India's vast railway network, which spans over 68,000 route kilometers across the country.  

''See also: [[wikipedia:Indian_Railways_organisational_structure#Zonal_management|Indian Railways Zones and Divisions]]''  

== Historical Background ==
The evolution of Indian Railways' zonal structure reflects the country's journey from private railway companies to a unified national system. In 1944, the Government of India took over all existing railway companies that were operating across the subcontinent. This nationalization laid the groundwork for systematic reorganization of the railway administration. In December 1950, the Central Advisory Committee for Railways approved a plan to reorganize Indian Railways into six regional zones. This reorganization came into effect in 1951–1952, when the first six zones were created: Southern Railway (April 14, 1951), Central Railway (November 5, 1951), Western Railway (November 5, 1951), Eastern Railway (April 14, 1952), Northern Railway (April 14, 1952), and North Eastern Railway (April 14, 1952). 

The number of zones expanded gradually over subsequent decades. South Eastern Railway was formed on August 1, 1955, followed by Northeast Frontier Railway on January 15, 1958. South Central Railway was carved out from portions of Southern and Central Railways on October 2, 1965 (operational from 1966), to provide some dedicated administrative focus to the Andhra Pradesh corridor. The most significant expansion occurred in the early 2000s. On October 1, 2002, two new zones were created: North Western Railway and East Central Railway. Then, on April 1 and April 3, 2003, five additional zones began operations: West Central Railway, South East Central Railway, East Coast Railway, North Central Railway, and South Western Railway. This brought the total to 16 zones. 

Konkan Railway, which had been operating as a separate entity since 1990, was formally integrated as a zone. Metro Railway, Kolkata was declared the 17th zone on December 19, 2010 (operational from 2019), making it the newest zone at that time. The most recent addition is South Coast Railway, which was announced on February 17, 2019, and became operational on June 1, 2026, bringing the total to 19 zones. 

== Organizational Structure ==
Indian Railways operates under a matrix organization where functional branches are under dual control i.e., both zonal and central. The Railway Board, established in March 1905 under the Indian Railway Board Act, serves as the apex body overseeing all railway operations. The Board has undergone several reorganizations, most recently in December 2019 when its size was reduced from eight to five members. Each zonal railway is headed by a General Manager who reports directly to the Railway Board. Zones are further subdivided into divisions, each headed by a Divisional Railway Manager (DRM). As of 2024–2025, there are 68 to 69 operating divisions across all zones. 

Within each zone, functional departments are represented by Heads of Departments (HODs) responsible for specific functions such as engineering, mechanical, electrical, operations, commercial, personnel, medical, and security. These HODs include Principal Chief Engineer (PCE), Principal Chief Mechanical Engineer (PCME), Principal Chief Electrical Engineer (PCEE), Principal Chief Operations Manager (PCOM), Principal Chief Commercial Manager (PCCM), Principal Chief Personnel Officer (PCPO), and others. Divisional managers work alongside these functional heads. 

Staff are classified into gazetted (Groups A and B) and non-gazetted (Groups C) categories. Group A officers, who constitute about 1.5% of the workforce, are primarily recruited through the Indian Railways Management Service (IRMS) via the Civil Services Examination or Engineering Services Examination. Group B employees are promoted from Group C, while Group C staff are recruited through Railway Recruitment Control Board examinations. 

== The Zones of Indian Railways ==
[[File:Indian Railway zones.svg|thumb|270x270px|'''''Credit: Superbenjamin.''''' The 18 zones of Indian Railways on a map. (Metro Railway Kolkata zone isn't shown)]]
Indian Railways currently comprises 19 operational zones, each serving specific geographical regions. The zones vary significantly in size, route length, and number of divisions.              

=== The Six Main Zones ===
These were the first six zones to be created. 

==== Northern Railway ====
Northern Railway, headquartered in Delhi, was established on April 14, 1952. It is one of the largest zones by route length, covering approximately 7,363 kilometers. The zone operates across Delhi, Punjab, Haryana, Himachal Pradesh, Uttarakhand, and parts of Uttar Pradesh and Rajasthan. Northern Railway comprises six divisions: Ambala, Delhi, Firozpur, Lucknow, Moradabad, and Jammu. The zone plays a critical role in connecting the national capital to northern and northwestern India. 

==== Southern Railway ====
Southern Railway, headquartered in Chennai, was the first zone formed on April 14, 1951 (some sources say April 14, 1950). It covers Tamil Nadu, Kerala, Puducherry, and parts of Andhra Pradesh and Karnataka, with a route length of 5,093 kilometers. The zone has six divisions: Chennai, Madurai, Palakkad, Salem, Thiruvananthapuram, and Tiruchirappalli. SR is easily the oldest and most established zone, serving the southern peninsula. 

==== Western Railway ====
Western Railway, headquartered at Mumbai Churchgate, was established on November 5, 1951. It covers Gujarat, parts of Maharashtra, Madhya Pradesh, and Rajasthan, with a route length of 6,156 kilometers. The zone has six divisions: Ahmedabad, Bhavnagar, Mumbai WR, Rajkot, Ratlam, and Vadodara. WR is one of the busiest zones, handling substantial suburban traffic in Mumbai and Ahmedabad, 

==== Central Railway ====
Central Railway is headquartered at Mumbai CSMT (Chhatrapati Shivaji Maharaj Terminus) and was formed on November 5, 1951. It covers Maharashtra, parts of Madhya Pradesh, and Karnataka, with a route length of 4,203 kilometers. The zone comprises five divisions: Bhusawal, Mumbai CR, Nagpur, Pune, and Solapur. CR serves as a critical link between western and central India and even has a Rajdhani named after it. (It is called CR Rajdhani) 

==== Eastern Railway ====
Eastern Railway is headquartered in Kolkata and was formed on April 14, 1952. It covers West Bengal, Jharkhand, and parts of Odisha and Bihar, with a route length of 2,823 kilometers. The zone comprises four divisions: Asansol, Howrah, Malda, and Sealdah. ER serves the densely populated and industrialized regions of eastern India, including the Kolkata metropolitan area which contains both Howrah and Sealdah stations. 

==== North Eastern Railway ====
North Eastern Railway is headquartered in Gorakhpur and was formed on April 14, 1952. It covers eastern Uttar Pradesh and parts of Bihar, with a route length of approximately 3,470 kilometers. The zone has three divisions: Izzatnagar, Lucknow, and Varanasi. NER serves important pilgrimage centers and agricultural regions in the Purvanchal area. It got cut in half because of the formation of the Northeast Frontier Railways zone. 

=== The Other Main Zones ===
These were the other important zones created after the six main zones. 

==== Northeast Frontier Railway ====
Northeast Frontier Railway, headquartered in Guwahati, was established on January 15, 1958. It serves the entire northeastern region of India, covering Assam, Arunachal Pradesh, Manipur, Meghalaya, Mizoram, Nagaland, Tripura, and parts of West Bengal and Bihar. With a route length of 4,348 kilometers, NFR operates five divisions: Alipurduar, Katihar, Lumding, Rangiya, and Tinsukia. The zone faces unique operational challenges due to the region's difficult terrain and weather conditions and yet, it gains profit. 

==== Southeastern Railway ====
South Eastern Railway, headquartered at Garden Reach in Kolkata, was established on August 1, 1955. It covers parts of West Bengal, Jharkhand, and Odisha, with a route length of 2,758 kilometers. The zone has four divisions: Adra, Chakradharpur, Kharagpur, and Ranchi. SER is known for its mineral-rich territory, handling significant freight traffic related to coal and iron ore along the Dedicated Freight Corridor (DFC). 

==== South Central Railway ====
South Central Railway is headquartered in Secunderabad and was formed on October 2, 1965 (operational from 1966). It serves Telangana, parts of Maharashtra, Andhra Pradesh, and Karnataka, with a route length of 3,572 kilometers. The zone comprises three divisions: Secunderabad, Hyderabad, and Nanded. SCR was carved out from Southern and Central Railways to provide focused administration to the Andhra region. 

==== East Central Railway ====
East Central Railway is headquartered in Hajipur and was formed on October 1, 2002.  It covers Bihar and Jharkhand, with a route length of 4,238 kilometers.  The zone comprises five divisions: Danapur, Dhanbad, Mughalsarai, Samastipur, and Sonpur.  ECR was carved out from Eastern and North Eastern Railways to better serve Bihar. It was one of the most important zonal expansions. 

==== North Western Railway ====
North Western Railway is headquartered in Jaipur and was formed on October 1, 2002. It covers Rajasthan and parts of Gujarat, Punjab, and Haryana, with a route length of 5,705 kilometers. The zone comprises of four divisions: Ajmer, Bikaner, Jaipur, and Jodhpur. NWR was carved out from Northern and Western Railways to better serve the Rajasthan region. 

=== The Extra Zones ===
These were zones which were made as an extra addition to the zonal expansion. 

==== South Western Railway ====
South Western Railway, which is headquartered in Hubballi, was established on April 3, 2003. It covers Karnataka and parts of Andhra Pradesh and Tamil Nadu, with a route length of 3,692 kilometers. The zone has three divisions: Bengaluru, Hubballi, and Mysuru. SWR was created to provide focused administration to Karnataka's railway network as there is lots of traffic in Bengaluru and Hubballi junctions. 

==== West Central Railway ====
West Central Railway is headquartered in Jabalpur and was formed on April 3, 2003. It covers Madhya Pradesh and parts of Uttar Pradesh and Rajasthan, with a route length of 3,060 kilometers. The zone comprises three divisions: Bhopal, Jabalpur, and Kota. WCR was carved out from Central and Western Railways for more coordinated administration across Madhya Pradesh. 

==== North Central Railway ====
North Central Railway, headquartered in Prayagraj (formerly Allahabad), was established on April 3, 2003. It covers Uttar Pradesh and parts of Madhya Pradesh, with a route length of 3,522 kilometers. The zone has three divisions: Agra, Jhansi, and Prayagraj. NCR was formed from portions of Northern and Central Railways for administration and expansion purposes. 

==== South East Central Railway ====
South East Central Railway is headquartered in Bilaspur and was formed on April 1, 2003. It covers Chhattisgarh and parts of Madhya Pradesh, Odisha, and Jharkhand, with a route length of 2,396 kilometers. The zone comprises three divisions: Bilaspur, Nagpur, and Raipur. SECR was carved out from South Eastern and Central Railways to serve the mineral-rich Chhattisgarh region. 

==== East Coast Railway ====
East Coast Railway, headquartered in Bhubaneswar, was established on April 3, 2003. It covers Odisha and parts of Andhra Pradesh, with a route length of 2,701 kilometers. The zone has three divisions: Khurda Road, Sambalpur, and Rayagada. ECoR was formed from portions of South Eastern and South Central Railways. It is one of the only three coastal railway zones. 

=== The Most Recently Added Zones ===
These were added recently to the Zonal Railways of India. (Top 3)

==== Konkan Railway ====
Konkan Railway, headquartered in Navi Mumbai (CBD Belapur), was formally integrated as a zone on July 19, 1990. It covers the Konkan coastal region of Maharashtra, Goa, and Karnataka, with a route length of 756 kilometers. The zone has two divisions: Ratnagiri and Karwar. Konkan Railway is known for its engineering marvels, including numerous bridges and tunnels through the Western Ghats. 

==== South Coast Railway ====
South Coast Railway (SCoR) is the newest and 18th operational zone of Indian Railways (often referred to as Zone 17 in some counting systems that exclude Metro Railway or Konkan Railway). The zone was officially constituted and began operations on June 1, 2026, with its headquarters in Visakhapatnam, Andhra Pradesh. SCoR was carved from three different railway zones to manage Andhra Pradesh. 

==== Metro Railway, Kolkata ====
[[File:Kolkata Metro CRRC Dalian rake 5.jpg|thumb|320x320px|'''''Credit: ArnabSaha.''''' A Kolkata Metro CRRC Dalian rake. ]]
Metro Railway, Kolkata, headquartered in Kolkata, was declared the 17th zone on December 19, 2010 (operational from 2019). KMRC operates the Kolkata Metro network, with a route length of 73.2 kilometers and 58 stations. The zone has no divisions and operates five metro lines (Blue, Green, Purple, Orange, and Yellow) with both broad gauge and standard gauge tracks. Metro Railway handles urban rapid transit in the Kolkata metropolitan area. It is the smallest railway zone in India that just so happens to be a metro network too.

== Divisions of Indian Railways ==
As of 2025–2026, there are 68 to 69 operating divisions across 19 zones, each headed by a Divisional Railway Manager (DRM) who is responsible for day-to-day operations, maintenance, and administration within their division. This divisional structure enables decentralized management while maintaining coordination through zonal and central authorities. 

=== Organizational Structure ===
Each zonal railway is headed by a General Manager who reports directly to the Railway Board. Zones are further subdivided into divisions, each headed by a Divisional Railway Manager (DRM). 

The DRM serves as the chief executive of a railway division and is responsible for managing and administering a particular geographical area. Key responsibilities include ensuring punctuality and safety of all passenger and freight trains passing through or originating within the division, monitoring train movements, managing line capacity, and resolving disruptions. DRMs oversee efficient movement of wagons and coaches, ensuring optimal utilization of rolling stock, and managing yard operations. They coordinate maintenance of tracks, bridges, stations, and other fixed assets through various engineering departments. Commercial operations including passenger ticketing, freight booking, fare collection, and customer service also fall under their purview. DRMs ensure safety of train operations and security of railway material, passengers, and belongings, while managing personnel matters, discipline, and welfare of divisional staff. 

Within each division, functional departments are represented by senior divisional officers who report both to the DRM and to their respective zonal Heads of Departments (HODs). These include the Senior Divisional Engineer (DEN), responsible for maintenance of fixed assets including tracks, bridges, and buildings; the Senior Divisional Mechanical Engineer (DMME), who oversees maintenance of diesel locomotives, carriage, and wagon fleets; the Senior Divisional Electrical Engineer (DEE), managing station lighting, power supply, overhead equipment, and electric rolling stock; the Senior Divisional Signal &amp; Telecommunication Engineer (DSTE), handling signalling and telecommunication infrastructure; the Senior Divisional Operations Manager (DOM), managing train operations and traffic control; the Senior Divisional Finance Manager (DFM), managing accounting and financial matters; the Senior Divisional Commercial Manager (DCM), handling passenger and freight commercial operations; the Senior Divisional Personnel Officer (DPO), managing human resources; the Senior Divisional Safety Officer (DSO), ensuring operational safety; the Senior Divisional Material Manager (DMM), managing material stores; the Chief Medical Superintendent (CMS), providing healthcare facilities; and the Senior Divisional Security Commissioner (DSC), handling security matters. This framework ensures that divisions have operational autonomy while maintaining technical and functional coordination with zonal and central authorities. 

=== List of Divisions ===
The following is a list of all railway divisions of Indian Railways, organized by zone.  

==== Central Railway (CR) ====

* Mumbai CR Division
* Bhusaval Division
* Nagpur Division
* Solapur Division
* Pune Division

==== Eastern Railway (ER) ====

* Asansol Division
* Howrah Division
* Malda Division
* Sealdah Division 
* Kolkata Division 

==== East Central Railway (ECR) ====

* Sonpur Division
* Samastipur Division
* Danapur Division
* Dhanbad Division
* Pt. Deen Dayal Upadhyaya Division (formerly Mughalsarai) 
* Hajipur Division 

==== East Coast Railway (ECoR) ====

* Khurda Road Division
* Sambalpur Division
* Rayagada Division 
* Bhubaneshwar Division 

==== Northern Railway (NR) ====

* Ambala Division
* New Delhi Division
* Lucknow Division
* Moradabad Division
* Firozpur Division
* Jammu Division

==== North Central Railway (NCR) – Prayagraj ====

* Prayagraj Division
* Agra Division
* Jhansi Division

==== North Eastern Railway (NER) ====

* Lucknow Division 
* Izzatnagar Division
* Varanasi Division 
* Gorakhpur Division 

==== Northeast Frontier Railway (NFR) ====

* Alipurduar Division
* Katihar Division
* Lumding Division
* Rangiya Division
* Tinsukia Division 
* Guwahati Division

==== North Western Railway (NWR) ====

* Ajmer Division
* Bikaner Division
* Jaipur Division
* Jodhpur Division

==== Southern Railway (SR) ====

* Chennai Division
* Madurai Division
* Palakkad Division
* Tiruchchirappalli Division
* Thiruvananthapuram Division
* Salem Division

==== South Central Railway (SCR) ====

* Hyderabad Division
* Nanded Division
* Secunderabad Division

==== South Coast Railway (SCoR) ====

* Visakhapatnam Division (formerly Waltair)
* Vijayawada Division
* Guntur Division
* Guntakal Division

==== South Eastern Railway (SER) ====

* Adra Division
* Chakradharpur Division
* Kharagpur Division
* Ranchi Division 

==== South East Central Railway (SECR) ====

* Raipur Division
* Nagpur Division
* Bilaspur Division

==== South Western Railway (SWR) ====

* Bengaluru Division
* Hubballi Division
* Mysuru Division

==== Western Railway (WR) ====

* Mumbai Central Division
* Vadodara Division
* Ratlam Division
* Ahmedabad Division
* Rajkot Division
* Bhavnagar Division

==== West Central Railway (WCR) ====

* Bhopal Division
* Jabalpur Division
* Kota Division

==== Konkan Railway (KR) ====

* Ratnagiri Division
* Karwar Division
* Navi Mumbai Division

==== Metro Railway, Kolkata (KMRC) ====

* (No divisions. It operates as a single integrated urban transit network) 
This divisional framework enables Indian Railways to manage its vast network efficiently through decentralized administration while actually maintaining coordination through zonal and central oversight. 

{{BookCat}}</text>
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The Central African Republic, commonly abbreviated CAR, is a country in Central Africa. The country borders Chad, Cameroon, the Republic of the Congo, the Democratic Republic of the Congo, South Sudan, and Sudan. The capital city of the Central African Republic is Bangui, which is also the country's largest city. The currency of the Central African Republic is the CFA franc, which is also used by five other Central African nations; Cameroon, Chad, Republic of the Congo, Equatorial Guinea and Gabon.

== Central African Republic's History ==
[[File:Bokassa portrait (cropped).jpg|thumb|Jean-Bédel Bokassa in 1970]]
=== Beginnings ===
The Central African Republic as we know today was originally a colony of France, and gained independence from France on the 13th of August 1960, with David Dacko being the first president. Previously, the Central African Republic was an autonomous (being able to govern itself) part of France.
=== The Central African Empire and Coups ===
During 1976 and 1979, the name of the Central African Republic was the Central African Empire, after the then president of the Central African Republic and former member of the French Colonial Army, Jean-Bédel Bokassa, proclaimed himself as the emperor of Central Africa, which led to the name change. The coronation happened on the 4th of December, 1977, leading to Jean-Bédel Bokassa becoming Emperor Bokassa I. In 1979, Operation Caban happened, which was a plan backed by France to bring the Central African Republic, and Dacko back to power. This was successful, and Dacko was back in power. However, just two years later, another coup would happen in the Central African Republic. This new coup, which was led by the rebels of the army of the Central African Republic, would be supported by France and was led by André Kolingba. This coup succeeded, and Kolingba became the new president.

== Central African Republic's Geography ==
The Central African Republic borders six African countries, and it is located in the centre of Africa, north of the Equator. The capital city, Bangui, borders the Ubangi River, which separates Bangui and the Democratic Republic of the Congo. 

== Central African Republic's People ==
The official languages of the Central African Republic are Sango and French. The current president of the Central African Republic is Faustin-Archange Touadéra, who became the president of the Central African Republic in 2016, having previously been the prime minister. Other famous politicians include:
*Felix Moloua - the current prime minister of the Central African Republic.
*Simplice Sarandji - the current leader of the National Assembly.
*David Dacko - the first president of the Central African Republic.

== Central African Republic's Sights ==
[[File:Manovo-Gounda St. Floris National Park map.png|thumb|The location of Manovo-Gounda St. Floris National Park on a map]]
The Central African Republic has two UNESCO World Heritage Sites. These are:
*Manovo-Gounda St Floris National Park - an area known for biodiversity
*Sangha Trinational - This UNESCO world heritage site is divided with two other countries; Republic of the Congo and Cameroon.</text>
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The Central African Republic, commonly abbreviated CAR, is a country in Central Africa. The country borders Chad, Cameroon, the Republic of the Congo, the Democratic Republic of the Congo, South Sudan, and Sudan. The capital city of the Central African Republic is Bangui, which is also the country's largest city. The currency of the Central African Republic is the CFA franc, which is also used by five other Central African nations; Cameroon, Chad, Republic of the Congo, Equatorial Guinea and Gabon.

== Central African Republic's History ==
[[File:Bokassa portrait (cropped).jpg|thumb|Jean-Bédel Bokassa in 1970]]
=== Beginnings ===
The Central African Republic as we know today was originally a colony of France, and gained independence from France on the 13th of August 1960, with David Dacko being the first president. Previously, the Central African Republic was an autonomous (being able to govern itself) part of France.
=== The Central African Empire and Coups ===
During 1976 and 1979, the name of the Central African Republic was the Central African Empire, after the then president of the Central African Republic and former member of the French Colonial Army, Jean-Bédel Bokassa, proclaimed himself as the emperor of Central Africa, which led to the name change. The coronation happened on the 4th of December, 1977, leading to Jean-Bédel Bokassa becoming Emperor Bokassa I. In 1979, Operation Caban happened, which was a plan backed by France to bring the Central African Republic, and Dacko back to power. This was successful, and Dacko was back in power. However, just two years later, another coup would happen in the Central African Republic. This new coup, which was led by the rebels of the army of the Central African Republic, would be supported by France and was led by André Kolingba. This coup succeeded, and Kolingba became the new president.

== Central African Republic's Geography ==
The Central African Republic borders six African countries, and it is located in the centre of Africa, north of the Equator. The capital city, Bangui, borders the Ubangi River, which separates Bangui and the northern part of the Democratic Republic of the Congo.

== Central African Republic's People ==
The official languages of the Central African Republic are Sango and French. The current president of the Central African Republic is Faustin-Archange Touadéra, who became the president of the Central African Republic in 2016, having previously been the prime minister. Other famous politicians include:
*Felix Moloua - the current prime minister of the Central African Republic.
*Simplice Sarandji - the current leader of the National Assembly.
*David Dacko - the first president of the Central African Republic.

== Central African Republic's Sights ==
[[File:Manovo-Gounda St. Floris National Park map.png|thumb|The location of Manovo-Gounda St. Floris National Park on a map]]
The Central African Republic has two UNESCO World Heritage Sites. These are:
*Manovo-Gounda St Floris National Park - an area known for biodiversity
*Sangha Trinational - This UNESCO world heritage site is divided with two other countries; Republic of the Congo and Cameroon.</text>
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The Central African Republic, commonly abbreviated CAR, is a country in Central Africa. The country borders Chad, Cameroon, the Republic of the Congo, the Democratic Republic of the Congo, South Sudan, and Sudan. The capital city of the Central African Republic is Bangui, which is also the country's largest city. The currency of the Central African Republic is the CFA franc, which is also used by five other Central African nations; Cameroon, Chad, Republic of the Congo, Equatorial Guinea and Gabon.

== Central African Republic's History ==
[[File:Bokassa portrait (cropped).jpg|thumb|Jean-Bédel Bokassa in 1970]]
=== Beginnings ===
The Central African Republic as we know today was originally a colony of France, and gained independence from France on the 13th of August 1960, with David Dacko being the first president. Previously, the Central African Republic was an autonomous (being able to govern itself) part of France.
=== The Central African Empire and Coups ===
During 1976 and 1979, the name of the Central African Republic was the Central African Empire, after the then president of the Central African Republic and former member of the French Colonial Army, Jean-Bédel Bokassa, proclaimed himself as the emperor of Central Africa, which led to the name change. The coronation happened on the 4th of December, 1977, leading to Jean-Bédel Bokassa becoming Emperor Bokassa I. In 1979, Operation Caban happened, which was a plan backed by France to bring the Central African Republic, and Dacko back to power. This was successful, and Dacko was back in power. However, just two years later, another coup would happen in the Central African Republic. This new coup, which was led by the rebels of the army of the Central African Republic, would be supported by France and was led by André Kolingba. This coup succeeded, and Kolingba became the new president.

== Central African Republic's Geography ==
The Central African Republic borders six African countries, and it is located in the centre of Africa, north of the Equator. The capital city, Bangui, borders the Ubangi River, which separates Bangui and the northern part of the Democratic Republic of the Congo.

== Central African Republic's People ==
The official languages of the Central African Republic are Sango and French. The current president of the Central African Republic is Faustin-Archange Touadéra, who became the president of the Central African Republic in 2016, having previously been the prime minister. Other famous politicians include:
*Felix Moloua - the current prime minister of the Central African Republic.
*Simplice Sarandji - the current leader of the National Assembly.
*David Dacko - the first president of the Central African Republic.

== Central African Republic's Sights ==
[[File:Manovo-Gounda St. Floris National Park map.png|thumb|The location of Manovo-Gounda St. Floris National Park on a map]]
The Central African Republic has two UNESCO World Heritage Sites. These are:
*Manovo-Gounda St Floris National Park - an area known for biodiversity. The area is marked in a red point on the map.
*Sangha Trinational - This UNESCO world heritage site is divided with two other countries; Republic of the Congo and Cameroon.</text>
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The Central African Republic, commonly abbreviated CAR, is a country in Central Africa. The country borders Chad, Cameroon, the Republic of the Congo, the Democratic Republic of the Congo, South Sudan, and Sudan. The capital city of the Central African Republic is Bangui, which is also the country's largest city. The currency of the Central African Republic is the CFA franc, which is also used by five other Central African nations; Cameroon, Chad, Republic of the Congo, Equatorial Guinea and Gabon.

== Central African Republic's History ==
[[File:Bokassa portrait (cropped).jpg|thumb|Jean-Bédel Bokassa in 1970]]
=== Beginnings ===
The Central African Republic as we know today was originally a colony of France, and gained independence from France on the 13th of August 1960, with David Dacko being the first president. Previously, the Central African Republic was an autonomous (being able to govern itself) part of France.
=== The Central African Empire and Coups ===
During 1976 and 1979, the name of the Central African Republic was the Central African Empire, after the then president of the Central African Republic and former member of the French Colonial Army, Jean-Bédel Bokassa, proclaimed himself as the emperor of Central Africa, which led to the name change. The coronation happened on the 4th of December, 1977, leading to Jean-Bédel Bokassa becoming Emperor Bokassa I. In 1979, Operation Caban happened, which was a plan backed by France to bring the Central African Republic, and Dacko back to power. This was successful, and Dacko was back in power. However, just two years later, another coup would happen in the Central African Republic. This new coup, which was led by the rebels of the army of the Central African Republic, would be supported by France and was led by André Kolingba. This coup succeeded, and Kolingba became the new president.

== Central African Republic's Geography ==
The Central African Republic borders six African countries, and it is located in the centre of Africa, north of the Equator. The capital city, Bangui, borders the Ubangi River, which separates Bangui and the northern part of the Democratic Republic of the Congo. The Central African Republic is a landlocked country, meaning it does not border any ocean. Mont Ngaoui is the highest point of the Central African Republic, with it being next to the border with Cameroon.

== Central African Republic's People ==
The official languages of the Central African Republic are Sango and French. The current president of the Central African Republic is Faustin-Archange Touadéra, who became the president of the Central African Republic in 2016, having previously been the prime minister. Other famous politicians include:
*Felix Moloua - the current prime minister of the Central African Republic.
*Simplice Sarandji - the current leader of the National Assembly.
*David Dacko - the first president of the Central African Republic.

== Central African Republic's Sights ==
[[File:Manovo-Gounda St. Floris National Park map.png|thumb|The location of Manovo-Gounda St. Floris National Park on a map]]
The Central African Republic has two UNESCO World Heritage Sites. These are:
*Manovo-Gounda St Floris National Park - an area known for biodiversity. The area is marked in a red point on the map.
*Sangha Trinational - This UNESCO world heritage site is divided with two other countries; Republic of the Congo and Cameroon.</text>
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  <page>
    <title>Indian Railways/Rolling Stock</title>
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      <text bytes="23193" sha1="hmgu7lupo6qci2fqlm2b4hu08v23neg" xml:space="preserve">== Introduction ==
'''Indian Railways''' has a rolling stock. Rolling stock is the general name for the railway vehicles that move on railway tracks. It includes vehicles that carry their own source of power and vehicles that must be hauled by another vehicle. In Indian Railways, rolling stock includes locomotives, coaches, wagons, electric multiple units, diesel multiple units, mainline electric multiple units, trainsets, tower cars, power cars, inspection vehicles, shunting vehicles, track inspection vehicles, and other special-purpose vehicles. 

Indian Railways uses rolling stock for two main purposes. Passenger rolling stock transports people and their luggage, while freight rolling stock transports goods such as coal, iron ore, cement, food grains, petroleum products, containers, automobiles, and other materials. Locomotives and self-propelled train units provide the power needed to move these vehicles. The Indian Railway Rolling Stock Code defines rolling stock broadly to include coaches, wagons, locomotives, electric multiple units, diesel multiple units, trainsets, mainline electric multiple units, tower cars, power cars, special-purpose coaches and wagons, and other railway vehicles.  

Rolling stock is designed according to its purpose. A high-speed passenger coach requires different construction, suspension, braking, and interior arrangements from a coal wagon. A shunting locomotive needs good low-speed pulling power, while a passenger locomotive may need high speed and rapid acceleration.   

''See also: [[wikipedia:Indian_Railways_coaching_stock|Indian railway coaching stock]]''  

== Types of Rolling Stocks ==

=== Self-Propelled and Non-Self-Propelled Stocks ===
[[File:38436 (Panskaru-Howrah) EMU local.jpg|thumb|268x268px|'''''Credit: Smeet Chowdhury.''''' This is an EMU (Electric multiple unit) which is a self-propelled vehicle for intercity routes. (Train No. 38436) ]]
Rolling stock can be divided into self-propelled and non-self-propelled vehicles. A self-propelled vehicle has its own equipment for producing or receiving motive power. Examples include locomotives, electric multiple units, diesel multiple units, railcars, battery vehicles, and some maintenance vehicles.       

A non-self-propelled vehicle cannot normally move independently over the railway. It must be hauled or pushed by a locomotive or another powered unit. Passenger coaches, freight wagons, parcel vans, brake vans, and many inspection vehicles belong to this group.

The word “stock” refers to a vehicle or group of vehicles available for railway service (here). A passenger train may contain a locomotive, several coaches, a pantry car, luggage or brake vans, and sometimes a power car. A freight train may contain a locomotive or multiple locomotives and a large group of wagons. 

=== Locomotives, Coaches and Special Stocks ===
[[File:An EF-12K at Kodigehalli Halt, Bengaluru.jpg|thumb|335x335px|'''''Credit: ActStuffOGWiki.''''' This is an EF12K. It is a locomotive which is just two older WAG-9 locomotives combined. ]]
The principal groups of Indian railway rolling stock are locomotives, coaching stock, freight stock, multiple-unit stock, maintenance vehicles, and emergency or special-purpose vehicles. Locomotives provide the main hauling power for conventional trains. They may use diesel engines, electric traction equipment, batteries, or, in heritage service, steam engines.

Coaching stock is used mainly for passengers. It includes sleeping coaches, sitting coaches, air-conditioned coaches, general coaches, chair cars, first-class coaches, pantry cars, luggage vans, brake vans, generator cars, parcel vans, postal vans, and special coaches.

Freight stock consists mainly of wagons. Different wagons are designed for bulk goods, liquids, containers, automobiles, livestock, military equipment, cement, coal, grain, steel, and other commodities.

Multiple-unit stock consists of vehicles in which traction equipment is distributed among one or more coaches. Electric multiple units, mainline electric multiple units, diesel multiple units, and modern trainsets can operate without a separate locomotive in the usual way. 

Maintenance and special-purpose stock supports the railway itself. This group includes track machines, overhead-equipment inspection cars, tower cars, breakdown cranes, accident-relief vehicles, medical vans, inspection carriages, engineering vehicles, and departmental wagons. 

== Locomotives ==
A locomotive is a powered railway vehicle designed mainly to haul or move other railway vehicles. It normally does not carry passengers, although some locomotives may contain limited crew accommodation. Locomotives are attached to coaches or wagons using couplers.

A locomotive may pull a train, push it, or move vehicles inside a yard. A locomotive used for moving vehicles short distances in a station or yard is called a shunter or switching locomotive. A locomotive used on the main line is designed for longer distances and higher speeds.

Locomotives are classified according to their power source, gauge, intended duty, transmission system, axle arrangement, and power rating. Indian locomotive codes traditionally provide information about several of these features. The first letter generally identifies the gauge, the second identifies the motive power, and the third identifies the service or traffic role. 

=== Steam Locomotives ===
[[File:883 IndiaGorakhpur 19931228.jpg|thumb|302x302px|'''''Credit: Nigel Tout.''''' This is a YP (Y for narrow gauge, P for passenger traffic) steam locomotive from 1993 at its retirement. ]]
Steam locomotives use a boiler to produce steam. The steam drives pistons or turbines, which turn the driving wheels. Coal, oil, or another fuel is burned to heat water inside the boiler. They were historically important in India. They hauled passenger and freight trains for many decades before diesel and electric traction became dominant. Steam locomotives required regular attention to their boilers, water supply, fuel, lubrication, and mechanical parts.

Steam locomotives are no longer the normal source of power for Indian Railways. A small number are preserved for heritage operation, special excursions, museums, or ceremonial use. They are valuable because they demonstrate an earlier stage of railway technology.

The main advantages of steam locomotives were their ability to operate without external electrical infrastructure and their relatively simple fuel supply arrangements in the early railway era. Their disadvantages included heavy maintenance, low thermal efficiency, smoke, the need for frequent water and fuel stops, and the labor required to operate them. 

=== Diesel Locomotives ===
Diesel locomotives use a diesel engine as their prime mover. In most large Indian diesel locomotives, the diesel engine drives an electric generator or alternator. The electricity then powers traction motors mounted on the locomotive’s axles. This arrangement is known as diesel-electric transmission.
[[File:ERS WDP-4D Locomotive..jpg|thumb|266x266px|'''Credit: Kishlay RF.''' This is a WDP-4D (W for broad gauge, D for diesel power and P for passenger traffic) locomotive in Kochi. ]]
A diesel-electric locomotive is not usually driven mechanically like a road vehicle. The diesel engine produces electrical power, while traction motors provide the turning force at the wheels. This allows the locomotive to produce high tractive effort and to control wheel rotation effectively.

Diesel locomotives were introduced widely because they required less routine servicing than steam locomotives and could operate on routes without electric overhead equipment. They were especially useful during the transition from steam to electric traction.

Diesel locomotives have been progressively replaced on many main lines by electric locomotives. They remain useful on non-electrified routes, in yards, for shunting, during maintenance work, and in situations where independent power is required.

Indian diesel locomotive families have included passenger, freight, mixed-traffic, shunting, and dual-mode types. Examples of familiar Indian classifications include WDM locomotives for broad-gauge diesel mixed traffic, WDP locomotives for passenger service, WDG locomotives for freight service, and WDS locomotives for shunting. 

=== Electric Locomotives ===
Electric locomotives receive electrical energy from an external supply system. On most electrified broad-gauge routes in India, electricity is supplied through overhead equipment. A pantograph on the locomotive touches the overhead wire and transfers electricity to the locomotive’s traction system.
[[File:Indian Railways WAP-4 class electric locomotive..JPG|thumb|292x292px|'''Credit: Indian Railways.''' This is a very popular image of a WAP-4 (W for broad gauge, A for AC current and P for passenger traffic) locomotive with ICF Blue.  ]]
The locomotive converts the incoming electrical energy into mechanical power through traction motors. Modern electric locomotives use power electronics, transformers, converters, control systems, and regenerative or dynamic braking equipment.

Electric locomotives have several important advantages. They can provide high power, strong acceleration, and high tractive effort. They do not carry fuel tanks or large diesel engines, and they produce no exhaust emissions at the point of use. Electric traction is particularly suitable for heavily used routes and long freight trains.

Electric traction also requires substantial fixed infrastructure. The railway must provide overhead equipment, substations, switching systems, protection systems, maintenance facilities, and reliable electricity. Electric locomotives cannot normally operate independently on a route without compatible electrical equipment.

Indian electric locomotives include passenger, freight, mixed-traffic, and shunting types. Common classifications include WAP for broad-gauge electric passenger locomotives, WAG for broad-gauge electric goods locomotives, and WAM for electric mixed-traffic locomotives. 

=== Alternative-Powered Locomotives ===
Battery-powered railway vehicles store electrical energy in onboard batteries. They may be used for inspection, shunting, maintenance, station service, or other limited duties. Their use depends on battery capacity, charging facilities, vehicle weight, operating range, and local requirements.
[[File:WDAP-5.jpg|thumb|267x267px|'''''Credit: Suvadeep Saha56.''''' This is a WDAP-5 locomotive (W for broad gauge, D for diesel locomotive, A for AC Current and P for passenger traffic). It is the only dual-mode locomotive in India. ]]
Hybrid and dual-mode vehicles can use more than one source of power. A dual-mode locomotive may use electric power under overhead wires and diesel power where electrification is unavailable. Such vehicles can reduce the need to change locomotives at the boundary between electrified and non-electrified routes.

Alternative-power railway technology may also include fuel-cell, hydrogen, or other low-emission systems in experimental or limited applications. The suitability of each technology depends on energy supply, infrastructure, cost, maintenance, and safety. 

== Passenger Coaches ==
A passenger coach is a railway vehicle designed to carry people. It may provide seats, sleeping berths, toilets, luggage space, heating, cooling, lighting, electrical outlets, food-service facilities, or accessibility features.

Passenger coaches are built in different forms. Some are intended for short suburban journeys, while others are designed for overnight travel. Some provide air-conditioned accommodation, while others have open windows and simpler interiors.

A coach may be self-generating or end-on-generating. In a self-generating coach, an alternator and axle-driven equipment produce electrical power as the coach moves. In an end-on-generation system, one or more power cars supply electricity to the entire rake through an electrical train line.

Passenger coaches may be connected by vestibules. A vestibule is an enclosed passage between coaches that allows passengers and staff to move safely from one coach to another while the train is in motion. 

=== ICF Coaches ===
ICF coaches were developed around the integral-coach design associated with the Integral Coach Factory. They became one of the most widely used passenger-coach designs in India.

An ICF coach generally has a conventional body and bogie arrangement. It may use coil springs, air brakes, and other systems depending on its construction and later modifications.
[[File:WDP-4 passing through Kodigehalli Halt in 2019 with Pink Flowers.jpg|thumb|310x310px|'''''Credit: ActStuffOGWiki.''''' These are ICF Uthkrisht coaches powered by a WDP-4 locomotive. ]]
ICF coaches have been produced in many forms, including general coaches, sleeper coaches, air-conditioned coaches, chair cars, pantry cars, luggage vans, generator cars, and special-purpose vehicles.

The ICF design served Indian Railways for a long period because it could be manufactured and maintained in large numbers. Many coaches received upgrades during their service lives, including improved braking, suspension, lighting, toilets, electrical systems, and interiors. 

=== LHB Coaches ===
LHB means Linke Hofmann Busch, the name associated with the coach design developed in Germany and later produced for Indian Railways. LHB coaches use a different design from older ICF coaches. LHB coaches generally have stainless-steel bodies, FIAT-type bogies, disc brakes, improved suspension, and centre-buffer couplers. Their design provides improved crashworthiness and ride characteristics compared with older coach designs. 
[[File:Sangam Express with LHB coaches.jpg|thumb|253x253px|'''Credit: Ravi Dwivedi.''' LHB coaches of Sangam Express at some railway station. ]]
LHB coaches are available in several passenger configurations. These include air-conditioned first class, air-conditioned two-tier sleeper, air-conditioned three-tier sleeper, air-conditioned chair car, executive chair car, non-air-conditioned chair car, sleeper, general seating, pantry, power, luggage, and brake-van variants. 

The exact capacity of a coach depends on its layout, seat or berth design, toilet arrangement, accessibility provisions, and production version. For example, commonly cited LHB configurations include approximately 52 berths for some air-conditioned two-tier coaches, 72 berths for some air-conditioned three-tier coaches, 78 seats for some chair cars, and 56 seats for some executive chair cars. These figures can vary by design and refurbishment. 

LHB coaches are often associated with higher-speed passenger services, but the actual permitted speed of a train depends on the coach type, locomotive, track, signalling, route conditions, maintenance status, and operating rules. 

== Freight Wagons ==
A freight wagon is a railway vehicle used to carry goods. Wagons are designed according to the physical properties, weight, volume, loading method, unloading method, and safety requirements of their cargo.

A wagon must support its load, withstand pulling and braking forces, remain stable on curves, and operate safely at the permitted speed. It must also be compatible with loading terminals and unloading equipment.

Freight wagons may be open, covered, tank-type, flat, hopper-type, container-carrying, automobile-carrying, or specially designed for a particular commodity.

Indian Railways uses many wagon types because the country transports a wide range of bulk and manufactured goods. The wagon fleet has changed over time as freight patterns, axle loads, loading technology, and logistics systems have developed. 

=== Open and Covered Wagons ===
''See also: [[wikipedia:Open_wagon|Open wagon]]'' 

Open wagons have no permanent roof. They are suitable for goods that are not easily damaged by weather or can be protected by tarpaulins.
[[File:28126 WAG-7 loco with empty freight rakes at Simhachalam 02.jpg|thumb|'''''Credit: Adityamadhav83.''''' Two open wagon goods trains (both coal trains) and one is pulled by a WAG-7. ]]
They are widely used for bulk materials such as coal, minerals, stone, scrap, and other commodities. Some open wagons have doors, bottom discharge equipment, or special side arrangements. Open wagons can be loaded by conveyor, shovel, loader, hopper, or other mechanical systems. Their unloading method depends on the design and the receiving facility. Open wagons are also one of the most common freight wagons used in Indian Railways. They are mostly coal trains but other freight trains such as wood, paper, scrap and metal trains. 

Covered wagons have a roof and enclosed sides. They protect goods from rain, dust, sunlight, and some forms of contamination. 

They are suitable for food grains, bagged cement, fertilizers, manufactured goods, paper, packaged products, and other materials requiring protection. Covered wagons may have sliding doors, roller doors, end doors, or special loading openings. Their internal fittings may be adapted to prevent movement or damage to the cargo. Covered wagons are also one of the most common types of freight wagons found in India along with open wagons. 

=== Hopper and Tank Wagons ===
Hopper wagons have sloping internal surfaces and discharge openings. They are designed to release bulk materials through gravity.

Coal, ballast, ore, grain, and other materials can be handled efficiently using hopper wagons. Discharge may occur through bottom doors, side doors, or controlled outlet systems. The receiving terminal must have suitable tracks, pits, conveyors, hoppers, or unloading equipment. Hopper wagon design and terminal design therefore work together. 

Tank wagons carry liquids, gases, powders, or other materials in a tank mounted on a railway underframe.

Different tank wagons are designed for petroleum products, chemicals, water, liquefied gases, edible oils, and other substances. The tank material, pressure rating, valves, insulation, safety fittings, and labelling depend on the cargo. Tank wagon operations require strict attention to loading limits, pressure, leakage prevention, earthing, fire protection, brake equipment, and emergency procedures. Tank wagons are the third most common freight wagons in Indian Railways as they can carry milk, oil and water. 

== Multiple Unit Trains ==
A multiple-unit train is formed from several connected vehicles that operate together. Traction equipment is placed in one or more vehicles, and the train is controlled from a driving cab.

Multiple-unit operation allows the driver to control all powered vehicles from one cab. This is useful for frequent-stop services because the train can accelerate quickly and does not need a separate locomotive at each end.

Indian Railways operates electric multiple units, mainline electric multiple units, diesel multiple units, and trainsets. Their designs differ in power source, interior arrangement, speed, range, and operating environment. 

=== Electric Multiple Units (EMU) and Mainline Electric Multiple Units (MEMU) ===
An electric multiple unit receives power from an external electrical system and distributes traction equipment among several cars. EMU trains are widely used in suburban and regional services. They typically have many doors, high standing capacity, rapid boarding and alighting, and strong acceleration.

An EMU formation may contain motor coaches, trailer coaches, driving coaches, or combinations of these. The exact formation depends on the electrical system and train design. EMU braking may combine air brakes with electrical braking. Regenerative braking can return energy to the electrical system when conditions permit. 
[[File:Delhi emu and memu.JPG|thumb|267x267px|'''''Credit: WillaMissionary.''''' To the left, (the green and yellow one), we have a MEMU from Delhi's suburban rail. To the right, (the red, blue and yellow one), we have an intercity EMU from Delhi. ]]
A mainline electric multiple units is designed for longer-distance regional or intercity operation than a conventional suburban EMU. It may provide more seating, fewer doors, greater luggage capacity, toilets, air conditioning, or improved ride quality. 

Some mainline units are built as self-propelled passenger trains with driving cabs at both ends. The term MEMU is commonly used for mainline electric multiple units. MEMU services are useful on electrified routes where passengers require frequent regional connections without a locomotive-hauled formation. 

Many people however cannot differentiate between a MEMU (Mainline Electric Multiple Unit) and an EMU (Electric Multiple Unit). One difference is that EMUs are used in the rest of the world too, while MEMUs are an Indian Railways exclusive. 

=== Diesel Multiple Units (DMU) and Diesel Electric Multiple Units (DEMU) ===
A diesel multiple unit uses diesel engines distributed among one or more coaches. It does not require overhead electrical equipment. DMUs are suitable for non-electrified routes and regional passenger services. 
[[File:SC - MOB DEMU (23517623235).jpg|thumb|267x267px|'''''Credit: Belur Ashok.''''' A 9-year-old DEMU (Diesel Electric Multiple Unit) from Secunderabad to Manoharabad. ]]
Diesel Multiple Units may have driving cabs, passenger coaches, power cars, and trailer cars in different combinations. DMUs can provide rapid acceleration and efficient service on lightly or moderately used routes. Their disadvantages include fuel consumption, exhaust emissions, engine noise, and the need for diesel maintenance facilities. 

A diesel electric multiple unit is a type of diesel multiple-unit train in which diesel engines generate electricity, and electric traction motors use that electricity to turn the wheels. It is therefore a specific type of DMU, not a completely separate category. Indian Railways describes DEMUs as self-propelled formations containing driving power cars and trailer cars. 

The diesel engine in a DEMU does not usually drive the wheels directly like DMUs. Instead, it drives an alternator or generator. The generator produces electrical energy, which passes through control equipment and traction converters to electric motors connected to the wheelsets. 

== Future ==
The future of Indian railway rolling stock is likely to involve greater electrification, more trainsets, improved passenger information systems, more energy-efficient equipment, better accessibility, stronger crashworthiness, and increased use of digital diagnostics.

Freight wagons may become more specialised and may support higher axle loads, faster freight services, containerisation, automobile transport, and automated handling systems.

Locomotives may receive improved traction converters, regenerative braking, remote diagnostics, energy monitoring. Maybe hybrid or dual-mode locomotives will become more popular.

Maintenance is also becoming more data driven. Sensors and software can identify wheel defects, bearing temperature, vibration, brake conditions, electrical faults, and other problems before they lead to service failures.  
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      <text bytes="23165" sha1="3282nubhslppnmejprztbes00b8mprr" xml:space="preserve">== Introduction ==
'''Indian Railways''' has a rolling stock. Rolling stock is the general name for the railway vehicles that move on railway tracks. It includes vehicles that carry their own source of power and vehicles that must be hauled by another vehicle. In Indian Railways, rolling stock includes locomotives, coaches, wagons, electric multiple units, diesel multiple units, mainline electric multiple units, trainsets, tower cars, power cars, inspection vehicles, shunting vehicles, track inspection vehicles, and other special-purpose vehicles. 

Indian Railways uses rolling stock for two main purposes. Passenger rolling stock transports people and their luggage, while freight rolling stock transports goods such as coal, iron ore, cement, food grains, petroleum products, containers, automobiles, and other materials. Locomotives and self-propelled train units provide the power needed to move these vehicles. The Indian Railway Rolling Stock Code defines rolling stock broadly to include coaches, wagons, locomotives, electric multiple units, diesel multiple units, trainsets, mainline electric multiple units, tower cars, power cars, special-purpose coaches and wagons, and other railway vehicles.  

Rolling stock is designed according to its purpose. A high-speed passenger coach requires different construction, suspension, braking, and interior arrangements from a coal wagon. A shunting locomotive needs good low-speed pulling power, while a passenger locomotive may need high speed and rapid acceleration.   

''See also: [[wikipedia:Indian_Railways_coaching_stock|Indian railway coaching stock]]''  

== Types of Rolling Stocks ==

=== Self-Propelled and Non-Self-Propelled Stocks ===
[[File:38436 (Panskaru-Howrah) EMU local.jpg|thumb|268x268px|'''''Credit: Smeet Chowdhury.''''' This is an EMU (Electric multiple unit) which is a self-propelled vehicle for intercity routes. (Train No. 38436) ]]
Rolling stock can be divided into self-propelled and non-self-propelled vehicles. A self-propelled vehicle has its own equipment for producing or receiving motive power. Examples include locomotives, electric multiple units, diesel multiple units, railcars, battery vehicles, and some maintenance vehicles.       

A non-self-propelled vehicle cannot normally move independently over the railway. It must be hauled or pushed by a locomotive or another powered unit. Passenger coaches, freight wagons, parcel vans, brake vans, and many inspection vehicles belong to this group.

The word “stock” refers to a vehicle or group of vehicles available for railway service (here). A passenger train may contain a locomotive, several coaches, a pantry car, luggage or brake vans, and sometimes a power car. A freight train may contain a locomotive or multiple locomotives and a large group of wagons. 

=== Locomotives, Coaches and Special Stocks ===
[[File:An EF-12K at Kodigehalli Halt, Bengaluru.jpg|thumb|335x335px|'''''Credit: ActStuffOGWiki.''''' This is an EF12K. It is a locomotive which is just two older WAG-9 locomotives combined. ]]
The principal groups of Indian railway rolling stock are locomotives, coaching stock, freight stock, multiple-unit stock, maintenance vehicles, and emergency or special-purpose vehicles. Locomotives provide the main hauling power for conventional trains. They may use diesel engines, electric traction equipment, batteries, or, in heritage service, steam engines.

Coaching stock is used mainly for passengers. It includes sleeping coaches, sitting coaches, air-conditioned coaches, general coaches, chair cars, first-class coaches, pantry cars, luggage vans, brake vans, generator cars, parcel vans, postal vans, and special coaches.

Freight stock consists mainly of wagons. Different wagons are designed for bulk goods, liquids, containers, automobiles, livestock, military equipment, cement, coal, grain, steel, and other commodities.

Multiple-unit stock consists of vehicles in which traction equipment is distributed among one or more coaches. Electric multiple units, mainline electric multiple units, diesel multiple units, and modern trainsets can operate without a separate locomotive in the usual way. 

Maintenance and special-purpose stock supports the railway itself. This group includes track machines, overhead-equipment inspection cars, tower cars, breakdown cranes, accident-relief vehicles, medical vans, inspection carriages, engineering vehicles, and departmental wagons. 

== Locomotives ==
A locomotive is a powered railway vehicle designed mainly to haul or move other railway vehicles. It normally does not carry passengers, although some locomotives may contain limited crew accommodation. Locomotives are attached to coaches or wagons using couplers.

A locomotive may pull a train, push it, or move vehicles inside a yard. A locomotive used for moving vehicles short distances in a station or yard is called a shunter or switching locomotive. A locomotive used on the main line is designed for longer distances and higher speeds.

Locomotives are classified according to their power source, gauge, intended duty, transmission system, axle arrangement, and power rating. Indian locomotive codes traditionally provide information about several of these features. The first letter generally identifies the gauge, the second identifies the motive power, and the third identifies the service or traffic role. 

=== Steam Locomotives ===
[[File:883 IndiaGorakhpur 19931228.jpg|thumb|302x302px|'''''Credit: Nigel Tout.''''' This is a YP (Y for narrow gauge, P for passenger traffic) steam locomotive from 1993 at its retirement. ]]
Steam locomotives use a boiler to produce steam. The steam drives pistons or turbines, which turn the driving wheels. Coal, oil, or another fuel is burned to heat water inside the boiler. They were historically important in India. They hauled passenger and freight trains for many decades before diesel and electric traction became dominant. Steam locomotives required regular attention to their boilers, water supply, fuel, lubrication, and mechanical parts.

Steam locomotives are no longer the normal source of power for Indian Railways. A small number are preserved for heritage operation, special excursions, museums, or ceremonial use. They are valuable because they demonstrate an earlier stage of railway technology.

The main advantages of steam locomotives were their ability to operate without external electrical infrastructure and their relatively simple fuel supply arrangements in the early railway era. Their disadvantages included heavy maintenance, low thermal efficiency, smoke, the need for frequent water and fuel stops, and the labor required to operate them. 

=== Diesel Locomotives ===
Diesel locomotives use a diesel engine as their prime mover. In most large Indian diesel locomotives, the diesel engine drives an electric generator or alternator. The electricity then powers traction motors mounted on the locomotive’s axles. This arrangement is known as diesel-electric transmission.
[[File:ERS WDP-4D Locomotive..jpg|thumb|266x266px|'''Credit: Kishlay RF.''' This is a WDP-4D (W for broad gauge, D for diesel power and P for passenger traffic) locomotive in Kochi. ]]
A diesel-electric locomotive is not usually driven mechanically like a road vehicle. The diesel engine produces electrical power, while traction motors provide the turning force at the wheels. This allows the locomotive to produce high tractive effort and to control wheel rotation effectively.

Diesel locomotives were introduced widely because they required less routine servicing than steam locomotives and could operate on routes without electric overhead equipment. They were especially useful during the transition from steam to electric traction.

Diesel locomotives have been progressively replaced on many main lines by electric locomotives. They remain useful on non-electrified routes, in yards, for shunting, during maintenance work, and in situations where independent power is required.

Indian diesel locomotive families have included passenger, freight, mixed-traffic, shunting, and dual-mode types. Examples of familiar Indian classifications include WDM locomotives for broad-gauge diesel mixed traffic, WDP locomotives for passenger service, WDG locomotives for freight service, and WDS locomotives for shunting. 

=== Electric Locomotives ===
Electric locomotives receive electrical energy from an external supply system. On most electrified broad-gauge routes in India, electricity is supplied through overhead equipment. A pantograph on the locomotive touches the overhead wire and transfers electricity to the locomotive’s traction system.
[[File:Indian Railways WAP-4 class electric locomotive..JPG|thumb|292x292px|'''Credit: Indian Railways.''' This is a very popular image of a WAP-4 (W for broad gauge, A for AC current and P for passenger traffic) locomotive with ICF Blue.  ]]
The locomotive converts the incoming electrical energy into mechanical power through traction motors. Modern electric locomotives use power electronics, transformers, converters, control systems, and regenerative or dynamic braking equipment.

Electric locomotives have several important advantages. They can provide high power, strong acceleration, and high tractive effort. They do not carry fuel tanks or large diesel engines, and they produce no exhaust emissions at the point of use. Electric traction is particularly suitable for heavily used routes and long freight trains.

Electric traction also requires substantial fixed infrastructure. The railway must provide overhead equipment, substations, switching systems, protection systems, maintenance facilities, and reliable electricity. Electric locomotives cannot normally operate independently on a route without compatible electrical equipment.

Indian electric locomotives include passenger, freight, mixed-traffic, and shunting types. Common classifications include WAP for broad-gauge electric passenger locomotives, WAG for broad-gauge electric goods locomotives, and WAM for electric mixed-traffic locomotives. 

=== Alternative-Powered Locomotives ===
Battery-powered railway vehicles store electrical energy in onboard batteries. They may be used for inspection, shunting, maintenance, station service, or other limited duties. Their use depends on battery capacity, charging facilities, vehicle weight, operating range, and local requirements.
[[File:WDAP-5.jpg|thumb|267x267px|'''''Credit: Suvadeep Saha56.''''' This is a WDAP-5 locomotive (W for broad gauge, D for diesel locomotive, A for AC Current and P for passenger traffic). It is the only dual-mode locomotive in India. ]]
Hybrid and dual-mode vehicles can use more than one source of power. A dual-mode locomotive may use electric power under overhead wires and diesel power where electrification is unavailable. Such vehicles can reduce the need to change locomotives at the boundary between electrified and non-electrified routes.

Alternative-power railway technology may also include fuel-cell, hydrogen, or other low-emission systems in experimental or limited applications. The suitability of each technology depends on energy supply, infrastructure, cost, maintenance, and safety. 

== Passenger Coaches ==
A passenger coach is a railway vehicle designed to carry people. It may provide seats, sleeping berths, toilets, luggage space, heating, cooling, lighting, electrical outlets, food-service facilities, or accessibility features.

Passenger coaches are built in different forms. Some are intended for short suburban journeys, while others are designed for overnight travel. Some provide air-conditioned accommodation, while others have open windows and simpler interiors.

A coach may be self-generating or end-on-generating. In a self-generating coach, an alternator and axle-driven equipment produce electrical power as the coach moves. In an end-on-generation system, one or more power cars supply electricity to the entire rake through an electrical train line.

Passenger coaches may be connected by vestibules. A vestibule is an enclosed passage between coaches that allows passengers and staff to move safely from one coach to another while the train is in motion. 

=== ICF Coaches ===
ICF coaches were developed around the integral-coach design associated with the Integral Coach Factory. They became one of the most widely used passenger-coach designs in India.

An ICF coach generally has a conventional body and bogie arrangement. It may use coil springs, air brakes, and other systems depending on its construction and later modifications.
[[File:WDP-4 passing through Kodigehalli Halt in 2019 with Pink Flowers.jpg|thumb|310x310px|'''''Credit: ActStuffOGWiki.''''' These are ICF Uthkrisht coaches powered by a WDP-4 locomotive. ]]
ICF coaches have been produced in many forms, including general coaches, sleeper coaches, air-conditioned coaches, chair cars, pantry cars, luggage vans, generator cars, and special-purpose vehicles.

The ICF design served Indian Railways for a long period because it could be manufactured and maintained in large numbers. Many coaches received upgrades during their service lives, including improved braking, suspension, lighting, toilets, electrical systems, and interiors. 

=== LHB Coaches ===
LHB means Linke Hofmann Busch, the name associated with the coach design developed in Germany and later produced for Indian Railways. LHB coaches use a different design from older ICF coaches. LHB coaches generally have stainless-steel bodies, FIAT-type bogies, disc brakes, improved suspension, and centre-buffer couplers. Their design provides improved crashworthiness and ride characteristics compared with older coach designs. 
[[File:Sangam Express with LHB coaches.jpg|thumb|253x253px|'''Credit: Ravi Dwivedi.''' LHB coaches of Sangam Express at some railway station. ]]
LHB coaches are available in several passenger configurations. These include air-conditioned first class, air-conditioned two-tier sleeper, air-conditioned three-tier sleeper, air-conditioned chair car, executive chair car, non-air-conditioned chair car, sleeper, general seating, pantry, power, luggage, and brake-van variants. 

The exact capacity of a coach depends on its layout, seat or berth design, toilet arrangement, accessibility provisions, and production version. For example, commonly cited LHB configurations include approximately 52 berths for some air-conditioned two-tier coaches, 72 berths for some air-conditioned three-tier coaches, 78 seats for some chair cars, and 56 seats for some executive chair cars. These figures can vary by design and refurbishment. 

LHB coaches are often associated with higher-speed passenger services, but the actual permitted speed of a train depends on the coach type, locomotive, track, signalling, route conditions, maintenance status, and operating rules. 

== Freight Wagons ==
A freight wagon is a railway vehicle used to carry goods. Wagons are designed according to the physical properties, weight, volume, loading method, unloading method, and safety requirements of their cargo.

A wagon must support its load, withstand pulling and braking forces, remain stable on curves, and operate safely at the permitted speed. It must also be compatible with loading terminals and unloading equipment.

Freight wagons may be open, covered, tank-type, flat, hopper-type, container-carrying, automobile-carrying, or specially designed for a particular commodity.

Indian Railways uses many wagon types because the country transports a wide range of bulk and manufactured goods. The wagon fleet has changed over time as freight patterns, axle loads, loading technology, and logistics systems have developed. 

=== Open and Covered Wagons ===
''See also: [[wikipedia:Open_wagon|Open wagon]]'' 

Open wagons have no permanent roof. They are suitable for goods that are not easily damaged by weather or can be protected by tarpaulins.
[[File:28126 WAG-7 loco with empty freight rakes at Simhachalam 02.jpg|thumb|'''''Credit: Adityamadhav83.''''' Two open wagon goods trains (both coal trains) and one is pulled by a WAG-7. ]]
They are widely used for bulk materials such as coal, minerals, stone, scrap, and other commodities. Some open wagons have doors, bottom discharge equipment, or special side arrangements. Open wagons can be loaded by conveyor, shovel, loader, hopper, or other mechanical systems. Their unloading method depends on the design and the receiving facility. Open wagons are also one of the most common freight wagons used in Indian Railways. They are mostly coal trains but other freight trains such as wood, paper, scrap and metal trains. 

Covered wagons have a roof and enclosed sides. They protect goods from rain, dust, sunlight, and some forms of contamination. 

They are suitable for food grains, bagged cement, fertilizers, manufactured goods, paper, packaged products, and other materials requiring protection. Covered wagons may have sliding doors, roller doors, end doors, or special loading openings. Their internal fittings may be adapted to prevent movement or damage to the cargo. Covered wagons are also one of the most common types of freight wagons found in India along with open wagons. 

=== Hopper and Tank Wagons ===
Hopper wagons have sloping internal surfaces and discharge openings. They are designed to release bulk materials through gravity.

Coal, ballast, ore, grain, and other materials can be handled efficiently using hopper wagons. Discharge may occur through bottom doors, side doors, or controlled outlet systems. The receiving terminal must have suitable tracks, pits, conveyors, hoppers, or unloading equipment. Hopper wagon design and terminal design therefore work together. 

Tank wagons carry liquids, gases, powders, or other materials in a tank mounted on a railway underframe.

Different tank wagons are designed for petroleum products, chemicals, water, liquefied gases, edible oils, and other substances. The tank material, pressure rating, valves, insulation, safety fittings, and labelling depend on the cargo. Tank wagon operations require strict attention to loading limits, pressure, leakage prevention, earthing, fire protection, brake equipment, and emergency procedures. Tank wagons are the third most common freight wagons in Indian Railways as they can carry milk, oil and water. 

== Multiple Unit Trains ==
A multiple-unit train is formed from several connected vehicles that operate together. Traction equipment is placed in one or more vehicles, and the train is controlled from a driving cab.

Multiple-unit operation allows the driver to control all powered vehicles from one cab. This is useful for frequent-stop services because the train can accelerate quickly and does not need a separate locomotive at each end.

Indian Railways operates electric multiple units, mainline electric multiple units, diesel multiple units, and trainsets. Their designs differ in power source, interior arrangement, speed, range, and operating environment. 

=== Electric Multiple Units (EMU) and Mainline Electric Multiple Units (MEMU) ===
An electric multiple unit receives power from an external electrical system and distributes traction equipment among several cars. EMU trains are widely used in suburban and regional services. They typically have many doors, high standing capacity, rapid boarding and alighting, and strong acceleration.

An EMU formation may contain motor coaches, trailer coaches, driving coaches, or combinations of these. The exact formation depends on the electrical system and train design. EMU braking may combine air brakes with electrical braking. Regenerative braking can return energy to the electrical system when conditions permit. 
[[File:Delhi emu and memu.JPG|thumb|267x267px|'''''Credit: WillaMissionary.''''' To the left, (the green and yellow one), we have a MEMU from Delhi's suburban rail. To the right, (the red, blue and yellow one), we have an intercity EMU from Delhi. ]]
A mainline electric multiple units is designed for longer-distance regional or intercity operation than a conventional suburban EMU. It may provide more seating, fewer doors, greater luggage capacity, toilets, air conditioning, or improved ride quality. 

Some mainline units are built as self-propelled passenger trains with driving cabs at both ends. The term MEMU is commonly used for mainline electric multiple units. MEMU services are useful on electrified routes where passengers require frequent regional connections without a locomotive-hauled formation. 

Many people however cannot differentiate between a MEMU (Mainline Electric Multiple Unit) and an EMU (Electric Multiple Unit). One difference is that EMUs are used in the rest of the world too, while MEMUs are an Indian Railways exclusive. 

=== Diesel Multiple Units (DMU) and Diesel Electric Multiple Units (DEMU) ===
A diesel multiple unit uses diesel engines distributed among one or more coaches. It does not require overhead electrical equipment. DMUs are suitable for non-electrified routes and regional passenger services. 
[[File:SC - MOB DEMU (23517623235).jpg|thumb|267x267px|'''''Credit: Belur Ashok.''''' A 9-year-old DEMU (Diesel Electric Multiple Unit) from Secunderabad to Manoharabad. ]]
Diesel Multiple Units may have driving cabs, passenger coaches, power cars, and trailer cars in different combinations. DMUs can provide rapid acceleration and efficient service on lightly or moderately used routes. Their disadvantages include fuel consumption, exhaust emissions, engine noise, and the need for diesel maintenance facilities. 

A diesel electric multiple unit is a type of diesel multiple-unit train in which diesel engines generate electricity, and electric traction motors use that electricity to turn the wheels. It is therefore a specific type of DMU, not a completely separate category. Indian Railways describes DEMUs as self-propelled formations containing driving power cars and trailer cars. 

The diesel engine in a DEMU does not usually drive the wheels directly like DMUs. Instead, it drives an alternator or generator. The generator produces electrical energy, which passes through control equipment and traction converters to electric motors connected to the wheelsets. 

== Future ==
The future of Indian railway rolling stock is likely to involve greater electrification, more trainsets, improved passenger information systems, more energy-efficient equipment, better accessibility, stronger crashworthiness, and increased use of digital diagnostics.

Freight wagons may become more specialised and may support higher axle loads, faster freight services, containerisation, automobile transport, and automated handling systems.

Locomotives may receive improved traction converters, regenerative braking, remote diagnostics, energy monitoring. Maybe hybrid or dual-mode locomotives will become more popular.

Maintenance is also becoming more data driven. Sensors and software can identify wheel defects, bearing temperature, vibration, brake conditions, electrical faults, and other problems before they lead to service failures.  

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==Welcome!==
Welcome, TechVindicator!
{| style=&quot;background:white; border:1px solid #abd5f5;; padding:0px; border-spacing:0px; color: #000000;&quot;
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* Wikibooks is a collection of open-source textbooks. Find out [[WB:WIW|what this means]].
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* Learn how to [[Using Wikibooks|use Wikibooks]] and learn more about the community.
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If you have any questions, you can ask in the [[Wikibooks:Reading room/Assistance|assistance reading room]] or possibly contact me personally.
[[User:TechVindicator|TechVindicator]] ([[User talk:TechVindicator|discuss]] • [[Special:Contributions/TechVindicator|contribs]]) 10:22, 19 September 2026 (UTC)</text>
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      <text bytes="935" sha1="6pmiebc7pjlnnct8261rie4v3gs8ifh" xml:space="preserve">'''Indian Railways''' is the national railway system of India and one of the largest railway networks in the world. It operates under the administrative control of the Ministry of Railways, Government of India, and is responsible for the country’s rail transport infrastructure, rolling stock, and operations. Since the first passenger train ran in 1853, Indian Railways has grown into a vast, complex system that connects urban centers, industrial hubs, and remote regions, serving as a critical artery for India’s economy, mobility, and social integration. 

== Table of Contents ==

* [[Indian Railways/Overview|Overview]]
* [[Indian Railways/History|History]]
* [[Indian Railways/Zonal Railways|Zonal Railways]]
* [[Indian Railways/Rolling Stock|Rolling Stock]]
* [[Indian Railways/Railway Infrastructure|Railway Infrastructure]]
* [[Indian Railways/Railfanning|Railfanning]]

====== Hope you enjoy reading! ======

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      <text bytes="1003" sha1="o5yhru1xrccbkjblprp8zdhghu3eepu" xml:space="preserve">'''Indian Railways''' is the national railway system of India and one of the largest railway networks in the world. It operates under the administrative control of the Ministry of Railways, Government of India, and is responsible for the country’s rail transport infrastructure, rolling stock, and operations. Since the first passenger train ran in 1853, Indian Railways has grown into a vast, complex system that connects urban centers, industrial hubs, and remote regions, serving as a critical artery for India’s economy, mobility, and social integration. 

== Table of Contents ==

* [[Indian Railways/Overview|Overview]]
* [[Indian Railways/History|History]]
* [[Indian Railways/Zonal Railways|Zonal Railways]]
* [[Indian Railways/Rolling Stock|Rolling Stock]]
* [[Indian Railways/Railway Infrastructure|Railway Infrastructure]] 
* [[Indian Railways/List of Rolling Stock|List of Rolling Stock]]
* [[Indian Railways/Railfanning|Railfanning]] 

====== Hope you enjoy reading! ======

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      <text bytes="1054" sha1="e2tm5kezdgm84omcouqjdr59o6cwzed" xml:space="preserve">'''Indian Railways''' ''is the national railway system of India and one of the largest railway networks in the world. It operates under the administrative control of the Ministry of Railways, Government of India, and is responsible for the country’s rail transport infrastructure, rolling stock, and operations''. Since the first passenger train ran in 1853, Indian Railways has grown into a vast, complex system that connects urban centers, industrial hubs, and remote regions, serving as a critical artery for India’s economy, mobility, and social integration. 

== Table of Contents ==

* [[Indian Railways/Overview|Overview]]
* [[Indian Railways/History|History]]
* [[Indian Railways/Zonal Railways|Zonal Railways]]
* [[Indian Railways/Rolling Stock|Rolling Stock]]
* [[Indian Railways/Railway Infrastructure|Railway Infrastructure]] 
* [[Indian Railways/Communications|Communications]]
* [[Indian Railways/Railfanning|Railfanning]] 
* [[Indian Railways/Digital Technology|Digital Technology]] 

====== Hope you enjoy reading! ======

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      <text bytes="1475" sha1="jed2qmhgg2ze34ijd6f74at6kqpmxgo" xml:space="preserve">'''Indian Railways''' ''is the national railway system of India and one of the largest railway networks in the world. It operates under the administrative control of the Ministry of Railways, Government of India, and is responsible for the country’s rail transport infrastructure, rolling stock, and operations''. Since the first passenger train ran in 1853, Indian Railways has grown into a vast, complex system that connects urban centers, industrial hubs, and remote regions, serving as a main artery for India’s economy, mobility, and social integration.  

== Table of Contents ==

* [[Indian Railways/Overview|Overview]]
* [[Indian Railways/History|History]]
* [[Indian Railways/Zonal Railways|Zonal Railways]]
* [[Indian Railways/Rolling Stock|Rolling Stock]]
* [[Indian Railways/Railway Infrastructure|Railway Infrastructure]] 
* [[Indian Railways/Communications|Communications]]
* [[Indian Railways/Railfanning|Railfanning]] 
* [[Indian Railways/Digital Technology|Digital Technology]] 

====== Hope you enjoy reading! ======

== About the Book ==

* The book was made by [[User:ActStuffOGWiki|ActStuffOGWiki]]. 
* The book was made because Indian Railway books were not common and topics about [[Shelf:India|India]] barely exist in [[Wikibooks]]. 
* The book is just a hobby and ActStuffOGWiki's first book. '''Don't take anything in the book too seriously'''. 
* You can use this book for citations in [[Wikipedia]] and other self-published books. 
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      <text bytes="1548" sha1="1gg2t5j8e0ug565cr56bwy65lb75kc0" xml:space="preserve">'''Indian Railways''' ''is the national railway system of India and one of the largest railway networks in the world. It operates under the administrative control of the Ministry of Railways, Government of India, and is responsible for the country’s rail transport infrastructure, rolling stock, and operations''. Since the first passenger train ran in 1853, Indian Railways has grown into a vast, complex system that connects urban centers, industrial hubs, and remote regions, serving as a main artery for India’s economy, mobility, and social integration.  

== Table of Contents ==

* [[Indian Railways/Overview|Overview]]
* [[Indian Railways/History|History]]
* [[Indian Railways/Zonal Railways|Zonal Railways]]
* [[Indian Railways/Rolling Stock|Rolling Stock]]
* [[Indian Railways/Railway Infrastructure|Railway Infrastructure]] 
* [[Indian Railways/Communications|Communications]]
* [[Indian Railways/Railfanning|Railfanning]] 
* [[Indian Railways/Digital Technology|Digital Technology]] 
* [[Indian Railways/Trains and Manufacturers|Trains and Manufacturers]] 

====== Hope you enjoy reading! ======

== About the Book ==

* The book was made by [[User:ActStuffOGWiki|ActStuffOGWiki]]. 
* The book was made because Indian Railway books were not common and topics about [[Shelf:India|India]] barely exist in [[Wikibooks]]. 
* The book is just a hobby and ActStuffOGWiki's first book. '''Don't take anything in the book too seriously'''. 
* You can use this book for citations in [[Wikipedia]] and other self-published books. 
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      <text bytes="1172" sha1="0rr48kkpa1q6m8ehbhlxp7g392jmuo3" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Railway Network of India ==</text>
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      <text bytes="2948" sha1="laq0w4tbmr0v0oh9wjacya801z2o0kd" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimetres between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport. 

India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometres or track kilometres. Route kilometres measure the length of the railway route itself. Track kilometres measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometres as route kilometres, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards.</text>
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      <text bytes="5427" sha1="iadvoitsd8s8um3g84c1kmqu1zkcu0v" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''Credit: Dr. Chinchu C.''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects.</text>
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      <text bytes="6333" sha1="9qqpfalncir9zokiqb0ytrjgptdrjpu" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''Credit: Dr. Chinchu C.''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects. 

=== Points and Crossings ===
Points and crossings allow trains to move from one track to another. A point, or turnout, contains movable rails that guide the train toward a selected route. The crossing portion allows wheel flanges to pass through the intersection of two rails. A set of points may be operated manually, mechanically, electrically, or hydraulically. In modern installations, point machines are usually controlled from a signalling system or an electronic interlocking.

A crossover connects two parallel tracks. It allows a train to change from one line to another. Crossovers are found at stations, yards, junctions, terminal approaches, and locations where trains may need to be diverted. Points are sensitive parts of the track because they contain moving components and discontinuities in the rail path. They require regular inspection, lubrication, adjustment, cleaning, and testing.</text>
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      <text bytes="7823" sha1="ojv2uvlsoigos79dcgw1rjsr6dsl26t" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''Credit: Dr. Chinchu C.''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects. 

=== Points and Crossings ===
Points and crossings allow trains to move from one track to another. A point, or turnout, contains movable rails that guide the train toward a selected route. The crossing portion allows wheel flanges to pass through the intersection of two rails. A set of points may be operated manually, mechanically, electrically, or hydraulically. In modern installations, point machines are usually controlled from a signalling system or an electronic interlocking.

A crossover connects two parallel tracks. It allows a train to change from one line to another. Crossovers are found at stations, yards, junctions, terminal approaches, and locations where trains may need to be diverted. Points are sensitive parts of the track because they contain moving components and discontinuities in the rail path. They require regular inspection, lubrication, adjustment, cleaning, and testing. 

=== Railway Station ===
A railway station is a place where trains stop for passenger service, loading, unloading, crew changes, train regulation, or operational purposes. Some stations are small halts, while others are large complexes with many platforms, yards, offices, and passenger facilities.
[[File:Dhariwal Railway Station, Punjab, India IMG20260705172241 06.jpg|thumb|330x330px|'''Credit: Rohitjahnavi.''' This is Dhariwal Railway Station in Punjab. Two trains are passing by each other. ]]
A station usually contains platforms, tracks, a station building, ticketing facilities, passenger circulation areas, signalling equipment, public information systems, lighting, water supply, sanitation, and security arrangements. The size of a station depends on the number of trains, passenger demand, local geography, train lengths, interchange requirements, and the role of the station in the railway network.

Stations may be classified informally as terminal stations, through stations, junction stations, suburban stations, halt stations, or interchange stations. A terminal station is located at the end of a route or operating section. A through station lies on a route where trains can continue in both directions. A junction station connects two or more routes. A station may also handle freight operations. In that case, it may have goods sheds, loading platforms, sidings, weighbridges, cranes, warehouses, road-access facilities and others. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="10155" sha1="cfz8r8nzxfk74mtreuddjmm5z9ff9f7" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''''Credit: Dr. Chinchu C.''''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects. 

=== Points and Crossings ===
Points and crossings allow trains to move from one track to another. A point, or turnout, contains movable rails that guide the train toward a selected route. The crossing portion allows wheel flanges to pass through the intersection of two rails. A set of points may be operated manually, mechanically, electrically, or hydraulically. In modern installations, point machines are usually controlled from a signalling system or an electronic interlocking.

A crossover connects two parallel tracks. It allows a train to change from one line to another. Crossovers are found at stations, yards, junctions, terminal approaches, and locations where trains may need to be diverted. Points are sensitive parts of the track because they contain moving components and discontinuities in the rail path. They require regular inspection, lubrication, adjustment, cleaning, and testing. 

=== Railway Station ===
A railway station is a place where trains stop for passenger service, loading, unloading, crew changes, train regulation, or operational purposes. Some stations are small halts, while others are large complexes with many platforms, yards, offices, and passenger facilities.
[[File:Dhariwal Railway Station, Punjab, India IMG20260705172241 06.jpg|thumb|330x330px|'''''Credit: Rohitjahnavi.''''' This is Dhariwal Railway Station in Punjab. Two trains are passing by each other. ]]
A station usually contains platforms, tracks, a station building, ticketing facilities, passenger circulation areas, signalling equipment, public information systems, lighting, water supply, sanitation, and security arrangements. The size of a station depends on the number of trains, passenger demand, local geography, train lengths, interchange requirements, and the role of the station in the railway network.

Stations may be classified informally as terminal stations, through stations, junction stations, suburban stations, halt stations, or interchange stations. A terminal station is located at the end of a route or operating section. A through station lies on a route where trains can continue in both directions. A junction station connects two or more routes. A station may also handle freight operations. In that case, it may have goods sheds, loading platforms, sidings, weighbridges, cranes, warehouses, road-access facilities and others.  

=== Station Platform and Building ===
A platform provides a safe raised area from which passengers board and leave trains. Platforms may be located beside a track or between two tracks. A side platform serves trains on one side. An island platform is located between tracks and may serve trains on both sides. Stations can have several platforms connected by foot overbridges, subways, concourses, or accessible ramps. Platform height is selected to suit the trains that use the station.

Platform edges usually contain tactile or visual warning features and may have markings that indicate a safe distance from the edge. Platforms require drainage, lighting, shelter, seating, signage, public-address systems, drinking water, waste bins, and sanitation facilities. At busy stations, crowd movement must be managed so that passengers do not gather dangerously near the edge. Longer platforms may be needed for longer trains. Platform extension projects often require changes to signalling, station buildings, footbridges, lighting, drainage, and approach roads. 
[[File:Chhatrapati Shivaji Terminus (Victoria Terminus).jpg|thumb|309x309px|'''''Credit: Joe Ravi.''''' This is CSMT (Chhatrapati Shivaji Maharaj Terminal) in Mumbai. It has one the best station buildings and architecture in India.  ]]
The station building contains facilities for passengers and railway staff. It may include ticket counters, reservation offices, waiting halls, enquiry offices, toilets, refreshment areas, retiring rooms, cloakrooms, offices, and electrical rooms. Older station buildings may reflect local architectural traditions or colonial-era design. Newer buildings may use standardized designs, prefabricated components, modern materials, and energy-efficient systems.

The station building must connect conveniently with platforms and external transport. A well-planned station provides clear paths between roads, parking areas, bus stops, autorickshaw stands, pedestrian entrances, ticketing areas, and platforms. Stations may be upgraded with lifts, escalators, ramps, improved lighting, better signage, digital displays, wider concourses, and more accessible toilets. The Annual Report and Accounts for 2023–24 recorded the provision of passenger lifts, escalators, water coolers, and other station improvements during the year
[[Category:Book:Indian Railways]]</text>
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      <text bytes="12247" sha1="p9a82w5ms7lhkje94odtud0yzdev1fi" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''''Credit: Dr. Chinchu C.''''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects. 

=== Points and Crossings ===
Points and crossings allow trains to move from one track to another. A point, or turnout, contains movable rails that guide the train toward a selected route. The crossing portion allows wheel flanges to pass through the intersection of two rails. A set of points may be operated manually, mechanically, electrically, or hydraulically. In modern installations, point machines are usually controlled from a signalling system or an electronic interlocking.

A crossover connects two parallel tracks. It allows a train to change from one line to another. Crossovers are found at stations, yards, junctions, terminal approaches, and locations where trains may need to be diverted. Points are sensitive parts of the track because they contain moving components and discontinuities in the rail path. They require regular inspection, lubrication, adjustment, cleaning, and testing. 

=== Railway Station ===
A railway station is a place where trains stop for passenger service, loading, unloading, crew changes, train regulation, or operational purposes. Some stations are small halts, while others are large complexes with many platforms, yards, offices, and passenger facilities.
[[File:Dhariwal Railway Station, Punjab, India IMG20260705172241 06.jpg|thumb|330x330px|'''''Credit: Rohitjahnavi.''''' This is Dhariwal Railway Station in Punjab. Two trains are passing by each other. ]]
A station usually contains platforms, tracks, a station building, ticketing facilities, passenger circulation areas, signalling equipment, public information systems, lighting, water supply, sanitation, and security arrangements. The size of a station depends on the number of trains, passenger demand, local geography, train lengths, interchange requirements, and the role of the station in the railway network.

Stations may be classified informally as terminal stations, through stations, junction stations, suburban stations, halt stations, or interchange stations. A terminal station is located at the end of a route or operating section. A through station lies on a route where trains can continue in both directions. A junction station connects two or more routes. A station may also handle freight operations. In that case, it may have goods sheds, loading platforms, sidings, weighbridges, cranes, warehouses, road-access facilities and others.  

=== Station Platform and Building ===
A platform provides a safe raised area from which passengers board and leave trains. Platforms may be located beside a track or between two tracks. A side platform serves trains on one side. An island platform is located between tracks and may serve trains on both sides. Stations can have several platforms connected by foot overbridges, subways, concourses, or accessible ramps. Platform height is selected to suit the trains that use the station.

Platform edges usually contain tactile or visual warning features and may have markings that indicate a safe distance from the edge. Platforms require drainage, lighting, shelter, seating, signage, public-address systems, drinking water, waste bins, and sanitation facilities. At busy stations, crowd movement must be managed so that passengers do not gather dangerously near the edge. Longer platforms may be needed for longer trains. Platform extension projects often require changes to signalling, station buildings, footbridges, lighting, drainage, and approach roads. 
[[File:Chhatrapati Shivaji Terminus (Victoria Terminus).jpg|thumb|309x309px|'''''Credit: Joe Ravi.''''' This is CSMT (Chhatrapati Shivaji Maharaj Terminal) in Mumbai. It has one the best station buildings and architecture in India.  ]]
The station building contains facilities for passengers and railway staff. It may include ticket counters, reservation offices, waiting halls, enquiry offices, toilets, refreshment areas, retiring rooms, cloakrooms, offices, and electrical rooms. Older station buildings may reflect local architectural traditions or colonial-era design. Newer buildings may use standardized designs, prefabricated components, modern materials, and energy-efficient systems.

The station building must connect conveniently with platforms and external transport. A well-planned station provides clear paths between roads, parking areas, bus stops, autorickshaw stands, pedestrian entrances, ticketing areas, and platforms. Stations may be upgraded with lifts, escalators, ramps, improved lighting, better signage, digital displays, wider concourses, and more accessible toilets. The Annual Report and Accounts for 2023–24 recorded the provision of passenger lifts, escalators, water coolers, and other station improvements during the year. 

=== Signalling ===
Signalling is the system used to control train movements. It includes signals, interlocking, track circuits, axle counters, point machines, block instruments, communication systems, and operating rules. A railway block is a section of track in which train movements are controlled. The basic principle is that trains are separated so that one train does not enter an occupied section without proper authority.

Track circuits detect whether a section of track is occupied by a train. They work by using the rails as part of an electrical circuit. When train wheels and axles connect the rails, the system detects occupation. Axle counters detect the number of axles entering and leaving a section. If the numbers match, the system may determine that the section is clear, subject to the rules and equipment design.

Signals communicate instructions to train drivers. Color-light signals are widely used. A signal aspect may tell the driver to stop, proceed, proceed with caution, or follow a speed restriction, depending on the signalling system. Automatic block signalling divides a route into multiple sections and allows following trains to move more closely while maintaining safety. The capacity benefit depends on train length, braking distance, signalling design, speed, and operating conditions. 

Station signalling controls train movements through platforms, points, loops, and junctions. It prevents conflicting movements and helps trains enter or leave a station safely. An interlocking system ensures that signals and points work in a safe sequence. A route cannot normally be cleared for a train if a conflicting route is already set.

Interlocking may be mechanical, electro-mechanical, relay-based, electronic, or computer-based. Modern electronic interlocking systems can control many routes and provide detailed status information to operators. Station control may be handled from a signal cabin, a panel room, an electronic interlocking room, or a centralized control centre. The exact arrangement varies with the size and complexity of the station. 
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      <text bytes="15088" sha1="ryh7cbhxkfi30nqy7984w3rczey97sk" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''''Credit: Dr. Chinchu C.''''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects. 

=== Points and Crossings ===
Points and crossings allow trains to move from one track to another. A point, or turnout, contains movable rails that guide the train toward a selected route. The crossing portion allows wheel flanges to pass through the intersection of two rails. A set of points may be operated manually, mechanically, electrically, or hydraulically. In modern installations, point machines are usually controlled from a signalling system or an electronic interlocking.

A crossover connects two parallel tracks. It allows a train to change from one line to another. Crossovers are found at stations, yards, junctions, terminal approaches, and locations where trains may need to be diverted. Points are sensitive parts of the track because they contain moving components and discontinuities in the rail path. They require regular inspection, lubrication, adjustment, cleaning, and testing. 

=== Railway Station ===
A railway station is a place where trains stop for passenger service, loading, unloading, crew changes, train regulation, or operational purposes. Some stations are small halts, while others are large complexes with many platforms, yards, offices, and passenger facilities.
[[File:Dhariwal Railway Station, Punjab, India IMG20260705172241 06.jpg|thumb|330x330px|'''''Credit: Rohitjahnavi.''''' This is Dhariwal Railway Station in Punjab. Two trains are passing by each other. ]]
A station usually contains platforms, tracks, a station building, ticketing facilities, passenger circulation areas, signalling equipment, public information systems, lighting, water supply, sanitation, and security arrangements. The size of a station depends on the number of trains, passenger demand, local geography, train lengths, interchange requirements, and the role of the station in the railway network.

Stations may be classified informally as terminal stations, through stations, junction stations, suburban stations, halt stations, or interchange stations. A terminal station is located at the end of a route or operating section. A through station lies on a route where trains can continue in both directions. A junction station connects two or more routes. A station may also handle freight operations. In that case, it may have goods sheds, loading platforms, sidings, weighbridges, cranes, warehouses, road-access facilities and others.  

=== Station Platform and Building ===
A platform provides a safe raised area from which passengers board and leave trains. Platforms may be located beside a track or between two tracks. A side platform serves trains on one side. An island platform is located between tracks and may serve trains on both sides. Stations can have several platforms connected by foot overbridges, subways, concourses, or accessible ramps. Platform height is selected to suit the trains that use the station.

Platform edges usually contain tactile or visual warning features and may have markings that indicate a safe distance from the edge. Platforms require drainage, lighting, shelter, seating, signage, public-address systems, drinking water, waste bins, and sanitation facilities. At busy stations, crowd movement must be managed so that passengers do not gather dangerously near the edge. Longer platforms may be needed for longer trains. Platform extension projects often require changes to signalling, station buildings, footbridges, lighting, drainage, and approach roads. 
[[File:Chhatrapati Shivaji Terminus (Victoria Terminus).jpg|thumb|309x309px|'''''Credit: Joe Ravi.''''' This is CSMT (Chhatrapati Shivaji Maharaj Terminal) in Mumbai. It has one the best station buildings and architecture in India.  ]]
The station building contains facilities for passengers and railway staff. It may include ticket counters, reservation offices, waiting halls, enquiry offices, toilets, refreshment areas, retiring rooms, cloakrooms, offices, and electrical rooms. Older station buildings may reflect local architectural traditions or colonial-era design. Newer buildings may use standardized designs, prefabricated components, modern materials, and energy-efficient systems.

The station building must connect conveniently with platforms and external transport. A well-planned station provides clear paths between roads, parking areas, bus stops, autorickshaw stands, pedestrian entrances, ticketing areas, and platforms. Stations may be upgraded with lifts, escalators, ramps, improved lighting, better signage, digital displays, wider concourses, and more accessible toilets. The Annual Report and Accounts for 2023–24 recorded the provision of passenger lifts, escalators, water coolers, and other station improvements during the year. 

=== Signalling ===
Signalling is the system used to control train movements. It includes signals, interlocking, track circuits, axle counters, point machines, block instruments, communication systems, and operating rules. A railway block is a section of track in which train movements are controlled. The basic principle is that trains are separated so that one train does not enter an occupied section without proper authority.

Track circuits detect whether a section of track is occupied by a train. They work by using the rails as part of an electrical circuit. When train wheels and axles connect the rails, the system detects occupation. Axle counters detect the number of axles entering and leaving a section. If the numbers match, the system may determine that the section is clear, subject to the rules and equipment design.

Signals communicate instructions to train drivers. Color-light signals are widely used. A signal aspect may tell the driver to stop, proceed, proceed with caution, or follow a speed restriction, depending on the signalling system. Automatic block signalling divides a route into multiple sections and allows following trains to move more closely while maintaining safety. The capacity benefit depends on train length, braking distance, signalling design, speed, and operating conditions. 

Station signalling controls train movements through platforms, points, loops, and junctions. It prevents conflicting movements and helps trains enter or leave a station safely. An interlocking system ensures that signals and points work in a safe sequence. A route cannot normally be cleared for a train if a conflicting route is already set.

Interlocking may be mechanical, electro-mechanical, relay-based, electronic, or computer-based. Modern electronic interlocking systems can control many routes and provide detailed status information to operators. Station control may be handled from a signal cabin, a panel room, an electronic interlocking room, or a centralized control centre. The exact arrangement varies with the size and complexity of the station.  

== Railway Yards ==
A railway yard is an arrangement of tracks used to receive, sort, store, inspect, assemble, divide, or dispatch trains and vehicles. Yards are essential because trains cannot always operate directly from one route to another without being rearranged.

A yard may contain arrival lines, departure lines, reception lines, classification lines, engine lines, carriage sidings, wagon repair lines, washing lines, and stabling lines. An arrival line receives a train entering the yard. A departure line holds a train after preparation and before it enters the main route. A stabling line temporarily stores coaches, wagons, locomotives, or maintenance vehicles.

A classification yard sorts freight wagons according to destination, train formation, commodity, or operating plan. Wagons may be moved between tracks using locomotives, shunting engines, gravity, or specialized yard systems. Yards occupy large areas of land and contain many points and crossings. Their signalling and interlocking systems are often more complex than those of ordinary stations. 

=== Freight Yards ===
Freight wagon yards handle goods trains and individual wagons. They may receive wagons from mines, factories, ports, warehouses, container terminals, or other railway yards.

Freight operations include loading, unloading, weighing, inspection, documentation, shunting, brake testing, and train formation. A freight yard may specialize in coal, cement, food grains, petroleum products, containers, automobiles, fertilizers, steel, or general merchandise. The infrastructure depends on the commodity.

Bulk goods often require conveyors, hoppers, loading gantries, pipelines, silos, cranes, or dumpers. Container yards require gantry cranes, reach stackers, paved storage areas, customs facilities where applicable, and road connections. Freight yards need good road access because goods usually move between the railway and trucks. They also require dust control, drainage, lighting, fire protection, and environmental management.

=== Passenger Yards ===
Passenger coach yards prepare coaches for service. Activities may include cleaning, watering, toilet servicing, minor repairs, charging, linen handling, safety checks, and coach formation. A terminating train may enter a coach yard after passengers leave. Staff clean the interiors, inspect equipment, replenish water, remove waste, and check doors, brakes, lights, fans, air-conditioning systems, and other components.

Passenger yards may contain washing plants, examination pits, carriage watering systems, electrical charging equipment, waste-treatment facilities, stores, and staff rooms. The time available between arrival and departure is known as the turnaround period. A short turnaround requires carefully coordinated work and clear responsibility among several departments. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="16108" sha1="h5mvl305bdo8uhbsmk8vzm74l92cno2" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''''Credit: Dr. Chinchu C.''''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects. 

=== Points and Crossings ===
Points and crossings allow trains to move from one track to another. A point, or turnout, contains movable rails that guide the train toward a selected route. The crossing portion allows wheel flanges to pass through the intersection of two rails. A set of points may be operated manually, mechanically, electrically, or hydraulically. In modern installations, point machines are usually controlled from a signalling system or an electronic interlocking.

A crossover connects two parallel tracks. It allows a train to change from one line to another. Crossovers are found at stations, yards, junctions, terminal approaches, and locations where trains may need to be diverted. Points are sensitive parts of the track because they contain moving components and discontinuities in the rail path. They require regular inspection, lubrication, adjustment, cleaning, and testing. 

=== Railway Station ===
A railway station is a place where trains stop for passenger service, loading, unloading, crew changes, train regulation, or operational purposes. Some stations are small halts, while others are large complexes with many platforms, yards, offices, and passenger facilities.
[[File:Dhariwal Railway Station, Punjab, India IMG20260705172241 06.jpg|thumb|330x330px|'''''Credit: Rohitjahnavi.''''' This is Dhariwal Railway Station in Punjab. Two trains are passing by each other. ]]
A station usually contains platforms, tracks, a station building, ticketing facilities, passenger circulation areas, signalling equipment, public information systems, lighting, water supply, sanitation, and security arrangements. The size of a station depends on the number of trains, passenger demand, local geography, train lengths, interchange requirements, and the role of the station in the railway network.

Stations may be classified informally as terminal stations, through stations, junction stations, suburban stations, halt stations, or interchange stations. A terminal station is located at the end of a route or operating section. A through station lies on a route where trains can continue in both directions. A junction station connects two or more routes. A station may also handle freight operations. In that case, it may have goods sheds, loading platforms, sidings, weighbridges, cranes, warehouses, road-access facilities and others.  

=== Station Platform and Building ===
A platform provides a safe raised area from which passengers board and leave trains. Platforms may be located beside a track or between two tracks. A side platform serves trains on one side. An island platform is located between tracks and may serve trains on both sides. Stations can have several platforms connected by foot overbridges, subways, concourses, or accessible ramps. Platform height is selected to suit the trains that use the station.

Platform edges usually contain tactile or visual warning features and may have markings that indicate a safe distance from the edge. Platforms require drainage, lighting, shelter, seating, signage, public-address systems, drinking water, waste bins, and sanitation facilities. At busy stations, crowd movement must be managed so that passengers do not gather dangerously near the edge. Longer platforms may be needed for longer trains. Platform extension projects often require changes to signalling, station buildings, footbridges, lighting, drainage, and approach roads. 
[[File:Chhatrapati Shivaji Terminus (Victoria Terminus).jpg|thumb|309x309px|'''''Credit: Joe Ravi.''''' This is CSMT (Chhatrapati Shivaji Maharaj Terminal) in Mumbai. It has one the best station buildings and architecture in India.  ]]
The station building contains facilities for passengers and railway staff. It may include ticket counters, reservation offices, waiting halls, enquiry offices, toilets, refreshment areas, retiring rooms, cloakrooms, offices, and electrical rooms. Older station buildings may reflect local architectural traditions or colonial-era design. Newer buildings may use standardized designs, prefabricated components, modern materials, and energy-efficient systems.

The station building must connect conveniently with platforms and external transport. A well-planned station provides clear paths between roads, parking areas, bus stops, autorickshaw stands, pedestrian entrances, ticketing areas, and platforms. Stations may be upgraded with lifts, escalators, ramps, improved lighting, better signage, digital displays, wider concourses, and more accessible toilets. The Annual Report and Accounts for 2023–24 recorded the provision of passenger lifts, escalators, water coolers, and other station improvements during the year. 

=== Signalling ===
Signalling is the system used to control train movements. It includes signals, interlocking, track circuits, axle counters, point machines, block instruments, communication systems, and operating rules. A railway block is a section of track in which train movements are controlled. The basic principle is that trains are separated so that one train does not enter an occupied section without proper authority.

Track circuits detect whether a section of track is occupied by a train. They work by using the rails as part of an electrical circuit. When train wheels and axles connect the rails, the system detects occupation. Axle counters detect the number of axles entering and leaving a section. If the numbers match, the system may determine that the section is clear, subject to the rules and equipment design.

Signals communicate instructions to train drivers. Color-light signals are widely used. A signal aspect may tell the driver to stop, proceed, proceed with caution, or follow a speed restriction, depending on the signalling system. Automatic block signalling divides a route into multiple sections and allows following trains to move more closely while maintaining safety. The capacity benefit depends on train length, braking distance, signalling design, speed, and operating conditions. 

Station signalling controls train movements through platforms, points, loops, and junctions. It prevents conflicting movements and helps trains enter or leave a station safely. An interlocking system ensures that signals and points work in a safe sequence. A route cannot normally be cleared for a train if a conflicting route is already set.

Interlocking may be mechanical, electro-mechanical, relay-based, electronic, or computer-based. Modern electronic interlocking systems can control many routes and provide detailed status information to operators. Station control may be handled from a signal cabin, a panel room, an electronic interlocking room, or a centralized control centre. The exact arrangement varies with the size and complexity of the station.  

== Railway Yards ==
A railway yard is an arrangement of tracks used to receive, sort, store, inspect, assemble, divide, or dispatch trains and vehicles. Yards are essential because trains cannot always operate directly from one route to another without being rearranged.
[[File:Trains at railway yard in India.jpg|thumb|299x299px|'''''Credit: Aditidutttyagi10.''''' A passenger coach yard (2015) containing lots of ICF Blue coaches. ]]
A yard may contain arrival lines, departure lines, reception lines, classification lines, engine lines, carriage sidings, wagon repair lines, washing lines, and stabling lines. An arrival line receives a train entering the yard. A departure line holds a train after preparation and before it enters the main route. A stabling line temporarily stores coaches, wagons, locomotives, or maintenance vehicles.

A classification yard sorts freight wagons according to destination, train formation, commodity, or operating plan. Wagons may be moved between tracks using locomotives, shunting engines, gravity, or specialized yard systems. Yards occupy large areas of land and contain many points and crossings. Their signalling and interlocking systems are often more complex than those of ordinary stations. 

=== Freight Yards ===
Freight wagon yards handle goods trains and individual wagons. They may receive wagons from mines, factories, ports, warehouses, container terminals, or other railway yards.

Freight operations include loading, unloading, weighing, inspection, documentation, shunting, brake testing, and train formation. A freight yard may specialize in coal, cement, food grains, petroleum products, containers, automobiles, fertilizers, steel, or general merchandise. The infrastructure depends on the commodity.

Bulk goods often require conveyors, hoppers, loading gantries, pipelines, silos, cranes, or dumpers. Container yards require gantry cranes, reach stackers, paved storage areas, customs facilities where applicable, and road connections. Freight yards need good road access because goods usually move between the railway and trucks. They also require dust control, drainage, lighting, fire protection, and environmental management.

=== Passenger Yards ===
Passenger coach yards prepare coaches for service. Activities may include cleaning, watering, toilet servicing, minor repairs, charging, linen handling, safety checks, and coach formation. A terminating train may enter a coach yard after passengers leave. Staff clean the interiors, inspect equipment, replenish water, remove waste, and check doors, brakes, lights, fans, air-conditioning systems, and other components.

Passenger yards may contain washing plants, examination pits, carriage watering systems, electrical charging equipment, waste-treatment facilities, stores, and staff rooms. The time available between arrival and departure is known as the turnaround period. A short turnaround requires carefully coordinated work and clear responsibility among several departments.  

=== Marshalling Yards ===
A marshalling yard rearranges freight wagons into trains. It may receive wagons from different directions and sort them according to destination. In a flat yard, locomotives push and pull wagons through points to place them on different tracks. In a hump yard, wagons are pushed up a small artificial hill and then allowed to roll down into classification tracks under controlled conditions.

Hump yards may use retarders, wagon detectors, automatic points, computer control, and speed-control systems. The objective is to place each wagon on the correct track without excessive impact. Marshalling yards have declined in importance on some routes because block freight trains and dedicated commodity flows reduce the need for individual wagon sorting. Nevertheless, many yards remain important for regional freight operations.
[[Category:Book:Indian Railways]]</text>
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      <text bytes="19876" sha1="3qqx4qheeotbgciusqwjxo2pzeu3v5a" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''''Credit: Dr. Chinchu C.''''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects. 

=== Points and Crossings ===
Points and crossings allow trains to move from one track to another. A point, or turnout, contains movable rails that guide the train toward a selected route. The crossing portion allows wheel flanges to pass through the intersection of two rails. A set of points may be operated manually, mechanically, electrically, or hydraulically. In modern installations, point machines are usually controlled from a signalling system or an electronic interlocking.

A crossover connects two parallel tracks. It allows a train to change from one line to another. Crossovers are found at stations, yards, junctions, terminal approaches, and locations where trains may need to be diverted. Points are sensitive parts of the track because they contain moving components and discontinuities in the rail path. They require regular inspection, lubrication, adjustment, cleaning, and testing. 

=== Railway Station ===
A railway station is a place where trains stop for passenger service, loading, unloading, crew changes, train regulation, or operational purposes. Some stations are small halts, while others are large complexes with many platforms, yards, offices, and passenger facilities.
[[File:Dhariwal Railway Station, Punjab, India IMG20260705172241 06.jpg|thumb|330x330px|'''''Credit: Rohitjahnavi.''''' This is Dhariwal Railway Station in Punjab. Two trains are passing by each other. ]]
A station usually contains platforms, tracks, a station building, ticketing facilities, passenger circulation areas, signalling equipment, public information systems, lighting, water supply, sanitation, and security arrangements. The size of a station depends on the number of trains, passenger demand, local geography, train lengths, interchange requirements, and the role of the station in the railway network.

Stations may be classified informally as terminal stations, through stations, junction stations, suburban stations, halt stations, or interchange stations. A terminal station is located at the end of a route or operating section. A through station lies on a route where trains can continue in both directions. A junction station connects two or more routes. A station may also handle freight operations. In that case, it may have goods sheds, loading platforms, sidings, weighbridges, cranes, warehouses, road-access facilities and others.  

=== Station Platform and Building ===
A platform provides a safe raised area from which passengers board and leave trains. Platforms may be located beside a track or between two tracks. A side platform serves trains on one side. An island platform is located between tracks and may serve trains on both sides. Stations can have several platforms connected by foot overbridges, subways, concourses, or accessible ramps. Platform height is selected to suit the trains that use the station.

Platform edges usually contain tactile or visual warning features and may have markings that indicate a safe distance from the edge. Platforms require drainage, lighting, shelter, seating, signage, public-address systems, drinking water, waste bins, and sanitation facilities. At busy stations, crowd movement must be managed so that passengers do not gather dangerously near the edge. Longer platforms may be needed for longer trains. Platform extension projects often require changes to signalling, station buildings, footbridges, lighting, drainage, and approach roads. 
[[File:Chhatrapati Shivaji Terminus (Victoria Terminus).jpg|thumb|309x309px|'''''Credit: Joe Ravi.''''' This is CSMT (Chhatrapati Shivaji Maharaj Terminal) in Mumbai. It has one the best station buildings and architecture in India.  ]]
The station building contains facilities for passengers and railway staff. It may include ticket counters, reservation offices, waiting halls, enquiry offices, toilets, refreshment areas, retiring rooms, cloakrooms, offices, and electrical rooms. Older station buildings may reflect local architectural traditions or colonial-era design. Newer buildings may use standardized designs, prefabricated components, modern materials, and energy-efficient systems.

The station building must connect conveniently with platforms and external transport. A well-planned station provides clear paths between roads, parking areas, bus stops, autorickshaw stands, pedestrian entrances, ticketing areas, and platforms. Stations may be upgraded with lifts, escalators, ramps, improved lighting, better signage, digital displays, wider concourses, and more accessible toilets. The Annual Report and Accounts for 2023–24 recorded the provision of passenger lifts, escalators, water coolers, and other station improvements during the year. 

=== Signalling ===
Signalling is the system used to control train movements. It includes signals, interlocking, track circuits, axle counters, point machines, block instruments, communication systems, and operating rules. A railway block is a section of track in which train movements are controlled. The basic principle is that trains are separated so that one train does not enter an occupied section without proper authority.

Track circuits detect whether a section of track is occupied by a train. They work by using the rails as part of an electrical circuit. When train wheels and axles connect the rails, the system detects occupation. Axle counters detect the number of axles entering and leaving a section. If the numbers match, the system may determine that the section is clear, subject to the rules and equipment design.

Signals communicate instructions to train drivers. Color-light signals are widely used. A signal aspect may tell the driver to stop, proceed, proceed with caution, or follow a speed restriction, depending on the signalling system. Automatic block signalling divides a route into multiple sections and allows following trains to move more closely while maintaining safety. The capacity benefit depends on train length, braking distance, signalling design, speed, and operating conditions. 

Station signalling controls train movements through platforms, points, loops, and junctions. It prevents conflicting movements and helps trains enter or leave a station safely. An interlocking system ensures that signals and points work in a safe sequence. A route cannot normally be cleared for a train if a conflicting route is already set.

Interlocking may be mechanical, electro-mechanical, relay-based, electronic, or computer-based. Modern electronic interlocking systems can control many routes and provide detailed status information to operators. Station control may be handled from a signal cabin, a panel room, an electronic interlocking room, or a centralized control centre. The exact arrangement varies with the size and complexity of the station.  

== Railway Yards ==
A railway yard is an arrangement of tracks used to receive, sort, store, inspect, assemble, divide, or dispatch trains and vehicles. Yards are essential because trains cannot always operate directly from one route to another without being rearranged.
[[File:Trains at railway yard in India.jpg|thumb|299x299px|'''''Credit: Aditidutttyagi10.''''' A passenger coach yard (2015) containing lots of ICF Blue coaches. ]]
A yard may contain arrival lines, departure lines, reception lines, classification lines, engine lines, carriage sidings, wagon repair lines, washing lines, and stabling lines. An arrival line receives a train entering the yard. A departure line holds a train after preparation and before it enters the main route. A stabling line temporarily stores coaches, wagons, locomotives, or maintenance vehicles.

A classification yard sorts freight wagons according to destination, train formation, commodity, or operating plan. Wagons may be moved between tracks using locomotives, shunting engines, gravity, or specialized yard systems. Yards occupy large areas of land and contain many points and crossings. Their signalling and interlocking systems are often more complex than those of ordinary stations. 

=== Freight Yards ===
Freight wagon yards handle goods trains and individual wagons. They may receive wagons from mines, factories, ports, warehouses, container terminals, or other railway yards.

Freight operations include loading, unloading, weighing, inspection, documentation, shunting, brake testing, and train formation. A freight yard may specialize in coal, cement, food grains, petroleum products, containers, automobiles, fertilizers, steel, or general merchandise. The infrastructure depends on the commodity.

Bulk goods often require conveyors, hoppers, loading gantries, pipelines, silos, cranes, or dumpers. Container yards require gantry cranes, reach stackers, paved storage areas, customs facilities where applicable, and road connections. Freight yards need good road access because goods usually move between the railway and trucks. They also require dust control, drainage, lighting, fire protection, and environmental management.

=== Passenger Yards ===
Passenger coach yards prepare coaches for service. Activities may include cleaning, watering, toilet servicing, minor repairs, charging, linen handling, safety checks, and coach formation. A terminating train may enter a coach yard after passengers leave. Staff clean the interiors, inspect equipment, replenish water, remove waste, and check doors, brakes, lights, fans, air-conditioning systems, and other components.

Passenger yards may contain washing plants, examination pits, carriage watering systems, electrical charging equipment, waste-treatment facilities, stores, and staff rooms. The time available between arrival and departure is known as the turnaround period. A short turnaround requires carefully coordinated work and clear responsibility among several departments.  

=== Marshalling Yards ===
A marshalling yard rearranges freight wagons into trains. It may receive wagons from different directions and sort them according to destination. In a flat yard, locomotives push and pull wagons through points to place them on different tracks. In a hump yard, wagons are pushed up a small artificial hill and then allowed to roll down into classification tracks under controlled conditions.

Hump yards may use retarders, wagon detectors, automatic points, computer control, and speed-control systems. The objective is to place each wagon on the correct track without excessive impact. Marshalling yards have declined in importance on some routes because block freight trains and dedicated commodity flows reduce the need for individual wagon sorting. Nevertheless, many yards remain important for regional freight operations. 

== Heritage and Mountain Railways ==
Heritage railways preserve historic routes, stations, bridges, locomotives, coaches, workshops, and operating practices. Some heritage lines continue to provide regular services, while others focus on tourism and education.
[[File:Nilgiri Mountain Railways, Hillgrove Station, India.jpg|thumb|253x253px|'''Credit: Arindambasu2.''' This is the Nilgiri Mountain Railways of India. This is Hillgrove station. ]]
Mountain railways often use steep gradients, sharp curves, special bridges, tunnels, zigzags, loops, and unique engineering arrangements. Their infrastructure may require specialized maintenance because of age, terrain, and limited space. Heritage conservation must balance historical authenticity with modern safety requirements. Some structures may be repaired using traditional methods, while hidden components may be strengthened with modern materials. 

== Railway Construction ==
Railway construction begins with planning, surveys, alignment selection, land acquisition, environmental assessment, design, and approvals. Construction then proceeds through earthwork, bridges, track formation, track laying, electrification, signalling, station building, testing, and commissioning. Survey teams study terrain, soil, drainage, existing roads, settlements, rivers, utilities, and environmental features. Modern surveys may use satellite imagery, drones, geographic information systems, and digital terrain models.

Earthwork forms the base for the railway. It includes embankments, cuttings, soil improvement, slope protection, and drainage. After the formation is ready, bridges, culverts, retaining structures, and other civil works are completed. Track workers then lay sleepers, rails, ballast, points, crossings, and related components.

Electrification and signalling are installed after or alongside track construction. Testing verifies track geometry, electrical clearances, signal logic, communication, points, brakes, and emergency arrangements. A new line or upgraded route is opened only after inspections, trials, authorizations, and safety procedures have been completed. 

=== Railway Interoperability ===
Interoperability means that different railway components and organizations can work together. A locomotive must be compatible with track, overhead equipment, signalling, platforms, loading gauges, couplers, brakes, and operating rules.

Interoperability is also important when trains cross zone boundaries or use infrastructure managed by different authorities. Standardized equipment and procedures reduce delays and simplify maintenance. Problems can occur when older and newer systems coexist. For example, a route may contain different signalling technologies, platform arrangements, electrification equipment, or communication systems. Railway planners must manage these interfaces carefully. 

== Future ==
Future railway infrastructure in India is likely to focus on capacity, safety, electrification, freight efficiency, station redevelopment, urban integration, digital systems, and improved maintenance. High-capacity routes may receive additional tracks, faster signalling, stronger bridges, longer platforms, improved junctions, and better terminals. Freight infrastructure may expand through dedicated corridors, logistics parks, container terminals, private sidings, and multimodal connections.

Passenger facilities may become more accessible and integrated with buses, metro systems, taxis, cycling facilities, and pedestrian networks. Future projects will also need to address climate resilience. More intense rainfall, flooding, heat, coastal risks, landslides, and changing weather patterns can affect track, bridges, stations, electrical systems, and communication networks. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="22320" sha1="5zogjxyf9rnguv6o0ubg6cwc8dkvyft" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''''Credit: Dr. Chinchu C.''''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects. 

=== Points and Crossings ===
Points and crossings allow trains to move from one track to another. A point, or turnout, contains movable rails that guide the train toward a selected route. The crossing portion allows wheel flanges to pass through the intersection of two rails. A set of points may be operated manually, mechanically, electrically, or hydraulically. In modern installations, point machines are usually controlled from a signalling system or an electronic interlocking.

A crossover connects two parallel tracks. It allows a train to change from one line to another. Crossovers are found at stations, yards, junctions, terminal approaches, and locations where trains may need to be diverted. Points are sensitive parts of the track because they contain moving components and discontinuities in the rail path. They require regular inspection, lubrication, adjustment, cleaning, and testing. 

=== Railway Station ===
A railway station is a place where trains stop for passenger service, loading, unloading, crew changes, train regulation, or operational purposes. Some stations are small halts, while others are large complexes with many platforms, yards, offices, and passenger facilities.
[[File:Dhariwal Railway Station, Punjab, India IMG20260705172241 06.jpg|thumb|330x330px|'''''Credit: Rohitjahnavi.''''' This is Dhariwal Railway Station in Punjab. Two trains are passing by each other. ]]
A station usually contains platforms, tracks, a station building, ticketing facilities, passenger circulation areas, signalling equipment, public information systems, lighting, water supply, sanitation, and security arrangements. The size of a station depends on the number of trains, passenger demand, local geography, train lengths, interchange requirements, and the role of the station in the railway network.

Stations may be classified informally as terminal stations, through stations, junction stations, suburban stations, halt stations, or interchange stations. A terminal station is located at the end of a route or operating section. A through station lies on a route where trains can continue in both directions. A junction station connects two or more routes. A station may also handle freight operations. In that case, it may have goods sheds, loading platforms, sidings, weighbridges, cranes, warehouses, road-access facilities and others.  

=== Station Platform and Building ===
A platform provides a safe raised area from which passengers board and leave trains. Platforms may be located beside a track or between two tracks. A side platform serves trains on one side. An island platform is located between tracks and may serve trains on both sides. Stations can have several platforms connected by foot overbridges, subways, concourses, or accessible ramps. Platform height is selected to suit the trains that use the station.

Platform edges usually contain tactile or visual warning features and may have markings that indicate a safe distance from the edge. Platforms require drainage, lighting, shelter, seating, signage, public-address systems, drinking water, waste bins, and sanitation facilities. At busy stations, crowd movement must be managed so that passengers do not gather dangerously near the edge. Longer platforms may be needed for longer trains. Platform extension projects often require changes to signalling, station buildings, footbridges, lighting, drainage, and approach roads. 
[[File:Chhatrapati Shivaji Terminus (Victoria Terminus).jpg|thumb|309x309px|'''''Credit: Joe Ravi.''''' This is CSMT (Chhatrapati Shivaji Maharaj Terminal) in Mumbai. It has one the best station buildings and architecture in India.  ]]
The station building contains facilities for passengers and railway staff. It may include ticket counters, reservation offices, waiting halls, enquiry offices, toilets, refreshment areas, retiring rooms, cloakrooms, offices, and electrical rooms. Older station buildings may reflect local architectural traditions or colonial-era design. Newer buildings may use standardized designs, prefabricated components, modern materials, and energy-efficient systems.

The station building must connect conveniently with platforms and external transport. A well-planned station provides clear paths between roads, parking areas, bus stops, autorickshaw stands, pedestrian entrances, ticketing areas, and platforms. Stations may be upgraded with lifts, escalators, ramps, improved lighting, better signage, digital displays, wider concourses, and more accessible toilets. The Annual Report and Accounts for 2023–24 recorded the provision of passenger lifts, escalators, water coolers, and other station improvements during the year. 

=== Signalling ===
Signalling is the system used to control train movements. It includes signals, interlocking, track circuits, axle counters, point machines, block instruments, communication systems, and operating rules. A railway block is a section of track in which train movements are controlled. The basic principle is that trains are separated so that one train does not enter an occupied section without proper authority.

Track circuits detect whether a section of track is occupied by a train. They work by using the rails as part of an electrical circuit. When train wheels and axles connect the rails, the system detects occupation. Axle counters detect the number of axles entering and leaving a section. If the numbers match, the system may determine that the section is clear, subject to the rules and equipment design.

Signals communicate instructions to train drivers. Color-light signals are widely used. A signal aspect may tell the driver to stop, proceed, proceed with caution, or follow a speed restriction, depending on the signalling system. Automatic block signalling divides a route into multiple sections and allows following trains to move more closely while maintaining safety. The capacity benefit depends on train length, braking distance, signalling design, speed, and operating conditions. 

Station signalling controls train movements through platforms, points, loops, and junctions. It prevents conflicting movements and helps trains enter or leave a station safely. An interlocking system ensures that signals and points work in a safe sequence. A route cannot normally be cleared for a train if a conflicting route is already set.

Interlocking may be mechanical, electro-mechanical, relay-based, electronic, or computer-based. Modern electronic interlocking systems can control many routes and provide detailed status information to operators. Station control may be handled from a signal cabin, a panel room, an electronic interlocking room, or a centralized control centre. The exact arrangement varies with the size and complexity of the station.  

== Railway Yards ==
A railway yard is an arrangement of tracks used to receive, sort, store, inspect, assemble, divide, or dispatch trains and vehicles. Yards are essential because trains cannot always operate directly from one route to another without being rearranged.
[[File:Trains at railway yard in India.jpg|thumb|299x299px|'''''Credit: Aditidutttyagi10.''''' A passenger coach yard (2015) containing lots of ICF Blue coaches. ]]
A yard may contain arrival lines, departure lines, reception lines, classification lines, engine lines, carriage sidings, wagon repair lines, washing lines, and stabling lines. An arrival line receives a train entering the yard. A departure line holds a train after preparation and before it enters the main route. A stabling line temporarily stores coaches, wagons, locomotives, or maintenance vehicles.

A classification yard sorts freight wagons according to destination, train formation, commodity, or operating plan. Wagons may be moved between tracks using locomotives, shunting engines, gravity, or specialized yard systems. Yards occupy large areas of land and contain many points and crossings. Their signalling and interlocking systems are often more complex than those of ordinary stations. 

=== Freight Yards ===
Freight wagon yards handle goods trains and individual wagons. They may receive wagons from mines, factories, ports, warehouses, container terminals, or other railway yards.

Freight operations include loading, unloading, weighing, inspection, documentation, shunting, brake testing, and train formation. A freight yard may specialize in coal, cement, food grains, petroleum products, containers, automobiles, fertilizers, steel, or general merchandise. The infrastructure depends on the commodity.

Bulk goods often require conveyors, hoppers, loading gantries, pipelines, silos, cranes, or dumpers. Container yards require gantry cranes, reach stackers, paved storage areas, customs facilities where applicable, and road connections. Freight yards need good road access because goods usually move between the railway and trucks. They also require dust control, drainage, lighting, fire protection, and environmental management.

=== Passenger Yards ===
Passenger coach yards prepare coaches for service. Activities may include cleaning, watering, toilet servicing, minor repairs, charging, linen handling, safety checks, and coach formation. A terminating train may enter a coach yard after passengers leave. Staff clean the interiors, inspect equipment, replenish water, remove waste, and check doors, brakes, lights, fans, air-conditioning systems, and other components.

Passenger yards may contain washing plants, examination pits, carriage watering systems, electrical charging equipment, waste-treatment facilities, stores, and staff rooms. The time available between arrival and departure is known as the turnaround period. A short turnaround requires carefully coordinated work and clear responsibility among several departments.  

=== Marshalling Yards ===
A marshalling yard rearranges freight wagons into trains. It may receive wagons from different directions and sort them according to destination. In a flat yard, locomotives push and pull wagons through points to place them on different tracks. In a hump yard, wagons are pushed up a small artificial hill and then allowed to roll down into classification tracks under controlled conditions.

Hump yards may use retarders, wagon detectors, automatic points, computer control, and speed-control systems. The objective is to place each wagon on the correct track without excessive impact. Marshalling yards have declined in importance on some routes because block freight trains and dedicated commodity flows reduce the need for individual wagon sorting. Nevertheless, many yards remain important for regional freight operations. 

== Heritage and Mountain Railways ==
Heritage railways preserve historic routes, stations, bridges, locomotives, coaches, workshops, and operating practices. Some heritage lines continue to provide regular services, while others focus on tourism and education.
[[File:Nilgiri Mountain Railways, Hillgrove Station, India.jpg|thumb|253x253px|'''Credit: Arindambasu2.''' This is the Nilgiri Mountain Railways of India. This is Hillgrove station. ]]
Mountain railways often use steep gradients, sharp curves, special bridges, tunnels, zigzags, loops, and unique engineering arrangements. Their infrastructure may require specialized maintenance because of age, terrain, and limited space. Heritage conservation must balance historical authenticity with modern safety requirements. Some structures may be repaired using traditional methods, while hidden components may be strengthened with modern materials. 

== Railway Construction ==
Railway construction begins with planning, surveys, alignment selection, land acquisition, environmental assessment, design, and approvals. Construction then proceeds through earthwork, bridges, track formation, track laying, electrification, signalling, station building, testing, and commissioning. Survey teams study terrain, soil, drainage, existing roads, settlements, rivers, utilities, and environmental features. Modern surveys may use satellite imagery, drones, geographic information systems, and digital terrain models.

Earthwork forms the base for the railway. It includes embankments, cuttings, soil improvement, slope protection, and drainage. After the formation is ready, bridges, culverts, retaining structures, and other civil works are completed. Track workers then lay sleepers, rails, ballast, points, crossings, and related components.

Electrification and signalling are installed after or alongside track construction. Testing verifies track geometry, electrical clearances, signal logic, communication, points, brakes, and emergency arrangements. A new line or upgraded route is opened only after inspections, trials, authorizations, and safety procedures have been completed. 

=== Railway Interoperability ===
Interoperability means that different railway components and organizations can work together. A locomotive must be compatible with track, overhead equipment, signalling, platforms, loading gauges, couplers, brakes, and operating rules.

Interoperability is also important when trains cross zone boundaries or use infrastructure managed by different authorities. Standardized equipment and procedures reduce delays and simplify maintenance. Problems can occur when older and newer systems coexist. For example, a route may contain different signalling technologies, platform arrangements, electrification equipment, or communication systems. Railway planners must manage these interfaces carefully.  

== Extra Parts of Railway Systems ==

=== Dedicated Freight Corridors (DFC) ===
A dedicated freight corridor is a railway route designed mainly for freight traffic. It may have higher axle-load capacity, longer loops, larger loading clearances, modern signalling, and fewer conflicts with passenger trains. Separating freight and passenger traffic can increase capacity on existing routes. Freight trains may operate with longer formations and heavier loads than on older mixed-traffic routes, subject to the corridor’s design.

Dedicated freight corridors require new track, bridges, tunnels, stations or crossing facilities, electric traction, signalling, maintenance bases, control centers, and logistics terminals. Their effectiveness depends not only on the railway line but also on connecting routes, ports, industrial sidings, warehouses, road networks, and cargo demand. 

=== Suburban Railway Systems ===
Suburban railway systems carry large numbers of passengers over short and medium distances. They require frequent services, high platform capacity, rapid boarding, reliable signalling, and efficient passenger circulation. Suburban stations often have multiple platforms, footbridges, ticketing gates, escalators, lifts, shelters, and large pedestrian approaches. Some have separate areas for different directions or services.

Suburban infrastructure may include dedicated tracks, fast and slow lines, stabling yards, maintenance depots, automatic signalling, traction substations, and centralized control. Peak-hour demand creates special challenges. Platforms and footbridges must manage very high passenger volumes, while train schedules must maintain short intervals without compromising safety. 

=== Metro Systems ===
Metro systems and regional railways may connect with Indian Railways at interchange stations. They can have different rolling stock, signalling systems, fare systems, platform heights, electrification arrangements, and operating authorities. 

An interchange station must allow passengers to transfer easily. Ideally, the connection includes short walking paths, clear signs, weather protection, lifts, escalators, integrated ticketing where available, and coordination between train schedules. Poorly designed transfers can make a journey difficult even when the railway and metro lines themselves operate well. Integration therefore includes both physical infrastructure and passenger information. 

== Future ==
Future railway infrastructure in India is likely to focus on capacity, safety, electrification, freight efficiency, station redevelopment, urban integration, digital systems, and improved maintenance. High-capacity routes may receive additional tracks, faster signalling, stronger bridges, longer platforms, improved junctions, and better terminals. Freight infrastructure may expand through dedicated corridors, logistics parks, container terminals, private sidings, and multimodal connections.

Passenger facilities may become more accessible and integrated with buses, metro systems, taxis, cycling facilities, and pedestrian networks. Future projects will also need to address climate resilience. More intense rainfall, flooding, heat, coastal risks, landslides, and changing weather patterns can affect track, bridges, stations, electrical systems, and communication networks.  
[[Category:Book:Indian Railways]]</text>
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      <text bytes="25122" sha1="qq24pan3o2qaycpaq73dvumvbwwz7zc" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''''Credit: Dr. Chinchu C.''''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects. 

=== Points and Crossings ===
Points and crossings allow trains to move from one track to another. A point, or turnout, contains movable rails that guide the train toward a selected route. The crossing portion allows wheel flanges to pass through the intersection of two rails. A set of points may be operated manually, mechanically, electrically, or hydraulically. In modern installations, point machines are usually controlled from a signalling system or an electronic interlocking.

A crossover connects two parallel tracks. It allows a train to change from one line to another. Crossovers are found at stations, yards, junctions, terminal approaches, and locations where trains may need to be diverted. Points are sensitive parts of the track because they contain moving components and discontinuities in the rail path. They require regular inspection, lubrication, adjustment, cleaning, and testing. 

=== Railway Station ===
A railway station is a place where trains stop for passenger service, loading, unloading, crew changes, train regulation, or operational purposes. Some stations are small halts, while others are large complexes with many platforms, yards, offices, and passenger facilities.
[[File:Dhariwal Railway Station, Punjab, India IMG20260705172241 06.jpg|thumb|330x330px|'''''Credit: Rohitjahnavi.''''' This is Dhariwal Railway Station in Punjab. Two trains are passing by each other. ]]
A station usually contains platforms, tracks, a station building, ticketing facilities, passenger circulation areas, signalling equipment, public information systems, lighting, water supply, sanitation, and security arrangements. The size of a station depends on the number of trains, passenger demand, local geography, train lengths, interchange requirements, and the role of the station in the railway network.

Stations may be classified informally as terminal stations, through stations, junction stations, suburban stations, halt stations, or interchange stations. A terminal station is located at the end of a route or operating section. A through station lies on a route where trains can continue in both directions. A junction station connects two or more routes. A station may also handle freight operations. In that case, it may have goods sheds, loading platforms, sidings, weighbridges, cranes, warehouses, road-access facilities and others.  

=== Station Platform and Building ===
A platform provides a safe raised area from which passengers board and leave trains. Platforms may be located beside a track or between two tracks. A side platform serves trains on one side. An island platform is located between tracks and may serve trains on both sides. Stations can have several platforms connected by foot overbridges, subways, concourses, or accessible ramps. Platform height is selected to suit the trains that use the station.

Platform edges usually contain tactile or visual warning features and may have markings that indicate a safe distance from the edge. Platforms require drainage, lighting, shelter, seating, signage, public-address systems, drinking water, waste bins, and sanitation facilities. At busy stations, crowd movement must be managed so that passengers do not gather dangerously near the edge. Longer platforms may be needed for longer trains. Platform extension projects often require changes to signalling, station buildings, footbridges, lighting, drainage, and approach roads. 
[[File:Chhatrapati Shivaji Terminus (Victoria Terminus).jpg|thumb|309x309px|'''''Credit: Joe Ravi.''''' This is CSMT (Chhatrapati Shivaji Maharaj Terminal) in Mumbai. It has one the best station buildings and architecture in India.  ]]
The station building contains facilities for passengers and railway staff. It may include ticket counters, reservation offices, waiting halls, enquiry offices, toilets, refreshment areas, retiring rooms, cloakrooms, offices, and electrical rooms. Older station buildings may reflect local architectural traditions or colonial-era design. Newer buildings may use standardized designs, prefabricated components, modern materials, and energy-efficient systems.

The station building must connect conveniently with platforms and external transport. A well-planned station provides clear paths between roads, parking areas, bus stops, autorickshaw stands, pedestrian entrances, ticketing areas, and platforms. Stations may be upgraded with lifts, escalators, ramps, improved lighting, better signage, digital displays, wider concourses, and more accessible toilets. The Annual Report and Accounts for 2023–24 recorded the provision of passenger lifts, escalators, water coolers, and other station improvements during the year. 

=== Signalling ===
Signalling is the system used to control train movements. It includes signals, interlocking, track circuits, axle counters, point machines, block instruments, communication systems, and operating rules. A railway block is a section of track in which train movements are controlled. The basic principle is that trains are separated so that one train does not enter an occupied section without proper authority.

Track circuits detect whether a section of track is occupied by a train. They work by using the rails as part of an electrical circuit. When train wheels and axles connect the rails, the system detects occupation. Axle counters detect the number of axles entering and leaving a section. If the numbers match, the system may determine that the section is clear, subject to the rules and equipment design.

Signals communicate instructions to train drivers. Color-light signals are widely used. A signal aspect may tell the driver to stop, proceed, proceed with caution, or follow a speed restriction, depending on the signalling system. Automatic block signalling divides a route into multiple sections and allows following trains to move more closely while maintaining safety. The capacity benefit depends on train length, braking distance, signalling design, speed, and operating conditions. 

Station signalling controls train movements through platforms, points, loops, and junctions. It prevents conflicting movements and helps trains enter or leave a station safely. An interlocking system ensures that signals and points work in a safe sequence. A route cannot normally be cleared for a train if a conflicting route is already set.

Interlocking may be mechanical, electro-mechanical, relay-based, electronic, or computer-based. Modern electronic interlocking systems can control many routes and provide detailed status information to operators. Station control may be handled from a signal cabin, a panel room, an electronic interlocking room, or a centralized control centre. The exact arrangement varies with the size and complexity of the station.  

== Railway Yards ==
A railway yard is an arrangement of tracks used to receive, sort, store, inspect, assemble, divide, or dispatch trains and vehicles. Yards are essential because trains cannot always operate directly from one route to another without being rearranged.
[[File:Trains at railway yard in India.jpg|thumb|299x299px|'''''Credit: Aditidutttyagi10.''''' A passenger coach yard (2015) containing lots of ICF Blue coaches. ]]
A yard may contain arrival lines, departure lines, reception lines, classification lines, engine lines, carriage sidings, wagon repair lines, washing lines, and stabling lines. An arrival line receives a train entering the yard. A departure line holds a train after preparation and before it enters the main route. A stabling line temporarily stores coaches, wagons, locomotives, or maintenance vehicles.

A classification yard sorts freight wagons according to destination, train formation, commodity, or operating plan. Wagons may be moved between tracks using locomotives, shunting engines, gravity, or specialized yard systems. Yards occupy large areas of land and contain many points and crossings. Their signalling and interlocking systems are often more complex than those of ordinary stations. 

=== Freight Yards ===
Freight wagon yards handle goods trains and individual wagons. They may receive wagons from mines, factories, ports, warehouses, container terminals, or other railway yards.

Freight operations include loading, unloading, weighing, inspection, documentation, shunting, brake testing, and train formation. A freight yard may specialize in coal, cement, food grains, petroleum products, containers, automobiles, fertilizers, steel, or general merchandise. The infrastructure depends on the commodity.

Bulk goods often require conveyors, hoppers, loading gantries, pipelines, silos, cranes, or dumpers. Container yards require gantry cranes, reach stackers, paved storage areas, customs facilities where applicable, and road connections. Freight yards need good road access because goods usually move between the railway and trucks. They also require dust control, drainage, lighting, fire protection, and environmental management.

=== Passenger Yards ===
Passenger coach yards prepare coaches for service. Activities may include cleaning, watering, toilet servicing, minor repairs, charging, linen handling, safety checks, and coach formation. A terminating train may enter a coach yard after passengers leave. Staff clean the interiors, inspect equipment, replenish water, remove waste, and check doors, brakes, lights, fans, air-conditioning systems, and other components.

Passenger yards may contain washing plants, examination pits, carriage watering systems, electrical charging equipment, waste-treatment facilities, stores, and staff rooms. The time available between arrival and departure is known as the turnaround period. A short turnaround requires carefully coordinated work and clear responsibility among several departments.  

=== Marshalling Yards ===
A marshalling yard rearranges freight wagons into trains. It may receive wagons from different directions and sort them according to destination. In a flat yard, locomotives push and pull wagons through points to place them on different tracks. In a hump yard, wagons are pushed up a small artificial hill and then allowed to roll down into classification tracks under controlled conditions.

Hump yards may use retarders, wagon detectors, automatic points, computer control, and speed-control systems. The objective is to place each wagon on the correct track without excessive impact. Marshalling yards have declined in importance on some routes because block freight trains and dedicated commodity flows reduce the need for individual wagon sorting. Nevertheless, many yards remain important for regional freight operations.  

=== Railway Depots ===
A depot is a facility where railway vehicles or equipment receive routine attention and are prepared for service. Depots are generally smaller than major workshops but may cover a wide range of activities. Passenger train depots may inspect coaches, clean interiors, replenish water, service toilets, repair minor defects, and prepare rakes for departure.

Locomotive depots may carry out fueling, inspection, sanding, lubrication, fault diagnosis, and minor repairs. Electric locomotive depots also inspect pantographs, traction equipment, circuit breakers, and high-voltage systems. Maintenance depots may support track machines, overhead equipment vehicles, signal-maintenance vehicles, inspection cars, and road–rail vehicles. 

=== Railway Workshops ===
A railway workshop is a large maintenance and manufacturing facility for locomotives, coaches, wagons, track machines, bridges, signalling equipment, or other railway assets. Workshops perform periodic overhauls that are more extensive than routine shed maintenance. A vehicle may be dismantled, cleaned, inspected, repaired, tested, painted, and reassembled. 

Locomotive workshops work on traction motors, engines, gearboxes, bogies, wheelsets, braking systems, electrical cabinets, control systems, and body structures. The exact work depends on whether the locomotive is electric, diesel, or another type. Carriage workshops maintain passenger coaches. They may repair body panels, doors, windows, seats, toilets, air-conditioning systems, electrical wiring, brake equipment, suspension components, and bogies.

Wagon workshops maintain freight wagons used for coal, cement, grain, containers, petroleum products, steel, automobiles, and other goods. They inspect wagon bodies, doors, couplers, brake systems, wheels, and underframes. Railway workshops may also manufacture or repair track components, tools, signalling equipment, bridge parts, electrical equipment, and specialized machines. Official railway reporting has described signal workshops producing equipment such as point machines, block instruments, axle counters, relays, and related items. 

Workshops use cranes, lifting jacks, wheel lathes, milling machines, drilling machines, welding equipment, paint booths, hydraulic presses, testing rigs, electrical test benches, and computerized diagnostic systems. Railway workshops need stores for spare parts, raw materials, lubricants, electrical components, fasteners, safety equipment, and consumables. Inventory management is important because both shortages and excessive stock can increase costs. 

== Heritage and Mountain Railways ==
Heritage railways preserve historic routes, stations, bridges, locomotives, coaches, workshops, and operating practices. Some heritage lines continue to provide regular services, while others focus on tourism and education.
[[File:Nilgiri Mountain Railways, Hillgrove Station, India.jpg|thumb|253x253px|'''Credit: Arindambasu2.''' This is the Nilgiri Mountain Railways of India. This is Hillgrove station. ]]
Mountain railways often use steep gradients, sharp curves, special bridges, tunnels, zigzags, loops, and unique engineering arrangements. Their infrastructure may require specialized maintenance because of age, terrain, and limited space. Heritage conservation must balance historical authenticity with modern safety requirements. Some structures may be repaired using traditional methods, while hidden components may be strengthened with modern materials. 

== Railway Construction ==
Railway construction begins with planning, surveys, alignment selection, land acquisition, environmental assessment, design, and approvals. Construction then proceeds through earthwork, bridges, track formation, track laying, electrification, signalling, station building, testing, and commissioning. Survey teams study terrain, soil, drainage, existing roads, settlements, rivers, utilities, and environmental features. Modern surveys may use satellite imagery, drones, geographic information systems, and digital terrain models.

Earthwork forms the base for the railway. It includes embankments, cuttings, soil improvement, slope protection, and drainage. After the formation is ready, bridges, culverts, retaining structures, and other civil works are completed. Track workers then lay sleepers, rails, ballast, points, crossings, and related components.

Electrification and signalling are installed after or alongside track construction. Testing verifies track geometry, electrical clearances, signal logic, communication, points, brakes, and emergency arrangements. A new line or upgraded route is opened only after inspections, trials, authorizations, and safety procedures have been completed. 

=== Railway Interoperability ===
Interoperability means that different railway components and organizations can work together. A locomotive must be compatible with track, overhead equipment, signalling, platforms, loading gauges, couplers, brakes, and operating rules.

Interoperability is also important when trains cross zone boundaries or use infrastructure managed by different authorities. Standardized equipment and procedures reduce delays and simplify maintenance. Problems can occur when older and newer systems coexist. For example, a route may contain different signalling technologies, platform arrangements, electrification equipment, or communication systems. Railway planners must manage these interfaces carefully.  

== Extra Parts of Railway Systems ==

=== Dedicated Freight Corridors (DFC) ===
A dedicated freight corridor is a railway route designed mainly for freight traffic. It may have higher axle-load capacity, longer loops, larger loading clearances, modern signalling, and fewer conflicts with passenger trains. Separating freight and passenger traffic can increase capacity on existing routes. Freight trains may operate with longer formations and heavier loads than on older mixed-traffic routes, subject to the corridor’s design.

Dedicated freight corridors require new track, bridges, tunnels, stations or crossing facilities, electric traction, signalling, maintenance bases, control centers, and logistics terminals. Their effectiveness depends not only on the railway line but also on connecting routes, ports, industrial sidings, warehouses, road networks, and cargo demand. 

=== Suburban Railway Systems ===
Suburban railway systems carry large numbers of passengers over short and medium distances. They require frequent services, high platform capacity, rapid boarding, reliable signalling, and efficient passenger circulation. Suburban stations often have multiple platforms, footbridges, ticketing gates, escalators, lifts, shelters, and large pedestrian approaches. Some have separate areas for different directions or services.

Suburban infrastructure may include dedicated tracks, fast and slow lines, stabling yards, maintenance depots, automatic signalling, traction substations, and centralized control. Peak-hour demand creates special challenges. Platforms and footbridges must manage very high passenger volumes, while train schedules must maintain short intervals without compromising safety. 

=== Metro Systems ===
[[File:A metro train entering Baranagar Metro station in Kolkata, India.jpg|thumb|267x267px|'''''Credit: Ravi Dwivedi.''''' A metro from the Kolkata Metro System enters Baranagar metro station. ]]
Metro systems and regional railways may connect with Indian Railways at interchange stations. They can have different rolling stock, signalling systems, fare systems, platform heights, electrification arrangements, and operating authorities. 

An interchange station must allow passengers to transfer easily. Ideally, the connection includes short walking paths, clear signs, weather protection, lifts, escalators, integrated ticketing where available, and coordination between train schedules. Poorly designed transfers can make a journey difficult even when the railway and metro lines themselves operate well. Integration therefore includes both physical infrastructure and passenger information. 

== Future ==
Future railway infrastructure in India is likely to focus on capacity, safety, electrification, freight efficiency, station redevelopment, urban integration, digital systems, and improved maintenance. High-capacity routes may receive additional tracks, faster signalling, stronger bridges, longer platforms, improved junctions, and better terminals. Freight infrastructure may expand through dedicated corridors, logistics parks, container terminals, private sidings, and multimodal connections.

Passenger facilities may become more accessible and integrated with buses, metro systems, taxis, cycling facilities, and pedestrian networks. Future projects will also need to address climate resilience. More intense rainfall, flooding, heat, coastal risks, landslides, and changing weather patterns can affect track, bridges, stations, electrical systems, and communication networks.  
[[Category:Book:Indian Railways]]</text>
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      <text bytes="25879" sha1="g8bm02y6vz0im4rqrtfybjlww2bc87n" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway infrastructure is the collection of physical facilities, engineering systems, buildings, machines, communication networks, and operating arrangements that allow trains to run safely and efficiently. In India, railway infrastructure supports passenger travel, freight transport, suburban services, military movement, industrial supply chains, tourism, and regional development. 

Since Indian Railways is one of the world’s largest railway systems and its infrastructure has developed over more than 160 years, it includes lots of railway tracks, bridges, tunnels, stations, yards, depots, workshops, signalling systems, electric power systems, maintenance facilities, level crossings, staff facilities, and information technology networks.

Railway infrastructure is not limited to the visible railway line. A passenger usually sees a train, a platform, and perhaps a footbridge. Behind these facilities are control offices, signalling equipment, electrical substations, inspection vehicles, workshops, water-supply systems, drainage structures, track machines, and maintenance teams. 

== Basic Infrastructure of a Railway System ==

=== Railway Network ===
A railway network is a connected system of routes over which trains operate. A route may have one track or several tracks. It may serve passenger trains, freight trains, suburban trains, or a combination of these. The main railway routes in India use broad gauge. Broad gauge has a distance of 1,676 millimeters between the inner faces of the rails. It became the dominant gauge because it can support relatively large and heavy trains and is suitable for long-distance transport.  
[[File:Railway network map of India - Schematic.svg|thumb|275x275px|'''''Credit: PlaneMad.''''' A schematic map of the railway network in Indian Railways (as of 2022). ]]
India also has some metre-gauge and narrow-gauge lines. Many such lines have been converted to broad gauge, but narrow-gauge routes continue to exist in certain heritage, mountain, and special railway systems. Examples include the Darjeeling Himalayan Railway, Kalka–Shimla Railway, Nilgiri Mountain Railway, and some heritage lines.

A railway route is normally described by route kilometers or track kilometers. Route kilometers measure the length of the railway route itself. Track kilometers measure the total length of all tracks. A double-track route therefore has approximately twice as many track kilometers as route kilometers, excluding sidings and other additional lines.

The railway network connects large cities, ports, industrial centers, agricultural regions, mining areas, border regions, and smaller towns. Some routes are heavily used by both passenger and freight trains. These routes require more tracks, stronger bridges, improved signalling, and carefully planned timetables. Railway routes are also classified according to their importance, traffic density, speed, and engineering requirements. A busy route may require shunting, automatic signalling, high-capacity electrical systems, longer platforms, and additional yards. 

=== Railway Tracks ===
A railway track provides the path on which a train moves. It must carry the weight of locomotives, coaches, and wagons while maintaining a safe and reasonably smooth route.

The main parts of a conventional railway track are rails, sleepers, fastenings, ballast, and formation. The rails are the steel members that directly guide and support the wheels. Sleepers hold the rails at the correct distance from each other and transfer the load to the ballast. Fastenings connect the rails to the sleepers. Ballast is the layer of crushed stone beneath and around the sleepers.

The ground beneath the ballast is called the formation or subgrade. It must be strong enough to support the track and resist water damage. In areas with weak soil, engineers may use improved earthwork, soil stabilization, geotextiles, drainage layers, or special foundations.
[[File:Railway Track India.jpg|thumb|330x330px|'''''Credit: Dr. Chinchu C.''''' A railway track in Indian Railways. ]]
Indian Railways uses long welded rails on many routes. In a long-welded rail arrangement, rail sections are joined into long lengths using welding. This reduces the number of joints and can improve riding comfort. It also reduces maintenance associated with older short rail sections.

Rails are manufactured in different weights and profiles. Heavier rails can carry higher axle loads and are generally used on routes with heavy traffic or heavy freight trains. The choice depends on traffic, speed, curvature, bridge strength, and other engineering conditions.

Sleepers may be made of prestressed concrete, steel, timber, or other materials. Prestressed concrete sleepers are widely used because they are strong, durable, and suitable for modern track systems. Special sleepers are used at turnouts, bridges, level crossings, and other locations. Ballast must be hard, durable, angular, and resistant to crushing. Its rough shape helps it interlock and hold the sleepers in position. Ballast also permits water to drain away from the track.

Track geometry refers to the shape and alignment of the track. Important features include gauge, alignment, gradient, curvature, cross-level, twist, and vertical profile. Track-maintenance machines measure these characteristics and help railway engineers identify defects. 

=== Points and Crossings ===
Points and crossings allow trains to move from one track to another. A point, or turnout, contains movable rails that guide the train toward a selected route. The crossing portion allows wheel flanges to pass through the intersection of two rails. A set of points may be operated manually, mechanically, electrically, or hydraulically. In modern installations, point machines are usually controlled from a signalling system or an electronic interlocking.

A crossover connects two parallel tracks. It allows a train to change from one line to another. Crossovers are found at stations, yards, junctions, terminal approaches, and locations where trains may need to be diverted. Points are sensitive parts of the track because they contain moving components and discontinuities in the rail path. They require regular inspection, lubrication, adjustment, cleaning, and testing. 

=== Railway Station ===
A railway station is a place where trains stop for passenger service, loading, unloading, crew changes, train regulation, or operational purposes. Some stations are small halts, while others are large complexes with many platforms, yards, offices, and passenger facilities.
[[File:Dhariwal Railway Station, Punjab, India IMG20260705172241 06.jpg|thumb|330x330px|'''''Credit: Rohitjahnavi.''''' This is Dhariwal Railway Station in Punjab. Two trains are passing by each other. ]]
A station usually contains platforms, tracks, a station building, ticketing facilities, passenger circulation areas, signalling equipment, public information systems, lighting, water supply, sanitation, and security arrangements. The size of a station depends on the number of trains, passenger demand, local geography, train lengths, interchange requirements, and the role of the station in the railway network.

Stations may be classified informally as terminal stations, through stations, junction stations, suburban stations, halt stations, or interchange stations. A terminal station is located at the end of a route or operating section. A through station lies on a route where trains can continue in both directions. A junction station connects two or more routes. A station may also handle freight operations. In that case, it may have goods sheds, loading platforms, sidings, weighbridges, cranes, warehouses, road-access facilities and others.  

=== Station Platform and Building ===
A platform provides a safe raised area from which passengers board and leave trains. Platforms may be located beside a track or between two tracks. A side platform serves trains on one side. An island platform is located between tracks and may serve trains on both sides. Stations can have several platforms connected by foot overbridges, subways, concourses, or accessible ramps. Platform height is selected to suit the trains that use the station.

Platform edges usually contain tactile or visual warning features and may have markings that indicate a safe distance from the edge. Platforms require drainage, lighting, shelter, seating, signage, public-address systems, drinking water, waste bins, and sanitation facilities. At busy stations, crowd movement must be managed so that passengers do not gather dangerously near the edge. Longer platforms may be needed for longer trains. Platform extension projects often require changes to signalling, station buildings, footbridges, lighting, drainage, and approach roads. 
[[File:Chhatrapati Shivaji Terminus (Victoria Terminus).jpg|thumb|309x309px|'''''Credit: Joe Ravi.''''' This is CSMT (Chhatrapati Shivaji Maharaj Terminal) in Mumbai. It has one the best station buildings and architecture in India.  ]]
The station building contains facilities for passengers and railway staff. It may include ticket counters, reservation offices, waiting halls, enquiry offices, toilets, refreshment areas, retiring rooms, cloakrooms, offices, and electrical rooms. Older station buildings may reflect local architectural traditions or colonial-era design. Newer buildings may use standardized designs, prefabricated components, modern materials, and energy-efficient systems.

The station building must connect conveniently with platforms and external transport. A well-planned station provides clear paths between roads, parking areas, bus stops, autorickshaw stands, pedestrian entrances, ticketing areas, and platforms. Stations may be upgraded with lifts, escalators, ramps, improved lighting, better signage, digital displays, wider concourses, and more accessible toilets. The Annual Report and Accounts for 2023–24 recorded the provision of passenger lifts, escalators, water coolers, and other station improvements during the year. 

=== Signalling ===
Signalling is the system used to control train movements. It includes signals, interlocking, track circuits, axle counters, point machines, block instruments, communication systems, and operating rules. A railway block is a section of track in which train movements are controlled. The basic principle is that trains are separated so that one train does not enter an occupied section without proper authority.

Track circuits detect whether a section of track is occupied by a train. They work by using the rails as part of an electrical circuit. When train wheels and axles connect the rails, the system detects occupation. Axle counters detect the number of axles entering and leaving a section. If the numbers match, the system may determine that the section is clear, subject to the rules and equipment design.

Signals communicate instructions to train drivers. Color-light signals are widely used. A signal aspect may tell the driver to stop, proceed, proceed with caution, or follow a speed restriction, depending on the signalling system. Automatic block signalling divides a route into multiple sections and allows following trains to move more closely while maintaining safety. The capacity benefit depends on train length, braking distance, signalling design, speed, and operating conditions. 

Station signalling controls train movements through platforms, points, loops, and junctions. It prevents conflicting movements and helps trains enter or leave a station safely. An interlocking system ensures that signals and points work in a safe sequence. A route cannot normally be cleared for a train if a conflicting route is already set.

Interlocking may be mechanical, electro-mechanical, relay-based, electronic, or computer-based. Modern electronic interlocking systems can control many routes and provide detailed status information to operators. Station control may be handled from a signal cabin, a panel room, an electronic interlocking room, or a centralized control centre. The exact arrangement varies with the size and complexity of the station.  

== Railway Yards ==
A railway yard is an arrangement of tracks used to receive, sort, store, inspect, assemble, divide, or dispatch trains and vehicles. Yards are essential because trains cannot always operate directly from one route to another without being rearranged.
[[File:Trains at railway yard in India.jpg|thumb|299x299px|'''''Credit: Aditidutttyagi10.''''' A passenger coach yard (2015) containing lots of ICF Blue coaches. ]]
A yard may contain arrival lines, departure lines, reception lines, classification lines, engine lines, carriage sidings, wagon repair lines, washing lines, and stabling lines. An arrival line receives a train entering the yard. A departure line holds a train after preparation and before it enters the main route. A stabling line temporarily stores coaches, wagons, locomotives, or maintenance vehicles.

A classification yard sorts freight wagons according to destination, train formation, commodity, or operating plan. Wagons may be moved between tracks using locomotives, shunting engines, gravity, or specialized yard systems. Yards occupy large areas of land and contain many points and crossings. Their signalling and interlocking systems are often more complex than those of ordinary stations. 

=== Freight Yards ===
Freight wagon yards handle goods trains and individual wagons. They may receive wagons from mines, factories, ports, warehouses, container terminals, or other railway yards.

Freight operations include loading, unloading, weighing, inspection, documentation, shunting, brake testing, and train formation. A freight yard may specialize in coal, cement, food grains, petroleum products, containers, automobiles, fertilizers, steel, or general merchandise. The infrastructure depends on the commodity.

Bulk goods often require conveyors, hoppers, loading gantries, pipelines, silos, cranes, or dumpers. Container yards require gantry cranes, reach stackers, paved storage areas, customs facilities where applicable, and road connections. Freight yards need good road access because goods usually move between the railway and trucks. They also require dust control, drainage, lighting, fire protection, and environmental management.

=== Passenger Yards ===
Passenger coach yards prepare coaches for service. Activities may include cleaning, watering, toilet servicing, minor repairs, charging, linen handling, safety checks, and coach formation. A terminating train may enter a coach yard after passengers leave. Staff clean the interiors, inspect equipment, replenish water, remove waste, and check doors, brakes, lights, fans, air-conditioning systems, and other components.

Passenger yards may contain washing plants, examination pits, carriage watering systems, electrical charging equipment, waste-treatment facilities, stores, and staff rooms. The time available between arrival and departure is known as the turnaround period. A short turnaround requires carefully coordinated work and clear responsibility among several departments.  

=== Marshalling Yards ===
A marshalling yard rearranges freight wagons into trains. It may receive wagons from different directions and sort them according to destination. In a flat yard, locomotives push and pull wagons through points to place them on different tracks. In a hump yard, wagons are pushed up a small artificial hill and then allowed to roll down into classification tracks under controlled conditions.

Hump yards may use retarders, wagon detectors, automatic points, computer control, and speed-control systems. The objective is to place each wagon on the correct track without excessive impact. Marshalling yards have declined in importance on some routes because block freight trains and dedicated commodity flows reduce the need for individual wagon sorting. Nevertheless, many yards remain important for regional freight operations.  

=== Railway Depots ===
A depot is a facility where railway vehicles or equipment receive routine attention and are prepared for service. Depots are generally smaller than major workshops but may cover a wide range of activities. Passenger train depots may inspect coaches, clean interiors, replenish water, service toilets, repair minor defects, and prepare rakes for departure.

Locomotive depots may carry out fueling, inspection, sanding, lubrication, fault diagnosis, and minor repairs. Electric locomotive depots also inspect pantographs, traction equipment, circuit breakers, and high-voltage systems. Maintenance depots may support track machines, overhead equipment vehicles, signal-maintenance vehicles, inspection cars, and road–rail vehicles. 

=== Railway Workshops ===
A railway workshop is a large maintenance and manufacturing facility for locomotives, coaches, wagons, track machines, bridges, signalling equipment, or other railway assets. Workshops perform periodic overhauls that are more extensive than routine shed maintenance. A vehicle may be dismantled, cleaned, inspected, repaired, tested, painted, and reassembled. 

Locomotive workshops work on traction motors, engines, gearboxes, bogies, wheelsets, braking systems, electrical cabinets, control systems, and body structures. The exact work depends on whether the locomotive is electric, diesel, or another type. Carriage workshops maintain passenger coaches. They may repair body panels, doors, windows, seats, toilets, air-conditioning systems, electrical wiring, brake equipment, suspension components, and bogies.

Wagon workshops maintain freight wagons used for coal, cement, grain, containers, petroleum products, steel, automobiles, and other goods. They inspect wagon bodies, doors, couplers, brake systems, wheels, and underframes. Railway workshops may also manufacture or repair track components, tools, signalling equipment, bridge parts, electrical equipment, and specialized machines. Official railway reporting has described signal workshops producing equipment such as point machines, block instruments, axle counters, relays, and related items. 

Workshops use cranes, lifting jacks, wheel lathes, milling machines, drilling machines, welding equipment, paint booths, hydraulic presses, testing rigs, electrical test benches, and computerized diagnostic systems. Railway workshops need stores for spare parts, raw materials, lubricants, electrical components, fasteners, safety equipment, and consumables. Inventory management is important because both shortages and excessive stock can increase costs. 

== Heritage and Mountain Railways ==
Heritage railways preserve historic routes, stations, bridges, locomotives, coaches, workshops, and operating practices. Some heritage lines continue to provide regular services, while others focus on tourism and education.
[[File:Nilgiri Mountain Railways, Hillgrove Station, India.jpg|thumb|253x253px|'''Credit: Arindambasu2.''' This is the Nilgiri Mountain Railways of India. This is Hillgrove station. ]]
Mountain railways often use steep gradients, sharp curves, special bridges, tunnels, zigzags, loops, and unique engineering arrangements. Their infrastructure may require specialized maintenance because of age, terrain, and limited space. Heritage conservation must balance historical authenticity with modern safety requirements. Some structures may be repaired using traditional methods, while hidden components may be strengthened with modern materials. 

== Railway Construction ==
Railway construction begins with planning, surveys, alignment selection, land acquisition, environmental assessment, design, and approvals. Construction then proceeds through earthwork, bridges, track formation, track laying, electrification, signalling, station building, testing, and commissioning. Survey teams study terrain, soil, drainage, existing roads, settlements, rivers, utilities, and environmental features. Modern surveys may use satellite imagery, drones, geographic information systems, and digital terrain models.

Earthwork forms the base for the railway. It includes embankments, cuttings, soil improvement, slope protection, and drainage. After the formation is ready, bridges, culverts, retaining structures, and other civil works are completed. Track workers then lay sleepers, rails, ballast, points, crossings, and related components.

Electrification and signalling are installed after or alongside track construction. Testing verifies track geometry, electrical clearances, signal logic, communication, points, brakes, and emergency arrangements. A new line or upgraded route is opened only after inspections, trials, authorizations, and safety procedures have been completed. 

=== Railway Interoperability ===
Interoperability means that different railway components and organizations can work together. A locomotive must be compatible with track, overhead equipment, signalling, platforms, loading gauges, couplers, brakes, and operating rules.

Interoperability is also important when trains cross zone boundaries or use infrastructure managed by different authorities. Standardized equipment and procedures reduce delays and simplify maintenance. Problems can occur when older and newer systems coexist. For example, a route may contain different signalling technologies, platform arrangements, electrification equipment, or communication systems. Railway planners must manage these interfaces carefully.  

== Extra Parts of Railway Systems ==

=== Dedicated Freight Corridors (DFC) ===
A dedicated freight corridor is a railway route designed mainly for freight traffic. It may have higher axle-load capacity, longer loops, larger loading clearances, modern signalling, and fewer conflicts with passenger trains. Separating freight and passenger traffic can increase capacity on existing routes. Freight trains may operate with longer formations and heavier loads than on older mixed-traffic routes, subject to the corridor’s design.

Dedicated freight corridors require new track, bridges, tunnels, stations or crossing facilities, electric traction, signalling, maintenance bases, control centers, and logistics terminals. Their effectiveness depends not only on the railway line but also on connecting routes, ports, industrial sidings, warehouses, road networks, and cargo demand. 

=== Suburban Railway Systems ===
Suburban railway systems carry large numbers of passengers over short and medium distances. They require frequent services, high platform capacity, rapid boarding, reliable signalling, and efficient passenger circulation. Suburban stations often have multiple platforms, footbridges, ticketing gates, escalators, lifts, shelters, and large pedestrian approaches. Some have separate areas for different directions or services.

Suburban infrastructure may include dedicated tracks, fast and slow lines, stabling yards, maintenance depots, automatic signalling, traction substations, and centralized control. Peak-hour demand creates special challenges. Platforms and footbridges must manage very high passenger volumes, while train schedules must maintain short intervals without compromising safety. 

=== Metro Systems ===
[[File:A metro train entering Baranagar Metro station in Kolkata, India.jpg|thumb|267x267px|'''''Credit: Ravi Dwivedi.''''' A metro from the Kolkata Metro System enters Baranagar metro station. ]]
Metro systems and regional railways may connect with Indian Railways at interchange stations. They can have different rolling stock, signalling systems, fare systems, platform heights, electrification arrangements, and operating authorities. 

An interchange station must allow passengers to transfer easily. Ideally, the connection includes short walking paths, clear signs, weather protection, lifts, escalators, integrated ticketing where available, and coordination between train schedules. Poorly designed transfers can make a journey difficult even when the railway and metro lines themselves operate well. Integration therefore includes both physical infrastructure and passenger information. 

== Railway Siding ==
A siding is a track connected to a main line or station track but used for a special purpose. Sidings may serve factories, mines, ports, warehouses, military facilities, construction sites, and passenger terminals. Private sidings connect customer facilities to the railway network. The customer may build and maintain parts of the siding, while railway authorities regulate its connection and operation.

A loading siding may contain platforms, conveyors, cranes, hoppers, weighbridges, and storage areas. An industrial siding may allow raw materials to arrive and finished products to leave by rail. Sidings reduce congestion on the main line by allowing loading, unloading, stabling, or shunting to occur away from through traffic.

== Future ==
Future railway infrastructure in India is likely to focus on capacity, safety, electrification, freight efficiency, station redevelopment, urban integration, digital systems, and improved maintenance. High-capacity routes may receive additional tracks, faster signalling, stronger bridges, longer platforms, improved junctions, and better terminals. Freight infrastructure may expand through dedicated corridors, logistics parks, container terminals, private sidings, and multimodal connections.

Passenger facilities may become more accessible and integrated with buses, metro systems, taxis, cycling facilities, and pedestrian networks. Future projects will also need to address climate resilience. More intense rainfall, flooding, heat, coastal risks, landslides, and changing weather patterns can affect track, bridges, stations, electrical systems, and communication networks.  
[[Category:Book:Indian Railways]]</text>
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  <page>
    <title>Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6/3. d4/3...exd4</title>
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|name=Modern attack
|eco=[[Chess/ECOC|C43]]
|parent=[[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6|Russian game]] → [[../|Modern attack]]
}}
== 3...exd4 ==
Black takes the d-pawn, and half-opens the e-file with their king still in the centre. This is playable but less standard.

[[/4. e5|'''4. e5!''']] is the main move, attacking the knight. Typically this lines involves trading both d- and e-pawns and opening the centre fully. 

There aren't many places for Black's knight to go. If 4...Ne5?, 5. Qxd4 and the knight must move again, while White has recovered the pawn with a development and space lead. Likewise if 4...Ng4? then 5. h3 forces the knight to move again. 5...Nh6 6. Qxd4 {{chess/not|++}}. Of course Black hardly wishes to un-develop their knight with 4...Ng8. 

Therefore 4...Ne4 is the main move. After 5. Qxd4 (the called the centre attack), Black can defend the knight with 5...d5 while making a useful move to open up their queen's bishop. The line continues 6. exd6 e.p. Nxd6 7. Nc3. Alternative fifth moves for White include 5. Qe2 and 5. Bb4+. 5. Qe2, the Steinitz attack, attacks the knight on e4, and White prepares to take the d4-pawn with their knight instead. Because of the x-ray, Black cannot defend the knight with 5...d4?? (6. exd6 e.p. and the knight is pinned to the king.) 5. Bb4+, the Tal gambit, pins the d-pawn, and lures the c-pawn forward, 5...c6, to where it cannot defend d6 and where it prevents ...Nc6 from gaining time on queen after 6. Qxd4. 

The final move to consider is 4...Qe7, to pin the e-pawn, but after 5. Be2 the knight is hanging again. 5...Ne4 6. Qxd4 and a difference with the main line is that Black has the move 6...Qb4+ 7. c3 Qxd4 8. Nxd4 {{chess/not|+}}. 5...Ng4 and a line is 6. Qxd4 d6 (defends N) 7. exd6 Qxd6 8. O-O {{chess/not|+}}. 

[[/4. Bc4|'''4. Bc4?!''']] is a transposition to the Urusov gambit, more usually reached through the bishop's opening (1. e4 e5 2. Bc4 Nf6 3. d4 exd4 4. Nf3). 

'''4. Nxd4?!''' is inferior. 4...Nxe4 5. Qe2 Qe7 and Black is up a pawn though the game is about even, and White could ask for a draw with 6. Nf5 Qe6 7. Nd4 etc.   

=== History ===
Of the two ways Black can take after 3. d4, 3...exd4 is the most common continuation at the club-level.&lt;ref&gt;49% of games versus 29% for ...Nxe4 in the Lichess database, as of September 2026.&lt;/ref&gt;

Steinitz gave similar attention to both options in his analysis. Against the line 4. e5 Ne4 he recommended 5. Qe2, now called the Steinitz attack, over the natural looking 5. Qxd4. Against the line 4. e5 Qe7 5. Be2 Ng4, he recommended 6. O-O over 6. Qxd4, giving up the pawn for activity, writing, &quot;gives White an attack similar to that arising in the Horwitz and Frazer variations of the Scotch Gambit but ... White obtains a much stronger attack ... chiefly due to the loose position of the adverse [king's knight].&quot;&lt;ref&gt;{{subst:chess/src|steinitz|pages=116-137}}&lt;/ref&gt;

3...exd4 was the line recommended in [[w:David Vincent Hooper|David Hooper]]'s 1967 book on 1. e4 e5.&lt;ref&gt;{{cite book|last=Hooper|first=David|title=A Complete Defence to 1 P-K4: A Study of Petroff's Defence|publisher=Pergamon Press|location=Oxford|year=1967}}&lt;/ref&gt;

Today 3...Nxe4 is the clear preference in modern tournament chess,&lt;ref&gt;3...Nxe4 is the continuation in 93% of games in the Lichess Master's database.&lt;/ref&gt; and 3...exd4 a minor sideline, although Stockfish finds both to be sound. 

== Theory table ==
{{ChessTable}}

{{ChessMid}}

== References ==
{{reflist}}
=== See also ===
{{Chess Opening Theory/Footer}}</text>
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    <revision>
      <id>4671192</id>
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|name=Modern attack
|eco=[[Chess/ECOC|C43]]
|parent=[[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6|Russian game]] → [[../|Modern attack]]
}}
== 3...exd4 ==
Black takes the d-pawn, and half-opens the e-file with their king still in the centre. This is playable but less standard.

[[/4. e5|'''4. e5!''']] is the main move, attacking the knight. Typically this lines involves trading both d- and e-pawns and opening the centre fully. 

There aren't many places for Black's knight to go. If 4...Ne5?, 5. Qxd4 and the knight must move again, while White has recovered the pawn with a development and space lead. Likewise if 4...Ng4? then 5. h3 forces the knight to move again. 5...Nh6 6. Qxd4 {{chess/not|++}}. Of course Black hardly wishes to un-develop their knight with 4...Ng8. 

Therefore 4...Ne4 is the main move. After 5. Qxd4 (the called the centre attack), Black can defend the knight with 5...d5 while making a useful move to open up their queen's bishop. The line continues 6. exd6 e.p. Nxd6 7. Nc3. Alternative fifth moves for White include 5. Qe2 and 5. Bb4+. 5. Qe2, the Steinitz attack, attacks the knight on e4, and White prepares to take the d4-pawn with their knight instead. Because of the x-ray, Black cannot defend the knight with 5...d4?? (6. exd6 e.p. and the knight is pinned to the king.) 5. Bb4+, the Tal gambit, pins the d-pawn, and lures the c-pawn forward, 5...c6, to where it cannot defend d6 and where it prevents ...Nc6 from gaining time on queen after 6. Qxd4. 

The final move to consider is 4...Qe7, to pin the e-pawn, but after 5. Be2 the knight is hanging again. 5...Ne4 6. Qxd4 and a difference with the main line is that Black has the move 6...Qb4+ 7. c3 Qxd4 8. Nxd4 {{chess/not|+}}. 5...Ng4 and a line is 6. Qxd4 d6 (defends N) 7. exd6 Qxd6 8. O-O {{chess/not|+}}. 

[[/4. Bc4|'''4. Bc4?!''']] is a transposition to the Urusov gambit, more usually reached through the bishop's opening (1. e4 e5 2. Bc4 Nf6 3. d4 exd4 4. Nf3). 

'''4. Nxd4?!''' is inferior. 4...Nxe4 5. Qe2 Qe7 and Black is up a pawn though the game is about even, and White could ask for a draw with 6. Nf5 Qe6 7. Nd4 etc.   

=== History ===
Of the two ways Black can take after 3. d4, 3...exd4 is the most common continuation at the club-level.&lt;ref&gt;49% of games versus 29% for ...Nxe4 in the Lichess database, as of September 2026.&lt;/ref&gt;

Steinitz gave similar attention to both options in his analysis. Against the line 4. e5 Ne4 he recommended 5. Qe2, now called the Steinitz attack, over the natural looking 5. Qxd4. Against the line 4. e5 Qe7 5. Be2 Ng4, he recommended 6. O-O over 6. Qxd4, giving up the pawn for activity, writing, &quot;gives White an attack similar to that arising in the Horwitz and Frazer variations of the Scotch Gambit but ... White obtains a much stronger attack ... chiefly due to the loose position of the adverse [king's knight].&quot;{{Cite book |title=Modern Chess Instructor |last=Steinitz |first=Wilhelm |publisher=G. P. Putnam's Sons |year=1889 |location=London |url=https://archive.org/details/modernchessinst00steigoog |pages=116-137}}


3...exd4 was the line recommended in [[w:David Vincent Hooper|David Hooper]]'s 1967 book on 1. e4 e5.&lt;ref&gt;{{cite book|last=Hooper|first=David|title=A Complete Defence to 1 P-K4: A Study of Petroff's Defence|publisher=Pergamon Press|location=Oxford|year=1967}}&lt;/ref&gt;

Today 3...Nxe4 is the clear preference in modern tournament chess,&lt;ref&gt;3...Nxe4 is the continuation in 93% of games in the Lichess Master's database.&lt;/ref&gt; and 3...exd4 a minor sideline, although Stockfish finds both to be sound.

== Theory table ==
{{ChessTable}}

{{ChessMid}}

== References ==
{{reflist}}
=== See also ===
{{Chess Opening Theory/Footer}}</text>
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|parent=[[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6|Russian game]] → [[../|Modern attack]]
}}
== 3...exd4 ==
Black takes the d-pawn, and half-opens the e-file with their king still in the centre. This is playable but less standard.

[[/4. e5|'''4. e5!''']] is the main move, attacking the knight. Typically this lines involves trading both d- and e-pawns and opening the centre fully. 

There aren't many places for Black's knight to go. If 4...Ne5?, 5. Qxd4 and the knight must move again, while White has recovered the pawn with a development and space lead. Likewise if 4...Ng4? then 5. h3 forces the knight to move again. 5...Nh6 6. Qxd4 {{chess/not|++}}. Of course Black hardly wishes to un-develop their knight with 4...Ng8. 

Therefore 4...Ne4 is the main move. After 5. Qxd4 (the called the centre attack), Black can defend the knight with 5...d5 while making a useful move to open up their queen's bishop. The line continues 6. exd6 e.p. Nxd6 7. Nc3. Alternative fifth moves for White include 5. Qe2 and 5. Bb4+. 5. Qe2, the Steinitz attack, attacks the knight on e4, and White prepares to take the d4-pawn with their knight instead. Because of the x-ray, Black cannot defend the knight with 5...d4?? (6. exd6 e.p. and the knight is pinned to the king.) 5. Bb4+, the Tal gambit, pins the d-pawn, and lures the c-pawn forward, 5...c6, to where it cannot defend d6 and where it prevents ...Nc6 from gaining time on queen after 6. Qxd4. 

The final move to consider is 4...Qe7, to pin the e-pawn, but after 5. Be2 the knight is hanging again. 5...Ne4 6. Qxd4 and a difference with the main line is that Black has the move 6...Qb4+ 7. c3 Qxd4 8. Nxd4 {{chess/not|+}}. 5...Ng4 and a line is 6. Qxd4 d6 (defends N) 7. exd6 Qxd6 8. O-O {{chess/not|+}}. 

[[/4. Bc4|'''4. Bc4?!''']] is a transposition to the Urusov gambit, more usually reached through the bishop's opening (1. e4 e5 2. Bc4 Nf6 3. d4 exd4 4. Nf3). 

'''4. Nxd4?!''' is inferior. 4...Nxe4 5. Qe2 Qe7 and Black is up a pawn though the game is about even, and White could ask for a draw with 6. Nf5 Qe6 7. Nd4 etc.   

=== History ===
Of the two ways Black can take after 3. d4, 3...exd4 is the most common continuation at the club-level.&lt;ref&gt;49% of games versus 29% for ...Nxe4 in the Lichess database, as of September 2026.&lt;/ref&gt;

Steinitz gave similar attention to both options in his analysis. Against the line 4. e5 Ne4 he recommended 5. Qe2, now called the Steinitz attack, over the natural looking 5. Qxd4. Against the line 4. e5 Qe7 5. Be2 Ng4, he recommended 6. O-O over 6. Qxd4, giving up the pawn for activity, writing, &quot;gives White an attack similar to that arising in the Horwitz and Frazer variations of the Scotch Gambit but ... White obtains a much stronger attack ... chiefly due to the loose position of the adverse [king's knight].&quot;&lt;ref&gt;{{Cite book |title=Modern Chess Instructor |last=Steinitz |first=Wilhelm |publisher=G. P. Putnam's Sons |year=1889 |location=London |url=https://archive.org/details/modernchessinst00steigoog |pages=116-137}}&lt;/ref&gt;

3...exd4 was the line recommended in [[w:David Vincent Hooper|David Hooper]]'s 1967 book on 1. e4 e5.&lt;ref&gt;{{cite book|last=Hooper|first=David|title=A Complete Defence to 1 P-K4: A Study of Petroff's Defence|publisher=Pergamon Press|location=Oxford|year=1967}}&lt;/ref&gt;

Today 3...Nxe4 is the clear preference in modern tournament chess,&lt;ref&gt;3...Nxe4 is the continuation in 93% of games in the Lichess Master's database.&lt;/ref&gt; and 3...exd4 a minor sideline, although Stockfish finds both to be sound.

== Theory table ==
{{ChessTable}}

{{ChessMid}}

== References ==
{{reflist}}
=== See also ===
{{Chess Opening Theory/Footer}}</text>
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    <revision>
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|name=Modern attack
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|parent=[[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6|Russian game]] → [[../|Modern attack]]
}}
== 3...exd4 ==
Black takes the d-pawn, and half-opens the e-file with their king still in the centre. This is playable but less standard.

[[/4. e5|'''4. e5!''']] is the main move, attacking the knight. Typically this lines involves trading both d- and e-pawns and opening the centre fully. The main line continues 4...Ne4 5. Qxd4 d5 6. exd5 e.p. Nxd6 {{chess/not|+}}, although there are some turn four and five sidelines to consider.

[[/4. Bc4|'''4. Bc4?!''']] is a transposition to the Urusov gambit, more usually reached through the bishop's opening (1. e4 e5 2. Bc4 Nf6 3. d4 exd4 4. Nf3). 

'''4. Nxd4?!''' is inferior. 4...Nxe4 5. Qe2 Qe7 and Black is up a pawn though the game is about even, and White could ask for a draw with 6. Nf5 Qe6 7. Nd4 etc.   

=== History ===
Of the two ways Black can take after 3. d4, 3...exd4 is the most common continuation at the club-level.&lt;ref&gt;49% of games versus 29% for ...Nxe4 in the Lichess database, as of September 2026.&lt;/ref&gt;

Steinitz gave similar attention to both options in his analysis. Against the line 4. e5 Ne4 he recommended 5. Qe2, now called the Steinitz attack, over the natural looking 5. Qxd4. Against the line 4. e5 Qe7 5. Be2 Ng4, he recommended 6. O-O over 6. Qxd4, giving up the pawn for activity, writing, &quot;gives White an attack similar to that arising in the Horwitz and Frazer variations of the Scotch Gambit but ... White obtains a much stronger attack ... chiefly due to the loose position of the adverse [king's knight].&quot;&lt;ref&gt;{{Cite book |title=Modern Chess Instructor |last=Steinitz |first=Wilhelm |publisher=G. P. Putnam's Sons |year=1889 |location=London |url=https://archive.org/details/modernchessinst00steigoog |pages=116-137}}&lt;/ref&gt;

3...exd4 was the line recommended in [[w:David Vincent Hooper|David Hooper]]'s 1967 book on 1. e4 e5.&lt;ref&gt;{{cite book|last=Hooper|first=David|title=A Complete Defence to 1 P-K4: A Study of Petroff's Defence|publisher=Pergamon Press|location=Oxford|year=1967}}&lt;/ref&gt;

Today 3...Nxe4 is the clear preference in modern tournament chess,&lt;ref&gt;3...Nxe4 is the continuation in 93% of games in the Lichess Master's database.&lt;/ref&gt; and 3...exd4 a minor sideline, although Stockfish finds both to be sound.

== Theory table ==
{{ChessTable}}

{{ChessMid}}

== References ==
{{reflist}}
=== See also ===
{{Chess Opening Theory/Footer}}</text>
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      <text bytes="847" sha1="4ce8x81h49ugf0r1j79f13sp1rftmm9" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management.</text>
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      <text bytes="1950" sha1="kd06qaf6u4e2kb4txzpeylgzsj47w6a" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity.</text>
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      <text bytes="1963" sha1="0473x3rw6mhwtio7hdbcvqm13a8rpn3" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity.

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      <text bytes="2915" sha1="7ljr8uzgw0vmyir3vue6jv8m63wdyjo" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity. 

== Organizational Structure ==
The Signaling and Telecommunication function is organized as a dedicated department within Indian Railways, with responsibilities divided between headquarters, zonal railways, divisions, and field units. At the apex, the Signal and Telecommunication Directorate on the Railway Board handles policy, design, development, and standardization of S&amp;T systems for the entire network. 

On the ground, the Open Line Organization of the S&amp;T Department is responsible for the day-to-day upkeep of signalling and telecommunication assets along running lines, at stations, in yards, and in control offices.  Signal and Telecom workshops, such as the one at Byculla on Central Railway, carry out repairs, overhauling, and testing of equipment.  This hierarchical structure ensures that technical standards are uniformly applied while allowing zonal and divisional units to adapt maintenance and implementation to local conditions. {{BookCat}}</text>
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      <text bytes="4093" sha1="92zijuz6ufcjyxzoxmjldgruqd2yemb" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity. 

== Organizational Structure ==
The Signaling and Telecommunication function is organized as a dedicated department within Indian Railways, with responsibilities divided between headquarters, zonal railways, divisions, and field units. At the apex, the Signal and Telecommunication Directorate on the Railway Board handles policy, design, development, and standardization of S&amp;T systems for the entire network. 

On the ground, the Open Line Organization of the S&amp;T Department is responsible for the day-to-day upkeep of signalling and telecommunication assets along running lines, at stations, in yards, and in control offices.  Signal and Telecom workshops, such as the one at Byculla on Central Railway, carry out repairs, overhauling, and testing of equipment.  This hierarchical structure ensures that technical standards are uniformly applied while allowing zonal and divisional units to adapt maintenance and implementation to local conditions.  

== Signaling ==
Signaling systems form the safety-critical core of railway communication, governing how trains are authorized to move along sections of track and through stations. Indian Railways has progressively replaced outdated multi-cabin mechanical signalling with advanced systems such as Route Relay Interlocking (RRI), Panel Interlocking (PI), and Electronic Interlocking (EI), often integrated with Multi Aspect Color Light signals. These systems reduce human error, increase route-setting speed, and allow higher line capacity. 

Track circuits and axle counters are used to detect the presence of trains on specific sections of track, feeding this information to interlocking systems and control panels.  Southern Railway, for example, introduced Audio Frequency Track Circuits in the mid-1990s, improving detection reliability under diverse track conditions. More recently, advanced train protection systems such as Train Protection and Warning System (TPWS), Indian Railways’ own Train Collision Avoidance System (TCAS, also called Kavach), and elements of the European Train Control System (ETCS) have been introduced or piloted to further enhance safety. 

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      <text bytes="5330" sha1="snm602xb8m5wkv4aboasgnuao42vfeu" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity. 

== Organizational Structure ==
The Signaling and Telecommunication function is organized as a dedicated department within Indian Railways, with responsibilities divided between headquarters, zonal railways, divisions, and field units. At the apex, the Signal and Telecommunication Directorate on the Railway Board handles policy, design, development, and standardization of S&amp;T systems for the entire network. 

On the ground, the Open Line Organization of the S&amp;T Department is responsible for the day-to-day upkeep of signalling and telecommunication assets along running lines, at stations, in yards, and in control offices.  Signal and Telecom workshops, such as the one at Byculla on Central Railway, carry out repairs, overhauling, and testing of equipment.  This hierarchical structure ensures that technical standards are uniformly applied while allowing zonal and divisional units to adapt maintenance and implementation to local conditions.  

== Railway Signaling ==
Signaling systems form the safety-critical core of railway communication, governing how trains are authorized to move along sections of track and through stations. Indian Railways has progressively replaced outdated multi-cabin mechanical signalling with advanced systems such as Route Relay Interlocking (RRI), Panel Interlocking (PI), and Electronic Interlocking (EI), often integrated with Multi Aspect Color Light signals. These systems reduce human error, increase route-setting speed, and allow higher line capacity. 

Track circuits and axle counters are used to detect the presence of trains on specific sections of track, feeding this information to interlocking systems and control panels.  Southern Railway, for example, introduced Audio Frequency Track Circuits in the mid-1990s, improving detection reliability under diverse track conditions. More recently, advanced train protection systems such as Train Protection and Warning System (TPWS), Indian Railways’ own Train Collision Avoidance System (TCAS, also called Kavach), and elements of the European Train Control System (ETCS) have been introduced or piloted to further enhance safety.  

== Telecommunication Infrastructure ==
The telecommunication infrastructure of Indian Railways provides the backbone for both safety-related operational communication and administrative and passenger information systems. Optical Fibre Cable (OFC) forms the core of this network, creating a high-capacity, nation-wide backbone that carries voice, data, and control traffic.  By the early 2010s, Indian Railways had already deployed over 42,000 route kilometers of OFC, carrying tens of gigabits of traffic, and had shifted most control communication onto this fibre network. 

This OFC-based network supports the Railways Information Network (RAILNET), which interconnects offices, control centres, and stations across the country.  It also underpins key IT applications such as the Passenger Reservation System (PRS), Unreserved Ticketing System (UTS), Freight Operation Information System (FOIS), Crew Management System (CMS), and Coaching Operating Information System (COIS).  In parallel, the Unified Telecom Backbone is being upgraded using Internet Protocol Multi-Protocol Label Switching (IP MPLS) technology to meet growing bandwidth needs; by 2025–26, IP MPLS had been commissioned at well over a thousand stations. 

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      <text bytes="5903" sha1="suxjkmkc9156btr6mxqzagaml36aaqo" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity. 

== Organizational Structure ==
The Signaling and Telecommunication function is organized as a dedicated department within Indian Railways, with responsibilities divided between headquarters, zonal railways, divisions, and field units. At the apex, the Signal and Telecommunication Directorate on the Railway Board handles policy, design, development, and standardization of S&amp;T systems for the entire network. 

On the ground, the Open Line Organization of the S&amp;T Department is responsible for the day-to-day upkeep of signalling and telecommunication assets along running lines, at stations, in yards, and in control offices.  Signal and Telecom workshops, such as the one at Byculla on Central Railway, carry out repairs, overhauling, and testing of equipment.  This hierarchical structure ensures that technical standards are uniformly applied while allowing zonal and divisional units to adapt maintenance and implementation to local conditions.  

== Railway Signaling ==
Signaling systems form the safety-critical core of railway communication, governing how trains are authorized to move along sections of track and through stations. Indian Railways has progressively replaced outdated multi-cabin mechanical signalling with advanced systems such as Route Relay Interlocking (RRI), Panel Interlocking (PI), and Electronic Interlocking (EI), often integrated with Multi Aspect Color Light signals. These systems reduce human error, increase route-setting speed, and allow higher line capacity. 

Track circuits and axle counters are used to detect the presence of trains on specific sections of track, feeding this information to interlocking systems and control panels.  Southern Railway, for example, introduced Audio Frequency Track Circuits in the mid-1990s, improving detection reliability under diverse track conditions. More recently, advanced train protection systems such as Train Protection and Warning System (TPWS), Indian Railways’ own Train Collision Avoidance System (TCAS, also called Kavach), and elements of the European Train Control System (ETCS) have been introduced or piloted to further enhance safety.  

== Telecommunication Infrastructure ==
The telecommunication infrastructure of Indian Railways provides the backbone for both safety-related operational communication and administrative and passenger information systems. Optical Fibre Cable (OFC) forms the core of this network, creating a high-capacity, nation-wide backbone that carries voice, data, and control traffic.  By the early 2010s, Indian Railways had already deployed over 42,000 route kilometers of OFC, carrying tens of gigabits of traffic, and had shifted most control communication onto this fibre network. 

This OFC-based network supports the Railways Information Network (RAILNET), which interconnects offices, control centers, and stations across the country.  It also underpins key IT applications such as the Passenger Reservation System (PRS), Unreserved Ticketing System (UTS), Freight Operation Information System (FOIS), Crew Management System (CMS), and Coaching Operating Information System (COIS). In parallel, the Unified Telecom Backbone is being upgraded using Internet Protocol Multi-Protocol Label Switching (IP MPLS) technology to meet growing bandwidth needs; by 2025–26, IP MPLS had been commissioned at well over a thousand stations.  

=== Train Operational Communication ===
Train control and operational communication refer to the systems that enable real-time coordination between drivers, guards, station masters, and control offices to manage train movements safely and efficiently. Traditionally, Indian Railways has used a “Driver–Guard–Station–Controller” system, often called the Control Communication System, based on Very High Frequency (VHF) wireless handsets for communication between drivers, guards, and station masters, and landline telephones for station-to-control office links. 

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      <text bytes="6523" sha1="p4trsr6o8njd221ydatvy5exe4n4204" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity. 

== Organizational Structure ==
The Signaling and Telecommunication function is organized as a dedicated department within Indian Railways, with responsibilities divided between headquarters, zonal railways, divisions, and field units. At the apex, the Signal and Telecommunication Directorate on the Railway Board handles policy, design, development, and standardization of S&amp;T systems for the entire network. 

On the ground, the Open Line Organization of the S&amp;T Department is responsible for the day-to-day upkeep of signalling and telecommunication assets along running lines, at stations, in yards, and in control offices.  Signal and Telecom workshops, such as the one at Byculla on Central Railway, carry out repairs, overhauling, and testing of equipment.  This hierarchical structure ensures that technical standards are uniformly applied while allowing zonal and divisional units to adapt maintenance and implementation to local conditions.  

== Railway Signaling ==
Signaling systems form the safety-critical core of railway communication, governing how trains are authorized to move along sections of track and through stations. Indian Railways has progressively replaced outdated multi-cabin mechanical signalling with advanced systems such as Route Relay Interlocking (RRI), Panel Interlocking (PI), and Electronic Interlocking (EI), often integrated with Multi Aspect Color Light signals. These systems reduce human error, increase route-setting speed, and allow higher line capacity. 

Track circuits and axle counters are used to detect the presence of trains on specific sections of track, feeding this information to interlocking systems and control panels.  Southern Railway, for example, introduced Audio Frequency Track Circuits in the mid-1990s, improving detection reliability under diverse track conditions. More recently, advanced train protection systems such as Train Protection and Warning System (TPWS), Indian Railways’ own Train Collision Avoidance System (TCAS, also called Kavach), and elements of the European Train Control System (ETCS) have been introduced or piloted to further enhance safety.  

== Telecommunication Infrastructure ==
The telecommunication infrastructure of Indian Railways provides the backbone for both safety-related operational communication and administrative and passenger information systems. Optical Fibre Cable (OFC) forms the core of this network, creating a high-capacity, nation-wide backbone that carries voice, data, and control traffic.  By the early 2010s, Indian Railways had already deployed over 42,000 route kilometers of OFC, carrying tens of gigabits of traffic, and had shifted most control communication onto this fibre network. 

This OFC-based network supports the Railways Information Network (RAILNET), which interconnects offices, control centers, and stations across the country.  It also underpins key IT applications such as the Passenger Reservation System (PRS), Unreserved Ticketing System (UTS), Freight Operation Information System (FOIS), Crew Management System (CMS), and Coaching Operating Information System (COIS). In parallel, the Unified Telecom Backbone is being upgraded using Internet Protocol Multi-Protocol Label Switching (IP MPLS) technology to meet growing bandwidth needs; by 2025–26, IP MPLS had been commissioned at well over a thousand stations.  

=== Train Operational Communication ===
Train control and operational communication refer to the systems that enable real-time coordination between drivers, guards, station masters, and control offices to manage train movements safely and efficiently. Traditionally, Indian Railways has used a “Driver–Guard–Station–Controller” system, often called the Control Communication System, based on Very High Frequency (VHF) wireless handsets for communication between drivers, guards, and station masters, and landline telephones for station-to-control office links.  

To improve reliability, coverage, and functionality, Indian Railways has been transitioning to Mobile Train Radio Communication (MTRC) based on GSM-R (Global System for Mobile Communications – Railway) technology.  GSM-R provides dedicated railway radio channels, supports voice and data services, and is designed to meet the stringent safety and performance requirements of modern rail operations. This shift is part of a broader effort to integrate voice communication with signalling and train control systems, enabling features such as direct driver–controller communication and enhanced emergency handling.  

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      <text bytes="7873" sha1="nrciwdl4b6aom3rgk56y70zpiixo6uq" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity. 

== Organizational Structure ==
The Signaling and Telecommunication function is organized as a dedicated department within Indian Railways, with responsibilities divided between headquarters, zonal railways, divisions, and field units. At the apex, the Signal and Telecommunication Directorate on the Railway Board handles policy, design, development, and standardization of S&amp;T systems for the entire network. 

On the ground, the Open Line Organization of the S&amp;T Department is responsible for the day-to-day upkeep of signalling and telecommunication assets along running lines, at stations, in yards, and in control offices.  Signal and Telecom workshops, such as the one at Byculla on Central Railway, carry out repairs, overhauling, and testing of equipment.  This hierarchical structure ensures that technical standards are uniformly applied while allowing zonal and divisional units to adapt maintenance and implementation to local conditions.  

== Railway Signaling ==
Signaling systems form the safety-critical core of railway communication, governing how trains are authorized to move along sections of track and through stations. Indian Railways has progressively replaced outdated multi-cabin mechanical signalling with advanced systems such as Route Relay Interlocking (RRI), Panel Interlocking (PI), and Electronic Interlocking (EI), often integrated with Multi Aspect Color Light signals. These systems reduce human error, increase route-setting speed, and allow higher line capacity. 
[[File:Railway signal at Tiruchirappalli Junction railway station 13.jpg|thumb|267x267px|'''''Credit: PJeganathan.''''' Some railway signals which are part of the Tiruchirappalli Junction. ]]
Track circuits and axle counters are used to detect the presence of trains on specific sections of track, feeding this information to interlocking systems and control panels.  Southern Railway, for example, introduced Audio Frequency Track Circuits in the mid-1990s, improving detection reliability under diverse track conditions. More recently, advanced train protection systems such as Train Protection and Warning System (TPWS), Indian Railways’ own Train Collision Avoidance System (TCAS, also called Kavach), and elements of the European Train Control System (ETCS) have been introduced or piloted to further enhance safety.  

== Telecommunication Infrastructure ==
The telecommunication infrastructure of Indian Railways provides the backbone for both safety-related operational communication and administrative and passenger information systems. Optical Fibre Cable (OFC) forms the core of this network, creating a high-capacity, nation-wide backbone that carries voice, data, and control traffic.  By the early 2010s, Indian Railways had already deployed over 42,000 route kilometers of OFC, carrying tens of gigabits of traffic, and had shifted most control communication onto this fibre network. 

This OFC-based network supports the Railways Information Network (RAILNET), which interconnects offices, control centers, and stations across the country.  It also underpins key IT applications such as the Passenger Reservation System (PRS), Unreserved Ticketing System (UTS), Freight Operation Information System (FOIS), Crew Management System (CMS), and Coaching Operating Information System (COIS). In parallel, the Unified Telecom Backbone is being upgraded using Internet Protocol Multi-Protocol Label Switching (IP MPLS) technology to meet growing bandwidth needs; by 2025–26, IP MPLS had been commissioned at well over a thousand stations.  

=== Train Operational Communication ===
Train control and operational communication refer to the systems that enable real-time coordination between drivers, guards, station masters, and control offices to manage train movements safely and efficiently. Traditionally, Indian Railways has used a “Driver–Guard–Station–Controller” system, often called the Control Communication System, based on Very High Frequency (VHF) wireless handsets for communication between drivers, guards, and station masters, and landline telephones for station-to-control office links.  

To improve reliability, coverage, and functionality, Indian Railways has been transitioning to Mobile Train Radio Communication (MTRC) based on GSM-R (Global System for Mobile Communications – Railway) technology.  GSM-R provides dedicated railway radio channels, supports voice and data services, and is designed to meet the stringent safety and performance requirements of modern rail operations. This shift is part of a broader effort to integrate voice communication with signalling and train control systems, enabling features such as direct driver–controller communication and enhanced emergency handling.   

=== Passenger and Freight Information Systems ===
Railway communication in India also includes systems that directly serve passengers and freight customers. The Passenger Reservation System (PRS) and Unreserved Ticketing System (UTS) rely on the railway telecom network to connect booking counters, online portals, and mobile applications to central databases, enabling real-time seat availability, ticket issuance, and cancellations across the country. These systems are integral to the user experience and depend on robust, low-latency communication links. 

For freight operations, the Freight Operation Information System (FOIS) and Parcel Management System (PMS) provide end-to-end visibility of consignments, wagon positions, and terminal operations. Crew Management Systems (CMS) and Coaching Operating Information Systems (COIS) further support operational planning by tracking crew duties and coaching stock movements. All these applications run over the same OFC and IP-based backbone that supports safety-critical traffic, illustrating how railway communication in India blends operational and commercial functions on a single integrated network. {{BookCat}}</text>
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      <text bytes="8923" sha1="3ng2c31wb7k7s25fbi979dc34q6y90p" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity. 

== Organizational Structure ==
The Signaling and Telecommunication function is organized as a dedicated department within Indian Railways, with responsibilities divided between headquarters, zonal railways, divisions, and field units. At the apex, the Signal and Telecommunication Directorate on the Railway Board handles policy, design, development, and standardization of S&amp;T systems for the entire network. 

On the ground, the Open Line Organization of the S&amp;T Department is responsible for the day-to-day upkeep of signalling and telecommunication assets along running lines, at stations, in yards, and in control offices.  Signal and Telecom workshops, such as the one at Byculla on Central Railway, carry out repairs, overhauling, and testing of equipment.  This hierarchical structure ensures that technical standards are uniformly applied while allowing zonal and divisional units to adapt maintenance and implementation to local conditions.  

== Railway Signaling ==
Signaling systems form the safety-critical core of railway communication, governing how trains are authorized to move along sections of track and through stations. Indian Railways has progressively replaced outdated multi-cabin mechanical signalling with advanced systems such as Route Relay Interlocking (RRI), Panel Interlocking (PI), and Electronic Interlocking (EI), often integrated with Multi Aspect Color Light signals. These systems reduce human error, increase route-setting speed, and allow higher line capacity. 
[[File:Railway signal at Tiruchirappalli Junction railway station 13.jpg|thumb|267x267px|'''''Credit: PJeganathan.''''' Some railway signals which are part of the Tiruchirappalli Junction. ]]
Track circuits and axle counters are used to detect the presence of trains on specific sections of track, feeding this information to interlocking systems and control panels.  Southern Railway, for example, introduced Audio Frequency Track Circuits in the mid-1990s, improving detection reliability under diverse track conditions. More recently, advanced train protection systems such as Train Protection and Warning System (TPWS), Indian Railways’ own Train Collision Avoidance System (TCAS, also called Kavach), and elements of the European Train Control System (ETCS) have been introduced or piloted to further enhance safety.  

== Telecommunication Infrastructure ==
The telecommunication infrastructure of Indian Railways provides the backbone for both safety-related operational communication and administrative and passenger information systems. Optical Fibre Cable (OFC) forms the core of this network, creating a high-capacity, nation-wide backbone that carries voice, data, and control traffic.  By the early 2010s, Indian Railways had already deployed over 42,000 route kilometers of OFC, carrying tens of gigabits of traffic, and had shifted most control communication onto this fibre network. 

This OFC-based network supports the Railways Information Network (RAILNET), which interconnects offices, control centers, and stations across the country.  It also underpins key IT applications such as the Passenger Reservation System (PRS), Unreserved Ticketing System (UTS), Freight Operation Information System (FOIS), Crew Management System (CMS), and Coaching Operating Information System (COIS). In parallel, the Unified Telecom Backbone is being upgraded using Internet Protocol Multi-Protocol Label Switching (IP MPLS) technology to meet growing bandwidth needs; by 2025–26, IP MPLS had been commissioned at well over a thousand stations.  

=== Train Operational Communication Systems ===
Train control and operational communication refer to the systems that enable real-time coordination between drivers, guards, station masters, and control offices to manage train movements safely and efficiently. Traditionally, Indian Railways has used a “Driver–Guard–Station–Controller” system, often called the Control Communication System, based on Very High Frequency (VHF) wireless handsets for communication between drivers, guards, and station masters, and landline telephones for station-to-control office links.  

To improve reliability, coverage, and functionality, Indian Railways has been transitioning to Mobile Train Radio Communication (MTRC) based on GSM-R (Global System for Mobile Communications – Railway) technology.  GSM-R provides dedicated railway radio channels, supports voice and data services, and is designed to meet the stringent safety and performance requirements of modern rail operations. This shift is part of a broader effort to integrate voice communication with signalling and train control systems, enabling features such as direct driver–controller communication and enhanced emergency handling.   

=== Passenger and Freight Information Systems ===
Railway communication in India also includes systems that directly serve passengers and freight customers. The Passenger Reservation System (PRS) and Unreserved Ticketing System (UTS) rely on the railway telecom network to connect booking counters, online portals, and mobile applications to central databases, enabling real-time seat availability, ticket issuance, and cancellations across the country. These systems are integral to the user experience and depend on robust, low-latency communication links. 

For freight operations, the Freight Operation Information System (FOIS) and Parcel Management System (PMS) provide end-to-end visibility of consignments, wagon positions, and terminal operations. Crew Management Systems (CMS) and Coaching Operating Information Systems (COIS) further support operational planning by tracking crew duties and coaching stock movements. All these applications run over the same OFC and IP-based backbone that supports safety-critical traffic, illustrating how railway communication in India blends operational and commercial functions on a single integrated network.  

=== Safety and Emergency Communication Systems ===
Safety and emergency communication is a specialized subset of railway communication designed to respond rapidly to accidents, disruptions, and other emergencies. In the event of an accident, the S&amp;T Department is responsible for establishing communication between the accident site and divisional headquarters using emergency control circuits, administrative lines connected through emergency sockets, or alternative links such as BSNL, GSM (railway), or satellite connections. 

At the accident site itself, VHF radio systems are used to coordinate between the on-site workforce, rescue teams, and officers in charge. Some zones also maintain provisions for accident-site communication via satellite, ensuring connectivity even in remote or disaster-affected areas where terrestrial networks may be damaged. These arrangements are regularly tested and integrated with overall disaster management protocols to minimize response times and support coordinated rescue and relief operations. {{BookCat}}</text>
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      <text bytes="10096" sha1="38fha6yyugfao7254bvnp2aefvjjtjf" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity. 

== Organizational Structure ==
The Signaling and Telecommunication function is organized as a dedicated department within Indian Railways, with responsibilities divided between headquarters, zonal railways, divisions, and field units. At the apex, the Signal and Telecommunication Directorate on the Railway Board handles policy, design, development, and standardization of S&amp;T systems for the entire network. 

On the ground, the Open Line Organization of the S&amp;T Department is responsible for the day-to-day upkeep of signalling and telecommunication assets along running lines, at stations, in yards, and in control offices.  Signal and Telecom workshops, such as the one at Byculla on Central Railway, carry out repairs, overhauling, and testing of equipment.  This hierarchical structure ensures that technical standards are uniformly applied while allowing zonal and divisional units to adapt maintenance and implementation to local conditions.  

== Railway Signaling ==
Signaling systems form the safety-critical core of railway communication, governing how trains are authorized to move along sections of track and through stations. Indian Railways has progressively replaced outdated multi-cabin mechanical signalling with advanced systems such as Route Relay Interlocking (RRI), Panel Interlocking (PI), and Electronic Interlocking (EI), often integrated with Multi Aspect Color Light signals. These systems reduce human error, increase route-setting speed, and allow higher line capacity. 
[[File:Railway signal at Tiruchirappalli Junction railway station 13.jpg|thumb|267x267px|'''''Credit: PJeganathan.''''' Some railway signals which are part of the Tiruchirappalli Junction. ]]
Track circuits and axle counters are used to detect the presence of trains on specific sections of track, feeding this information to interlocking systems and control panels.  Southern Railway, for example, introduced Audio Frequency Track Circuits in the mid-1990s, improving detection reliability under diverse track conditions. More recently, advanced train protection systems such as Train Protection and Warning System (TPWS), Indian Railways’ own Train Collision Avoidance System (TCAS, also called Kavach), and elements of the European Train Control System (ETCS) have been introduced or piloted to further enhance safety.  

== Telecommunication Infrastructure ==
The telecommunication infrastructure of Indian Railways provides the backbone for both safety-related operational communication and administrative and passenger information systems. Optical Fibre Cable (OFC) forms the core of this network, creating a high-capacity, nation-wide backbone that carries voice, data, and control traffic.  By the early 2010s, Indian Railways had already deployed over 42,000 route kilometers of OFC, carrying tens of gigabits of traffic, and had shifted most control communication onto this fibre network. 

This OFC-based network supports the Railways Information Network (RAILNET), which interconnects offices, control centers, and stations across the country.  It also underpins key IT applications such as the Passenger Reservation System (PRS), Unreserved Ticketing System (UTS), Freight Operation Information System (FOIS), Crew Management System (CMS), and Coaching Operating Information System (COIS). In parallel, the Unified Telecom Backbone is being upgraded using Internet Protocol Multi-Protocol Label Switching (IP MPLS) technology to meet growing bandwidth needs; by 2025–26, IP MPLS had been commissioned at well over a thousand stations.  

=== Train Operational Communication Systems ===
Train control and operational communication refer to the systems that enable real-time coordination between drivers, guards, station masters, and control offices to manage train movements safely and efficiently. Traditionally, Indian Railways has used a “Driver–Guard–Station–Controller” system, often called the Control Communication System, based on Very High Frequency (VHF) wireless handsets for communication between drivers, guards, and station masters, and landline telephones for station-to-control office links.  

To improve reliability, coverage, and functionality, Indian Railways has been transitioning to Mobile Train Radio Communication (MTRC) based on GSM-R (Global System for Mobile Communications – Railway) technology.  GSM-R provides dedicated railway radio channels, supports voice and data services, and is designed to meet the stringent safety and performance requirements of modern rail operations. This shift is part of a broader effort to integrate voice communication with signalling and train control systems, enabling features such as direct driver–controller communication and enhanced emergency handling.   

=== Passenger and Freight Information Systems ===
Railway communication in India also includes systems that directly serve passengers and freight customers. The Passenger Reservation System (PRS) and Unreserved Ticketing System (UTS) rely on the railway telecom network to connect booking counters, online portals, and mobile applications to central databases, enabling real-time seat availability, ticket issuance, and cancellations across the country. These systems are integral to the user experience and depend on robust, low-latency communication links. 

For freight operations, the Freight Operation Information System (FOIS) and Parcel Management System (PMS) provide end-to-end visibility of consignments, wagon positions, and terminal operations. Crew Management Systems (CMS) and Coaching Operating Information Systems (COIS) further support operational planning by tracking crew duties and coaching stock movements. All these applications run over the same OFC and IP-based backbone that supports safety-critical traffic, illustrating how railway communication in India blends operational and commercial functions on a single integrated network.  

=== Safety and Emergency Communication Systems ===
Safety and emergency communication is a specialized subset of railway communication designed to respond rapidly to accidents, disruptions, and other emergencies. In the event of an accident, the S&amp;T Department is responsible for establishing communication between the accident site and divisional headquarters using emergency control circuits, administrative lines connected through emergency sockets, or alternative links such as BSNL, GSM (railway), or satellite connections. 

At the accident site itself, VHF radio systems are used to coordinate between the on-site workforce, rescue teams, and officers in charge. Some zones also maintain provisions for accident-site communication via satellite, ensuring connectivity even in remote or disaster-affected areas where terrestrial networks may be damaged. These arrangements are regularly tested and integrated with overall disaster management protocols to minimize response times and support coordinated rescue and relief operations.  

== Digital Initiatives ==
In recent years, Indian Railways has pursued a range of modernization and digital initiatives to strengthen its communication capabilities. A major focus has been the enhancement of the Unified Telecom Backbone through IP MPLS technology, which provides a high-capacity, scalable network capable of supporting present and future mission-critical applications. This upgrade is being rolled out across zones and divisions, with thousands of stations already commissioned on the new platform by 2025–26. 

Another significant development is the expansion of Tunnel Communication Systems, particularly on strategically important projects such as the Udhampur–Srinagar–Baramulla Rail Link (USBRL) in Jammu and Kashmir. These systems ensure continuous radio and data coverage inside long tunnels, which is essential for both normal operations and emergency response. Alongside infrastructure upgrades, Indian Railways continues to adopt advanced signalling and train protection technologies, integrate IT applications more deeply with communication networks, and explore newer standards to improve safety, capacity, and passenger experience. 

{{BookCat}}</text>
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      <text bytes="11341" sha1="6cx6qcithyg7h468gpek869wv6fie4l" xml:space="preserve">== Introduction ==
In '''Indian Railways''', railway communication refers to the systems, technologies, and organizational structures that enable the exchange of information required for the safe, efficient, and coordinated operation of Indian Railways. It encompasses both signaling systems that control train movements and telecommunication systems that support operational, administrative, and passenger-facing services across one of the world's largest railway networks. 

The Signaling and Telecommunication (S&amp;T) Department of Indian Railways is responsible for the design, installation, maintenance, and standardization of these systems. Its work covers everything from trackside signals and interlocking equipment to optical fibre networks, radio systems, and IT applications that run reservations, freight operations, and crew management. 

== Historical Development ==
Railway communication in India evolved alongside the expansion of the rail network from the mid-19th century. Early systems relied on mechanical signalling, such as semaphore signals operated by levers in signal cabins, and basic telegraph and telephone lines for train control and administrative messaging. These systems required significant human intervention and were limited in speed, capacity, and reliability. 

From the late 20th century, Indian Railways began a systematic modernization programme. Mechanical signalling was progressively replaced by electrical signalling with Multiple Aspect Color Light (MACL) signals, which offer better visibility, faster operation, and lower maintenance. Parallel to this, the Railway Reforms Committee (1983) recommended that Indian Railways develop its own independent telecommunication network rather than relying solely on the public telecom operator, leading to the large-scale laying of optical fibre cable (OFC) from 1988 onwards and the creation of RailTel in 2000 to manage and commercially exploit surplus capacity. 

== Organizational Structure ==
The Signaling and Telecommunication function is organized as a dedicated department within Indian Railways, with responsibilities divided between headquarters, zonal railways, divisions, and field units. At the apex, the Signal and Telecommunication Directorate on the Railway Board handles policy, design, development, and standardization of S&amp;T systems for the entire network. 

On the ground, the Open Line Organization of the S&amp;T Department is responsible for the day-to-day upkeep of signalling and telecommunication assets along running lines, at stations, in yards, and in control offices.  Signal and Telecom workshops, such as the one at Byculla on Central Railway, carry out repairs, overhauling, and testing of equipment.  This hierarchical structure ensures that technical standards are uniformly applied while allowing zonal and divisional units to adapt maintenance and implementation to local conditions.  

== Railway Signaling ==
Signaling systems form the safety-critical core of railway communication, governing how trains are authorized to move along sections of track and through stations. Indian Railways has progressively replaced outdated multi-cabin mechanical signalling with advanced systems such as Route Relay Interlocking (RRI), Panel Interlocking (PI), and Electronic Interlocking (EI), often integrated with Multi Aspect Color Light signals. These systems reduce human error, increase route-setting speed, and allow higher line capacity. 
[[File:Railway signal at Tiruchirappalli Junction railway station 13.jpg|thumb|267x267px|'''''Credit: PJeganathan.''''' Some railway signals which are part of the Tiruchirappalli Junction. ]]
Track circuits and axle counters are used to detect the presence of trains on specific sections of track, feeding this information to interlocking systems and control panels.  Southern Railway, for example, introduced Audio Frequency Track Circuits in the mid-1990s, improving detection reliability under diverse track conditions. More recently, advanced train protection systems such as Train Protection and Warning System (TPWS), Indian Railways’ own Train Collision Avoidance System (TCAS, also called Kavach), and elements of the European Train Control System (ETCS) have been introduced or piloted to further enhance safety.  

== Telecommunication Infrastructure ==
The telecommunication infrastructure of Indian Railways provides the backbone for both safety-related operational communication and administrative and passenger information systems. Optical Fibre Cable (OFC) forms the core of this network, creating a high-capacity, nation-wide backbone that carries voice, data, and control traffic.  By the early 2010s, Indian Railways had already deployed over 42,000 route kilometers of OFC, carrying tens of gigabits of traffic, and had shifted most control communication onto this fibre network. 

This OFC-based network supports the Railways Information Network (RAILNET), which interconnects offices, control centers, and stations across the country.  It also underpins key IT applications such as the Passenger Reservation System (PRS), Unreserved Ticketing System (UTS), Freight Operation Information System (FOIS), Crew Management System (CMS), and Coaching Operating Information System (COIS). In parallel, the Unified Telecom Backbone is being upgraded using Internet Protocol Multi-Protocol Label Switching (IP MPLS) technology to meet growing bandwidth needs; by 2025–26, IP MPLS had been commissioned at well over a thousand stations.  

=== Train Operational Communication Systems ===
Train control and operational communication refer to the systems that enable real-time coordination between drivers, guards, station masters, and control offices to manage train movements safely and efficiently. Traditionally, Indian Railways has used a “Driver–Guard–Station–Controller” system, often called the Control Communication System, based on Very High Frequency (VHF) wireless handsets for communication between drivers, guards, and station masters, and landline telephones for station-to-control office links.  

To improve reliability, coverage, and functionality, Indian Railways has been transitioning to Mobile Train Radio Communication (MTRC) based on GSM-R (Global System for Mobile Communications – Railway) technology.  GSM-R provides dedicated railway radio channels, supports voice and data services, and is designed to meet the stringent safety and performance requirements of modern rail operations. This shift is part of a broader effort to integrate voice communication with signalling and train control systems, enabling features such as direct driver–controller communication and enhanced emergency handling.   

=== Passenger and Freight Information Systems ===
Railway communication in India also includes systems that directly serve passengers and freight customers. The Passenger Reservation System (PRS) and Unreserved Ticketing System (UTS) rely on the railway telecom network to connect booking counters, online portals, and mobile applications to central databases, enabling real-time seat availability, ticket issuance, and cancellations across the country. These systems are integral to the user experience and depend on robust, low-latency communication links. 

For freight operations, the Freight Operation Information System (FOIS) and Parcel Management System (PMS) provide end-to-end visibility of consignments, wagon positions, and terminal operations. Crew Management Systems (CMS) and Coaching Operating Information Systems (COIS) further support operational planning by tracking crew duties and coaching stock movements. All these applications run over the same OFC and IP-based backbone that supports safety-critical traffic, illustrating how railway communication in India blends operational and commercial functions on a single integrated network.  

=== Safety and Emergency Communication Systems ===
Safety and emergency communication is a specialized subset of railway communication designed to respond rapidly to accidents, disruptions, and other emergencies. In the event of an accident, the S&amp;T Department is responsible for establishing communication between the accident site and divisional headquarters using emergency control circuits, administrative lines connected through emergency sockets, or alternative links such as BSNL, GSM (railway), or satellite connections. 

At the accident site itself, VHF radio systems are used to coordinate between the on-site workforce, rescue teams, and officers in charge. Some zones also maintain provisions for accident-site communication via satellite, ensuring connectivity even in remote or disaster-affected areas where terrestrial networks may be damaged. These arrangements are regularly tested and integrated with overall disaster management protocols to minimize response times and support coordinated rescue and relief operations.  

== Digital Initiatives ==
In recent years, Indian Railways has pursued a range of modernization and digital initiatives to strengthen its communication capabilities. A major focus has been the enhancement of the Unified Telecom Backbone through IP MPLS technology, which provides a high-capacity, scalable network capable of supporting present and future mission-critical applications. This upgrade is being rolled out across zones and divisions, with thousands of stations already commissioned on the new platform by 2025–26. 

Another significant development is the expansion of Tunnel Communication Systems, particularly on strategically important projects such as the Udhampur–Srinagar–Baramulla Rail Link (USBRL) in Jammu and Kashmir. These systems ensure continuous radio and data coverage inside long tunnels, which is essential for both normal operations and emergency response. Alongside infrastructure upgrades, Indian Railways continues to adopt advanced signalling and train protection technologies, integrate IT applications more deeply with communication networks, and explore newer standards to improve safety, capacity, and passenger experience.  

== Future Directions and Challenges ==
Despite substantial progress, railway communication in India faces several challenges. The sheer size and diversity of the network mean that upgrading legacy systems, especially in older sections with mechanical or early electrical signalling, is a long-term endeavor requiring significant investment and careful planning. Maintaining uniform standards across zones, while accommodating local operational realities, also poses organizational and technical difficulties. 

In the future, key directions include the continued migration to GSM-R-based train radio, wider deployment of advanced train protection systems such as Kavach/TCAS and ETCS components, and further consolidation of all communication and IT applications onto a robust, IP-based backbone. Integration of real-time data from signalling, rolling stock, and infrastructure into central analytics platforms, along with improved cybersecurity measures, will be crucial as the network becomes more digital and interconnected. Over time, these developments aim to make railway communication in India safer, more efficient, and better aligned with global best practices while supporting the growing demands of passengers and freight customers. {{BookCat}}</text>
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      <text bytes="64" sha1="oyq0jezi6fy2pols7px1qntfdlc3j3n" xml:space="preserve">Hey, I'm Michael. I'm just trying to help clean up the internet.</text>
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      <text bytes="935" sha1="gjl4uig8rzq2bni9pzkrimha4mxwvur" xml:space="preserve">== Welcome! ==
==Welcome!==
Welcome, Oct431925!
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 |}

If you have any questions, you can ask in the [[Wikibooks:Reading room/Assistance|assistance reading room]] or possibly contact me personally. [[User:TechVindicator|TechVindicator]] ([[User talk:TechVindicator|discuss]] • [[Special:Contributions/TechVindicator|contribs]]) 00:43, 20 September 2026 (UTC)</text>
      <sha1>gjl4uig8rzq2bni9pzkrimha4mxwvur</sha1>
    </revision>
    <revision>
      <id>4671239</id>
      <parentid>4671238</parentid>
      <timestamp>2026-09-20T00:44:05Z</timestamp>
      <contributor>
        <username>TechVindicator</username>
        <id>3626296</id>
      </contributor>
      <minor />
      <comment>woops</comment>
      <origin>4671239</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="920" sha1="nl22v9qm9s8n5noxfoa7093jjcpl9vt" xml:space="preserve">==Welcome!==
Welcome, Oct431925!
{| style=&quot;background:white; border:1px solid #abd5f5;; padding:0px; border-spacing:0px; color: #000000;&quot;
 ! style=&quot;background:#d0e5f5; color: #000000;&quot; | [[Wikibooks:Welcome|Getting started]] with Wikibooks
 |-
 | style=&quot;padding:5px;&quot; |
* Wikibooks is a collection of open-source textbooks. Find out [[WB:WIW|what this means]].
* To sign your name (on discussion pages), use four tildes, like this: &amp;#126;&amp;#126;&amp;#126;&amp;#126; 
* Learn how to [[Using Wikibooks|use Wikibooks]] and learn more about the community.
* [[WB:CCO|Explore]], [[Wikibooks:Be bold|be bold]], and have fun!
 |}

If you have any questions, you can ask in the [[Wikibooks:Reading room/Assistance|assistance reading room]] or possibly contact me personally. [[User:TechVindicator|TechVindicator]] ([[User talk:TechVindicator|discuss]] • [[Special:Contributions/TechVindicator|contribs]]) 00:43, 20 September 2026 (UTC)</text>
      <sha1>nl22v9qm9s8n5noxfoa7093jjcpl9vt</sha1>
    </revision>
  </page>
  <page>
    <title>User talk:It-is-Truly-Meet</title>
    <ns>3</ns>
    <id>485739</id>
    <revision>
      <id>4671240</id>
      <timestamp>2026-09-20T00:44:42Z</timestamp>
      <contributor>
        <username>TechVindicator</username>
        <id>3626296</id>
      </contributor>
      <comment>/* Welcome! */ new section</comment>
      <origin>4671240</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="927" sha1="88yhxjexn5ejz3u9beq6ki0wa3g6kbf" xml:space="preserve">==Welcome!==
Welcome, It-is-Truly-Meet!
{| style=&quot;background:white; border:1px solid #abd5f5;; padding:0px; border-spacing:0px; color: #000000;&quot;
 ! style=&quot;background:#d0e5f5; color: #000000;&quot; | [[Wikibooks:Welcome|Getting started]] with Wikibooks
 |-
 | style=&quot;padding:5px;&quot; |
* Wikibooks is a collection of open-source textbooks. Find out [[WB:WIW|what this means]].
* To sign your name (on discussion pages), use four tildes, like this: &amp;#126;&amp;#126;&amp;#126;&amp;#126; 
* Learn how to [[Using Wikibooks|use Wikibooks]] and learn more about the community.
* [[WB:CCO|Explore]], [[Wikibooks:Be bold|be bold]], and have fun!
 |}

If you have any questions, you can ask in the [[Wikibooks:Reading room/Assistance|assistance reading room]] or possibly contact me personally.
[[User:TechVindicator|TechVindicator]] ([[User talk:TechVindicator|discuss]] • [[Special:Contributions/TechVindicator|contribs]]) 00:44, 20 September 2026 (UTC)</text>
      <sha1>88yhxjexn5ejz3u9beq6ki0wa3g6kbf</sha1>
    </revision>
  </page>
  <page>
    <title>Cookbook:Pizza with Peppers</title>
    <ns>102</ns>
    <id>485740</id>
    <revision>
      <id>4671278</id>
      <timestamp>2026-09-20T06:36:36Z</timestamp>
      <contributor>
        <username>TechVindicator</username>
        <id>3626296</id>
      </contributor>
      <comment>Create. This is translated text from frwikibooks, from the original at [[fr:Pizza aux poivrons|Pizza aux poivrons]]. This content has been translated and adapted to English.</comment>
      <origin>4671278</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="1184" sha1="912borhgkrm3wyf9wcue6oarcbca360" xml:space="preserve">{{recipe summary
| servings    = 1
| time        = 
| difficulty  = 2
| image       = [[File:Pizza aux poivrons.JPG|200px]]
| energy      = &lt;!-- Should if provided contain the number of calories and cal (can include kJ)--&gt;
| note        = 
}}
{{recipe}}
&lt;br&gt;
'''Pizza with peppers''' is a hot dish.

== Ingredients ==
* 1 small pizza base
* 400g of crushed tomatoes
* 1 red pepper
* 1 yellow pepper
* 1 onion
* 10 slices of chorizo
* 120g of mozzarella cheese
* 50g of comté cheese
* oil

== Method ==

#Slice the peppers and the onion. Save four ring-shaped slices of yellow pepper for later. Simmer the peppers and the onion (excluding the four peppers) under a low heat for half an hour. 
# Place the pizza base on a plate, and top it with the crushed tomatoes, as well as the chopped onions and peppers that were simmered earlier. 
# Dice the mozzarella and grate the comté cheese. Top the mozzarella and the comté cheese over the pizza, as well as the four ring-shaped slices of yellow pepper.
# Cook the pizza for 15 minutes, at 220°C. After 10 minutes, take out the pizza and add the 10 slices of chorizo, then cook for 5 minutes. [[fr:Livre de cuisine/Pizza aux poivrons]]</text>
      <sha1>912borhgkrm3wyf9wcue6oarcbca360</sha1>
    </revision>
    <revision>
      <id>4671279</id>
      <parentid>4671278</parentid>
      <timestamp>2026-09-20T06:39:06Z</timestamp>
      <contributor>
        <username>TechVindicator</username>
        <id>3626296</id>
      </contributor>
      <minor />
      <comment>added [[Category:Recipes for pizza]] using [[Help:Gadget-HotCat|HotCat]]</comment>
      <origin>4671279</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="1216" sha1="o19qcyviwjut3fozzxjy129boia9ajj" xml:space="preserve">{{recipe summary
| servings    = 1
| time        = 
| difficulty  = 2
| image       = [[File:Pizza aux poivrons.JPG|200px]]
| energy      = &lt;!-- Should if provided contain the number of calories and cal (can include kJ)--&gt;
| note        = 
}}
{{recipe}}
&lt;br&gt;
'''Pizza with peppers''' is a hot dish.

== Ingredients ==
* 1 small pizza base
* 400g of crushed tomatoes
* 1 red pepper
* 1 yellow pepper
* 1 onion
* 10 slices of chorizo
* 120g of mozzarella cheese
* 50g of comté cheese
* oil

== Method ==

#Slice the peppers and the onion. Save four ring-shaped slices of yellow pepper for later. Simmer the peppers and the onion (excluding the four peppers) under a low heat for half an hour. 
# Place the pizza base on a plate, and top it with the crushed tomatoes, as well as the chopped onions and peppers that were simmered earlier. 
# Dice the mozzarella and grate the comté cheese. Top the mozzarella and the comté cheese over the pizza, as well as the four ring-shaped slices of yellow pepper.
# Cook the pizza for 15 minutes, at 220°C. After 10 minutes, take out the pizza and add the 10 slices of chorizo, then cook for 5 minutes. [[fr:Livre de cuisine/Pizza aux poivrons]]

[[Category:Recipes for pizza]]</text>
      <sha1>o19qcyviwjut3fozzxjy129boia9ajj</sha1>
    </revision>
  </page>
  <page>
    <title>User talk:一隻北極熊</title>
    <ns>3</ns>
    <id>485741</id>
    <revision>
      <id>4671280</id>
      <timestamp>2026-09-20T06:43:49Z</timestamp>
      <contributor>
        <username>TechVindicator</username>
        <id>3626296</id>
      </contributor>
      <comment>/* Welcome! */ new section</comment>
      <origin>4671280</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="926" sha1="nzloyhbtpjopd23zqmtndwrv4z2u04m" xml:space="preserve">==Welcome!==
Welcome, 一隻北極熊!
{| style=&quot;background:white; border:1px solid #abd5f5;; padding:0px; border-spacing:0px; color: #000000;&quot;
 ! style=&quot;background:#d0e5f5; color: #000000;&quot; | [[Wikibooks:Welcome|Getting started]] with Wikibooks
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 | style=&quot;padding:5px;&quot; |
* Wikibooks is a collection of open-source textbooks. Find out [[WB:WIW|what this means]].
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* [[WB:CCO|Explore]], [[Wikibooks:Be bold|be bold]], and have fun!
 |}

If you have any questions, you can ask in the [[Wikibooks:Reading room/Assistance|assistance reading room]] or possibly contact me personally.
[[User:TechVindicator|TechVindicator]] ([[User talk:TechVindicator|discuss]] • [[Special:Contributions/TechVindicator|contribs]]) 06:43, 20 September 2026 (UTC)</text>
      <sha1>nzloyhbtpjopd23zqmtndwrv4z2u04m</sha1>
    </revision>
  </page>
  <page>
    <title>User talk:EmetMen</title>
    <ns>3</ns>
    <id>485742</id>
    <revision>
      <id>4671281</id>
      <timestamp>2026-09-20T06:44:22Z</timestamp>
      <contributor>
        <username>TechVindicator</username>
        <id>3626296</id>
      </contributor>
      <comment>/* Welcome! */ new section</comment>
      <origin>4671281</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="918" sha1="geukfv1yn7ps5os4f3qifd25n6ln5ca" xml:space="preserve">==Welcome!==
Welcome, EmetMen!
{| style=&quot;background:white; border:1px solid #abd5f5;; padding:0px; border-spacing:0px; color: #000000;&quot;
 ! style=&quot;background:#d0e5f5; color: #000000;&quot; | [[Wikibooks:Welcome|Getting started]] with Wikibooks
 |-
 | style=&quot;padding:5px;&quot; |
* Wikibooks is a collection of open-source textbooks. Find out [[WB:WIW|what this means]].
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* [[WB:CCO|Explore]], [[Wikibooks:Be bold|be bold]], and have fun!
 |}

If you have any questions, you can ask in the [[Wikibooks:Reading room/Assistance|assistance reading room]] or possibly contact me personally.
[[User:TechVindicator|TechVindicator]] ([[User talk:TechVindicator|discuss]] • [[Special:Contributions/TechVindicator|contribs]]) 06:44, 20 September 2026 (UTC)</text>
      <sha1>geukfv1yn7ps5os4f3qifd25n6ln5ca</sha1>
    </revision>
  </page>
  <page>
    <title>User talk:FeralHogs30-50</title>
    <ns>3</ns>
    <id>485743</id>
    <revision>
      <id>4671284</id>
      <timestamp>2026-09-20T06:53:12Z</timestamp>
      <contributor>
        <username>TechVindicator</username>
        <id>3626296</id>
      </contributor>
      <comment>/* Welcome! */ new section</comment>
      <origin>4671284</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="925" sha1="quqye2grnttmxlw3si4vo46y098byhp" xml:space="preserve">==Welcome!==
Welcome, FeralHogs30-50!
{| style=&quot;background:white; border:1px solid #abd5f5;; padding:0px; border-spacing:0px; color: #000000;&quot;
 ! style=&quot;background:#d0e5f5; color: #000000;&quot; | [[Wikibooks:Welcome|Getting started]] with Wikibooks
 |-
 | style=&quot;padding:5px;&quot; |
* Wikibooks is a collection of open-source textbooks. Find out [[WB:WIW|what this means]].
* To sign your name (on discussion pages), use four tildes, like this: &amp;#126;&amp;#126;&amp;#126;&amp;#126; 
* Learn how to [[Using Wikibooks|use Wikibooks]] and learn more about the community.
* [[WB:CCO|Explore]], [[Wikibooks:Be bold|be bold]], and have fun!
 |}

If you have any questions, you can ask in the [[Wikibooks:Reading room/Assistance|assistance reading room]] or possibly contact me personally.
[[User:TechVindicator|TechVindicator]] ([[User talk:TechVindicator|discuss]] • [[Special:Contributions/TechVindicator|contribs]]) 06:53, 20 September 2026 (UTC)</text>
      <sha1>quqye2grnttmxlw3si4vo46y098byhp</sha1>
    </revision>
  </page>
  <page>
    <title>Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6/3. d4/3...exd4/4. Bc4</title>
    <ns>0</ns>
    <id>485744</id>
    <redirect title="Chess Opening Theory/1. e4/1...e5/2. Bc4/2...Nf6/3. d4/3...exd4/4. Nf3" />
    <revision>
      <id>4671285</id>
      <timestamp>2026-09-20T06:57:49Z</timestamp>
      <contributor>
        <username>JCrue</username>
        <id>2226064</id>
      </contributor>
      <comment>Redirected page to [[Chess Opening Theory/1. e4/1...e5/2. Bc4/2...Nf6/3. d4/3...exd4/4. Nf3]]</comment>
      <origin>4671285</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="84" sha1="r811w9w821qayenmzavhaysom9gyx27" xml:space="preserve">#REDIRECT [[Chess Opening Theory/1. e4/1...e5/2. Bc4/2...Nf6/3. d4/3...exd4/4. Nf3]]</text>
      <sha1>r811w9w821qayenmzavhaysom9gyx27</sha1>
    </revision>
  </page>
  <page>
    <title>Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6/3. d4/3...exd4/4. e5</title>
    <ns>0</ns>
    <id>485745</id>
    <revision>
      <id>4671287</id>
      <timestamp>2026-09-20T07:20:04Z</timestamp>
      <contributor>
        <username>JCrue</username>
        <id>2226064</id>
      </contributor>
      <comment>created</comment>
      <origin>4671287</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2353" sha1="bfb3ukxmo496hgkklru69i66epa2asc" xml:space="preserve">{{Chess Opening Theory/Position
|name=Modern attack
|eco=[[Chess/ECOC|C43]]
|parent=[[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6|Russian game]] → [[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6/3. d4|Modern attack]] → [[../|3...exd4]]
}}
== 4. e5 ==
White looks to unseat Black's knight. 

There aren't many places for the knight to go. If '''4...Ne5?''' 5. Qxd4 and the knight must move again, while White has recovered the pawn with a development and space lead. Likewise if '''4...Ng4?''' then 5. h3 forces the knight to move again, 5...Nh6 6. Qxd4 {{chess/not|++}}. Of course Black hardly wishes to un-develop their knight with '''4...Ng8'''. 

Therefore '''4...Ne4''' is the main move. After 5. Qxd4 (the called the centre attack), Black can defend the knight with 5...d5 while making a useful move to open up their queen's bishop. The line continues 6. exd6 e.p. Nxd6 7. Nc3. 

Alternative fifth moves for White include 5. Qe2 and 5. Bb5+. 5. Qe2, the Steinitz variation, attacks the knight on e4, and White prepares to take the d4-pawn with their knight instead. Because of the x-ray, Black cannot defend the knight with 5...d4?? (6. exd6 e.p. and the knight is pinned to the king.) [[w:Wilhelm Steinitz|Wilhelm Steinitz]] introduced this line in his 1889 book, but after 5...Bb4+ Black equalises. 

5. Bb5+, the Tal gambit, pins the d-pawn, and lures the c-pawn forward, 5...c6, to where it cannot defend d6 and where it prevents ...Nc6 from gaining time on queen after 6. Qxd4. 

The final move to consider is '''4...Qe7?!''', to pin the e-pawn, but after 5. Be2 the knight is hanging again. 5...Ne4 6. Qxd4 and a difference with the main line is that Black has the move 6...Qb4+ 7. c3 Qxd4 8. Nxd4 {{chess/not|+}}. 

5...Ng4 moves the knight with a double attack on the e5-pawn. A line is 6. Qxd4 (attacking and defending) d6 (defends N) 7. exd6 Qxd6 8. O-O {{chess/not|+}} where White recovers the material. However, better is for White to sacrifice the pawn. 6. O-O! Nxe5 7. Nxd4 and Black's position is cramped and they will have difficulty developing actively. White has the idea of Nd5! and Nb5! to pressure c7, e.g. 7...d6 8. Nc3 Nbc6?! 9. Nd5 Qd7 10. Nb5 Kd8 (best) 11. Nbxc7 {{chess/not|+++}}. 

== Theory table ==
{{ChessTable}}

{{ChessMid}}

== References ==
{{reflist}}
=== See also ===
{{Chess Opening Theory/Footer}}</text>
      <sha1>bfb3ukxmo496hgkklru69i66epa2asc</sha1>
    </revision>
    <revision>
      <id>4671290</id>
      <parentid>4671287</parentid>
      <timestamp>2026-09-20T07:22:54Z</timestamp>
      <contributor>
        <username>JCrue</username>
        <id>2226064</id>
      </contributor>
      <minor />
      <comment>/* 4. e5 */</comment>
      <origin>4671290</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2352" sha1="p8qr3f3zdmuz2c3cp8cel7myl64mbjg" xml:space="preserve">{{Chess Opening Theory/Position
|name=Modern attack
|eco=[[Chess/ECOC|C43]]
|parent=[[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6|Russian game]] → [[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6/3. d4|Modern attack]] → [[../|3...exd4]]
}}
== 4. e5 ==
White looks to unseat Black's knight. 

There aren't many places for the knight to go. If '''4...Nd5?''' 5. Qxd4 and the knight must move again, while White has recovered the pawn with a development and space lead. Likewise if '''4...Ng4?''' then 5. h3 forces the knight to move again, 5...Nh6 6. Qxd4 {{chess/not|++}}. Of course Black hardly wishes to un-develop their knight with '''4...Ng8'''. 

Therefore '''4...Ne4''' is the main move. After 5. Qxd4 (the called the centre attack), Black can defend the knight with 5...d5 while making a useful move to open up their queen's bishop. The line continues 6. exd6 e.p. Nxd6 7. Nc3. 

Alternative fifth moves for White include 5. Qe2 and 5. Bb5+. 5. Qe2, the Steinitz variation, attacks the knight on e4, and White prepares to take the d4-pawn with their knight instead. Because of the x-ray, Black cannot defend the knight with 5...d4?? (6. exd6 e.p. and the knight is pinned to the king.) [[w:Wilhelm Steinitz|Wilhelm Steinitz]] introduced this line in his 1889 book, but after 5...Bb4+ Black equalises. 

5. Bb5+, the Tal gambit, pins the d-pawn, and lures the c-pawn forward, 5...c6, to where it cannot defend d6 and where it prevents ...Nc6 from gaining time on queen after 6. Qxd4. 

The final move to consider is '''4...Qe7?!''', to pin the e-pawn, but after 5. Be2 the knight is hanging again. 5...Ne4 6. Qxd4 and a difference with the main line is that Black has the move 6...Qb4+ 7. c3 Qxd4 8. Nxd4 {{chess/not|+}}. 

5...Ng4 moves the knight with a double attack on the e5-pawn. A line is 6. Qxd4 (attacking and defending) d6 (defends N) 7. exd6 Qxd6 8. O-O {{chess/not|+}} where White recovers the material. However, better is for White to sacrifice the pawn. 6. O-O! Nxe5 7. Nxd4 and Black's position is cramped and they will have difficulty developing actively. White has the idea of Nd5! and Nb5! to pressure c7, e.g. 7...d6 8. Nc3 Nbc6?! 9. Nd5 Qd7 10. Nb5 Kd8 (best) 11. Nbxc7 {{chess/not|+++}}.

== Theory table ==
{{ChessTable}}

{{ChessMid}}

== References ==
{{reflist}}
=== See also ===
{{Chess Opening Theory/Footer}}</text>
      <sha1>p8qr3f3zdmuz2c3cp8cel7myl64mbjg</sha1>
    </revision>
    <revision>
      <id>4671291</id>
      <parentid>4671290</parentid>
      <timestamp>2026-09-20T07:25:51Z</timestamp>
      <contributor>
        <username>JCrue</username>
        <id>2226064</id>
      </contributor>
      <minor />
      <comment>/* 4. e5 */</comment>
      <origin>4671291</origin>
      <model>wikitext</model>
      <format>text/x-wiki</format>
      <text bytes="2359" sha1="f9aclwqurlkloif80nh2mcg4ml77lan" xml:space="preserve">{{Chess Opening Theory/Position
|name=Modern attack
|eco=[[Chess/ECOC|C43]]
|parent=[[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6|Russian game]] → [[Chess Opening Theory/1. e4/1...e5/2. Nf3/2...Nf6/3. d4|Modern attack]] → [[../|3...exd4]]
}}
== 4. e5 ==
White looks to unseat Black's knight. 

There aren't many places for the knight to go. If '''4...Nd5?''' 5. Qxd4 and the knight must move again, while White has recovered the pawn with a development and space lead. Likewise if '''4...Ng4?''' then 5. h3 forces the knight to move again, 5...Nh6 6. Qxd4 {{chess/not|++}}. Of course Black hardly wishes to un-develop their knight with '''4...Ng8'''. 

Therefore '''4...Ne4''' is the main move. After 5. Qxd4 (the called the centre attack), Black can defend the knight with 5...d5 while making a useful move to open up their queen's bishop. The line continues 6. exd6 e.p. Nxd6 7. Nc3. 

Alternative fifth moves for White include 5. Qe2 and 5. Bb5+. 5. Qe2, the Steinitz variation, attacks the knight on e4, and White prepares to take the d4-pawn with their knight instead. Because of the x-ray, Black cannot defend the knight with 5...d4?? (6. exd6 e.p. and the knight is pinned to the king.) [[w:Wilhelm Steinitz|Wilhelm Steinitz]] introduced this line in his 1889 book, but after 5...Bb4+ Black equalises. 

5. Bb5+, the Tal gambit, pins the d-pawn, and lures the c-pawn forward, 5...c6, to where it cannot defend d6 and where it prevents ...Nc6 from gaining time on queen after 6. Qxd4. 

The final fourth move to consider is '''4...Qe7?!''', to pin the e-pawn, but after 5. Be2 the knight is hanging again. 5...Ne4 6. Qxd4 and a difference with the main line is that Black has the move 6...Qb4+ 7. c3 Qxd4 8. Nxd4 {{chess/not|+}}. 

5...Ng4 moves the knight with a double attack on the e5-pawn. A line is 6. Qxd4 (attacking and defending) d6 (defends N) 7. exd6 Qxd6 8. O-O {{chess/not|+}} where White recovers the material. However, better is for White to sacrifice the pawn. 6. O-O! Nxe5 7. Nxd4 and Black's position is cramped and they will have difficulty developing actively. White has the idea of Nd5! and Nb5! to pressure c7, e.g. 7...d6 8. Nc3 Nbc6?! 9. Nd5 Qd7 10. Nb5 Kd8 (best) 11. Nbxc7 {{chess/not|+++}}.

== Theory table ==
{{ChessTable}}

{{ChessMid}}

== References ==
{{reflist}}
=== See also ===
{{Chess Opening Theory/Footer}}</text>
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      <comment>My life story</comment>
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      <text bytes="948" sha1="g6orrt2ev1gxcnjt8cmtniyimu3iv61" xml:space="preserve">== Introduction ==
Digital technologies in '''Indian Railways''' refer to the computer-based systems, software applications, communication networks, and data-driven tools that support the planning, operation, management, and customer services of one of the world’s largest railway networks. These technologies span passenger ticketing and enquiry, freight logistics, crew and rolling stock management, safety systems, and enterprise-wide information management. 

The adoption of digital technologies has been driven by the need to handle very large transaction volumes, improve operational efficiency, enhance safety, and provide better services to passengers and freight customers. Over time, Indian Railways has moved from isolated, legacy systems to integrated, networked platforms that rely on high-capacity telecom backbones, modern data centers, and increasingly on artificial intelligence and analytics. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="2194" sha1="bcd36glswjm95kf6mzhba8pay8ahrpv" xml:space="preserve">== Introduction ==
Digital technologies in '''Indian Railways''' refer to the computer-based systems, software applications, communication networks, and data-driven tools that support the planning, operation, management, and customer services of one of the world’s largest railway networks. These technologies span passenger ticketing and enquiry, freight logistics, crew and rolling stock management, safety systems, and enterprise-wide information management. 

The adoption of digital technologies has been driven by the need to handle very large transaction volumes, improve operational efficiency, enhance safety, and provide better services to passengers and freight customers. Over time, Indian Railways has moved from isolated, legacy systems to integrated, networked platforms that rely on high-capacity telecom backbones, modern data centers, and increasingly on artificial intelligence and analytics.  

== Digital Technologies of Indian Railways ==

=== CRIS and RDSO ===
The Centre for Railway Information Systems (CRIS) is the primary organization responsible for designing, developing, implementing, and maintaining the information technology systems of Indian Railways. Established in 1986, CRIS evolved from an earlier effort to computerize freight operations and now serves as the ICT arm of the Railways, building and managing most of its major digital applications. CRIS develops software, provides ICT infrastructure, and supports field implementation across zonal railways and business units. 

Alongside CRIS, the Research Designs and Standards Organization (RDSO) plays a key role in the development and standardization of safety-critical digital systems, particularly in signalling and train protection. RDSO has led the design of indigenous Automatic Train Protection systems such as Kavach (earlier known as TCAS), working with Indian industry partners to create solutions tailored to Indian operating conditions. Together, CRIS and RDSO form the core institutional framework for digital technologies in Indian Railways, with CRIS focusing on information systems and RDSO on safety and engineering standards.  

=== PRS and UTS ===
[[Category:Book:Indian Railways]]</text>
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      <text bytes="3188" sha1="n20tuo3297295xyf5iielpczoi7wymg" xml:space="preserve">== Introduction ==
Digital technologies in '''Indian Railways''' refer to the computer-based systems, software applications, communication networks, and data-driven tools that support the planning, operation, management, and customer services of one of the world’s largest railway networks. These technologies span passenger ticketing and enquiry, freight logistics, crew and rolling stock management, safety systems, and enterprise-wide information management. 

The adoption of digital technologies has been driven by the need to handle very large transaction volumes, improve operational efficiency, enhance safety, and provide better services to passengers and freight customers. Over time, Indian Railways has moved from isolated, legacy systems to integrated, networked platforms that rely on high-capacity telecom backbones, modern data centers, and increasingly on artificial intelligence and analytics.  

== Digital Technologies of Indian Railways ==

=== CRIS and RDSO ===
The Centre for Railway Information Systems (CRIS) is the primary organization responsible for designing, developing, implementing, and maintaining the information technology systems of Indian Railways. Established in 1986, CRIS evolved from an earlier effort to computerize freight operations and now serves as the ICT arm of the Railways, building and managing most of its major digital applications. CRIS develops software, provides ICT infrastructure, and supports field implementation across zonal railways and business units. 

Alongside CRIS, the Research Designs and Standards Organization (RDSO) plays a key role in the development and standardization of safety-critical digital systems, particularly in signalling and train protection. RDSO has led the design of indigenous Automatic Train Protection systems such as Kavach (earlier known as TCAS), working with Indian industry partners to create solutions tailored to Indian operating conditions. Together, CRIS and RDSO form the core institutional framework for digital technologies in Indian Railways, with CRIS focusing on information systems and RDSO on safety and engineering standards.  

=== PRS and UTS ===
The Passenger Reservation System (PRS) is the computerized platform that manages reserved ticketing across Indian Railways. Introduced in the mid-1980s, PRS replaced manual reservation processes and enabled centralized management of seat allocation, waitlists, Reservation Against Cancellation (RAC), and reservation charts. Passengers access PRS through reservation counters, the IRCTC website, and mobile applications, allowing booking, modification, and cancellation of tickets from multiple channels. 

In parallel, the Unreserved Ticketing System (UTS) supports paperless and mobile ticketing for unreserved travel, including suburban and short-distance journeys. UTS enables passengers to buy general-class and platform tickets through mobile apps and automatic ticket vending machines, reducing queues and improving convenience. Both PRS and UTS run on the railway’s telecom and data infrastructure managed by CRIS and are among the most heavily used digital services in the country. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="4239" sha1="6aw27057oj920kjzk81quhgwghskjfr" xml:space="preserve">== Introduction ==
Digital technologies in '''Indian Railways''' refer to the computer-based systems, software applications, communication networks, and data-driven tools that support the planning, operation, management, and customer services of one of the world’s largest railway networks. These technologies span passenger ticketing and enquiry, freight logistics, crew and rolling stock management, safety systems, and enterprise-wide information management. 

The adoption of digital technologies has been driven by the need to handle very large transaction volumes, improve operational efficiency, enhance safety, and provide better services to passengers and freight customers. Over time, Indian Railways has moved from isolated, legacy systems to integrated, networked platforms that rely on high-capacity telecom backbones, modern data centers, and increasingly on artificial intelligence and analytics.  

== Digital Technologies of Indian Railways ==

=== CRIS and RDSO ===
The Centre for Railway Information Systems (CRIS) is the primary organization responsible for designing, developing, implementing, and maintaining the information technology systems of Indian Railways. Established in 1986, CRIS evolved from an earlier effort to computerize freight operations and now serves as the ICT arm of the Railways, building and managing most of its major digital applications. CRIS develops software, provides ICT infrastructure, and supports field implementation across zonal railways and business units. 

Alongside CRIS, the Research Designs and Standards Organization (RDSO) plays a key role in the development and standardization of safety-critical digital systems, particularly in signalling and train protection. RDSO has led the design of indigenous Automatic Train Protection systems such as Kavach (earlier known as TCAS), working with Indian industry partners to create solutions tailored to Indian operating conditions. Together, CRIS and RDSO form the core institutional framework for digital technologies in Indian Railways, with CRIS focusing on information systems and RDSO on safety and engineering standards.  

=== PRS and UTS ===
The Passenger Reservation System (PRS) is the computerized platform that manages reserved ticketing across Indian Railways. Introduced in the mid-1980s, PRS replaced manual reservation processes and enabled centralized management of seat allocation, waitlists, Reservation Against Cancellation (RAC), and reservation charts. Passengers access PRS through reservation counters, the IRCTC website, and mobile applications, allowing booking, modification, and cancellation of tickets from multiple channels. 

In parallel, the Unreserved Ticketing System (UTS) supports paperless and mobile ticketing for unreserved travel, including suburban and short-distance journeys. UTS enables passengers to buy general-class and platform tickets through mobile apps and automatic ticket vending machines, reducing queues and improving convenience. Both PRS and UTS run on the railway’s telecom and data infrastructure managed by CRIS and are among the most heavily used digital services in the country.  

==== Modernization of PRS ====
Recognizing the limitations of legacy systems, Indian Railways has undertaken a major modernization of its ticketing platforms. The existing PRS, which originally ran on older software architectures, is being replaced by a new system designed to be agile, scalable, and capable of handling significantly higher loads. The upgraded PRS is expected to support over 125,000 ticket bookings per minute, a substantial increase from earlier capacities, and to handle millions of enquiries per minute. 

The new PRS is being built on open-source platforms, including enterprise Linux environments, to reduce dependence on single vendors and improve flexibility. It introduces features such as seat choice, fare calendars, and integrated support for categories like Divyangjan (persons with disabilities), students, and patients. A separate upgrade of UTS is also underway, while a dedicated Railway Information Security Operations Centre (IR-SOC) is being established to strengthen cybersecurity for these critical systems. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="6368" sha1="d6rooe9b9hy5jclk6ypsysjli10uuiv" xml:space="preserve">== Introduction ==
Digital technologies in '''Indian Railways''' refer to the computer-based systems, software applications, communication networks, and data-driven tools that support the planning, operation, management, and customer services of one of the world’s largest railway networks. These technologies span passenger ticketing and enquiry, freight logistics, crew and rolling stock management, safety systems, and enterprise-wide information management. 

The adoption of digital technologies has been driven by the need to handle very large transaction volumes, improve operational efficiency, enhance safety, and provide better services to passengers and freight customers. Over time, Indian Railways has moved from isolated, legacy systems to integrated, networked platforms that rely on high-capacity telecom backbones, modern data centers, and increasingly on artificial intelligence and analytics.  

== Digital Technologies of Indian Railways ==

=== CRIS and RDSO ===
The Centre for Railway Information Systems (CRIS) is the primary organization responsible for designing, developing, implementing, and maintaining the information technology systems of Indian Railways. Established in 1986, CRIS evolved from an earlier effort to computerize freight operations and now serves as the ICT arm of the Railways, building and managing most of its major digital applications. CRIS develops software, provides ICT infrastructure, and supports field implementation across zonal railways and business units. 

Alongside CRIS, the Research Designs and Standards Organization (RDSO) plays a key role in the development and standardization of safety-critical digital systems, particularly in signalling and train protection. RDSO has led the design of indigenous Automatic Train Protection systems such as Kavach (earlier known as TCAS), working with Indian industry partners to create solutions tailored to Indian operating conditions. Together, CRIS and RDSO form the core institutional framework for digital technologies in Indian Railways, with CRIS focusing on information systems and RDSO on safety and engineering standards.  

=== PRS and UTS ===
The Passenger Reservation System (PRS) is the computerized platform that manages reserved ticketing across Indian Railways. Introduced in the mid-1980s, PRS replaced manual reservation processes and enabled centralized management of seat allocation, waitlists, Reservation Against Cancellation (RAC), and reservation charts. Passengers access PRS through reservation counters, the IRCTC website, and mobile applications, allowing booking, modification, and cancellation of tickets from multiple channels. 

In parallel, the Unreserved Ticketing System (UTS) supports paperless and mobile ticketing for unreserved travel, including suburban and short-distance journeys. UTS enables passengers to buy general-class and platform tickets through mobile apps and automatic ticket vending machines, reducing queues and improving convenience. Both PRS and UTS run on the railway’s telecom and data infrastructure managed by CRIS and are among the most heavily used digital services in the country.  

==== Modernization of PRS ====
Recognizing the limitations of legacy systems, Indian Railways has undertaken a major modernization of its ticketing platforms. The existing PRS, which originally ran on older software architectures, is being replaced by a new system designed to be agile, scalable, and capable of handling significantly higher loads. The upgraded PRS is expected to support over 125,000 ticket bookings per minute, a substantial increase from earlier capacities, and to handle millions of enquiries per minute. 

The new PRS is being built on open-source platforms, including enterprise Linux environments, to reduce dependence on single vendors and improve flexibility. It introduces features such as seat choice, fare calendars, and integrated support for categories like Divyangjan (persons with disabilities), students, and patients. A separate upgrade of UTS is also underway, while a dedicated Railway Information Security Operations Centre (IR-SOC) is being established to strengthen cybersecurity for these critical systems.  

=== FOIS (Freight Operations Information System) ===
The Freight Operations Information System (FOIS) is a comprehensive digital platform for managing freight operations on Indian Railways. Conceived in the mid-1980s and implemented through CRIS, FOIS was initially designed to track and monitor the movement of wagons, locomotives, and unit trains. Over time, it has evolved into a full management module covering rake management, terminal handling, billing, revenue collection, and customer interaction, though not rolling stock maintenance. 

FOIS includes subsystems such as the Rake Management System (RMS) and Terminal Management System (TMS), which support planning, tracking, and optimization of freight trains and terminals. Customer-facing portals enable rake allotment, consignment tracking, and business development services, while management information systems provide real-time and historical data for decision-making. Tools like FOISMapView use geographic information systems (GIS) to visualize freight train movements across the network, aiding traffic planning and resource optimization. 

=== CMS (Crew Management System) ===
Digital technologies also support the management of crew and rolling stock, which are critical for efficient railway operations. The Crew Management System (CMS) streamlines crew scheduling, deployment, and monitoring, ensuring that loco pilots, guards, and other staff are assigned appropriately and that duty-hour regulations are followed. By maintaining digital records of crew rosters, rest hours, and training, CMS helps improve workforce utilization and safety compliance. 

Similarly, systems for rolling stock management track the location, status, and maintenance schedules of locomotives, coaches, and wagons. Technologies such as Radio Frequency Identification (RFID) have been used to tag and track rolling stock, while GPS-based solutions enable real-time monitoring of train movements. These systems feed into broader platforms like FOIS and coaching operation systems, providing data for operational control, maintenance planning, and customer information services. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="8462" sha1="kd4lifu68fp2nrsfx943i8134dz53af" xml:space="preserve">== Introduction ==
Digital technologies in '''Indian Railways''' refer to the computer-based systems, software applications, communication networks, and data-driven tools that support the planning, operation, management, and customer services of one of the world’s largest railway networks. These technologies span passenger ticketing and enquiry, freight logistics, crew and rolling stock management, safety systems, and enterprise-wide information management. 

The adoption of digital technologies has been driven by the need to handle very large transaction volumes, improve operational efficiency, enhance safety, and provide better services to passengers and freight customers. Over time, Indian Railways has moved from isolated, legacy systems to integrated, networked platforms that rely on high-capacity telecom backbones, modern data centers, and increasingly on artificial intelligence and analytics.  

== Digital Technologies of Indian Railways ==

=== CRIS and RDSO ===
The Centre for Railway Information Systems (CRIS) is the primary organization responsible for designing, developing, implementing, and maintaining the information technology systems of Indian Railways. Established in 1986, CRIS evolved from an earlier effort to computerize freight operations and now serves as the ICT arm of the Railways, building and managing most of its major digital applications. CRIS develops software, provides ICT infrastructure, and supports field implementation across zonal railways and business units. 

Alongside CRIS, the Research Designs and Standards Organization (RDSO) plays a key role in the development and standardization of safety-critical digital systems, particularly in signalling and train protection. RDSO has led the design of indigenous Automatic Train Protection systems such as Kavach (earlier known as TCAS), working with Indian industry partners to create solutions tailored to Indian operating conditions. Together, CRIS and RDSO form the core institutional framework for digital technologies in Indian Railways, with CRIS focusing on information systems and RDSO on safety and engineering standards.  

=== PRS and UTS ===
The Passenger Reservation System (PRS) is the computerized platform that manages reserved ticketing across Indian Railways. Introduced in the mid-1980s, PRS replaced manual reservation processes and enabled centralized management of seat allocation, waitlists, Reservation Against Cancellation (RAC), and reservation charts. Passengers access PRS through reservation counters, the IRCTC website, and mobile applications, allowing booking, modification, and cancellation of tickets from multiple channels. 

In parallel, the Unreserved Ticketing System (UTS) supports paperless and mobile ticketing for unreserved travel, including suburban and short-distance journeys. UTS enables passengers to buy general-class and platform tickets through mobile apps and automatic ticket vending machines, reducing queues and improving convenience. Both PRS and UTS run on the railway’s telecom and data infrastructure managed by CRIS and are among the most heavily used digital services in the country.  

==== Modernization of PRS ====
Recognizing the limitations of legacy systems, Indian Railways has undertaken a major modernization of its ticketing platforms. The existing PRS, which originally ran on older software architectures, is being replaced by a new system designed to be agile, scalable, and capable of handling significantly higher loads. The upgraded PRS is expected to support over 125,000 ticket bookings per minute, a substantial increase from earlier capacities, and to handle millions of enquiries per minute. 

The new PRS is being built on open-source platforms, including enterprise Linux environments, to reduce dependence on single vendors and improve flexibility. It introduces features such as seat choice, fare calendars, and integrated support for categories like Divyangjan (persons with disabilities), students, and patients. A separate upgrade of UTS is also underway, while a dedicated Railway Information Security Operations Centre (IR-SOC) is being established to strengthen cybersecurity for these critical systems.  

=== FOIS (Freight Operations Information System) ===
The Freight Operations Information System (FOIS) is a comprehensive digital platform for managing freight operations on Indian Railways. Conceived in the mid-1980s and implemented through CRIS, FOIS was initially designed to track and monitor the movement of wagons, locomotives, and unit trains. Over time, it has evolved into a full management module covering rake management, terminal handling, billing, revenue collection, and customer interaction, though not rolling stock maintenance. 

FOIS includes subsystems such as the Rake Management System (RMS) and Terminal Management System (TMS), which support planning, tracking, and optimization of freight trains and terminals. Customer-facing portals enable rake allotment, consignment tracking, and business development services, while management information systems provide real-time and historical data for decision-making. Tools like FOISMapView use geographic information systems (GIS) to visualize freight train movements across the network, aiding traffic planning and resource optimization. 

=== CMS (Crew Management System) ===
Digital technologies also support the management of crew and rolling stock, which are critical for efficient railway operations. The Crew Management System (CMS) streamlines crew scheduling, deployment, and monitoring, ensuring that loco pilots, guards, and other staff are assigned appropriately and that duty-hour regulations are followed. By maintaining digital records of crew rosters, rest hours, and training, CMS helps improve workforce utilization and safety compliance. 

Similarly, systems for rolling stock management track the location, status, and maintenance schedules of locomotives, coaches, and wagons. Technologies such as Radio Frequency Identification (RFID) have been used to tag and track rolling stock, while GPS-based solutions enable real-time monitoring of train movements. These systems feed into broader platforms like FOIS and coaching operation systems, providing data for operational control, maintenance planning, and customer information services.  

=== NTES and RailMadad ===
Train enquiry and passenger information services are among the most visible digital applications for railway users. The National Train Enquiry System (NTES) provides real-time information on train running status, expected arrival and departure times, and platform numbers at stations. Passengers access NTES through websites, mobile apps, and display boards at stations, helping them plan journeys and reduce uncertainty. 

RailMadad is another key digital platform, serving as a centralized grievance redressal and assistance system for passengers. It allows users to lodge complaints, seek help, and track the resolution of issues related to cleanliness, catering, security, and other aspects of travel. Integration of NTES and RailMadad with language technologies, such as automatic speech recognition and translation, is being explored to make these services more accessible in multiple Indian languages. 

=== IRCTC and RailOne ===
[[File:IRCTC Humsafar Rakes..jpg|thumb|284x284px|'''''Credit: Kishlay RF.''''' This Humsafar rake actually belongs to IRCTC. ]]
To provide a unified digital experience, Indian Railways has introduced integrated mobile applications that combine multiple services on a single platform. The RailOne app, for example, brings together reserved and unreserved ticketing, platform ticketing, train enquiry, PNR status, and RailMadad grievance services under one login. It supports credentials from existing systems like RailConnect and UTS, allowing passengers to access a wide range of services without switching between multiple apps. 

The IRCTC website and mobile applications remain central to online reserved ticketing, offering features such as seat selection, meal booking, and integration with payment gateways. Together, these apps represent a shift towards “super-app” style platforms where passengers can plan, book, travel, and seek support within a single digital ecosystem. This approach reduces friction for users and allows Indian Railways to gather integrated data on passenger behavior and service performance. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="9646" sha1="nij6anh4p93y3lvlhxslriz48zdhtv1" xml:space="preserve">== Introduction ==
Digital technologies in '''Indian Railways''' refer to the computer-based systems, software applications, communication networks, and data-driven tools that support the planning, operation, management, and customer services of one of the world’s largest railway networks. These technologies span passenger ticketing and enquiry, freight logistics, crew and rolling stock management, safety systems, and enterprise-wide information management. 

The adoption of digital technologies has been driven by the need to handle very large transaction volumes, improve operational efficiency, enhance safety, and provide better services to passengers and freight customers. Over time, Indian Railways has moved from isolated, legacy systems to integrated, networked platforms that rely on high-capacity telecom backbones, modern data centers, and increasingly on artificial intelligence and analytics.  

== Digital Technologies of Indian Railways ==

=== CRIS and RDSO ===
The Centre for Railway Information Systems (CRIS) is the primary organization responsible for designing, developing, implementing, and maintaining the information technology systems of Indian Railways. Established in 1986, CRIS evolved from an earlier effort to computerize freight operations and now serves as the ICT arm of the Railways, building and managing most of its major digital applications. CRIS develops software, provides ICT infrastructure, and supports field implementation across zonal railways and business units. 

Alongside CRIS, the Research Designs and Standards Organization (RDSO) plays a key role in the development and standardization of safety-critical digital systems, particularly in signalling and train protection. RDSO has led the design of indigenous Automatic Train Protection systems such as Kavach (earlier known as TCAS), working with Indian industry partners to create solutions tailored to Indian operating conditions. Together, CRIS and RDSO form the core institutional framework for digital technologies in Indian Railways, with CRIS focusing on information systems and RDSO on safety and engineering standards.  

=== PRS and UTS ===
The Passenger Reservation System (PRS) is the computerized platform that manages reserved ticketing across Indian Railways. Introduced in the mid-1980s, PRS replaced manual reservation processes and enabled centralized management of seat allocation, waitlists, Reservation Against Cancellation (RAC), and reservation charts. Passengers access PRS through reservation counters, the IRCTC website, and mobile applications, allowing booking, modification, and cancellation of tickets from multiple channels. 

In parallel, the Unreserved Ticketing System (UTS) supports paperless and mobile ticketing for unreserved travel, including suburban and short-distance journeys. UTS enables passengers to buy general-class and platform tickets through mobile apps and automatic ticket vending machines, reducing queues and improving convenience. Both PRS and UTS run on the railway’s telecom and data infrastructure managed by CRIS and are among the most heavily used digital services in the country.  

==== Modernization of PRS ====
Recognizing the limitations of legacy systems, Indian Railways has undertaken a major modernization of its ticketing platforms. The existing PRS, which originally ran on older software architectures, is being replaced by a new system designed to be agile, scalable, and capable of handling significantly higher loads. The upgraded PRS is expected to support over 125,000 ticket bookings per minute, a substantial increase from earlier capacities, and to handle millions of enquiries per minute. 

The new PRS is being built on open-source platforms, including enterprise Linux environments, to reduce dependence on single vendors and improve flexibility. It introduces features such as seat choice, fare calendars, and integrated support for categories like Divyangjan (persons with disabilities), students, and patients. A separate upgrade of UTS is also underway, while a dedicated Railway Information Security Operations Centre (IR-SOC) is being established to strengthen cybersecurity for these critical systems.  

=== FOIS (Freight Operations Information System) ===
The Freight Operations Information System (FOIS) is a comprehensive digital platform for managing freight operations on Indian Railways. Conceived in the mid-1980s and implemented through CRIS, FOIS was initially designed to track and monitor the movement of wagons, locomotives, and unit trains. Over time, it has evolved into a full management module covering rake management, terminal handling, billing, revenue collection, and customer interaction, though not rolling stock maintenance. 

FOIS includes subsystems such as the Rake Management System (RMS) and Terminal Management System (TMS), which support planning, tracking, and optimization of freight trains and terminals. Customer-facing portals enable rake allotment, consignment tracking, and business development services, while management information systems provide real-time and historical data for decision-making. Tools like FOISMapView use geographic information systems (GIS) to visualize freight train movements across the network, aiding traffic planning and resource optimization. 

=== CMS (Crew Management System) ===
Digital technologies also support the management of crew and rolling stock, which are critical for efficient railway operations. The Crew Management System (CMS) streamlines crew scheduling, deployment, and monitoring, ensuring that loco pilots, guards, and other staff are assigned appropriately and that duty-hour regulations are followed. By maintaining digital records of crew rosters, rest hours, and training, CMS helps improve workforce utilization and safety compliance. 

Similarly, systems for rolling stock management track the location, status, and maintenance schedules of locomotives, coaches, and wagons. Technologies such as Radio Frequency Identification (RFID) have been used to tag and track rolling stock, while GPS-based solutions enable real-time monitoring of train movements. These systems feed into broader platforms like FOIS and coaching operation systems, providing data for operational control, maintenance planning, and customer information services.  

=== NTES and RailMadad ===
Train enquiry and passenger information services are among the most visible digital applications for railway users. The National Train Enquiry System (NTES) provides real-time information on train running status, expected arrival and departure times, and platform numbers at stations. Passengers access NTES through websites, mobile apps, and display boards at stations, helping them plan journeys and reduce uncertainty. 

RailMadad is another key digital platform, serving as a centralized grievance redressal and assistance system for passengers. It allows users to lodge complaints, seek help, and track the resolution of issues related to cleanliness, catering, security, and other aspects of travel. Integration of NTES and RailMadad with language technologies, such as automatic speech recognition and translation, is being explored to make these services more accessible in multiple Indian languages. 

=== IRCTC and RailOne ===
[[File:IRCTC Humsafar Rakes..jpg|thumb|284x284px|'''''Credit: Kishlay RF.''''' This Humsafar rake actually belongs to IRCTC. ]]
To provide a unified digital experience, Indian Railways has introduced integrated mobile applications that combine multiple services on a single platform. The RailOne app, for example, brings together reserved and unreserved ticketing, platform ticketing, train enquiry, PNR status, and RailMadad grievance services under one login. It supports credentials from existing systems like RailConnect and UTS, allowing passengers to access a wide range of services without switching between multiple apps. 

The IRCTC website and mobile applications remain central to online reserved ticketing, offering features such as seat selection, meal booking, and integration with payment gateways. Together, these apps represent a shift towards “super-app” style platforms where passengers can plan, book, travel, and seek support within a single digital ecosystem. This approach reduces friction for users and allows Indian Railways to gather integrated data on passenger behavior and service performance.  

=== Kavach (TCAS) ===
Safety is a core focus of digital technologies in Indian Railways, with systems designed to prevent accidents and enhance operational reliability. Kavach, originally developed as the Train Collision Avoidance System (TCAS), is an indigenous Automatic Train Protection (ATP) system created by RDSO in collaboration with Indian industry. It is certified to Safety Integrity Level 4 (SIL-4), one of the highest global railway safety standards, and is designed to function reliably in Indian conditions, including fog and low visibility. 

Kavach works by creating a real-time communication network between trains, trackside equipment, signalling systems, and control stations. It provides cab signalling, warns drivers of signal aspects and speed restrictions, and can automatically apply brakes if the driver fails to respond appropriately. The system helps prevent head-on, rear-end, and side collisions under certain conditions, reduces the risk of Signal Passing at Danger (SPAD), and enforces section and locomotive-specific speed limits. Deployment is being prioritized on high-density routes, with plans to cover thousands of route kilometers in phases.  
[[Category:Book:Indian Railways]]</text>
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      <text bytes="10694" sha1="c0nj3iu3mi7jg31ap792w7h8z2v1bbn" xml:space="preserve">== Introduction ==
Digital technologies in '''Indian Railways''' refer to the computer-based systems, software applications, communication networks, and data-driven tools that support the planning, operation, management, and customer services of one of the world’s largest railway networks. These technologies span passenger ticketing and enquiry, freight logistics, crew and rolling stock management, safety systems, and enterprise-wide information management. 

The adoption of digital technologies has been driven by the need to handle very large transaction volumes, improve operational efficiency, enhance safety, and provide better services to passengers and freight customers. Over time, Indian Railways has moved from isolated, legacy systems to integrated, networked platforms that rely on high-capacity telecom backbones, modern data centers, and increasingly on artificial intelligence and analytics.  

== Digital Technologies of Indian Railways ==

=== CRIS and RDSO ===
The Centre for Railway Information Systems (CRIS) is the primary organization responsible for designing, developing, implementing, and maintaining the information technology systems of Indian Railways. Established in 1986, CRIS evolved from an earlier effort to computerize freight operations and now serves as the ICT arm of the Railways, building and managing most of its major digital applications. CRIS develops software, provides ICT infrastructure, and supports field implementation across zonal railways and business units. 

Alongside CRIS, the Research Designs and Standards Organization (RDSO) plays a key role in the development and standardization of safety-critical digital systems, particularly in signalling and train protection. RDSO has led the design of indigenous Automatic Train Protection systems such as Kavach (earlier known as TCAS), working with Indian industry partners to create solutions tailored to Indian operating conditions. Together, CRIS and RDSO form the core institutional framework for digital technologies in Indian Railways, with CRIS focusing on information systems and RDSO on safety and engineering standards.  

=== PRS and UTS ===
The Passenger Reservation System (PRS) is the computerized platform that manages reserved ticketing across Indian Railways. Introduced in the mid-1980s, PRS replaced manual reservation processes and enabled centralized management of seat allocation, waitlists, Reservation Against Cancellation (RAC), and reservation charts. Passengers access PRS through reservation counters, the IRCTC website, and mobile applications, allowing booking, modification, and cancellation of tickets from multiple channels. 

In parallel, the Unreserved Ticketing System (UTS) supports paperless and mobile ticketing for unreserved travel, including suburban and short-distance journeys. UTS enables passengers to buy general-class and platform tickets through mobile apps and automatic ticket vending machines, reducing queues and improving convenience. Both PRS and UTS run on the railway’s telecom and data infrastructure managed by CRIS and are among the most heavily used digital services in the country.  

==== Modernization of PRS ====
Recognizing the limitations of legacy systems, Indian Railways has undertaken a major modernization of its ticketing platforms. The existing PRS, which originally ran on older software architectures, is being replaced by a new system designed to be agile, scalable, and capable of handling significantly higher loads. The upgraded PRS is expected to support over 125,000 ticket bookings per minute, a substantial increase from earlier capacities, and to handle millions of enquiries per minute. 

The new PRS is being built on open-source platforms, including enterprise Linux environments, to reduce dependence on single vendors and improve flexibility. It introduces features such as seat choice, fare calendars, and integrated support for categories like Divyangjan (persons with disabilities), students, and patients. A separate upgrade of UTS is also underway, while a dedicated Railway Information Security Operations Centre (IR-SOC) is being established to strengthen cybersecurity for these critical systems.  

=== FOIS (Freight Operations Information System) ===
The Freight Operations Information System (FOIS) is a comprehensive digital platform for managing freight operations on Indian Railways. Conceived in the mid-1980s and implemented through CRIS, FOIS was initially designed to track and monitor the movement of wagons, locomotives, and unit trains. Over time, it has evolved into a full management module covering rake management, terminal handling, billing, revenue collection, and customer interaction, though not rolling stock maintenance. 

FOIS includes subsystems such as the Rake Management System (RMS) and Terminal Management System (TMS), which support planning, tracking, and optimization of freight trains and terminals. Customer-facing portals enable rake allotment, consignment tracking, and business development services, while management information systems provide real-time and historical data for decision-making. Tools like FOISMapView use geographic information systems (GIS) to visualize freight train movements across the network, aiding traffic planning and resource optimization. 

=== CMS (Crew Management System) ===
Digital technologies also support the management of crew and rolling stock, which are critical for efficient railway operations. The Crew Management System (CMS) streamlines crew scheduling, deployment, and monitoring, ensuring that loco pilots, guards, and other staff are assigned appropriately and that duty-hour regulations are followed. By maintaining digital records of crew rosters, rest hours, and training, CMS helps improve workforce utilization and safety compliance. 

Similarly, systems for rolling stock management track the location, status, and maintenance schedules of locomotives, coaches, and wagons. Technologies such as Radio Frequency Identification (RFID) have been used to tag and track rolling stock, while GPS-based solutions enable real-time monitoring of train movements. These systems feed into broader platforms like FOIS and coaching operation systems, providing data for operational control, maintenance planning, and customer information services.  

=== NTES and RailMadad ===
Train enquiry and passenger information services are among the most visible digital applications for railway users. The National Train Enquiry System (NTES) provides real-time information on train running status, expected arrival and departure times, and platform numbers at stations. Passengers access NTES through websites, mobile apps, and display boards at stations, helping them plan journeys and reduce uncertainty. 

RailMadad is another key digital platform, serving as a centralized grievance redressal and assistance system for passengers. It allows users to lodge complaints, seek help, and track the resolution of issues related to cleanliness, catering, security, and other aspects of travel. Integration of NTES and RailMadad with language technologies, such as automatic speech recognition and translation, is being explored to make these services more accessible in multiple Indian languages. 

=== IRCTC and RailOne ===
[[File:IRCTC Humsafar Rakes..jpg|thumb|284x284px|'''''Credit: Kishlay RF.''''' This Humsafar rake actually belongs to IRCTC. ]]
To provide a unified digital experience, Indian Railways has introduced integrated mobile applications that combine multiple services on a single platform. The RailOne app, for example, brings together reserved and unreserved ticketing, platform ticketing, train enquiry, PNR status, and RailMadad grievance services under one login. It supports credentials from existing systems like RailConnect and UTS, allowing passengers to access a wide range of services without switching between multiple apps. 

The IRCTC website and mobile applications remain central to online reserved ticketing, offering features such as seat selection, meal booking, and integration with payment gateways. Together, these apps represent a shift towards “super-app” style platforms where passengers can plan, book, travel, and seek support within a single digital ecosystem. This approach reduces friction for users and allows Indian Railways to gather integrated data on passenger behavior and service performance.  

=== Kavach (TCAS) ===
Safety is a core focus of digital technologies in Indian Railways, with systems designed to prevent accidents and enhance operational reliability. Kavach, originally developed as the Train Collision Avoidance System (TCAS), is an indigenous Automatic Train Protection (ATP) system created by RDSO in collaboration with Indian industry. It is certified to Safety Integrity Level 4 (SIL-4), one of the highest global railway safety standards, and is designed to function reliably in Indian conditions, including fog and low visibility. 

Kavach works by creating a real-time communication network between trains, trackside equipment, signalling systems, and control stations. It provides cab signalling, warns drivers of signal aspects and speed restrictions, and can automatically apply brakes if the driver fails to respond appropriately. The system helps prevent head-on, rear-end, and side collisions under certain conditions, reduces the risk of Signal Passing at Danger (SPAD), and enforces section and locomotive-specific speed limits. Deployment is being prioritized on high-density routes, with plans to cover thousands of route kilometers in phases.   

=== Data Analytics and AI ===
Indian Railways is increasingly using data analytics and artificial intelligence (AI) to improve decision-making, maintenance, and service quality. Dashboards such as eDrishti provide senior management with real-time views of key performance indicators, including punctuality, freight loading, and asset utilization. These tools aggregate data from multiple systems to support monitoring and rapid intervention where needed. 

Plans are underway to establish a Railway AI Centre of Excellence to coordinate and accelerate the use of AI across the organization. Existing initiatives include machine learning models for predictive maintenance, computer vision for inspection tasks, natural language processing for customer support, and robotics for specific operational functions. CRIS is also developing analytics capabilities to leverage the vast amounts of data generated by ticketing, freight, crew, and train operations systems, aiming to move from descriptive reporting to predictive and prescriptive insights. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="12623" sha1="2v5xhi5ylp02970fqbvqhq693hv4bwj" xml:space="preserve">== Introduction ==
Digital technologies in '''Indian Railways''' refer to the computer-based systems, software applications, communication networks, and data-driven tools that support the planning, operation, management, and customer services of one of the world’s largest railway networks. These technologies span passenger ticketing and enquiry, freight logistics, crew and rolling stock management, safety systems, and enterprise-wide information management. 

The adoption of digital technologies has been driven by the need to handle very large transaction volumes, improve operational efficiency, enhance safety, and provide better services to passengers and freight customers. Over time, Indian Railways has moved from isolated, legacy systems to integrated, networked platforms that rely on high-capacity telecom backbones, modern data centers, and increasingly on artificial intelligence and analytics.  

== Digital Technologies of Indian Railways ==

=== CRIS and RDSO ===
The Centre for Railway Information Systems (CRIS) is the primary organization responsible for designing, developing, implementing, and maintaining the information technology systems of Indian Railways. Established in 1986, CRIS evolved from an earlier effort to computerize freight operations and now serves as the ICT arm of the Railways, building and managing most of its major digital applications. CRIS develops software, provides ICT infrastructure, and supports field implementation across zonal railways and business units. 

Alongside CRIS, the Research Designs and Standards Organization (RDSO) plays a key role in the development and standardization of safety-critical digital systems, particularly in signalling and train protection. RDSO has led the design of indigenous Automatic Train Protection systems such as Kavach (earlier known as TCAS), working with Indian industry partners to create solutions tailored to Indian operating conditions. Together, CRIS and RDSO form the core institutional framework for digital technologies in Indian Railways, with CRIS focusing on information systems and RDSO on safety and engineering standards.  

=== PRS and UTS ===
The Passenger Reservation System (PRS) is the computerized platform that manages reserved ticketing across Indian Railways. Introduced in the mid-1980s, PRS replaced manual reservation processes and enabled centralized management of seat allocation, waitlists, Reservation Against Cancellation (RAC), and reservation charts. Passengers access PRS through reservation counters, the IRCTC website, and mobile applications, allowing booking, modification, and cancellation of tickets from multiple channels. 

In parallel, the Unreserved Ticketing System (UTS) supports paperless and mobile ticketing for unreserved travel, including suburban and short-distance journeys. UTS enables passengers to buy general-class and platform tickets through mobile apps and automatic ticket vending machines, reducing queues and improving convenience. Both PRS and UTS run on the railway’s telecom and data infrastructure managed by CRIS and are among the most heavily used digital services in the country.  

==== Modernization of PRS ====
Recognizing the limitations of legacy systems, Indian Railways has undertaken a major modernization of its ticketing platforms. The existing PRS, which originally ran on older software architectures, is being replaced by a new system designed to be agile, scalable, and capable of handling significantly higher loads. The upgraded PRS is expected to support over 125,000 ticket bookings per minute, a substantial increase from earlier capacities, and to handle millions of enquiries per minute. 

The new PRS is being built on open-source platforms, including enterprise Linux environments, to reduce dependence on single vendors and improve flexibility. It introduces features such as seat choice, fare calendars, and integrated support for categories like Divyangjan (persons with disabilities), students, and patients. A separate upgrade of UTS is also underway, while a dedicated Railway Information Security Operations Centre (IR-SOC) is being established to strengthen cybersecurity for these critical systems.  

=== FOIS (Freight Operations Information System) ===
The Freight Operations Information System (FOIS) is a comprehensive digital platform for managing freight operations on Indian Railways. Conceived in the mid-1980s and implemented through CRIS, FOIS was initially designed to track and monitor the movement of wagons, locomotives, and unit trains. Over time, it has evolved into a full management module covering rake management, terminal handling, billing, revenue collection, and customer interaction, though not rolling stock maintenance. 

FOIS includes subsystems such as the Rake Management System (RMS) and Terminal Management System (TMS), which support planning, tracking, and optimization of freight trains and terminals. Customer-facing portals enable rake allotment, consignment tracking, and business development services, while management information systems provide real-time and historical data for decision-making. Tools like FOISMapView use geographic information systems (GIS) to visualize freight train movements across the network, aiding traffic planning and resource optimization. 

=== CMS (Crew Management System) ===
Digital technologies also support the management of crew and rolling stock, which are critical for efficient railway operations. The Crew Management System (CMS) streamlines crew scheduling, deployment, and monitoring, ensuring that loco pilots, guards, and other staff are assigned appropriately and that duty-hour regulations are followed. By maintaining digital records of crew rosters, rest hours, and training, CMS helps improve workforce utilization and safety compliance. 

Similarly, systems for rolling stock management track the location, status, and maintenance schedules of locomotives, coaches, and wagons. Technologies such as Radio Frequency Identification (RFID) have been used to tag and track rolling stock, while GPS-based solutions enable real-time monitoring of train movements. These systems feed into broader platforms like FOIS and coaching operation systems, providing data for operational control, maintenance planning, and customer information services.  

=== NTES and RailMadad ===
Train enquiry and passenger information services are among the most visible digital applications for railway users. The National Train Enquiry System (NTES) provides real-time information on train running status, expected arrival and departure times, and platform numbers at stations. Passengers access NTES through websites, mobile apps, and display boards at stations, helping them plan journeys and reduce uncertainty. 

RailMadad is another key digital platform, serving as a centralized grievance redressal and assistance system for passengers. It allows users to lodge complaints, seek help, and track the resolution of issues related to cleanliness, catering, security, and other aspects of travel. Integration of NTES and RailMadad with language technologies, such as automatic speech recognition and translation, is being explored to make these services more accessible in multiple Indian languages. 

=== IRCTC and RailOne ===
[[File:IRCTC Humsafar Rakes..jpg|thumb|284x284px|'''''Credit: Kishlay RF.''''' This Humsafar rake actually belongs to IRCTC. ]]
To provide a unified digital experience, Indian Railways has introduced integrated mobile applications that combine multiple services on a single platform. The RailOne app, for example, brings together reserved and unreserved ticketing, platform ticketing, train enquiry, PNR status, and RailMadad grievance services under one login. It supports credentials from existing systems like RailConnect and UTS, allowing passengers to access a wide range of services without switching between multiple apps. 

The IRCTC website and mobile applications remain central to online reserved ticketing, offering features such as seat selection, meal booking, and integration with payment gateways. Together, these apps represent a shift towards “super-app” style platforms where passengers can plan, book, travel, and seek support within a single digital ecosystem. This approach reduces friction for users and allows Indian Railways to gather integrated data on passenger behavior and service performance.  

=== Kavach (TCAS) ===
Safety is a core focus of digital technologies in Indian Railways, with systems designed to prevent accidents and enhance operational reliability. Kavach, originally developed as the Train Collision Avoidance System (TCAS), is an indigenous Automatic Train Protection (ATP) system created by RDSO in collaboration with Indian industry. It is certified to Safety Integrity Level 4 (SIL-4), one of the highest global railway safety standards, and is designed to function reliably in Indian conditions, including fog and low visibility. 

Kavach works by creating a real-time communication network between trains, trackside equipment, signalling systems, and control stations. It provides cab signalling, warns drivers of signal aspects and speed restrictions, and can automatically apply brakes if the driver fails to respond appropriately. The system helps prevent head-on, rear-end, and side collisions under certain conditions, reduces the risk of Signal Passing at Danger (SPAD), and enforces section and locomotive-specific speed limits. Deployment is being prioritized on high-density routes, with plans to cover thousands of route kilometers in phases.   

=== Data Analytics and AI ===
Indian Railways is increasingly using data analytics and artificial intelligence (AI) to improve decision-making, maintenance, and service quality. Dashboards such as eDrishti provide senior management with real-time views of key performance indicators, including punctuality, freight loading, and asset utilization. These tools aggregate data from multiple systems to support monitoring and rapid intervention where needed. 

Plans are underway to establish a Railway AI Centre of Excellence to coordinate and accelerate the use of AI across the organization. Existing initiatives include machine learning models for predictive maintenance, computer vision for inspection tasks, natural language processing for customer support, and robotics for specific operational functions. CRIS is also developing analytics capabilities to leverage the vast amounts of data generated by ticketing, freight, crew, and train operations systems, aiming to move from descriptive reporting to predictive and prescriptive insights.  

== Digital Security ==

=== Cybersecurity ===
As digital systems become more central to railway operations, cybersecurity has emerged as a critical area of focus. Indian Railways handles millions of transactions daily across PRS, UTS, FOIS, and other platforms, making it an important target for cyber threats. In response, a dedicated Railway Information Security Operations Centre (IR-SOC) is being set up to monitor, detect, and respond to security incidents across the railway’s ICT infrastructure. 

Regular security audits, vulnerability assessments, and adherence to security standards are being implemented for new and existing digital services. Efforts include strengthening network security, securing data centers, improving identity and access management, and building incident response capabilities. These measures aim to protect sensitive passenger and operational data, ensure the availability of critical systems, and maintain trust in digital services. 

=== Enterprise Systems and Digital Governance ===
Beyond customer-facing and operational systems, Indian Railways uses a range of enterprise applications to support governance, procurement, and internal management. The Aapoorti platform digitizes procurement and tender management processes, bringing transparency and efficiency to purchasing activities. Such systems integrate with financial and inventory modules to provide end-to-end visibility of expenditures and contracts. 

Digital governance is further supported by platforms that enable performance monitoring, compliance tracking, and reporting. Tools like eDrishti and other management information systems help track progress against targets, identify bottlenecks, and support evidence-based policy decisions. CRIS also provides IT applications to non-railway government and public sector organizations, extending the benefits of railway-developed digital solutions to wider public services. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="13699" sha1="kpzbr44bxz9ohzne9t39ahe8seryqhy" xml:space="preserve">== Introduction ==
Digital technologies in '''Indian Railways''' refer to the computer-based systems, software applications, communication networks, and data-driven tools that support the planning, operation, management, and customer services of one of the world’s largest railway networks. These technologies span passenger ticketing and enquiry, freight logistics, crew and rolling stock management, safety systems, and enterprise-wide information management. 

The adoption of digital technologies has been driven by the need to handle very large transaction volumes, improve operational efficiency, enhance safety, and provide better services to passengers and freight customers. Over time, Indian Railways has moved from isolated, legacy systems to integrated, networked platforms that rely on high-capacity telecom backbones, modern data centers, and increasingly on artificial intelligence and analytics.  

== Digital Technologies of Indian Railways ==

=== CRIS and RDSO ===
The Centre for Railway Information Systems (CRIS) is the primary organization responsible for designing, developing, implementing, and maintaining the information technology systems of Indian Railways. Established in 1986, CRIS evolved from an earlier effort to computerize freight operations and now serves as the ICT arm of the Railways, building and managing most of its major digital applications. CRIS develops software, provides ICT infrastructure, and supports field implementation across zonal railways and business units. 

Alongside CRIS, the Research Designs and Standards Organization (RDSO) plays a key role in the development and standardization of safety-critical digital systems, particularly in signalling and train protection. RDSO has led the design of indigenous Automatic Train Protection systems such as Kavach (earlier known as TCAS), working with Indian industry partners to create solutions tailored to Indian operating conditions. Together, CRIS and RDSO form the core institutional framework for digital technologies in Indian Railways, with CRIS focusing on information systems and RDSO on safety and engineering standards.  

=== PRS and UTS ===
The Passenger Reservation System (PRS) is the computerized platform that manages reserved ticketing across Indian Railways. Introduced in the mid-1980s, PRS replaced manual reservation processes and enabled centralized management of seat allocation, waitlists, Reservation Against Cancellation (RAC), and reservation charts. Passengers access PRS through reservation counters, the IRCTC website, and mobile applications, allowing booking, modification, and cancellation of tickets from multiple channels. 

In parallel, the Unreserved Ticketing System (UTS) supports paperless and mobile ticketing for unreserved travel, including suburban and short-distance journeys. UTS enables passengers to buy general-class and platform tickets through mobile apps and automatic ticket vending machines, reducing queues and improving convenience. Both PRS and UTS run on the railway’s telecom and data infrastructure managed by CRIS and are among the most heavily used digital services in the country.  

==== Modernization of PRS ====
Recognizing the limitations of legacy systems, Indian Railways has undertaken a major modernization of its ticketing platforms. The existing PRS, which originally ran on older software architectures, is being replaced by a new system designed to be agile, scalable, and capable of handling significantly higher loads. The upgraded PRS is expected to support over 125,000 ticket bookings per minute, a substantial increase from earlier capacities, and to handle millions of enquiries per minute. 

The new PRS is being built on open-source platforms, including enterprise Linux environments, to reduce dependence on single vendors and improve flexibility. It introduces features such as seat choice, fare calendars, and integrated support for categories like Divyangjan (persons with disabilities), students, and patients. A separate upgrade of UTS is also underway, while a dedicated Railway Information Security Operations Centre (IR-SOC) is being established to strengthen cybersecurity for these critical systems.  

=== FOIS (Freight Operations Information System) ===
The Freight Operations Information System (FOIS) is a comprehensive digital platform for managing freight operations on Indian Railways. Conceived in the mid-1980s and implemented through CRIS, FOIS was initially designed to track and monitor the movement of wagons, locomotives, and unit trains. Over time, it has evolved into a full management module covering rake management, terminal handling, billing, revenue collection, and customer interaction, though not rolling stock maintenance. 

FOIS includes subsystems such as the Rake Management System (RMS) and Terminal Management System (TMS), which support planning, tracking, and optimization of freight trains and terminals. Customer-facing portals enable rake allotment, consignment tracking, and business development services, while management information systems provide real-time and historical data for decision-making. Tools like FOISMapView use geographic information systems (GIS) to visualize freight train movements across the network, aiding traffic planning and resource optimization. 

=== CMS (Crew Management System) ===
Digital technologies also support the management of crew and rolling stock, which are critical for efficient railway operations. The Crew Management System (CMS) streamlines crew scheduling, deployment, and monitoring, ensuring that loco pilots, guards, and other staff are assigned appropriately and that duty-hour regulations are followed. By maintaining digital records of crew rosters, rest hours, and training, CMS helps improve workforce utilization and safety compliance. 

Similarly, systems for rolling stock management track the location, status, and maintenance schedules of locomotives, coaches, and wagons. Technologies such as Radio Frequency Identification (RFID) have been used to tag and track rolling stock, while GPS-based solutions enable real-time monitoring of train movements. These systems feed into broader platforms like FOIS and coaching operation systems, providing data for operational control, maintenance planning, and customer information services.  

=== NTES and RailMadad ===
Train enquiry and passenger information services are among the most visible digital applications for railway users. The National Train Enquiry System (NTES) provides real-time information on train running status, expected arrival and departure times, and platform numbers at stations. Passengers access NTES through websites, mobile apps, and display boards at stations, helping them plan journeys and reduce uncertainty. 

RailMadad is another key digital platform, serving as a centralized grievance redressal and assistance system for passengers. It allows users to lodge complaints, seek help, and track the resolution of issues related to cleanliness, catering, security, and other aspects of travel. Integration of NTES and RailMadad with language technologies, such as automatic speech recognition and translation, is being explored to make these services more accessible in multiple Indian languages. 

=== IRCTC and RailOne ===
[[File:IRCTC Humsafar Rakes..jpg|thumb|284x284px|'''''Credit: Kishlay RF.''''' This Humsafar rake actually belongs to IRCTC. ]]
To provide a unified digital experience, Indian Railways has introduced integrated mobile applications that combine multiple services on a single platform. The RailOne app, for example, brings together reserved and unreserved ticketing, platform ticketing, train enquiry, PNR status, and RailMadad grievance services under one login. It supports credentials from existing systems like RailConnect and UTS, allowing passengers to access a wide range of services without switching between multiple apps. 

The IRCTC website and mobile applications remain central to online reserved ticketing, offering features such as seat selection, meal booking, and integration with payment gateways. Together, these apps represent a shift towards “super-app” style platforms where passengers can plan, book, travel, and seek support within a single digital ecosystem. This approach reduces friction for users and allows Indian Railways to gather integrated data on passenger behavior and service performance.  

=== Kavach (TCAS) ===
Safety is a core focus of digital technologies in Indian Railways, with systems designed to prevent accidents and enhance operational reliability. Kavach, originally developed as the Train Collision Avoidance System (TCAS), is an indigenous Automatic Train Protection (ATP) system created by RDSO in collaboration with Indian industry. It is certified to Safety Integrity Level 4 (SIL-4), one of the highest global railway safety standards, and is designed to function reliably in Indian conditions, including fog and low visibility. 

Kavach works by creating a real-time communication network between trains, trackside equipment, signalling systems, and control stations. It provides cab signalling, warns drivers of signal aspects and speed restrictions, and can automatically apply brakes if the driver fails to respond appropriately. The system helps prevent head-on, rear-end, and side collisions under certain conditions, reduces the risk of Signal Passing at Danger (SPAD), and enforces section and locomotive-specific speed limits. Deployment is being prioritized on high-density routes, with plans to cover thousands of route kilometers in phases.   

=== Data Analytics and AI ===
Indian Railways is increasingly using data analytics and artificial intelligence (AI) to improve decision-making, maintenance, and service quality. Dashboards such as eDrishti provide senior management with real-time views of key performance indicators, including punctuality, freight loading, and asset utilization. These tools aggregate data from multiple systems to support monitoring and rapid intervention where needed. 

Plans are underway to establish a Railway AI Centre of Excellence to coordinate and accelerate the use of AI across the organization. Existing initiatives include machine learning models for predictive maintenance, computer vision for inspection tasks, natural language processing for customer support, and robotics for specific operational functions. CRIS is also developing analytics capabilities to leverage the vast amounts of data generated by ticketing, freight, crew, and train operations systems, aiming to move from descriptive reporting to predictive and prescriptive insights.  

== Digital Security ==

=== Cybersecurity ===
As digital systems become more central to railway operations, cybersecurity has emerged as a critical area of focus. Indian Railways handles millions of transactions daily across PRS, UTS, FOIS, and other platforms, making it an important target for cyber threats. In response, a dedicated Railway Information Security Operations Centre (IR-SOC) is being set up to monitor, detect, and respond to security incidents across the railway’s ICT infrastructure. 

Regular security audits, vulnerability assessments, and adherence to security standards are being implemented for new and existing digital services. Efforts include strengthening network security, securing data centers, improving identity and access management, and building incident response capabilities. These measures aim to protect sensitive passenger and operational data, ensure the availability of critical systems, and maintain trust in digital services. 

=== Enterprise Systems and Digital Governance ===
Beyond customer-facing and operational systems, Indian Railways uses a range of enterprise applications to support governance, procurement, and internal management. The Aapoorti platform digitizes procurement and tender management processes, bringing transparency and efficiency to purchasing activities. Such systems integrate with financial and inventory modules to provide end-to-end visibility of expenditures and contracts. 

Digital governance is further supported by platforms that enable performance monitoring, compliance tracking, and reporting. Tools like eDrishti and other management information systems help track progress against targets, identify bottlenecks, and support evidence-based policy decisions. CRIS also provides IT applications to non-railway government and public sector organizations, extending the benefits of railway-developed digital solutions to wider public services.  

== Future ==
In the future, digital technologies in Indian Railways are expected to evolve along several key directions. The continued rollout of Kavach and other advanced train protection systems will deepen the integration of safety-critical digital controls with signalling and operations. Upgrades to PRS and UTS will enhance capacity, user experience, and security, while new mobile and web platforms will offer more personalized and multilingual services. 

Emerging technologies such as 5G, Internet of Things (IoT), and advanced analytics are likely to play a growing role. For example, newer versions of Kavach are exploring integration with 5G-LTE for improved communication between trains and infrastructure. IoT sensors on rolling stock and infrastructure can support condition-based maintenance, while AI-driven models can optimize timetables, rake utilization, and freight routing. Together, these developments aim to create a more efficient, and user-centric railway system, which are aligned with broader national digital initiatives such as Digital India. 
[[Category:Book:Indian Railways]]</text>
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== I have added a tag to a page you created ==
Hi! I'm MathXplore, and I recently reviewed your page, [[:Trainz/TRS19]]. I have added a tag to the page, because it &lt;strong&gt;may meet the [[Wikibooks:Deletion policy#Speedy deletions|criteria for speedy deletion]].&lt;/strong&gt; This means that it can be deleted at any time.  If you believe that your page should not be deleted, please post a message on [[Talk:Trainz/TRS19|the page's talk page]] explaining why. &lt;strong&gt;If your reasoning is convincing, your page may be saved.&lt;/strong&gt; If you have any questions or concerns, please [[User talk:MathXplore|let me know]]. Thank you! &lt;!-- Substituted from User:JJPMaster/CurateThisPage/authorMsg --&gt; [[User:MathXplore|MathXplore]] ([[User talk:MathXplore|discuss]] • [[Special:Contributions/MathXplore|contribs]]) 10:23, 20 September 2026 (UTC)</text>
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    <title>Indian Railways/Railfanning</title>
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      <text bytes="1516" sha1="r16gosyg477fewl8p9ciz4wbgz8851m" xml:space="preserve">== Introduction ==
Railfanning in '''Indian Railways''' (also called trainspotting in some countries), is a recreational activity where enthusiasts observe and document railway operations, locomotives, rolling stock, and infrastructure. In India, railfanning has grown from a niche pursuit into a widespread hobby supported by online communities, dedicated websites, and social media groups. The vast Indian Railways network, spanning over 68,000 route kilometers across diverse geographical and climatic zones, offers exceptional variety for railfans. 

The practice involves visiting railway stations, level crossings, bridges, and scenic locations to watch trains pass, photograph locomotives and consists, record train movements, and sometimes travel specifically to experience particular routes or locomotive classes. Railfanning differs from ordinary train travel in its focus on observation and documentation rather than transportation alone. Participants often develop specialized knowledge about locomotive types, train schedules, railway history, and operational patterns. 

Railfanning in India presents unique opportunities due to the coexistence of multiple traction types, diverse locomotive classes from different eras, varied geographical settings from Himalayan Mountain railways to coastal routes, and the sheer volume of train movements daily. However, it also requires careful attention to safety, legal compliance, and ethical behavior around railway property. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="3267" sha1="edeq1za2h8x5bt1r4yhsm5wdv15ok08" xml:space="preserve">== Introduction ==
Railfanning in '''Indian Railways''' (also called trainspotting in some countries), is a recreational activity where enthusiasts observe and document railway operations, locomotives, rolling stock, and infrastructure. In India, railfanning has grown from a niche pursuit into a widespread hobby supported by online communities, dedicated websites, and social media groups. The vast Indian Railways network, spanning over 68,000 route kilometers across diverse geographical and climatic zones, offers exceptional variety for railfans. 

The practice involves visiting railway stations, level crossings, bridges, and scenic locations to watch trains pass, photograph locomotives and consists, record train movements, and sometimes travel specifically to experience particular routes or locomotive classes. Railfanning differs from ordinary train travel in its focus on observation and documentation rather than transportation alone. Participants often develop specialized knowledge about locomotive types, train schedules, railway history, and operational patterns. 

Railfanning in India presents unique opportunities due to the coexistence of multiple traction types, diverse locomotive classes from different eras, varied geographical settings from Himalayan Mountain railways to coastal routes, and the sheer volume of train movements daily. However, it also requires careful attention to safety, legal compliance, and ethical behavior around railway property.  

== Legal Permissions ==
Railfanning in India operates within a legal framework defined primarily by the Railways Act, 1989. Section 147 of this Act addresses trespass, stating that any person entering railway property without lawful authority faces imprisonment up to six months, a fine up to one thousand rupees, or both. This provision makes unauthorized presence on tracks, in yards, on platforms after hours, or in restricted areas a punishable offence. Understanding these legal boundaries is essential for responsible railfanning. 

Photography and videography on railway premises may need permission from railway authorities. Official guidelines mandate obtaining prior permission from the Manager or In-charge of concerned stations or premises before undertaking still or video photography. For extensive photography projects, permits may be obtained by writing to the Joint Director of Public Relations at Rail Bhavan in New Delhi, or to the Senior Public Relations Officer (PRO) of any regional division, or the Chief Public Relations Officer (CPRO) of a zonal railway. Applications should list intended stations and dates, and processing may take several weeks. 

In practice however, many railfans photograph trains from public areas adjacent to tracks, such as roads, bridges, or elevated positions outside railway boundaries, where no permission is required. However, using tripods, large lenses, or conspicuous equipment may attract attention from Railway Protection Force (RPF) or Government Railway Police (GRP) personnel. Discretion, small cameras, and avoiding flash photography help minimize confrontations. Some locations, particularly near security posts or sensitive infrastructure, should be avoided entirely. 

== Safety ==
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      <text bytes="4506" sha1="kw9ewh23fsx5jwvosknubm69dfdxq02" xml:space="preserve">== Introduction ==
Railfanning in '''Indian Railways''' (also called trainspotting in some countries), is a recreational activity where enthusiasts observe and document railway operations, locomotives, rolling stock, and infrastructure. In India, railfanning has grown from a niche pursuit into a widespread hobby supported by online communities, dedicated websites, and social media groups. The vast Indian Railways network, spanning over 68,000 route kilometers across diverse geographical and climatic zones, offers exceptional variety for railfans. 

The practice involves visiting railway stations, level crossings, bridges, and scenic locations to watch trains pass, photograph locomotives and consists, record train movements, and sometimes travel specifically to experience particular routes or locomotive classes. Railfanning differs from ordinary train travel in its focus on observation and documentation rather than transportation alone. Participants often develop specialized knowledge about locomotive types, train schedules, railway history, and operational patterns. 

Railfanning in India presents unique opportunities due to the coexistence of multiple traction types, diverse locomotive classes from different eras, varied geographical settings from Himalayan Mountain railways to coastal routes, and the sheer volume of train movements daily. However, it also requires careful attention to safety, legal compliance, and ethical behavior around railway property.  

== Legal Permissions ==
Railfanning in India operates within a legal framework defined primarily by the Railways Act, 1989. Section 147 of this Act addresses trespass, stating that any person entering railway property without lawful authority faces imprisonment up to six months, a fine up to one thousand rupees, or both. This provision makes unauthorized presence on tracks, in yards, on platforms after hours, or in restricted areas a punishable offence. Understanding these legal boundaries is essential for responsible railfanning. 

Photography and videography on railway premises may need permission from railway authorities. Official guidelines mandate obtaining prior permission from the Manager or In-charge of concerned stations or premises before undertaking still or video photography. For extensive photography projects, permits may be obtained by writing to the Joint Director of Public Relations at Rail Bhavan in New Delhi, or to the Senior Public Relations Officer (PRO) of any regional division, or the Chief Public Relations Officer (CPRO) of a zonal railway. Applications should list intended stations and dates, and processing may take several weeks. 

In practice however, many railfans photograph trains from public areas adjacent to tracks, such as roads, bridges, or elevated positions outside railway boundaries, where no permission is required. However, using tripods, large lenses, or conspicuous equipment may attract attention from Railway Protection Force (RPF) or Government Railway Police (GRP) personnel. Discretion, small cameras, and avoiding flash photography help minimize confrontations. Some locations, particularly near security posts or sensitive infrastructure, should be avoided entirely. 

== Safety ==
Safety is the main concern in railfanning. The cardinal rule is maintaining a safe distance from all moving trains and railway infrastructure. Trains cannot stop quickly, may overhang tracks, and can approach silently, especially electric locomotives. Railway tracks are not pedestrian pathways; walking, sitting, or placing equipment on rails is both dangerous and illegal, but it is not well enforced. 

Railfans should remain at least 25 feet from tracks, even when taking quick photographs. This distance accounts for train overhang, debris, and unexpected movements. Elevated positions such as embankments, bridges, or hills provide safer vantage points while offering better compositional opportunities. Never stand between converging tracks, on bridges without proper barriers, or in tunnels where escape routes are limited. 

Respect warning signs, fences, and barriers marking railway property. Do not cross tracks except at designated crossings with clear visibility. Empty trains stabled on tracks may be shunted without warning; never enter stationary consists unless explicitly permitted. If confronted by railway staff or police, remain calm, explain your activity politely, and comply with instructions to leave, if asked. 
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      <text bytes="6365" sha1="fw31sd01r4wkzkqp70kmupir9fk6uc0" xml:space="preserve">== Introduction ==
Railfanning in '''Indian Railways''' (also called trainspotting in some countries), is a recreational activity where enthusiasts observe and document railway operations, locomotives, rolling stock, and infrastructure. In India, railfanning has grown from a niche pursuit into a widespread hobby supported by online communities, dedicated websites, and social media groups. The vast Indian Railways network, spanning over 68,000 route kilometers across diverse geographical and climatic zones, offers exceptional variety for railfans. 

The practice involves visiting railway stations, level crossings, bridges, and scenic locations to watch trains pass, photograph locomotives and consists, record train movements, and sometimes travel specifically to experience particular routes or locomotive classes. Railfanning differs from ordinary train travel in its focus on observation and documentation rather than transportation alone. Participants often develop specialized knowledge about locomotive types, train schedules, railway history, and operational patterns. 

Railfanning in India presents unique opportunities due to the coexistence of multiple traction types, diverse locomotive classes from different eras, varied geographical settings from Himalayan Mountain railways to coastal routes, and the sheer volume of train movements daily. However, it also requires careful attention to safety, legal compliance, and ethical behavior around railway property.  

== Legal Permissions ==
Railfanning in India operates within a legal framework defined primarily by the Railways Act, 1989. Section 147 of this Act addresses trespass, stating that any person entering railway property without lawful authority faces imprisonment up to six months, a fine up to one thousand rupees, or both. This provision makes unauthorized presence on tracks, in yards, on platforms after hours, or in restricted areas a punishable offence. Understanding these legal boundaries is essential for responsible railfanning. 

Photography and videography on railway premises may need permission from railway authorities. Official guidelines mandate obtaining prior permission from the Manager or In-charge of concerned stations or premises before undertaking still or video photography. For extensive photography projects, permits may be obtained by writing to the Joint Director of Public Relations at Rail Bhavan in New Delhi, or to the Senior Public Relations Officer (PRO) of any regional division, or the Chief Public Relations Officer (CPRO) of a zonal railway. Applications should list intended stations and dates, and processing may take several weeks. 

In practice however, many railfans photograph trains from public areas adjacent to tracks, such as roads, bridges, or elevated positions outside railway boundaries, where no permission is required. However, using tripods, large lenses, or conspicuous equipment may attract attention from Railway Protection Force (RPF) or Government Railway Police (GRP) personnel. Discretion, small cameras, and avoiding flash photography help minimize confrontations. Some locations, particularly near security posts or sensitive infrastructure, should be avoided entirely. 

== Safety ==
Safety is the main concern in railfanning. The cardinal rule is maintaining a safe distance from all moving trains and railway infrastructure. Trains cannot stop quickly, may overhang tracks, and can approach silently, especially electric locomotives. Railway tracks are not pedestrian pathways; walking, sitting, or placing equipment on rails is both dangerous and illegal, but it is not well enforced. 

Railfans should remain at least 25 feet from tracks, even when taking quick photographs. This distance accounts for train overhang, debris, and unexpected movements. Elevated positions such as embankments, bridges, or hills provide safer vantage points while offering better compositional opportunities. Never stand between converging tracks, on bridges without proper barriers, or in tunnels where escape routes are limited. 

Respect warning signs, fences, and barriers marking railway property. Do not cross tracks except at designated crossings with clear visibility. Empty trains stabled on tracks may be shunted without warning; never enter stationary consists unless explicitly permitted. If confronted by railway staff or police, remain calm, explain your activity politely, and comply with instructions to leave, if asked.  

== Photo-Videography for Railfanning ==

=== Photography Equipment ===
Successful railfanning requires appropriate equipment tailored to observation, photography, and documentation needs. The fundamental tool is a camera, ranging from smartphone cameras for casual documentation to DSLR or mirrorless cameras with telephoto lenses for serious photography. A focal length of 70-200mm is often ideal for capturing trains from safe distances without disrupting operations or requiring trespass. 
[[File:Three different generations of Indian railway locomotives.jpg|thumb|267x267px|'''Credit: Piyush Sharma.''' A photographer taking a still picture of three different generations of locomotives in India. ]]
For still photography with professional cameras, use shutter priority mode with speeds of at least 1/1000 second for trains traveling above 80 km/h, and 1/500 second for slower movements. ISO settings of 400-800 provide flexibility in varying light conditions while maintaining image quality. Continuous autofocus and high-speed drive modes help capture sharp images of fast-moving subjects. Compact point-and-shoot cameras offer discretion and portability, while larger SLRs with fast lenses enable higher-quality enlargements. 

A notebook or smartphone app for logging sightings, train numbers, and times supports documentation. Weather protection for equipment is essential, especially during monsoon seasons. Comfortable clothing, sturdy shoes, sun protection, water, and snacks support extended outdoor sessions. Some railfans carry printed or digital copies of train schedules, locomotive rosters, and maps to identify observed trains and plan sessions effectively. Mobile apps providing real-time train running information have become invaluable tools for modern railfans, though reliance on electronic devices should not compromise awareness. 
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      <text bytes="8006" sha1="szpe5s2t2ww21n1uwxbz46d2zccszhz" xml:space="preserve">== Introduction ==
Railfanning in '''Indian Railways''' (also called trainspotting in some countries), is a recreational activity where enthusiasts observe and document railway operations, locomotives, rolling stock, and infrastructure. In India, railfanning has grown from a niche pursuit into a widespread hobby supported by online communities, dedicated websites, and social media groups. The vast Indian Railways network, spanning over 68,000 route kilometers across diverse geographical and climatic zones, offers exceptional variety for railfans. 

The practice involves visiting railway stations, level crossings, bridges, and scenic locations to watch trains pass, photograph locomotives and consists, record train movements, and sometimes travel specifically to experience particular routes or locomotive classes. Railfanning differs from ordinary train travel in its focus on observation and documentation rather than transportation alone. Participants often develop specialized knowledge about locomotive types, train schedules, railway history, and operational patterns. 

Railfanning in India presents unique opportunities due to the coexistence of multiple traction types, diverse locomotive classes from different eras, varied geographical settings from Himalayan Mountain railways to coastal routes, and the sheer volume of train movements daily. However, it also requires careful attention to safety, legal compliance, and ethical behavior around railway property.   

''See also: [[wikipedia:Railfan|Railfan]]''  

== Legal Permissions ==
Railfanning in India operates within a legal framework defined primarily by the Railways Act, 1989. Section 147 of this Act addresses trespass, stating that any person entering railway property without lawful authority faces imprisonment up to six months, a fine up to one thousand rupees, or both. This provision makes unauthorized presence on tracks, in yards, on platforms after hours, or in restricted areas a punishable offence. Understanding these legal boundaries is essential for responsible railfanning. 

Photography and videography on railway premises may need permission from railway authorities. Official guidelines mandate obtaining prior permission from the Manager or In-charge of concerned stations or premises before undertaking still or video photography. For extensive photography projects, permits may be obtained by writing to the Joint Director of Public Relations at Rail Bhavan in New Delhi, or to the Senior Public Relations Officer (PRO) of any regional division, or the Chief Public Relations Officer (CPRO) of a zonal railway. Applications should list intended stations and dates, and processing may take several weeks. 

In practice however, many railfans photograph trains from public areas adjacent to tracks, such as roads, bridges, or elevated positions outside railway boundaries, where no permission is required. However, using tripods, large lenses, or conspicuous equipment may attract attention from Railway Protection Force (RPF) or Government Railway Police (GRP) personnel. Discretion, small cameras, and avoiding flash photography help minimize confrontations. Some locations, particularly near security posts or sensitive infrastructure, should be avoided entirely. 

== Safety ==
Safety is the main concern in railfanning. The cardinal rule is maintaining a safe distance from all moving trains and railway infrastructure. Trains cannot stop quickly, may overhang tracks, and can approach silently, especially electric locomotives. Railway tracks are not pedestrian pathways; walking, sitting, or placing equipment on rails is both dangerous and illegal, but it is not well enforced. 

Railfans should remain at least 25 feet from tracks, even when taking quick photographs. This distance accounts for train overhang, debris, and unexpected movements. Elevated positions such as embankments, bridges, or hills provide safer vantage points while offering better compositional opportunities. Never stand between converging tracks, on bridges without proper barriers, or in tunnels where escape routes are limited. 

Respect warning signs, fences, and barriers marking railway property. Do not cross tracks except at designated crossings with clear visibility. Empty trains stabled on tracks may be shunted without warning; never enter stationary consists unless explicitly permitted. If confronted by railway staff or police, remain calm, explain your activity politely, and comply with instructions to leave, if asked.  

== Photo-Videography for Railfanning ==

=== Photography Equipment ===
Successful railfanning requires appropriate equipment tailored to observation, photography, and documentation needs. The fundamental tool is a camera, ranging from smartphone cameras for casual documentation to DSLR or mirrorless cameras with telephoto lenses for serious photography. A focal length of 70-200mm is often ideal for capturing trains from safe distances without disrupting operations or requiring trespass. 
[[File:Three different generations of Indian railway locomotives.jpg|thumb|267x267px|'''Credit: Piyush Sharma.''' A photographer taking a still picture of three different generations of locomotives in India. ]]
For still photography with professional cameras, use shutter priority mode with speeds of at least 1/1000 second for trains traveling above 80 km/h, and 1/500 second for slower movements. ISO settings of 400-800 provide flexibility in varying light conditions while maintaining image quality. Continuous autofocus and high-speed drive modes help capture sharp images of fast-moving subjects. Compact point-and-shoot cameras offer discretion and portability, while larger SLRs with fast lenses enable higher-quality enlargements.  

A notebook or smartphone app for logging sightings, train numbers, and times supports documentation. Weather protection for equipment is essential, especially during monsoon seasons. Comfortable clothing, sturdy shoes, sun protection, water, and snacks support extended outdoor sessions. Some railfans carry printed or digital copies of train schedules, locomotive rosters, and maps to identify observed trains and plan sessions effectively. Mobile apps providing real-time train running information have become invaluable tools for modern railfans, though reliance on electronic devices should not compromise awareness.  

=== Photography Techniques ===
Railfan photography combines technical camera skills with compositional awareness and safety considerations. The classic three-quarter &quot;wedge&quot; angle, approximately 30-45 degrees off the track with the locomotive front pointing toward the photographer, provides reliable composition showing both the front face and side of the engine while including the leading line of rails. Positioning relative to sunlight significantly affects image quality. Shooting with the sun behind you illuminates the train evenly, while side lighting creates dramatic shadows and texture. Dawn and dusk provide warm, soft light and often coincide with photogenic atmospheric conditions, though low-light situations require adjusted camera settings. Avoid shooting directly into sunlight unless silhouette effects are intended. 

Composition benefits from including environmental context: landscapes, bridges, stations, or urban settings that situate the train within its surroundings. Framing so geographic features dominate with the train as punctuation often produces more compelling images than isolating the locomotive against blank backgrounds. Avoid distracting elements such as white walls, garbage piles, or cluttered foregrounds that draw attention from the subject. For locomotive identification shots, frame so the number plate is roughly central, as corner sharpness degrades even on quality lenses and digits are unforgiving of softness. Leave open space in the direction of travel to suggest motion rather than having the train appear to exit the frame immediately. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="10232" sha1="g9vgqz65xcvwkdjdqzz7b7s6o2tzv1r" xml:space="preserve">== Introduction ==
Railfanning in '''Indian Railways''' (also called trainspotting in some countries), is a recreational activity where enthusiasts observe and document railway operations, locomotives, rolling stock, and infrastructure. In India, railfanning has grown from a niche pursuit into a widespread hobby supported by online communities, dedicated websites, and social media groups. The vast Indian Railways network, spanning over 68,000 route kilometers across diverse geographical and climatic zones, offers exceptional variety for railfans. 

The practice involves visiting railway stations, level crossings, bridges, and scenic locations to watch trains pass, photograph locomotives and consists, record train movements, and sometimes travel specifically to experience particular routes or locomotive classes. Railfanning differs from ordinary train travel in its focus on observation and documentation rather than transportation alone. Participants often develop specialized knowledge about locomotive types, train schedules, railway history, and operational patterns. 

Railfanning in India presents unique opportunities due to the coexistence of multiple traction types, diverse locomotive classes from different eras, varied geographical settings from Himalayan Mountain railways to coastal routes, and the sheer volume of train movements daily. However, it also requires careful attention to safety, legal compliance, and ethical behavior around railway property.   

''See also: [[wikipedia:Railfan|Railfan]]''  

== Legal Permissions ==
Railfanning in India operates within a legal framework defined primarily by the Railways Act, 1989. Section 147 of this Act addresses trespass, stating that any person entering railway property without lawful authority faces imprisonment up to six months, a fine up to one thousand rupees, or both. This provision makes unauthorized presence on tracks, in yards, on platforms after hours, or in restricted areas a punishable offence. Understanding these legal boundaries is essential for responsible railfanning. 

Photography and videography on railway premises may need permission from railway authorities. Official guidelines mandate obtaining prior permission from the Manager or In-charge of concerned stations or premises before undertaking still or video photography. For extensive photography projects, permits may be obtained by writing to the Joint Director of Public Relations at Rail Bhavan in New Delhi, or to the Senior Public Relations Officer (PRO) of any regional division, or the Chief Public Relations Officer (CPRO) of a zonal railway. Applications should list intended stations and dates, and processing may take several weeks. 

In practice however, many railfans photograph trains from public areas adjacent to tracks, such as roads, bridges, or elevated positions outside railway boundaries, where no permission is required. However, using tripods, large lenses, or conspicuous equipment may attract attention from Railway Protection Force (RPF) or Government Railway Police (GRP) personnel. Discretion, small cameras, and avoiding flash photography help minimize confrontations. Some locations, particularly near security posts or sensitive infrastructure, should be avoided entirely. 

== Safety ==
Safety is the main concern in railfanning. The cardinal rule is maintaining a safe distance from all moving trains and railway infrastructure. Trains cannot stop quickly, may overhang tracks, and can approach silently, especially electric locomotives. Railway tracks are not pedestrian pathways; walking, sitting, or placing equipment on rails is both dangerous and illegal, but it is not well enforced. 

Railfans should remain at least 25 feet from tracks, even when taking quick photographs. This distance accounts for train overhang, debris, and unexpected movements. Elevated positions such as embankments, bridges, or hills provide safer vantage points while offering better compositional opportunities. Never stand between converging tracks, on bridges without proper barriers, or in tunnels where escape routes are limited. 

Respect warning signs, fences, and barriers marking railway property. Do not cross tracks except at designated crossings with clear visibility. Empty trains stabled on tracks may be shunted without warning; never enter stationary consists unless explicitly permitted. If confronted by railway staff or police, remain calm, explain your activity politely, and comply with instructions to leave, if asked.  

== Photo-Videography for Railfanning ==

=== Photography Equipment ===
Successful railfanning requires appropriate equipment tailored to observation, photography, and documentation needs. The fundamental tool is a camera, ranging from smartphone cameras for casual documentation to DSLR or mirrorless cameras with telephoto lenses for serious photography. A focal length of 70-200mm is often ideal for capturing trains from safe distances without disrupting operations or requiring trespass. 
[[File:Three different generations of Indian railway locomotives.jpg|thumb|267x267px|'''Credit: Piyush Sharma.''' A photographer taking a still picture of three different generations of locomotives in India. ]]
For still photography with professional cameras, use shutter priority mode with speeds of at least 1/1000 second for trains traveling above 80 km/h, and 1/500 second for slower movements. ISO settings of 400-800 provide flexibility in varying light conditions while maintaining image quality. Continuous autofocus and high-speed drive modes help capture sharp images of fast-moving subjects. Compact point-and-shoot cameras offer discretion and portability, while larger SLRs with fast lenses enable higher-quality enlargements.  

A notebook or smartphone app for logging sightings, train numbers, and times supports documentation. Weather protection for equipment is essential, especially during monsoon seasons. Comfortable clothing, sturdy shoes, sun protection, water, and snacks support extended outdoor sessions. Some railfans carry printed or digital copies of train schedules, locomotive rosters, and maps to identify observed trains and plan sessions effectively. Mobile apps providing real-time train running information have become invaluable tools for modern railfans, though reliance on electronic devices should not compromise awareness.  

=== Photography Techniques ===
Railfan photography combines technical camera skills with compositional awareness and safety considerations. The classic three-quarter &quot;wedge&quot; angle, approximately 30-45 degrees off the track with the locomotive front pointing toward the photographer, provides reliable composition showing both the front face and side of the engine while including the leading line of rails. Positioning relative to sunlight significantly affects image quality. Shooting with the sun behind you illuminates the train evenly, while side lighting creates dramatic shadows and texture. Dawn and dusk provide warm, soft light and often coincide with photogenic atmospheric conditions, though low-light situations require adjusted camera settings. Avoid shooting directly into sunlight unless silhouette effects are intended. 

Composition benefits from including environmental context: landscapes, bridges, stations, or urban settings that situate the train within its surroundings. Framing so geographic features dominate with the train as punctuation often produces more compelling images than isolating the locomotive against blank backgrounds. Avoid distracting elements such as white walls, garbage piles, or cluttered foregrounds that draw attention from the subject. For locomotive identification shots, frame so the number plate is roughly central, as corner sharpness degrades even on quality lenses and digits are unforgiving of softness. Leave open space in the direction of travel to suggest motion rather than having the train appear to exit the frame immediately.  

== Railfanning Locations ==
India offers diverse railfanning locations ranging from bustling metropolitan stations to remote mountain passes. Major terminals like Mumbai Chhatrapati Shivaji Maharaj Terminus (CSMT), Howrah Junction in Kolkata, New Delhi Railway Station, and Chennai Central provide constant activity with varied locomotive types and frequent movements. These stations serve as hubs for multiple zones and divisions, ensuring diverse sightings throughout the day. 
[[File:Darjeeling railway station 02.jpg|thumb|300x300px|'''''Credit: Bernard Gagnon.''''' This is the Darjeeling Mountain Railways in India. Two steam locomotives can be seen here. ]]
Ghat sections present spectacular scenery combined with challenging operations. The Konkan Railway route between Maharashtra and Karnataka features numerous bridges, tunnels, and coastal views. The Western Ghats sections, including Pune-Lonavala-Khandala, Bengaluru-Karwar, and Palakkad Gap routes, offer dramatic gradients, banking operations, and scenic backdrops. The Nilgiri Mountain Railway's operations and the Darjeeling Himalayan Railway's operations through hill stations attract photographers seeking heritage operations in mountainous terrain. 

Specific locations renowned among railfans include Igatpuri on the Mumbai-Nagpur route for banking operations, Vijayawada for its busy junction status, Mughal Sarai (now Pt. Deen Dayal Upadhyaya Junction) for heavy freight movements, and Golden Rock near Tiruchchirappalli for diesel loco shed activities. Bridge locations such as the Godavari Arch Bridge near Rajahmundry, the Chenab Bridge in Jammu and Kashmir (once operational), and numerous viaducts on the Konkan Railway provide elevated vantage points and dramatic compositions. 

Urban locations with elevated tracks, such as sections in Mumbai, Delhi, and Bengaluru, allow safe observation from adjacent roads or buildings. Rural level crossings with open sightlines and minimal obstructions offer opportunities to photograph trains against agricultural or natural landscapes. Researching locations through railfan forums, photo galleries, and maps helps identify productive spots while understanding access routes and safety considerations. 
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      <text bytes="11966" sha1="q6787mppxsiem5xindp3z9xlxqtnx6j" xml:space="preserve">== Introduction ==
Railfanning in '''Indian Railways''' (also called trainspotting in some countries), is a recreational activity where enthusiasts observe and document railway operations, locomotives, rolling stock, and infrastructure. In India, railfanning has grown from a niche pursuit into a widespread hobby supported by online communities, dedicated websites, and social media groups. The vast Indian Railways network, spanning over 68,000 route kilometers across diverse geographical and climatic zones, offers exceptional variety for railfans. 

The practice involves visiting railway stations, level crossings, bridges, and scenic locations to watch trains pass, photograph locomotives and consists, record train movements, and sometimes travel specifically to experience particular routes or locomotive classes. Railfanning differs from ordinary train travel in its focus on observation and documentation rather than transportation alone. Participants often develop specialized knowledge about locomotive types, train schedules, railway history, and operational patterns. 

Railfanning in India presents unique opportunities due to the coexistence of multiple traction types, diverse locomotive classes from different eras, varied geographical settings from Himalayan Mountain railways to coastal routes, and the sheer volume of train movements daily. However, it also requires careful attention to safety, legal compliance, and ethical behavior around railway property.   

''See also: [[wikipedia:Railfan|Railfan]]''  

== Legal Permissions ==
Railfanning in India operates within a legal framework defined primarily by the Railways Act, 1989. Section 147 of this Act addresses trespass, stating that any person entering railway property without lawful authority faces imprisonment up to six months, a fine up to one thousand rupees, or both. This provision makes unauthorized presence on tracks, in yards, on platforms after hours, or in restricted areas a punishable offence. Understanding these legal boundaries is essential for responsible railfanning. 

Photography and videography on railway premises may need permission from railway authorities. Official guidelines mandate obtaining prior permission from the Manager or In-charge of concerned stations or premises before undertaking still or video photography. For extensive photography projects, permits may be obtained by writing to the Joint Director of Public Relations at Rail Bhavan in New Delhi, or to the Senior Public Relations Officer (PRO) of any regional division, or the Chief Public Relations Officer (CPRO) of a zonal railway. Applications should list intended stations and dates, and processing may take several weeks. 

In practice however, many railfans photograph trains from public areas adjacent to tracks, such as roads, bridges, or elevated positions outside railway boundaries, where no permission is required. However, using tripods, large lenses, or conspicuous equipment may attract attention from Railway Protection Force (RPF) or Government Railway Police (GRP) personnel. Discretion, small cameras, and avoiding flash photography help minimize confrontations. Some locations, particularly near security posts or sensitive infrastructure, should be avoided entirely. 

== Safety ==
Safety is the main concern in railfanning. The cardinal rule is maintaining a safe distance from all moving trains and railway infrastructure. Trains cannot stop quickly, may overhang tracks, and can approach silently, especially electric locomotives. Railway tracks are not pedestrian pathways; walking, sitting, or placing equipment on rails is both dangerous and illegal, but it is not well enforced. 

Railfans should remain at least 25 feet from tracks, even when taking quick photographs. This distance accounts for train overhang, debris, and unexpected movements. Elevated positions such as embankments, bridges, or hills provide safer vantage points while offering better compositional opportunities. Never stand between converging tracks, on bridges without proper barriers, or in tunnels where escape routes are limited. 

Respect warning signs, fences, and barriers marking railway property. Do not cross tracks except at designated crossings with clear visibility. Empty trains stabled on tracks may be shunted without warning; never enter stationary consists unless explicitly permitted. If confronted by railway staff or police, remain calm, explain your activity politely, and comply with instructions to leave, if asked.  

== Photo-Videography for Railfanning ==

=== Photography Equipment ===
Successful railfanning requires appropriate equipment tailored to observation, photography, and documentation needs. The fundamental tool is a camera, ranging from smartphone cameras for casual documentation to DSLR or mirrorless cameras with telephoto lenses for serious photography. A focal length of 70-200mm is often ideal for capturing trains from safe distances without disrupting operations or requiring trespass. 
[[File:Three different generations of Indian railway locomotives.jpg|thumb|267x267px|'''Credit: Piyush Sharma.''' A photographer taking a still picture of three different generations of locomotives in India. ]]
For still photography with professional cameras, use shutter priority mode with speeds of at least 1/1000 second for trains traveling above 80 km/h, and 1/500 second for slower movements. ISO settings of 400-800 provide flexibility in varying light conditions while maintaining image quality. Continuous autofocus and high-speed drive modes help capture sharp images of fast-moving subjects. Compact point-and-shoot cameras offer discretion and portability, while larger SLRs with fast lenses enable higher-quality enlargements.  

A notebook or smartphone app for logging sightings, train numbers, and times supports documentation. Weather protection for equipment is essential, especially during monsoon seasons. Comfortable clothing, sturdy shoes, sun protection, water, and snacks support extended outdoor sessions. Some railfans carry printed or digital copies of train schedules, locomotive rosters, and maps to identify observed trains and plan sessions effectively. Mobile apps providing real-time train running information have become invaluable tools for modern railfans, though reliance on electronic devices should not compromise awareness.  

=== Photography Techniques ===
Railfan photography combines technical camera skills with compositional awareness and safety considerations. The classic three-quarter &quot;wedge&quot; angle, approximately 30-45 degrees off the track with the locomotive front pointing toward the photographer, provides reliable composition showing both the front face and side of the engine while including the leading line of rails. Positioning relative to sunlight significantly affects image quality. Shooting with the sun behind you illuminates the train evenly, while side lighting creates dramatic shadows and texture. Dawn and dusk provide warm, soft light and often coincide with photogenic atmospheric conditions, though low-light situations require adjusted camera settings. Avoid shooting directly into sunlight unless silhouette effects are intended. 

Composition benefits from including environmental context: landscapes, bridges, stations, or urban settings that situate the train within its surroundings. Framing so geographic features dominate with the train as punctuation often produces more compelling images than isolating the locomotive against blank backgrounds. Avoid distracting elements such as white walls, garbage piles, or cluttered foregrounds that draw attention from the subject. For locomotive identification shots, frame so the number plate is roughly central, as corner sharpness degrades even on quality lenses and digits are unforgiving of softness. Leave open space in the direction of travel to suggest motion rather than having the train appear to exit the frame immediately.  

== Railfanning Locations ==
India offers diverse railfanning locations ranging from bustling metropolitan stations to remote mountain passes. Major terminals like Mumbai Chhatrapati Shivaji Maharaj Terminus (CSMT), Howrah Junction in Kolkata, New Delhi Railway Station, and Chennai Central provide constant activity with varied locomotive types and frequent movements. These stations serve as hubs for multiple zones and divisions, ensuring diverse sightings throughout the day. 
[[File:Darjeeling railway station 02.jpg|thumb|300x300px|'''''Credit: Bernard Gagnon.''''' This is the Darjeeling Mountain Railways in India. Two steam locomotives can be seen here. ]]
Ghat sections present spectacular scenery combined with challenging operations. The Konkan Railway route between Maharashtra and Karnataka features numerous bridges, tunnels, and coastal views. The Western Ghats sections, including Pune-Lonavala-Khandala, Bengaluru-Karwar, and Palakkad Gap routes, offer dramatic gradients, banking operations, and scenic backdrops. The Nilgiri Mountain Railway's operations and the Darjeeling Himalayan Railway's operations through hill stations attract photographers seeking heritage operations in mountainous terrain. 

Specific locations renowned among railfans include Igatpuri on the Mumbai-Nagpur route for banking operations, Vijayawada for its busy junction status, Mughal Sarai (now Pt. Deen Dayal Upadhyaya Junction) for heavy freight movements, and Golden Rock near Tiruchchirappalli for diesel loco shed activities. Bridge locations such as the Godavari Arch Bridge near Rajahmundry, the Chenab Bridge in Jammu and Kashmir (once operational), and numerous viaducts on the Konkan Railway provide elevated vantage points and dramatic compositions. 

Urban locations with elevated tracks, such as sections in Mumbai, Delhi, and Bengaluru, allow safe observation from adjacent roads or buildings. Rural level crossings with open sightlines and minimal obstructions offer opportunities to photograph trains against agricultural or natural landscapes. Researching locations through railfan forums, photo galleries, and maps helps identify productive spots while understanding access routes and safety considerations.  

== Locomotive Classification ==
Indian Railways uses a systematic nomenclature for locomotive classification that railfans should understand. The code prefix, such as WAP-5 or WDM-2, denotes the locomotive type, followed by a serial number identifying the individual unit.  The first letter indicates gauge: W for broad gauge (5 ft 6 in, called &quot;Wide&quot;), Y for metre gauge (3 ft 3 in, &quot;Yard&quot;), and Z for narrow gauge (2 ft 6 in or 2 ft). 

The second letter denotes motive power: A for AC electric traction, D for diesel traction, and historically M for DC electric or mixed traction in some contexts. The third letter indicates service type: P for passenger locomotives, G for goods (freight) locomotives, M for mixed traffic (suitable for both passenger and freight), and S for shunting duties. A fourth digit or letter may indicate a dual-mode locomotive or model variant. 

Common locomotive classes include WAP series (AC electric passenger): WAP-1 (3800 HP, first AC electric), WAP-4 (5350 HP, high-speed passenger), WAP-5 (6000 HP, 160 km/h capability, Bo-Bo axle arrangement), and WAP-7 (6350 HP, most powerful passenger locomotive, Co-Co). WAG series (AC electric freight) includes WAG-5, WAG-7 (5000 HP), WAG-9 (6120-9000 HP, modern freight), and WAG-12 (12000 HP, most powerful locomotive in India, twin-section). 

Diesel locomotives include WDM series (broad gauge diesel mixed): WDM-2 (2600 HP, most common), WDM-3A (3100 HP), and WDM-3D (3300 HP, modern variant). WDP series denotes diesel passenger locomotives, while WDG series indicates diesel freight locomotives. Understanding these classifications helps railfans identify locomotives quickly, anticipate characteristics, and appreciate technological evolution. 
[[Category:Book:Indian Railways]]</text>
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      <text bytes="13440" sha1="clnhdzx0uukdx07irbwzrgp4few8kvp" xml:space="preserve">== Introduction ==
Railfanning in '''Indian Railways''' (also called trainspotting in some countries), is a recreational activity where enthusiasts observe and document railway operations, locomotives, rolling stock, and infrastructure. In India, railfanning has grown from a niche pursuit into a widespread hobby supported by online communities, dedicated websites, and social media groups. The vast Indian Railways network, spanning over 68,000 route kilometers across diverse geographical and climatic zones, offers exceptional variety for railfans. 

The practice involves visiting railway stations, level crossings, bridges, and scenic locations to watch trains pass, photograph locomotives and consists, record train movements, and sometimes travel specifically to experience particular routes or locomotive classes. Railfanning differs from ordinary train travel in its focus on observation and documentation rather than transportation alone. Participants often develop specialized knowledge about locomotive types, train schedules, railway history, and operational patterns. 

Railfanning in India presents unique opportunities due to the coexistence of multiple traction types, diverse locomotive classes from different eras, varied geographical settings from Himalayan Mountain railways to coastal routes, and the sheer volume of train movements daily. However, it also requires careful attention to safety, legal compliance, and ethical behavior around railway property.   

''See also: [[wikipedia:Railfan|Railfan]]''  

== Legal Permissions ==
Railfanning in India operates within a legal framework defined primarily by the Railways Act, 1989. Section 147 of this Act addresses trespass, stating that any person entering railway property without lawful authority faces imprisonment up to six months, a fine up to one thousand rupees, or both. This provision makes unauthorized presence on tracks, in yards, on platforms after hours, or in restricted areas a punishable offence. Understanding these legal boundaries is essential for responsible railfanning. 

Photography and videography on railway premises may need permission from railway authorities. Official guidelines mandate obtaining prior permission from the Manager or In-charge of concerned stations or premises before undertaking still or video photography. For extensive photography projects, permits may be obtained by writing to the Joint Director of Public Relations at Rail Bhavan in New Delhi, or to the Senior Public Relations Officer (PRO) of any regional division, or the Chief Public Relations Officer (CPRO) of a zonal railway. Applications should list intended stations and dates, and processing may take several weeks. 

In practice however, many railfans photograph trains from public areas adjacent to tracks, such as roads, bridges, or elevated positions outside railway boundaries, where no permission is required. However, using tripods, large lenses, or conspicuous equipment may attract attention from Railway Protection Force (RPF) or Government Railway Police (GRP) personnel. Discretion, small cameras, and avoiding flash photography help minimize confrontations. Some locations, particularly near security posts or sensitive infrastructure, should be avoided entirely. 

== Safety ==
Safety is the main concern in railfanning. The cardinal rule is maintaining a safe distance from all moving trains and railway infrastructure. Trains cannot stop quickly, may overhang tracks, and can approach silently, especially electric locomotives. Railway tracks are not pedestrian pathways; walking, sitting, or placing equipment on rails is both dangerous and illegal, but it is not well enforced. 

Railfans should remain at least 25 feet from tracks, even when taking quick photographs. This distance accounts for train overhang, debris, and unexpected movements. Elevated positions such as embankments, bridges, or hills provide safer vantage points while offering better compositional opportunities. Never stand between converging tracks, on bridges without proper barriers, or in tunnels where escape routes are limited. 

Respect warning signs, fences, and barriers marking railway property. Do not cross tracks except at designated crossings with clear visibility. Empty trains stabled on tracks may be shunted without warning; never enter stationary consists unless explicitly permitted. If confronted by railway staff or police, remain calm, explain your activity politely, and comply with instructions to leave, if asked.  

== Photo-Videography for Railfanning ==

=== Photography Equipment ===
Successful railfanning requires appropriate equipment tailored to observation, photography, and documentation needs. The fundamental tool is a camera, ranging from smartphone cameras for casual documentation to DSLR or mirrorless cameras with telephoto lenses for serious photography. A focal length of 70-200mm is often ideal for capturing trains from safe distances without disrupting operations or requiring trespass. 
[[File:Three different generations of Indian railway locomotives.jpg|thumb|267x267px|'''Credit: Piyush Sharma.''' A photographer taking a still picture of three different generations of locomotives in India. ]]
For still photography with professional cameras, use shutter priority mode with speeds of at least 1/1000 second for trains traveling above 80 km/h, and 1/500 second for slower movements. ISO settings of 400-800 provide flexibility in varying light conditions while maintaining image quality. Continuous autofocus and high-speed drive modes help capture sharp images of fast-moving subjects. Compact point-and-shoot cameras offer discretion and portability, while larger SLRs with fast lenses enable higher-quality enlargements.  

A notebook or smartphone app for logging sightings, train numbers, and times supports documentation. Weather protection for equipment is essential, especially during monsoon seasons. Comfortable clothing, sturdy shoes, sun protection, water, and snacks support extended outdoor sessions. Some railfans carry printed or digital copies of train schedules, locomotive rosters, and maps to identify observed trains and plan sessions effectively. Mobile apps providing real-time train running information have become invaluable tools for modern railfans, though reliance on electronic devices should not compromise awareness.  

=== Photography Techniques ===
Railfan photography combines technical camera skills with compositional awareness and safety considerations. The classic three-quarter &quot;wedge&quot; angle, approximately 30-45 degrees off the track with the locomotive front pointing toward the photographer, provides reliable composition showing both the front face and side of the engine while including the leading line of rails. Positioning relative to sunlight significantly affects image quality. Shooting with the sun behind you illuminates the train evenly, while side lighting creates dramatic shadows and texture. Dawn and dusk provide warm, soft light and often coincide with photogenic atmospheric conditions, though low-light situations require adjusted camera settings. Avoid shooting directly into sunlight unless silhouette effects are intended. 

Composition benefits from including environmental context: landscapes, bridges, stations, or urban settings that situate the train within its surroundings. Framing so geographic features dominate with the train as punctuation often produces more compelling images than isolating the locomotive against blank backgrounds. Avoid distracting elements such as white walls, garbage piles, or cluttered foregrounds that draw attention from the subject. For locomotive identification shots, frame so the number plate is roughly central, as corner sharpness degrades even on quality lenses and digits are unforgiving of softness. Leave open space in the direction of travel to suggest motion rather than having the train appear to exit the frame immediately.  

== Railfanning Locations ==
India offers diverse railfanning locations ranging from bustling metropolitan stations to remote mountain passes. Major terminals like Mumbai Chhatrapati Shivaji Maharaj Terminus (CSMT), Howrah Junction in Kolkata, New Delhi Railway Station, and Chennai Central provide constant activity with varied locomotive types and frequent movements. These stations serve as hubs for multiple zones and divisions, ensuring diverse sightings throughout the day. 
[[File:Darjeeling railway station 02.jpg|thumb|300x300px|'''''Credit: Bernard Gagnon.''''' This is the Darjeeling Mountain Railways in India. Two steam locomotives can be seen here. ]]
Ghat sections present spectacular scenery combined with challenging operations. The Konkan Railway route between Maharashtra and Karnataka features numerous bridges, tunnels, and coastal views. The Western Ghats sections, including Pune-Lonavala-Khandala, Bengaluru-Karwar, and Palakkad Gap routes, offer dramatic gradients, banking operations, and scenic backdrops. The Nilgiri Mountain Railway's operations and the Darjeeling Himalayan Railway's operations through hill stations attract photographers seeking heritage operations in mountainous terrain. 

Specific locations renowned among railfans include Igatpuri on the Mumbai-Nagpur route for banking operations, Vijayawada for its busy junction status, Mughal Sarai (now Pt. Deen Dayal Upadhyaya Junction) for heavy freight movements, and Golden Rock near Tiruchchirappalli for diesel loco shed activities. Bridge locations such as the Godavari Arch Bridge near Rajahmundry, the Chenab Bridge in Jammu and Kashmir (once operational), and numerous viaducts on the Konkan Railway provide elevated vantage points and dramatic compositions. 

Urban locations with elevated tracks, such as sections in Mumbai, Delhi, and Bengaluru, allow safe observation from adjacent roads or buildings. Rural level crossings with open sightlines and minimal obstructions offer opportunities to photograph trains against agricultural or natural landscapes. Researching locations through railfan forums, photo galleries, and maps helps identify productive spots while understanding access routes and safety considerations.  

== Locomotive Classification ==
Indian Railways uses a systematic nomenclature for locomotive classification that railfans should understand. The code prefix, such as WAP-5 or WDM-2, denotes the locomotive type, followed by a serial number identifying the individual unit.  The first letter indicates gauge: W for broad gauge (5 ft 6 in, called &quot;Wide&quot;), Y for metre gauge (3 ft 3 in, &quot;Yard&quot;), and Z for narrow gauge (2 ft 6 in or 2 ft). 

The second letter denotes motive power: A for AC electric traction, D for diesel traction, and historically M for DC electric or mixed traction in some contexts. The third letter indicates service type: P for passenger locomotives, G for goods (freight) locomotives, M for mixed traffic (suitable for both passenger and freight), and S for shunting duties. A fourth digit or letter may indicate a dual-mode locomotive or model variant. 

Common locomotive classes include WAP series (AC electric passenger): WAP-1 (3800 HP, first AC electric), WAP-4 (5350 HP, high-speed passenger), WAP-5 (6000 HP, 160 km/h capability, Bo-Bo axle arrangement), and WAP-7 (6350 HP, most powerful passenger locomotive, Co-Co). WAG series (AC electric freight) includes WAG-5, WAG-7 (5000 HP), WAG-9 (6120-9000 HP, modern freight), and WAG-12 (12000 HP, most powerful locomotive in India, twin-section). 

Diesel locomotives include WDM series (broad gauge diesel mixed): WDM-2 (2600 HP, most common), WDM-3A (3100 HP), and WDM-3D (3300 HP, modern variant). WDP series denotes diesel passenger locomotives, while WDG series indicates diesel freight locomotives. Understanding these classifications helps railfans identify locomotives quickly, anticipate characteristics, and appreciate technological evolution.  

== Planning Sessions ==
Effective railfanning requires planning around train schedules to maximize sightings of desired locomotives, train types, or specific movements. Indian Railways publishes official timetables available online and through mobile applications, providing departure and arrival times at stations along each route. Real-time train running information apps show current locations, delays, and expected arrival times at specific stations, enabling railfans to time their visits precisely. 

Planning sessions involves identifying target trains based on locomotive allocation, route, and timing. Premium trains like Rajdhani Express, Shatabdi Express, and Vande Bharat Express often feature modern locomotives or self-propelled trainsets and maintain relatively punctual schedules. Freight trains, while less predictable, offer opportunities to observe powerful WAG and WDG class locomotives, sometimes in multiple-unit operations. 

Consider operational patterns when planning: morning and evening hours typically see concentrated passenger train movements, while freight traffic may peak during night hours on certain routes. Junction stations experience varied traffic as trains from multiple directions converge and diverge. Banking operations, where additional locomotives assist trains climbing steep gradients, occur at specific locations like Igatpuri, Khandala, and Ghat sections, creating opportunities to observe multiple locomotives per train. 
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      <text bytes="15615" sha1="2z3v0uspzl0dla52d6hv70ame058ed2" xml:space="preserve">== Introduction ==
Railfanning in '''Indian Railways''' (also called trainspotting in some countries), is a recreational activity where enthusiasts observe and document railway operations, locomotives, rolling stock, and infrastructure. In India, railfanning has grown from a niche pursuit into a widespread hobby supported by online communities, dedicated websites, and social media groups. The vast Indian Railways network, spanning over 68,000 route kilometers across diverse geographical and climatic zones, offers exceptional variety for railfans. 

The practice involves visiting railway stations, level crossings, bridges, and scenic locations to watch trains pass, photograph locomotives and consists, record train movements, and sometimes travel specifically to experience particular routes or locomotive classes. Railfanning differs from ordinary train travel in its focus on observation and documentation rather than transportation alone. Participants often develop specialized knowledge about locomotive types, train schedules, railway history, and operational patterns. 

Railfanning in India presents unique opportunities due to the coexistence of multiple traction types, diverse locomotive classes from different eras, varied geographical settings from Himalayan Mountain railways to coastal routes, and the sheer volume of train movements daily. However, it also requires careful attention to safety, legal compliance, and ethical behavior around railway property.   

''See also: [[wikipedia:Railfan|Railfan]]''  

== Legal Permissions ==
Railfanning in India operates within a legal framework defined primarily by the Railways Act, 1989. Section 147 of this Act addresses trespass, stating that any person entering railway property without lawful authority faces imprisonment up to six months, a fine up to one thousand rupees, or both. This provision makes unauthorized presence on tracks, in yards, on platforms after hours, or in restricted areas a punishable offence. Understanding these legal boundaries is essential for responsible railfanning. 

Photography and videography on railway premises may need permission from railway authorities. Official guidelines mandate obtaining prior permission from the Manager or In-charge of concerned stations or premises before undertaking still or video photography. For extensive photography projects, permits may be obtained by writing to the Joint Director of Public Relations at Rail Bhavan in New Delhi, or to the Senior Public Relations Officer (PRO) of any regional division, or the Chief Public Relations Officer (CPRO) of a zonal railway. Applications should list intended stations and dates, and processing may take several weeks. 

In practice however, many railfans photograph trains from public areas adjacent to tracks, such as roads, bridges, or elevated positions outside railway boundaries, where no permission is required. However, using tripods, large lenses, or conspicuous equipment may attract attention from Railway Protection Force (RPF) or Government Railway Police (GRP) personnel. Discretion, small cameras, and avoiding flash photography help minimize confrontations. Some locations, particularly near security posts or sensitive infrastructure, should be avoided entirely. 

== Safety ==
Safety is the main concern in railfanning. The cardinal rule is maintaining a safe distance from all moving trains and railway infrastructure. Trains cannot stop quickly, may overhang tracks, and can approach silently, especially electric locomotives. Railway tracks are not pedestrian pathways; walking, sitting, or placing equipment on rails is both dangerous and illegal, but it is not well enforced. 

Railfans should remain at least 25 feet from tracks, even when taking quick photographs. This distance accounts for train overhang, debris, and unexpected movements. Elevated positions such as embankments, bridges, or hills provide safer vantage points while offering better compositional opportunities. Never stand between converging tracks, on bridges without proper barriers, or in tunnels where escape routes are limited. 

Respect warning signs, fences, and barriers marking railway property. Do not cross tracks except at designated crossings with clear visibility. Empty trains stabled on tracks may be shunted without warning; never enter stationary consists unless explicitly permitted. If confronted by railway staff or police, remain calm, explain your activity politely, and comply with instructions to leave, if asked.  

== Photo-Videography for Railfanning ==

=== Photography Equipment ===
Successful railfanning requires appropriate equipment tailored to observation, photography, and documentation needs. The fundamental tool is a camera, ranging from smartphone cameras for casual documentation to DSLR or mirrorless cameras with telephoto lenses for serious photography. A focal length of 70-200mm is often ideal for capturing trains from safe distances without disrupting operations or requiring trespass. 
[[File:Three different generations of Indian railway locomotives.jpg|thumb|267x267px|'''Credit: Piyush Sharma.''' A photographer taking a still picture of three different generations of locomotives in India. ]]
For still photography with professional cameras, use shutter priority mode with speeds of at least 1/1000 second for trains traveling above 80 km/h, and 1/500 second for slower movements. ISO settings of 400-800 provide flexibility in varying light conditions while maintaining image quality. Continuous autofocus and high-speed drive modes help capture sharp images of fast-moving subjects. Compact point-and-shoot cameras offer discretion and portability, while larger SLRs with fast lenses enable higher-quality enlargements.  

A notebook or smartphone app for logging sightings, train numbers, and times supports documentation. Weather protection for equipment is essential, especially during monsoon seasons. Comfortable clothing, sturdy shoes, sun protection, water, and snacks support extended outdoor sessions. Some railfans carry printed or digital copies of train schedules, locomotive rosters, and maps to identify observed trains and plan sessions effectively. Mobile apps providing real-time train running information have become invaluable tools for modern railfans, though reliance on electronic devices should not compromise awareness.  

=== Photography Techniques ===
Railfan photography combines technical camera skills with compositional awareness and safety considerations. The classic three-quarter &quot;wedge&quot; angle, approximately 30-45 degrees off the track with the locomotive front pointing toward the photographer, provides reliable composition showing both the front face and side of the engine while including the leading line of rails. Positioning relative to sunlight significantly affects image quality. Shooting with the sun behind you illuminates the train evenly, while side lighting creates dramatic shadows and texture. Dawn and dusk provide warm, soft light and often coincide with photogenic atmospheric conditions, though low-light situations require adjusted camera settings. Avoid shooting directly into sunlight unless silhouette effects are intended. 

Composition benefits from including environmental context: landscapes, bridges, stations, or urban settings that situate the train within its surroundings. Framing so geographic features dominate with the train as punctuation often produces more compelling images than isolating the locomotive against blank backgrounds. Avoid distracting elements such as white walls, garbage piles, or cluttered foregrounds that draw attention from the subject. For locomotive identification shots, frame so the number plate is roughly central, as corner sharpness degrades even on quality lenses and digits are unforgiving of softness. Leave open space in the direction of travel to suggest motion rather than having the train appear to exit the frame immediately.  

== Railfanning Locations ==
India offers diverse railfanning locations ranging from bustling metropolitan stations to remote mountain passes. Major terminals like Mumbai Chhatrapati Shivaji Maharaj Terminus (CSMT), Howrah Junction in Kolkata, New Delhi Railway Station, and Chennai Central provide constant activity with varied locomotive types and frequent movements. These stations serve as hubs for multiple zones and divisions, ensuring diverse sightings throughout the day. 
[[File:Darjeeling railway station 02.jpg|thumb|300x300px|'''''Credit: Bernard Gagnon.''''' This is the Darjeeling Mountain Railways in India. Two steam locomotives can be seen here. ]]
Ghat sections present spectacular scenery combined with challenging operations. The Konkan Railway route between Maharashtra and Karnataka features numerous bridges, tunnels, and coastal views. The Western Ghats sections, including Pune-Lonavala-Khandala, Bengaluru-Karwar, and Palakkad Gap routes, offer dramatic gradients, banking operations, and scenic backdrops. The Nilgiri Mountain Railway's operations and the Darjeeling Himalayan Railway's operations through hill stations attract photographers seeking heritage operations in mountainous terrain. 

Specific locations renowned among railfans include Igatpuri on the Mumbai-Nagpur route for banking operations, Vijayawada for its busy junction status, Mughal Sarai (now Pt. Deen Dayal Upadhyaya Junction) for heavy freight movements, and Golden Rock near Tiruchchirappalli for diesel loco shed activities. Bridge locations such as the Godavari Arch Bridge near Rajahmundry, the Chenab Bridge in Jammu and Kashmir (once operational), and numerous viaducts on the Konkan Railway provide elevated vantage points and dramatic compositions. 

Urban locations with elevated tracks, such as sections in Mumbai, Delhi, and Bengaluru, allow safe observation from adjacent roads or buildings. Rural level crossings with open sightlines and minimal obstructions offer opportunities to photograph trains against agricultural or natural landscapes. Researching locations through railfan forums, photo galleries, and maps helps identify productive spots while understanding access routes and safety considerations.  

== Locomotive Classification ==
Indian Railways uses a systematic nomenclature for locomotive classification that railfans should understand. The code prefix, such as WAP-5 or WDM-2, denotes the locomotive type, followed by a serial number identifying the individual unit.  The first letter indicates gauge: W for broad gauge (5 ft 6 in, called &quot;Wide&quot;), Y for metre gauge (3 ft 3 in, &quot;Yard&quot;), and Z for narrow gauge (2 ft 6 in or 2 ft). 

The second letter denotes motive power: A for AC electric traction, D for diesel traction, and historically M for DC electric or mixed traction in some contexts. The third letter indicates service type: P for passenger locomotives, G for goods (freight) locomotives, M for mixed traffic (suitable for both passenger and freight), and S for shunting duties. A fourth digit or letter may indicate a dual-mode locomotive or model variant. 

Common locomotive classes include WAP series (AC electric passenger): WAP-1 (3800 HP, first AC electric), WAP-4 (5350 HP, high-speed passenger), WAP-5 (6000 HP, 160 km/h capability, Bo-Bo axle arrangement), and WAP-7 (6350 HP, most powerful passenger locomotive, Co-Co). WAG series (AC electric freight) includes WAG-5, WAG-7 (5000 HP), WAG-9 (6120-9000 HP, modern freight), and WAG-12 (12000 HP, most powerful locomotive in India, twin-section). 

Diesel locomotives include WDM series (broad gauge diesel mixed): WDM-2 (2600 HP, most common), WDM-3A (3100 HP), and WDM-3D (3300 HP, modern variant). WDP series denotes diesel passenger locomotives, while WDG series indicates diesel freight locomotives. Understanding these classifications helps railfans identify locomotives quickly, anticipate characteristics, and appreciate technological evolution.  

== Planning Sessions ==
Effective railfanning requires planning around train schedules to maximize sightings of desired locomotives, train types, or specific movements. Indian Railways publishes official timetables available online and through mobile applications, providing departure and arrival times at stations along each route. Real-time train running information apps show current locations, delays, and expected arrival times at specific stations, enabling railfans to time their visits precisely. 

Planning sessions involves identifying target trains based on locomotive allocation, route, and timing. Premium trains like Rajdhani Express, Shatabdi Express, and Vande Bharat Express often feature modern locomotives or self-propelled trainsets and maintain relatively punctual schedules. Freight trains, while less predictable, offer opportunities to observe powerful WAG and WDG class locomotives, sometimes in multiple-unit operations. 

Consider operational patterns when planning: morning and evening hours typically see concentrated passenger train movements, while freight traffic may peak during night hours on certain routes. Junction stations experience varied traffic as trains from multiple directions converge and diverge. Banking operations, where additional locomotives assist trains climbing steep gradients, occur at specific locations like Igatpuri, Khandala, and Ghat sections, creating opportunities to observe multiple locomotives per train.  

== Heritage Railways ==
Indian Railways maintains significant heritage assets reflecting its 170-year history. Approximately 230 steam locomotives are preserved at museums, heritage parks, and prominent locations across India, alongside 110 vintage coaches and wagons. The National Rail Museum in New Delhi houses an extensive collection including life-size exhibits of vintage steam, diesel, and electric locomotives, coaches, saloons, wagons, and cranes dating back to 1862. 

About 16 steam locomotives are maintained as working heritage, capable of hauling tourist trains and ceremonial runs despite not being in regular service. The Rewari Steam Centre maintains six broad gauge and four metre gauge working steam locomotives, including the iconic Fairy Queen from 1855, recognized by Guinness World Records as the oldest working locomotive globally. Other preserved locomotives like Akbar have appeared in Bollywood films, demonstrating continued cultural relevance. 
[[File:Train at Summer Hill railway station on the Kalka–Shimla Railway,1.jpg|thumb|302x302px|'''''Credit: Rajani Gairshail.''''' A heritage train arriving at Summer Hill railway station on the Kalka-Shimla Railway. ]]
Heritage routes operating with steam or vintage equipment include the Darjeeling Himalayan Railway (narrow gauge, rack-assisted sections), Nilgiri Mountain Railway (metre gauge, rack-and-pinion), Kalka-Shimla Railway (narrow gauge), and Matheran Hill Railway (narrow gauge). These mountain railways offer railfans opportunities to experience historical operations in scenic settings. Special heritage tours and rail cruise services occasionally operate using preserved locomotives and vintage coaches, providing unique experiences for enthusiasts willing to travel and book in advance. 

Many preserved locomotives represent specific design phases: pre-1905 non-standard designs, 1905-1928 BESA standardized designs, 1928-1939 IRS designs, wartime adaptations, and post-war IRS designs until steam production ceased around 1970. Recognizing these lineages helps railfans appreciate technological evolution and the diversity of locomotive types that once operated across India. 
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