그림:2-bit ALU.png
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[edit] Summary
Description |
English: An simple example arithmetic logic unit (ALU) that does AND, OR, XOR, and addition.
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Own work created with Eagle by Cadsoft |
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GFDL |
[edit] EN
This ALU is a 2-bit ALU with two inputs (operands) named A and B: A[0] & B[0] is the least-significant bit and A[1] & B[1] is the most-significant bit
Each bit of this ALU is identical with the exception of the handling of the carry bit. The handling of one bit is explained below.
The A & B inputs lead into the four gates on the left (from top to bottom): XOR, AND, OR, and XOR. The top three gates perform XOR, AND, and OR operations on A & B. The last gate is the initial gate into a full adder.
The final step to each bit is the multiplexer at the end. The 3-bit OP input (from the control unit) determines which of the functions is outputted:
- OP = 000 → XOR
- OP = 001 → AND
- OP = 010 → OR
- OP = 011 → Addition
Clearly, the last four inputs of the multiplexer are free for other functions (subtraction, multiplication, division, NOT A, NOT B, etc.). Although OP[2] is not currently used (though it is included and connected), it will be needed in order to use more than the 4 operations listed above.
The carry in and carry out are typically connected to some form of a status register.
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